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f9ff0f30 SR |
1 | #ifndef _ASM_POWERPC_EXCEPTION_H |
2 | #define _ASM_POWERPC_EXCEPTION_H | |
3 | /* | |
4 | * Extracted from head_64.S | |
5 | * | |
6 | * PowerPC version | |
7 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
8 | * | |
9 | * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP | |
10 | * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> | |
11 | * Adapted for Power Macintosh by Paul Mackerras. | |
12 | * Low-level exception handlers and MMU support | |
13 | * rewritten by Paul Mackerras. | |
14 | * Copyright (C) 1996 Paul Mackerras. | |
15 | * | |
16 | * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and | |
17 | * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com | |
18 | * | |
19 | * This file contains the low-level support and setup for the | |
20 | * PowerPC-64 platform, including trap and interrupt dispatch. | |
21 | * | |
22 | * This program is free software; you can redistribute it and/or | |
23 | * modify it under the terms of the GNU General Public License | |
24 | * as published by the Free Software Foundation; either version | |
25 | * 2 of the License, or (at your option) any later version. | |
26 | */ | |
27 | /* | |
28 | * The following macros define the code that appears as | |
29 | * the prologue to each of the exception handlers. They | |
30 | * are split into two parts to allow a single kernel binary | |
31 | * to be used for pSeries and iSeries. | |
32 | * | |
33 | * We make as much of the exception code common between native | |
34 | * exception handlers (including pSeries LPAR) and iSeries LPAR | |
35 | * implementations as possible. | |
36 | */ | |
da2bc464 | 37 | #include <asm/head-64.h> |
f9ff0f30 | 38 | |
8c388514 | 39 | /* PACA save area offsets (exgen, exmc, etc) */ |
f9ff0f30 SR |
40 | #define EX_R9 0 |
41 | #define EX_R10 8 | |
42 | #define EX_R11 16 | |
43 | #define EX_R12 24 | |
44 | #define EX_R13 32 | |
36670fcf NP |
45 | #define EX_DAR 40 |
46 | #define EX_DSISR 48 | |
47 | #define EX_CCR 52 | |
635942ae NP |
48 | #define EX_CFAR 56 |
49 | #define EX_PPR 64 | |
8568f1e0 | 50 | #if defined(CONFIG_RELOCATABLE) |
635942ae | 51 | #define EX_CTR 72 |
635942ae | 52 | #define EX_SIZE 10 /* size in u64 units */ |
8568f1e0 NP |
53 | #else |
54 | #define EX_SIZE 9 /* size in u64 units */ | |
55 | #endif | |
dbeea1d6 | 56 | |
ba41e1e1 BS |
57 | /* |
58 | * maximum recursive depth of MCE exceptions | |
59 | */ | |
60 | #define MAX_MCE_DEPTH 4 | |
61 | ||
dbeea1d6 NP |
62 | /* |
63 | * EX_LR is only used in EXSLB and where it does not overlap with EX_DAR | |
64 | * EX_CCR similarly with DSISR, but being 4 byte registers there is a hole | |
65 | * in the save area so it's not necessary to overlap them. Could be used | |
66 | * for future savings though if another 4 byte register was to be saved. | |
67 | */ | |
68 | #define EX_LR EX_DAR | |
8c388514 | 69 | |
635942ae NP |
70 | /* |
71 | * EX_R3 is only used by the bad_stack handler. bad_stack reloads and | |
72 | * saves DAR from SPRN_DAR, and EX_DAR is not used. So EX_R3 can overlap | |
73 | * with EX_DAR. | |
74 | */ | |
75 | #define EX_R3 EX_DAR | |
76 | ||
cc437c1d NP |
77 | #define STF_ENTRY_BARRIER_SLOT \ |
78 | STF_ENTRY_BARRIER_FIXUP_SECTION; \ | |
79 | nop; \ | |
80 | nop; \ | |
81 | nop | |
82 | ||
83 | #define STF_EXIT_BARRIER_SLOT \ | |
84 | STF_EXIT_BARRIER_FIXUP_SECTION; \ | |
85 | nop; \ | |
86 | nop; \ | |
87 | nop; \ | |
88 | nop; \ | |
89 | nop; \ | |
90 | nop | |
91 | ||
92 | /* | |
93 | * r10 must be free to use, r13 must be paca | |
94 | */ | |
95 | #define INTERRUPT_TO_KERNEL \ | |
96 | STF_ENTRY_BARRIER_SLOT | |
97 | ||
aa8a5e00 ME |
98 | /* |
99 | * Macros for annotating the expected destination of (h)rfid | |
100 | * | |
101 | * The nop instructions allow us to insert one or more instructions to flush the | |
102 | * L1-D cache when returning to userspace or a guest. | |
103 | */ | |
104 | #define RFI_FLUSH_SLOT \ | |
105 | RFI_FLUSH_FIXUP_SECTION; \ | |
106 | nop; \ | |
107 | nop; \ | |
108 | nop | |
50e51c13 NP |
109 | |
110 | #define RFI_TO_KERNEL \ | |
111 | rfid | |
112 | ||
113 | #define RFI_TO_USER \ | |
cc437c1d | 114 | STF_EXIT_BARRIER_SLOT; \ |
aa8a5e00 ME |
115 | RFI_FLUSH_SLOT; \ |
116 | rfid; \ | |
117 | b rfi_flush_fallback | |
50e51c13 NP |
118 | |
119 | #define RFI_TO_USER_OR_KERNEL \ | |
cc437c1d | 120 | STF_EXIT_BARRIER_SLOT; \ |
aa8a5e00 ME |
121 | RFI_FLUSH_SLOT; \ |
122 | rfid; \ | |
123 | b rfi_flush_fallback | |
50e51c13 NP |
124 | |
125 | #define RFI_TO_GUEST \ | |
cc437c1d | 126 | STF_EXIT_BARRIER_SLOT; \ |
aa8a5e00 ME |
127 | RFI_FLUSH_SLOT; \ |
128 | rfid; \ | |
129 | b rfi_flush_fallback | |
50e51c13 NP |
130 | |
131 | #define HRFI_TO_KERNEL \ | |
132 | hrfid | |
133 | ||
134 | #define HRFI_TO_USER \ | |
cc437c1d | 135 | STF_EXIT_BARRIER_SLOT; \ |
aa8a5e00 ME |
136 | RFI_FLUSH_SLOT; \ |
137 | hrfid; \ | |
138 | b hrfi_flush_fallback | |
50e51c13 NP |
139 | |
140 | #define HRFI_TO_USER_OR_KERNEL \ | |
cc437c1d | 141 | STF_EXIT_BARRIER_SLOT; \ |
aa8a5e00 ME |
142 | RFI_FLUSH_SLOT; \ |
143 | hrfid; \ | |
144 | b hrfi_flush_fallback | |
50e51c13 NP |
145 | |
146 | #define HRFI_TO_GUEST \ | |
cc437c1d | 147 | STF_EXIT_BARRIER_SLOT; \ |
aa8a5e00 ME |
148 | RFI_FLUSH_SLOT; \ |
149 | hrfid; \ | |
150 | b hrfi_flush_fallback | |
50e51c13 NP |
151 | |
152 | #define HRFI_TO_UNKNOWN \ | |
cc437c1d | 153 | STF_EXIT_BARRIER_SLOT; \ |
aa8a5e00 ME |
154 | RFI_FLUSH_SLOT; \ |
155 | hrfid; \ | |
156 | b hrfi_flush_fallback | |
50e51c13 | 157 | |
4700dfaf | 158 | #ifdef CONFIG_RELOCATABLE |
1707dd16 | 159 | #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ |
4700dfaf MN |
160 | mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ |
161 | LOAD_HANDLER(r12,label); \ | |
bc2e6c6a | 162 | mtctr r12; \ |
4700dfaf MN |
163 | mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ |
164 | li r10,MSR_RI; \ | |
165 | mtmsrd r10,1; /* Set RI (EE=0) */ \ | |
bc2e6c6a | 166 | bctr; |
4700dfaf MN |
167 | #else |
168 | /* If not relocatable, we can jump directly -- and save messing with LR */ | |
1707dd16 | 169 | #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ |
4700dfaf MN |
170 | mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ |
171 | mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ | |
172 | li r10,MSR_RI; \ | |
173 | mtmsrd r10,1; /* Set RI (EE=0) */ \ | |
174 | b label; | |
175 | #endif | |
1707dd16 PM |
176 | #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ |
177 | __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ | |
4700dfaf MN |
178 | |
179 | /* | |
180 | * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on | |
181 | * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which | |
182 | * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. | |
183 | */ | |
184 | #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ | |
1707dd16 | 185 | EXCEPTION_PROLOG_0(area); \ |
4700dfaf MN |
186 | EXCEPTION_PROLOG_1(area, extra, vec); \ |
187 | EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) | |
188 | ||
f9ff0f30 SR |
189 | /* |
190 | * We're short on space and time in the exception prolog, so we can't | |
27510235 ME |
191 | * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. |
192 | * Instead we get the base of the kernel from paca->kernelbase and or in the low | |
193 | * part of label. This requires that the label be within 64KB of kernelbase, and | |
194 | * that kernelbase be 64K aligned. | |
f9ff0f30 | 195 | */ |
f9ff0f30 | 196 | #define LOAD_HANDLER(reg, label) \ |
d8d42b05 | 197 | ld reg,PACAKBASE(r13); /* get high part of &label */ \ |
e6740ae6 | 198 | ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label); |
f9ff0f30 | 199 | |
fb479e44 NP |
200 | #define __LOAD_HANDLER(reg, label) \ |
201 | ld reg,PACAKBASE(r13); \ | |
202 | ori reg,reg,(ABS_ADDR(label))@l; | |
203 | ||
a97a65d5 NP |
204 | /* |
205 | * Branches from unrelocated code (e.g., interrupts) to labels outside | |
206 | * head-y require >64K offsets. | |
207 | */ | |
208 | #define __LOAD_FAR_HANDLER(reg, label) \ | |
209 | ld reg,PACAKBASE(r13); \ | |
210 | ori reg,reg,(ABS_ADDR(label))@l; \ | |
211 | addis reg,reg,(ABS_ADDR(label))@h; | |
212 | ||
a5d4f3ad BH |
213 | /* Exception register prefixes */ |
214 | #define EXC_HV H | |
215 | #define EXC_STD | |
216 | ||
4700dfaf MN |
217 | #if defined(CONFIG_RELOCATABLE) |
218 | /* | |
bc2e6c6a MN |
219 | * If we support interrupts with relocation on AND we're a relocatable kernel, |
220 | * we need to use CTR to get to the 2nd level handler. So, save/restore it | |
221 | * when required. | |
4700dfaf | 222 | */ |
bc2e6c6a MN |
223 | #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) |
224 | #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) | |
225 | #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg | |
4700dfaf | 226 | #else |
bc2e6c6a MN |
227 | /* ...else CTR is unused and in register. */ |
228 | #define SAVE_CTR(reg, area) | |
229 | #define GET_CTR(reg, area) mfctr reg | |
230 | #define RESTORE_CTR(reg, area) | |
4700dfaf MN |
231 | #endif |
232 | ||
13e7a8e8 HM |
233 | /* |
234 | * PPR save/restore macros used in exceptions_64s.S | |
235 | * Used for P7 or later processors | |
236 | */ | |
237 | #define SAVE_PPR(area, ra, rb) \ | |
238 | BEGIN_FTR_SECTION_NESTED(940) \ | |
239 | ld ra,PACACURRENT(r13); \ | |
240 | ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ | |
241 | std rb,TASKTHREADPPR(ra); \ | |
242 | END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) | |
243 | ||
244 | #define RESTORE_PPR_PACA(area, ra) \ | |
245 | BEGIN_FTR_SECTION_NESTED(941) \ | |
246 | ld ra,area+EX_PPR(r13); \ | |
247 | mtspr SPRN_PPR,ra; \ | |
248 | END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) | |
249 | ||
13e7a8e8 | 250 | /* |
1707dd16 | 251 | * Get an SPR into a register if the CPU has the given feature |
13e7a8e8 | 252 | */ |
1707dd16 | 253 | #define OPT_GET_SPR(ra, spr, ftr) \ |
13e7a8e8 | 254 | BEGIN_FTR_SECTION_NESTED(943) \ |
1707dd16 PM |
255 | mfspr ra,spr; \ |
256 | END_FTR_SECTION_NESTED(ftr,ftr,943) | |
13e7a8e8 | 257 | |
d410ae21 MS |
258 | /* |
259 | * Set an SPR from a register if the CPU has the given feature | |
260 | */ | |
261 | #define OPT_SET_SPR(ra, spr, ftr) \ | |
262 | BEGIN_FTR_SECTION_NESTED(943) \ | |
263 | mtspr spr,ra; \ | |
264 | END_FTR_SECTION_NESTED(ftr,ftr,943) | |
265 | ||
1707dd16 PM |
266 | /* |
267 | * Save a register to the PACA if the CPU has the given feature | |
268 | */ | |
269 | #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ | |
270 | BEGIN_FTR_SECTION_NESTED(943) \ | |
271 | std ra,offset(r13); \ | |
272 | END_FTR_SECTION_NESTED(ftr,ftr,943) | |
273 | ||
544686ca NP |
274 | #define EXCEPTION_PROLOG_0(area) \ |
275 | GET_PACA(r13); \ | |
44e9309f | 276 | std r9,area+EX_R9(r13); /* save r9 */ \ |
1707dd16 PM |
277 | OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ |
278 | HMT_MEDIUM; \ | |
44e9309f | 279 | std r10,area+EX_R10(r13); /* save r10 - r12 */ \ |
1707dd16 PM |
280 | OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) |
281 | ||
282 | #define __EXCEPTION_PROLOG_1(area, extra, vec) \ | |
283 | OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ | |
284 | OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ | |
cc437c1d | 285 | INTERRUPT_TO_KERNEL; \ |
bc2e6c6a | 286 | SAVE_CTR(r10, area); \ |
b01c8b54 PM |
287 | mfcr r9; \ |
288 | extra(vec); \ | |
289 | std r11,area+EX_R11(r13); \ | |
290 | std r12,area+EX_R12(r13); \ | |
291 | GET_SCRATCH0(r10); \ | |
292 | std r10,area+EX_R13(r13) | |
293 | #define EXCEPTION_PROLOG_1(area, extra, vec) \ | |
294 | __EXCEPTION_PROLOG_1(area, extra, vec) | |
7180e3e6 | 295 | |
a5d4f3ad | 296 | #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ |
1f6a93e4 | 297 | ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ |
a5d4f3ad | 298 | mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ |
f9ff0f30 | 299 | LOAD_HANDLER(r12,label) \ |
a5d4f3ad BH |
300 | mtspr SPRN_##h##SRR0,r12; \ |
301 | mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ | |
302 | mtspr SPRN_##h##SRR1,r10; \ | |
222f20f1 | 303 | h##RFI_TO_KERNEL; \ |
f9ff0f30 | 304 | b . /* prevent speculative execution */ |
b01c8b54 | 305 | #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ |
a5d4f3ad | 306 | __EXCEPTION_PROLOG_PSERIES_1(label, h) |
f9ff0f30 | 307 | |
83a980f7 NP |
308 | /* _NORI variant keeps MSR_RI clear */ |
309 | #define __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ | |
310 | ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ | |
311 | xori r10,r10,MSR_RI; /* Clear MSR_RI */ \ | |
312 | mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ | |
313 | LOAD_HANDLER(r12,label) \ | |
314 | mtspr SPRN_##h##SRR0,r12; \ | |
315 | mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ | |
316 | mtspr SPRN_##h##SRR1,r10; \ | |
222f20f1 | 317 | h##RFI_TO_KERNEL; \ |
83a980f7 NP |
318 | b . /* prevent speculative execution */ |
319 | ||
320 | #define EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ | |
321 | __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) | |
322 | ||
b01c8b54 | 323 | #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ |
1707dd16 | 324 | EXCEPTION_PROLOG_0(area); \ |
b01c8b54 | 325 | EXCEPTION_PROLOG_1(area, extra, vec); \ |
a5d4f3ad | 326 | EXCEPTION_PROLOG_PSERIES_1(label, h); |
c5a8c0c9 | 327 | |
da2bc464 ME |
328 | #define __KVMTEST(h, n) \ |
329 | lbz r10,HSTATE_IN_GUEST(r13); \ | |
b01c8b54 | 330 | cmpwi r10,0; \ |
da2bc464 | 331 | bne do_kvm_##h##n |
b01c8b54 | 332 | |
dd96b2c2 AK |
333 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
334 | /* | |
335 | * If hv is possible, interrupts come into to the hv version | |
336 | * of the kvmppc_interrupt code, which then jumps to the PR handler, | |
337 | * kvmppc_interrupt_pr, if the guest is a PR guest. | |
338 | */ | |
339 | #define kvmppc_interrupt kvmppc_interrupt_hv | |
340 | #else | |
341 | #define kvmppc_interrupt kvmppc_interrupt_pr | |
342 | #endif | |
343 | ||
b51351e2 NP |
344 | /* |
345 | * Branch to label using its 0xC000 address. This results in instruction | |
346 | * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned | |
347 | * on using mtmsr rather than rfid. | |
348 | * | |
349 | * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than | |
350 | * load KBASE for a slight optimisation. | |
351 | */ | |
352 | #define BRANCH_TO_C000(reg, label) \ | |
353 | __LOAD_HANDLER(reg, label); \ | |
354 | mtctr reg; \ | |
355 | bctr | |
356 | ||
fb479e44 NP |
357 | #ifdef CONFIG_RELOCATABLE |
358 | #define BRANCH_TO_COMMON(reg, label) \ | |
359 | __LOAD_HANDLER(reg, label); \ | |
360 | mtctr reg; \ | |
361 | bctr | |
362 | ||
be5c5e84 ME |
363 | #define BRANCH_LINK_TO_FAR(label) \ |
364 | __LOAD_FAR_HANDLER(r12, label); \ | |
365 | mtctr r12; \ | |
2337d207 NP |
366 | bctrl |
367 | ||
a97a65d5 NP |
368 | /* |
369 | * KVM requires __LOAD_FAR_HANDLER. | |
370 | * | |
371 | * __BRANCH_TO_KVM_EXIT branches are also a special case because they | |
372 | * explicitly use r9 then reload it from PACA before branching. Hence | |
373 | * the double-underscore. | |
374 | */ | |
375 | #define __BRANCH_TO_KVM_EXIT(area, label) \ | |
376 | mfctr r9; \ | |
377 | std r9,HSTATE_SCRATCH1(r13); \ | |
378 | __LOAD_FAR_HANDLER(r9, label); \ | |
379 | mtctr r9; \ | |
380 | ld r9,area+EX_R9(r13); \ | |
381 | bctr | |
382 | ||
fb479e44 NP |
383 | #else |
384 | #define BRANCH_TO_COMMON(reg, label) \ | |
385 | b label | |
386 | ||
be5c5e84 | 387 | #define BRANCH_LINK_TO_FAR(label) \ |
2337d207 NP |
388 | bl label |
389 | ||
a97a65d5 NP |
390 | #define __BRANCH_TO_KVM_EXIT(area, label) \ |
391 | ld r9,area+EX_R9(r13); \ | |
392 | b label | |
393 | ||
fb479e44 NP |
394 | #endif |
395 | ||
c4f3b52c NP |
396 | /* Do not enable RI */ |
397 | #define EXCEPTION_PROLOG_PSERIES_NORI(area, label, h, extra, vec) \ | |
398 | EXCEPTION_PROLOG_0(area); \ | |
399 | EXCEPTION_PROLOG_1(area, extra, vec); \ | |
400 | EXCEPTION_PROLOG_PSERIES_1_NORI(label, h); | |
401 | ||
a97a65d5 | 402 | |
d3918e7f | 403 | #define __KVM_HANDLER(area, h, n) \ |
0acb9111 PM |
404 | BEGIN_FTR_SECTION_NESTED(947) \ |
405 | ld r10,area+EX_CFAR(r13); \ | |
406 | std r10,HSTATE_CFAR(r13); \ | |
407 | END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ | |
4b8473c9 PM |
408 | BEGIN_FTR_SECTION_NESTED(948) \ |
409 | ld r10,area+EX_PPR(r13); \ | |
410 | std r10,HSTATE_PPR(r13); \ | |
411 | END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ | |
b01c8b54 | 412 | ld r10,area+EX_R10(r13); \ |
0acb9111 | 413 | std r12,HSTATE_SCRATCH0(r13); \ |
d3918e7f NP |
414 | sldi r12,r9,32; \ |
415 | ori r12,r12,(n); \ | |
a97a65d5 NP |
416 | /* This reloads r9 before branching to kvmppc_interrupt */ \ |
417 | __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt) | |
b01c8b54 PM |
418 | |
419 | #define __KVM_HANDLER_SKIP(area, h, n) \ | |
b01c8b54 | 420 | cmpwi r10,KVM_GUEST_MODE_SKIP; \ |
b01c8b54 | 421 | beq 89f; \ |
4b8473c9 | 422 | BEGIN_FTR_SECTION_NESTED(948) \ |
d3918e7f NP |
423 | ld r10,area+EX_PPR(r13); \ |
424 | std r10,HSTATE_PPR(r13); \ | |
4b8473c9 | 425 | END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ |
d3918e7f | 426 | ld r10,area+EX_R10(r13); \ |
da2bc464 | 427 | std r12,HSTATE_SCRATCH0(r13); \ |
d3918e7f NP |
428 | sldi r12,r9,32; \ |
429 | ori r12,r12,(n); \ | |
a97a65d5 NP |
430 | /* This reloads r9 before branching to kvmppc_interrupt */ \ |
431 | __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \ | |
b01c8b54 PM |
432 | 89: mtocrf 0x80,r9; \ |
433 | ld r9,area+EX_R9(r13); \ | |
d3918e7f | 434 | ld r10,area+EX_R10(r13); \ |
b01c8b54 PM |
435 | b kvmppc_skip_##h##interrupt |
436 | ||
437 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER | |
da2bc464 | 438 | #define KVMTEST(h, n) __KVMTEST(h, n) |
b01c8b54 PM |
439 | #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) |
440 | #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) | |
441 | ||
442 | #else | |
da2bc464 | 443 | #define KVMTEST(h, n) |
b01c8b54 PM |
444 | #define KVM_HANDLER(area, h, n) |
445 | #define KVM_HANDLER_SKIP(area, h, n) | |
446 | #endif | |
447 | ||
448 | #define NOTEST(n) | |
449 | ||
a4087a4d NP |
450 | #define EXCEPTION_PROLOG_COMMON_1() \ |
451 | std r9,_CCR(r1); /* save CR in stackframe */ \ | |
452 | std r11,_NIP(r1); /* save SRR0 in stackframe */ \ | |
453 | std r12,_MSR(r1); /* save SRR1 in stackframe */ \ | |
454 | std r10,0(r1); /* make stack chain pointer */ \ | |
455 | std r0,GPR0(r1); /* save r0 in stackframe */ \ | |
456 | std r10,GPR1(r1); /* save r1 in stackframe */ \ | |
457 | ||
458 | ||
f9ff0f30 SR |
459 | /* |
460 | * The common exception prolog is used for all except a few exceptions | |
461 | * such as a segment miss on a kernel address. We have to be prepared | |
462 | * to take another exception from the point where we first touch the | |
463 | * kernel stack onwards. | |
464 | * | |
465 | * On entry r13 points to the paca, r9-r13 are saved in the paca, | |
466 | * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and | |
467 | * SRR1, and relocation is on. | |
468 | */ | |
469 | #define EXCEPTION_PROLOG_COMMON(n, area) \ | |
470 | andi. r10,r12,MSR_PR; /* See if coming from user */ \ | |
471 | mr r10,r1; /* Save r1 */ \ | |
472 | subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ | |
473 | beq- 1f; \ | |
474 | ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ | |
90ff5d68 | 475 | 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ |
1977b502 PM |
476 | blt+ cr1,3f; /* abort if it is */ \ |
477 | li r1,(n); /* will be reloaded later */ \ | |
f9ff0f30 | 478 | sth r1,PACA_TRAP_SAVE(r13); \ |
1977b502 PM |
479 | std r3,area+EX_R3(r13); \ |
480 | addi r3,r13,area; /* r3 -> where regs are saved*/ \ | |
bc2e6c6a | 481 | RESTORE_CTR(r1, area); \ |
f9ff0f30 | 482 | b bad_stack; \ |
a4087a4d | 483 | 3: EXCEPTION_PROLOG_COMMON_1(); \ |
5d75b264 | 484 | beq 4f; /* if from kernel mode */ \ |
c223c903 | 485 | ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ |
44e9309f | 486 | SAVE_PPR(area, r9, r10); \ |
b14a7253 MS |
487 | 4: EXCEPTION_PROLOG_COMMON_2(area) \ |
488 | EXCEPTION_PROLOG_COMMON_3(n) \ | |
489 | ACCOUNT_STOLEN_TIME | |
490 | ||
491 | /* Save original regs values from save area to stack frame. */ | |
492 | #define EXCEPTION_PROLOG_COMMON_2(area) \ | |
f9ff0f30 SR |
493 | ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ |
494 | ld r10,area+EX_R10(r13); \ | |
495 | std r9,GPR9(r1); \ | |
496 | std r10,GPR10(r1); \ | |
497 | ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ | |
498 | ld r10,area+EX_R12(r13); \ | |
499 | ld r11,area+EX_R13(r13); \ | |
500 | std r9,GPR11(r1); \ | |
501 | std r10,GPR12(r1); \ | |
502 | std r11,GPR13(r1); \ | |
48404f2e PM |
503 | BEGIN_FTR_SECTION_NESTED(66); \ |
504 | ld r10,area+EX_CFAR(r13); \ | |
505 | std r10,ORIG_GPR3(r1); \ | |
506 | END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ | |
b14a7253 MS |
507 | GET_CTR(r10, area); \ |
508 | std r10,_CTR(r1); | |
509 | ||
510 | #define EXCEPTION_PROLOG_COMMON_3(n) \ | |
511 | std r2,GPR2(r1); /* save r2 in stackframe */ \ | |
512 | SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ | |
513 | SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ | |
bc2e6c6a | 514 | mflr r9; /* Get LR, later save to stack */ \ |
f9ff0f30 | 515 | ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ |
f9ff0f30 | 516 | std r9,_LINK(r1); \ |
f9ff0f30 SR |
517 | lbz r10,PACASOFTIRQEN(r13); \ |
518 | mfspr r11,SPRN_XER; /* save XER in stackframe */ \ | |
519 | std r10,SOFTE(r1); \ | |
520 | std r11,_XER(r1); \ | |
521 | li r9,(n)+1; \ | |
522 | std r9,_TRAP(r1); /* set trap number */ \ | |
523 | li r10,0; \ | |
524 | ld r11,exception_marker@toc(r2); \ | |
525 | std r10,RESULT(r1); /* clear regs->result */ \ | |
b14a7253 | 526 | std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ |
f9ff0f30 SR |
527 | |
528 | /* | |
529 | * Exception vectors. | |
530 | */ | |
da2bc464 | 531 | #define STD_EXCEPTION_PSERIES(vec, label) \ |
673b189a | 532 | SET_SCRATCH0(r13); /* save r13 */ \ |
da2bc464 ME |
533 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ |
534 | EXC_STD, KVMTEST_PR, vec); \ | |
f9ff0f30 | 535 | |
1707dd16 | 536 | /* Version of above for when we have to branch out-of-line */ |
da2bc464 ME |
537 | #define __OOL_EXCEPTION(vec, label, hdlr) \ |
538 | SET_SCRATCH0(r13) \ | |
539 | EXCEPTION_PROLOG_0(PACA_EXGEN) \ | |
540 | b hdlr; | |
541 | ||
1707dd16 | 542 | #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ |
da2bc464 ME |
543 | EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ |
544 | EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) | |
545 | ||
546 | #define STD_EXCEPTION_HV(loc, vec, label) \ | |
b01c8b54 | 547 | SET_SCRATCH0(r13); /* save r13 */ \ |
da2bc464 ME |
548 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ |
549 | EXC_HV, KVMTEST_HV, vec); | |
f9ff0f30 | 550 | |
da2bc464 ME |
551 | #define STD_EXCEPTION_HV_OOL(vec, label) \ |
552 | EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ | |
553 | EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) | |
1707dd16 | 554 | |
4700dfaf | 555 | #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ |
4700dfaf MN |
556 | /* No guest interrupts come through here */ \ |
557 | SET_SCRATCH0(r13); /* save r13 */ \ | |
da2bc464 | 558 | EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec); |
4700dfaf | 559 | |
1707dd16 | 560 | #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ |
c9f69518 | 561 | EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ |
da2bc464 | 562 | EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD) |
1707dd16 | 563 | |
4700dfaf | 564 | #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ |
4700dfaf | 565 | SET_SCRATCH0(r13); /* save r13 */ \ |
bc355125 PM |
566 | EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \ |
567 | EXC_HV, KVMTEST_HV, vec); | |
4700dfaf | 568 | |
1707dd16 | 569 | #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ |
bc355125 | 570 | EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ |
da2bc464 | 571 | EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) |
1707dd16 | 572 | |
7230c564 BH |
573 | /* This associate vector numbers with bits in paca->irq_happened */ |
574 | #define SOFTEN_VALUE_0x500 PACA_IRQ_EE | |
7230c564 | 575 | #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC |
da2bc464 | 576 | #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC |
1dbdafec | 577 | #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL |
655bb3f4 | 578 | #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL |
0869b6fd | 579 | #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI |
9baaef0a | 580 | #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE |
7230c564 BH |
581 | |
582 | #define __SOFTEN_TEST(h, vec) \ | |
f9ff0f30 | 583 | lbz r10,PACASOFTIRQEN(r13); \ |
f9ff0f30 | 584 | cmpwi r10,0; \ |
7230c564 | 585 | li r10,SOFTEN_VALUE_##vec; \ |
b01c8b54 | 586 | beq masked_##h##interrupt |
da2bc464 | 587 | |
7230c564 | 588 | #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) |
b01c8b54 | 589 | |
de56a948 | 590 | #define SOFTEN_TEST_PR(vec) \ |
da2bc464 | 591 | KVMTEST(EXC_STD, vec); \ |
7230c564 | 592 | _SOFTEN_TEST(EXC_STD, vec) |
b01c8b54 PM |
593 | |
594 | #define SOFTEN_TEST_HV(vec) \ | |
da2bc464 | 595 | KVMTEST(EXC_HV, vec); \ |
7230c564 | 596 | _SOFTEN_TEST(EXC_HV, vec) |
b01c8b54 | 597 | |
da2bc464 ME |
598 | #define KVMTEST_PR(vec) \ |
599 | KVMTEST(EXC_STD, vec) | |
600 | ||
601 | #define KVMTEST_HV(vec) \ | |
602 | KVMTEST(EXC_HV, vec) | |
603 | ||
4700dfaf MN |
604 | #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) |
605 | #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) | |
606 | ||
b01c8b54 | 607 | #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ |
b01c8b54 | 608 | SET_SCRATCH0(r13); /* save r13 */ \ |
1707dd16 PM |
609 | EXCEPTION_PROLOG_0(PACA_EXGEN); \ |
610 | __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ | |
da2bc464 | 611 | EXCEPTION_PROLOG_PSERIES_1(label, h); |
1707dd16 | 612 | |
b01c8b54 PM |
613 | #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ |
614 | __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) | |
b3e6b5df BH |
615 | |
616 | #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ | |
b01c8b54 | 617 | _MASKABLE_EXCEPTION_PSERIES(vec, label, \ |
de56a948 | 618 | EXC_STD, SOFTEN_TEST_PR) |
b3e6b5df | 619 | |
da2bc464 ME |
620 | #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \ |
621 | EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \ | |
622 | EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) | |
623 | ||
b3e6b5df | 624 | #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ |
b01c8b54 PM |
625 | _MASKABLE_EXCEPTION_PSERIES(vec, label, \ |
626 | EXC_HV, SOFTEN_TEST_HV) | |
f9ff0f30 | 627 | |
1707dd16 | 628 | #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \ |
1707dd16 | 629 | EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ |
da2bc464 | 630 | EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) |
1707dd16 | 631 | |
4700dfaf | 632 | #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ |
4700dfaf | 633 | SET_SCRATCH0(r13); /* save r13 */ \ |
1707dd16 | 634 | EXCEPTION_PROLOG_0(PACA_EXGEN); \ |
da2bc464 ME |
635 | __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ |
636 | EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) | |
637 | ||
638 | #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ | |
4700dfaf MN |
639 | __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) |
640 | ||
641 | #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ | |
4700dfaf MN |
642 | _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ |
643 | EXC_STD, SOFTEN_NOTEST_PR) | |
644 | ||
645 | #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ | |
4700dfaf | 646 | _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ |
bc355125 | 647 | EXC_HV, SOFTEN_TEST_HV) |
4700dfaf | 648 | |
1707dd16 | 649 | #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \ |
bc355125 | 650 | EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ |
a050d20d | 651 | EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) |
1707dd16 | 652 | |
1b701179 BH |
653 | /* |
654 | * Our exception common code can be passed various "additions" | |
655 | * to specify the behaviour of interrupts, whether to kick the | |
656 | * runlatch, etc... | |
657 | */ | |
658 | ||
9daf112b ME |
659 | /* |
660 | * This addition reconciles our actual IRQ state with the various software | |
661 | * flags that track it. This may call C code. | |
662 | */ | |
663 | #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) | |
f9ff0f30 | 664 | |
fe1952fc | 665 | #define ADD_NVGPRS \ |
b1576fec | 666 | bl save_nvgprs |
fe1952fc BH |
667 | |
668 | #define RUNLATCH_ON \ | |
669 | BEGIN_FTR_SECTION \ | |
9778b696 | 670 | CURRENT_THREAD_INFO(r3, r1); \ |
fe1952fc BH |
671 | ld r4,TI_LOCAL_FLAGS(r3); \ |
672 | andi. r0,r4,_TLF_RUNLATCH; \ | |
673 | beql ppc64_runlatch_on_trampoline; \ | |
674 | END_FTR_SECTION_IFSET(CPU_FTR_CTRL) | |
675 | ||
a3d96f70 NP |
676 | #define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \ |
677 | EXCEPTION_PROLOG_COMMON(trap, area); \ | |
a1d711c5 | 678 | /* Volatile regs are potentially clobbered here */ \ |
fe1952fc BH |
679 | additions; \ |
680 | addi r3,r1,STACK_FRAME_OVERHEAD; \ | |
681 | bl hdlr; \ | |
682 | b ret | |
683 | ||
b1ee8a3d NP |
684 | /* |
685 | * Exception where stack is already set in r1, r1 is saved in r10, and it | |
686 | * continues rather than returns. | |
687 | */ | |
688 | #define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \ | |
689 | EXCEPTION_PROLOG_COMMON_1(); \ | |
690 | EXCEPTION_PROLOG_COMMON_2(area); \ | |
691 | EXCEPTION_PROLOG_COMMON_3(trap); \ | |
692 | /* Volatile regs are potentially clobbered here */ \ | |
693 | additions; \ | |
694 | addi r3,r1,STACK_FRAME_OVERHEAD; \ | |
695 | bl hdlr | |
696 | ||
fe1952fc | 697 | #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ |
a3d96f70 NP |
698 | EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ |
699 | ret_from_except, ADD_NVGPRS;ADD_RECONCILE) | |
f9ff0f30 SR |
700 | |
701 | /* | |
702 | * Like STD_EXCEPTION_COMMON, but for exceptions that can occur | |
7450f6f0 BH |
703 | * in the idle task and therefore need the special idle handling |
704 | * (finish nap and runlatch) | |
f9ff0f30 | 705 | */ |
a3d96f70 NP |
706 | #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ |
707 | EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ | |
708 | ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) | |
f9ff0f30 SR |
709 | |
710 | /* | |
711 | * When the idle code in power4_idle puts the CPU into NAP mode, | |
712 | * it has to do so in a loop, and relies on the external interrupt | |
713 | * and decrementer interrupt entry code to get it out of the loop. | |
714 | * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags | |
715 | * to signal that it is in the loop and needs help to get out. | |
716 | */ | |
717 | #ifdef CONFIG_PPC_970_NAP | |
718 | #define FINISH_NAP \ | |
719 | BEGIN_FTR_SECTION \ | |
9778b696 | 720 | CURRENT_THREAD_INFO(r11, r1); \ |
f9ff0f30 SR |
721 | ld r9,TI_LOCAL_FLAGS(r11); \ |
722 | andi. r10,r9,_TLF_NAPPING; \ | |
723 | bnel power4_fixup_nap; \ | |
724 | END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) | |
725 | #else | |
726 | #define FINISH_NAP | |
727 | #endif | |
728 | ||
729 | #endif /* _ASM_POWERPC_EXCEPTION_H */ |