]>
Commit | Line | Data |
---|---|---|
f9ff0f30 SR |
1 | #ifndef _ASM_POWERPC_EXCEPTION_H |
2 | #define _ASM_POWERPC_EXCEPTION_H | |
3 | /* | |
4 | * Extracted from head_64.S | |
5 | * | |
6 | * PowerPC version | |
7 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
8 | * | |
9 | * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP | |
10 | * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> | |
11 | * Adapted for Power Macintosh by Paul Mackerras. | |
12 | * Low-level exception handlers and MMU support | |
13 | * rewritten by Paul Mackerras. | |
14 | * Copyright (C) 1996 Paul Mackerras. | |
15 | * | |
16 | * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and | |
17 | * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com | |
18 | * | |
19 | * This file contains the low-level support and setup for the | |
20 | * PowerPC-64 platform, including trap and interrupt dispatch. | |
21 | * | |
22 | * This program is free software; you can redistribute it and/or | |
23 | * modify it under the terms of the GNU General Public License | |
24 | * as published by the Free Software Foundation; either version | |
25 | * 2 of the License, or (at your option) any later version. | |
26 | */ | |
27 | /* | |
28 | * The following macros define the code that appears as | |
29 | * the prologue to each of the exception handlers. They | |
30 | * are split into two parts to allow a single kernel binary | |
31 | * to be used for pSeries and iSeries. | |
32 | * | |
33 | * We make as much of the exception code common between native | |
34 | * exception handlers (including pSeries LPAR) and iSeries LPAR | |
35 | * implementations as possible. | |
36 | */ | |
da2bc464 | 37 | #include <asm/head-64.h> |
f9ff0f30 SR |
38 | |
39 | #define EX_R9 0 | |
40 | #define EX_R10 8 | |
41 | #define EX_R11 16 | |
42 | #define EX_R12 24 | |
43 | #define EX_R13 32 | |
44 | #define EX_SRR0 40 | |
45 | #define EX_DAR 48 | |
46 | #define EX_DSISR 56 | |
47 | #define EX_CCR 60 | |
48 | #define EX_R3 64 | |
49 | #define EX_LR 72 | |
48404f2e | 50 | #define EX_CFAR 80 |
a09688cd | 51 | #define EX_PPR 88 /* SMT thread status register (priority) */ |
bc2e6c6a | 52 | #define EX_CTR 96 |
f9ff0f30 | 53 | |
4700dfaf | 54 | #ifdef CONFIG_RELOCATABLE |
1707dd16 | 55 | #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ |
4700dfaf MN |
56 | mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ |
57 | LOAD_HANDLER(r12,label); \ | |
bc2e6c6a | 58 | mtctr r12; \ |
4700dfaf MN |
59 | mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ |
60 | li r10,MSR_RI; \ | |
61 | mtmsrd r10,1; /* Set RI (EE=0) */ \ | |
bc2e6c6a | 62 | bctr; |
4700dfaf MN |
63 | #else |
64 | /* If not relocatable, we can jump directly -- and save messing with LR */ | |
1707dd16 | 65 | #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ |
4700dfaf MN |
66 | mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ |
67 | mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ | |
68 | li r10,MSR_RI; \ | |
69 | mtmsrd r10,1; /* Set RI (EE=0) */ \ | |
70 | b label; | |
71 | #endif | |
1707dd16 PM |
72 | #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ |
73 | __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ | |
4700dfaf MN |
74 | |
75 | /* | |
76 | * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on | |
77 | * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which | |
78 | * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. | |
79 | */ | |
80 | #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ | |
1707dd16 | 81 | EXCEPTION_PROLOG_0(area); \ |
4700dfaf MN |
82 | EXCEPTION_PROLOG_1(area, extra, vec); \ |
83 | EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) | |
84 | ||
f9ff0f30 SR |
85 | /* |
86 | * We're short on space and time in the exception prolog, so we can't | |
27510235 ME |
87 | * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. |
88 | * Instead we get the base of the kernel from paca->kernelbase and or in the low | |
89 | * part of label. This requires that the label be within 64KB of kernelbase, and | |
90 | * that kernelbase be 64K aligned. | |
f9ff0f30 | 91 | */ |
f9ff0f30 | 92 | #define LOAD_HANDLER(reg, label) \ |
d8d42b05 | 93 | ld reg,PACAKBASE(r13); /* get high part of &label */ \ |
e6740ae6 | 94 | ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label); |
f9ff0f30 | 95 | |
fb479e44 NP |
96 | #define __LOAD_HANDLER(reg, label) \ |
97 | ld reg,PACAKBASE(r13); \ | |
98 | ori reg,reg,(ABS_ADDR(label))@l; | |
99 | ||
f148cf06 NP |
100 | /* |
101 | * Branches from unrelocated code (e.g., interrupts) to labels outside | |
102 | * head-y require >64K offsets. | |
103 | */ | |
104 | #define __LOAD_FAR_HANDLER(reg, label) \ | |
105 | ld reg,PACAKBASE(r13); \ | |
106 | ori reg,reg,(ABS_ADDR(label))@l; \ | |
107 | addis reg,reg,(ABS_ADDR(label))@h; | |
108 | ||
a5d4f3ad BH |
109 | /* Exception register prefixes */ |
110 | #define EXC_HV H | |
111 | #define EXC_STD | |
112 | ||
4700dfaf MN |
113 | #if defined(CONFIG_RELOCATABLE) |
114 | /* | |
bc2e6c6a MN |
115 | * If we support interrupts with relocation on AND we're a relocatable kernel, |
116 | * we need to use CTR to get to the 2nd level handler. So, save/restore it | |
117 | * when required. | |
4700dfaf | 118 | */ |
bc2e6c6a MN |
119 | #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) |
120 | #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) | |
121 | #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg | |
4700dfaf | 122 | #else |
bc2e6c6a MN |
123 | /* ...else CTR is unused and in register. */ |
124 | #define SAVE_CTR(reg, area) | |
125 | #define GET_CTR(reg, area) mfctr reg | |
126 | #define RESTORE_CTR(reg, area) | |
4700dfaf MN |
127 | #endif |
128 | ||
13e7a8e8 HM |
129 | /* |
130 | * PPR save/restore macros used in exceptions_64s.S | |
131 | * Used for P7 or later processors | |
132 | */ | |
133 | #define SAVE_PPR(area, ra, rb) \ | |
134 | BEGIN_FTR_SECTION_NESTED(940) \ | |
135 | ld ra,PACACURRENT(r13); \ | |
136 | ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ | |
137 | std rb,TASKTHREADPPR(ra); \ | |
138 | END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) | |
139 | ||
140 | #define RESTORE_PPR_PACA(area, ra) \ | |
141 | BEGIN_FTR_SECTION_NESTED(941) \ | |
142 | ld ra,area+EX_PPR(r13); \ | |
143 | mtspr SPRN_PPR,ra; \ | |
144 | END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) | |
145 | ||
13e7a8e8 | 146 | /* |
1707dd16 | 147 | * Get an SPR into a register if the CPU has the given feature |
13e7a8e8 | 148 | */ |
1707dd16 | 149 | #define OPT_GET_SPR(ra, spr, ftr) \ |
13e7a8e8 | 150 | BEGIN_FTR_SECTION_NESTED(943) \ |
1707dd16 PM |
151 | mfspr ra,spr; \ |
152 | END_FTR_SECTION_NESTED(ftr,ftr,943) | |
13e7a8e8 | 153 | |
d410ae21 MS |
154 | /* |
155 | * Set an SPR from a register if the CPU has the given feature | |
156 | */ | |
157 | #define OPT_SET_SPR(ra, spr, ftr) \ | |
158 | BEGIN_FTR_SECTION_NESTED(943) \ | |
159 | mtspr spr,ra; \ | |
160 | END_FTR_SECTION_NESTED(ftr,ftr,943) | |
161 | ||
1707dd16 PM |
162 | /* |
163 | * Save a register to the PACA if the CPU has the given feature | |
164 | */ | |
165 | #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ | |
166 | BEGIN_FTR_SECTION_NESTED(943) \ | |
167 | std ra,offset(r13); \ | |
168 | END_FTR_SECTION_NESTED(ftr,ftr,943) | |
169 | ||
f23ed166 | 170 | #define EXCEPTION_PROLOG_0_PACA(area) \ |
44e9309f | 171 | std r9,area+EX_R9(r13); /* save r9 */ \ |
1707dd16 PM |
172 | OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ |
173 | HMT_MEDIUM; \ | |
44e9309f | 174 | std r10,area+EX_R10(r13); /* save r10 - r12 */ \ |
1707dd16 PM |
175 | OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) |
176 | ||
f23ed166 NP |
177 | #define EXCEPTION_PROLOG_0(area) \ |
178 | GET_PACA(r13); \ | |
179 | EXCEPTION_PROLOG_0_PACA(area) | |
180 | ||
1707dd16 PM |
181 | #define __EXCEPTION_PROLOG_1(area, extra, vec) \ |
182 | OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ | |
183 | OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ | |
bc2e6c6a | 184 | SAVE_CTR(r10, area); \ |
b01c8b54 PM |
185 | mfcr r9; \ |
186 | extra(vec); \ | |
187 | std r11,area+EX_R11(r13); \ | |
188 | std r12,area+EX_R12(r13); \ | |
189 | GET_SCRATCH0(r10); \ | |
190 | std r10,area+EX_R13(r13) | |
191 | #define EXCEPTION_PROLOG_1(area, extra, vec) \ | |
192 | __EXCEPTION_PROLOG_1(area, extra, vec) | |
7180e3e6 | 193 | |
a5d4f3ad | 194 | #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ |
1f6a93e4 | 195 | ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ |
a5d4f3ad | 196 | mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ |
f9ff0f30 | 197 | LOAD_HANDLER(r12,label) \ |
a5d4f3ad BH |
198 | mtspr SPRN_##h##SRR0,r12; \ |
199 | mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ | |
200 | mtspr SPRN_##h##SRR1,r10; \ | |
201 | h##rfid; \ | |
f9ff0f30 | 202 | b . /* prevent speculative execution */ |
b01c8b54 | 203 | #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ |
a5d4f3ad | 204 | __EXCEPTION_PROLOG_PSERIES_1(label, h) |
f9ff0f30 | 205 | |
b01c8b54 | 206 | #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ |
1707dd16 | 207 | EXCEPTION_PROLOG_0(area); \ |
b01c8b54 | 208 | EXCEPTION_PROLOG_1(area, extra, vec); \ |
a5d4f3ad | 209 | EXCEPTION_PROLOG_PSERIES_1(label, h); |
c5a8c0c9 | 210 | |
f23ed166 NP |
211 | /* Have the PACA in r13 already */ |
212 | #define EXCEPTION_PROLOG_PSERIES_PACA(area, label, h, extra, vec) \ | |
213 | EXCEPTION_PROLOG_0_PACA(area); \ | |
214 | EXCEPTION_PROLOG_1(area, extra, vec); \ | |
215 | EXCEPTION_PROLOG_PSERIES_1(label, h); | |
216 | ||
da2bc464 ME |
217 | #define __KVMTEST(h, n) \ |
218 | lbz r10,HSTATE_IN_GUEST(r13); \ | |
b01c8b54 | 219 | cmpwi r10,0; \ |
da2bc464 | 220 | bne do_kvm_##h##n |
b01c8b54 | 221 | |
dd96b2c2 AK |
222 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
223 | /* | |
224 | * If hv is possible, interrupts come into to the hv version | |
225 | * of the kvmppc_interrupt code, which then jumps to the PR handler, | |
226 | * kvmppc_interrupt_pr, if the guest is a PR guest. | |
227 | */ | |
228 | #define kvmppc_interrupt kvmppc_interrupt_hv | |
229 | #else | |
230 | #define kvmppc_interrupt kvmppc_interrupt_pr | |
231 | #endif | |
232 | ||
fb479e44 NP |
233 | #ifdef CONFIG_RELOCATABLE |
234 | #define BRANCH_TO_COMMON(reg, label) \ | |
235 | __LOAD_HANDLER(reg, label); \ | |
236 | mtctr reg; \ | |
237 | bctr | |
238 | ||
9d4892ae ME |
239 | #define BRANCH_LINK_TO_FAR(label) \ |
240 | __LOAD_FAR_HANDLER(r12, label); \ | |
241 | mtctr r12; \ | |
1fca7627 NP |
242 | bctrl |
243 | ||
f148cf06 NP |
244 | /* |
245 | * KVM requires __LOAD_FAR_HANDLER. | |
246 | * | |
247 | * __BRANCH_TO_KVM_EXIT branches are also a special case because they | |
248 | * explicitly use r9 then reload it from PACA before branching. Hence | |
249 | * the double-underscore. | |
250 | */ | |
251 | #define __BRANCH_TO_KVM_EXIT(area, label) \ | |
252 | mfctr r9; \ | |
253 | std r9,HSTATE_SCRATCH1(r13); \ | |
254 | __LOAD_FAR_HANDLER(r9, label); \ | |
255 | mtctr r9; \ | |
256 | ld r9,area+EX_R9(r13); \ | |
257 | bctr | |
258 | ||
259 | #define BRANCH_TO_KVM(reg, label) \ | |
260 | __LOAD_FAR_HANDLER(reg, label); \ | |
261 | mtctr reg; \ | |
262 | bctr | |
263 | ||
fb479e44 NP |
264 | #else |
265 | #define BRANCH_TO_COMMON(reg, label) \ | |
266 | b label | |
267 | ||
9d4892ae | 268 | #define BRANCH_LINK_TO_FAR(label) \ |
1fca7627 NP |
269 | bl label |
270 | ||
f148cf06 NP |
271 | #define BRANCH_TO_KVM(reg, label) \ |
272 | b label | |
273 | ||
274 | #define __BRANCH_TO_KVM_EXIT(area, label) \ | |
275 | ld r9,area+EX_R9(r13); \ | |
276 | b label | |
277 | ||
fb479e44 NP |
278 | #endif |
279 | ||
f148cf06 | 280 | |
ebe97e6c | 281 | #define __KVM_HANDLER(area, h, n) \ |
0acb9111 PM |
282 | BEGIN_FTR_SECTION_NESTED(947) \ |
283 | ld r10,area+EX_CFAR(r13); \ | |
284 | std r10,HSTATE_CFAR(r13); \ | |
285 | END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ | |
4b8473c9 PM |
286 | BEGIN_FTR_SECTION_NESTED(948) \ |
287 | ld r10,area+EX_PPR(r13); \ | |
288 | std r10,HSTATE_PPR(r13); \ | |
289 | END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ | |
b01c8b54 | 290 | ld r10,area+EX_R10(r13); \ |
0acb9111 | 291 | std r12,HSTATE_SCRATCH0(r13); \ |
ebe97e6c NP |
292 | sldi r12,r9,32; \ |
293 | ori r12,r12,(n); \ | |
f148cf06 NP |
294 | /* This reloads r9 before branching to kvmppc_interrupt */ \ |
295 | __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt) | |
b01c8b54 PM |
296 | |
297 | #define __KVM_HANDLER_SKIP(area, h, n) \ | |
b01c8b54 | 298 | cmpwi r10,KVM_GUEST_MODE_SKIP; \ |
b01c8b54 | 299 | beq 89f; \ |
4b8473c9 | 300 | BEGIN_FTR_SECTION_NESTED(948) \ |
ebe97e6c NP |
301 | ld r10,area+EX_PPR(r13); \ |
302 | std r10,HSTATE_PPR(r13); \ | |
4b8473c9 | 303 | END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ |
ebe97e6c | 304 | ld r10,area+EX_R10(r13); \ |
da2bc464 | 305 | std r12,HSTATE_SCRATCH0(r13); \ |
ebe97e6c NP |
306 | sldi r12,r9,32; \ |
307 | ori r12,r12,(n); \ | |
f148cf06 NP |
308 | /* This reloads r9 before branching to kvmppc_interrupt */ \ |
309 | __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \ | |
b01c8b54 PM |
310 | 89: mtocrf 0x80,r9; \ |
311 | ld r9,area+EX_R9(r13); \ | |
ebe97e6c | 312 | ld r10,area+EX_R10(r13); \ |
b01c8b54 PM |
313 | b kvmppc_skip_##h##interrupt |
314 | ||
315 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER | |
da2bc464 | 316 | #define KVMTEST(h, n) __KVMTEST(h, n) |
b01c8b54 PM |
317 | #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) |
318 | #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) | |
319 | ||
320 | #else | |
da2bc464 | 321 | #define KVMTEST(h, n) |
b01c8b54 PM |
322 | #define KVM_HANDLER(area, h, n) |
323 | #define KVM_HANDLER_SKIP(area, h, n) | |
324 | #endif | |
325 | ||
326 | #define NOTEST(n) | |
327 | ||
f9ff0f30 SR |
328 | /* |
329 | * The common exception prolog is used for all except a few exceptions | |
330 | * such as a segment miss on a kernel address. We have to be prepared | |
331 | * to take another exception from the point where we first touch the | |
332 | * kernel stack onwards. | |
333 | * | |
334 | * On entry r13 points to the paca, r9-r13 are saved in the paca, | |
335 | * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and | |
336 | * SRR1, and relocation is on. | |
337 | */ | |
338 | #define EXCEPTION_PROLOG_COMMON(n, area) \ | |
339 | andi. r10,r12,MSR_PR; /* See if coming from user */ \ | |
340 | mr r10,r1; /* Save r1 */ \ | |
341 | subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ | |
342 | beq- 1f; \ | |
343 | ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ | |
90ff5d68 | 344 | 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ |
1977b502 PM |
345 | blt+ cr1,3f; /* abort if it is */ \ |
346 | li r1,(n); /* will be reloaded later */ \ | |
f9ff0f30 | 347 | sth r1,PACA_TRAP_SAVE(r13); \ |
1977b502 PM |
348 | std r3,area+EX_R3(r13); \ |
349 | addi r3,r13,area; /* r3 -> where regs are saved*/ \ | |
bc2e6c6a | 350 | RESTORE_CTR(r1, area); \ |
f9ff0f30 SR |
351 | b bad_stack; \ |
352 | 3: std r9,_CCR(r1); /* save CR in stackframe */ \ | |
353 | std r11,_NIP(r1); /* save SRR0 in stackframe */ \ | |
354 | std r12,_MSR(r1); /* save SRR1 in stackframe */ \ | |
355 | std r10,0(r1); /* make stack chain pointer */ \ | |
356 | std r0,GPR0(r1); /* save r0 in stackframe */ \ | |
357 | std r10,GPR1(r1); /* save r1 in stackframe */ \ | |
5d75b264 | 358 | beq 4f; /* if from kernel mode */ \ |
c223c903 | 359 | ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ |
44e9309f | 360 | SAVE_PPR(area, r9, r10); \ |
b14a7253 MS |
361 | 4: EXCEPTION_PROLOG_COMMON_2(area) \ |
362 | EXCEPTION_PROLOG_COMMON_3(n) \ | |
363 | ACCOUNT_STOLEN_TIME | |
364 | ||
365 | /* Save original regs values from save area to stack frame. */ | |
366 | #define EXCEPTION_PROLOG_COMMON_2(area) \ | |
f9ff0f30 SR |
367 | ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ |
368 | ld r10,area+EX_R10(r13); \ | |
369 | std r9,GPR9(r1); \ | |
370 | std r10,GPR10(r1); \ | |
371 | ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ | |
372 | ld r10,area+EX_R12(r13); \ | |
373 | ld r11,area+EX_R13(r13); \ | |
374 | std r9,GPR11(r1); \ | |
375 | std r10,GPR12(r1); \ | |
376 | std r11,GPR13(r1); \ | |
48404f2e PM |
377 | BEGIN_FTR_SECTION_NESTED(66); \ |
378 | ld r10,area+EX_CFAR(r13); \ | |
379 | std r10,ORIG_GPR3(r1); \ | |
380 | END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ | |
b14a7253 MS |
381 | GET_CTR(r10, area); \ |
382 | std r10,_CTR(r1); | |
383 | ||
384 | #define EXCEPTION_PROLOG_COMMON_3(n) \ | |
385 | std r2,GPR2(r1); /* save r2 in stackframe */ \ | |
386 | SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ | |
387 | SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ | |
bc2e6c6a | 388 | mflr r9; /* Get LR, later save to stack */ \ |
f9ff0f30 | 389 | ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ |
f9ff0f30 | 390 | std r9,_LINK(r1); \ |
f9ff0f30 SR |
391 | lbz r10,PACASOFTIRQEN(r13); \ |
392 | mfspr r11,SPRN_XER; /* save XER in stackframe */ \ | |
393 | std r10,SOFTE(r1); \ | |
394 | std r11,_XER(r1); \ | |
395 | li r9,(n)+1; \ | |
396 | std r9,_TRAP(r1); /* set trap number */ \ | |
397 | li r10,0; \ | |
398 | ld r11,exception_marker@toc(r2); \ | |
399 | std r10,RESULT(r1); /* clear regs->result */ \ | |
b14a7253 | 400 | std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ |
f9ff0f30 SR |
401 | |
402 | /* | |
403 | * Exception vectors. | |
404 | */ | |
da2bc464 | 405 | #define STD_EXCEPTION_PSERIES(vec, label) \ |
673b189a | 406 | SET_SCRATCH0(r13); /* save r13 */ \ |
da2bc464 ME |
407 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ |
408 | EXC_STD, KVMTEST_PR, vec); \ | |
f9ff0f30 | 409 | |
1707dd16 | 410 | /* Version of above for when we have to branch out-of-line */ |
da2bc464 ME |
411 | #define __OOL_EXCEPTION(vec, label, hdlr) \ |
412 | SET_SCRATCH0(r13) \ | |
413 | EXCEPTION_PROLOG_0(PACA_EXGEN) \ | |
414 | b hdlr; | |
415 | ||
1707dd16 | 416 | #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ |
da2bc464 ME |
417 | EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ |
418 | EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) | |
419 | ||
420 | #define STD_EXCEPTION_HV(loc, vec, label) \ | |
b01c8b54 | 421 | SET_SCRATCH0(r13); /* save r13 */ \ |
da2bc464 ME |
422 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ |
423 | EXC_HV, KVMTEST_HV, vec); | |
f9ff0f30 | 424 | |
da2bc464 ME |
425 | #define STD_EXCEPTION_HV_OOL(vec, label) \ |
426 | EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ | |
427 | EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) | |
1707dd16 | 428 | |
4700dfaf | 429 | #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ |
4700dfaf MN |
430 | /* No guest interrupts come through here */ \ |
431 | SET_SCRATCH0(r13); /* save r13 */ \ | |
da2bc464 | 432 | EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec); |
4700dfaf | 433 | |
1707dd16 | 434 | #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ |
c9f69518 | 435 | EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ |
da2bc464 | 436 | EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD) |
1707dd16 | 437 | |
4700dfaf | 438 | #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ |
4700dfaf | 439 | SET_SCRATCH0(r13); /* save r13 */ \ |
40a6d878 PM |
440 | EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \ |
441 | EXC_HV, KVMTEST_HV, vec); | |
4700dfaf | 442 | |
1707dd16 | 443 | #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ |
40a6d878 | 444 | EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ |
da2bc464 | 445 | EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) |
1707dd16 | 446 | |
7230c564 BH |
447 | /* This associate vector numbers with bits in paca->irq_happened */ |
448 | #define SOFTEN_VALUE_0x500 PACA_IRQ_EE | |
7230c564 | 449 | #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC |
da2bc464 | 450 | #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC |
1dbdafec | 451 | #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL |
655bb3f4 | 452 | #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL |
0869b6fd | 453 | #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI |
9baaef0a | 454 | #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE |
7230c564 BH |
455 | |
456 | #define __SOFTEN_TEST(h, vec) \ | |
f9ff0f30 | 457 | lbz r10,PACASOFTIRQEN(r13); \ |
f9ff0f30 | 458 | cmpwi r10,0; \ |
7230c564 | 459 | li r10,SOFTEN_VALUE_##vec; \ |
b01c8b54 | 460 | beq masked_##h##interrupt |
da2bc464 | 461 | |
7230c564 | 462 | #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) |
b01c8b54 | 463 | |
de56a948 | 464 | #define SOFTEN_TEST_PR(vec) \ |
da2bc464 | 465 | KVMTEST(EXC_STD, vec); \ |
7230c564 | 466 | _SOFTEN_TEST(EXC_STD, vec) |
b01c8b54 PM |
467 | |
468 | #define SOFTEN_TEST_HV(vec) \ | |
da2bc464 | 469 | KVMTEST(EXC_HV, vec); \ |
7230c564 | 470 | _SOFTEN_TEST(EXC_HV, vec) |
b01c8b54 | 471 | |
da2bc464 ME |
472 | #define KVMTEST_PR(vec) \ |
473 | KVMTEST(EXC_STD, vec) | |
474 | ||
475 | #define KVMTEST_HV(vec) \ | |
476 | KVMTEST(EXC_HV, vec) | |
477 | ||
4700dfaf MN |
478 | #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) |
479 | #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) | |
480 | ||
b01c8b54 | 481 | #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ |
b01c8b54 | 482 | SET_SCRATCH0(r13); /* save r13 */ \ |
1707dd16 PM |
483 | EXCEPTION_PROLOG_0(PACA_EXGEN); \ |
484 | __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ | |
da2bc464 | 485 | EXCEPTION_PROLOG_PSERIES_1(label, h); |
1707dd16 | 486 | |
b01c8b54 PM |
487 | #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ |
488 | __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) | |
b3e6b5df BH |
489 | |
490 | #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ | |
b01c8b54 | 491 | _MASKABLE_EXCEPTION_PSERIES(vec, label, \ |
de56a948 | 492 | EXC_STD, SOFTEN_TEST_PR) |
b3e6b5df | 493 | |
da2bc464 ME |
494 | #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \ |
495 | EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \ | |
496 | EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) | |
497 | ||
b3e6b5df | 498 | #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ |
b01c8b54 PM |
499 | _MASKABLE_EXCEPTION_PSERIES(vec, label, \ |
500 | EXC_HV, SOFTEN_TEST_HV) | |
f9ff0f30 | 501 | |
1707dd16 | 502 | #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \ |
1707dd16 | 503 | EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ |
da2bc464 | 504 | EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) |
1707dd16 | 505 | |
4700dfaf | 506 | #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ |
4700dfaf | 507 | SET_SCRATCH0(r13); /* save r13 */ \ |
1707dd16 | 508 | EXCEPTION_PROLOG_0(PACA_EXGEN); \ |
da2bc464 ME |
509 | __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ |
510 | EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) | |
511 | ||
512 | #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ | |
4700dfaf MN |
513 | __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) |
514 | ||
515 | #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ | |
4700dfaf MN |
516 | _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ |
517 | EXC_STD, SOFTEN_NOTEST_PR) | |
518 | ||
519 | #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ | |
4700dfaf | 520 | _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ |
40a6d878 | 521 | EXC_HV, SOFTEN_TEST_HV) |
4700dfaf | 522 | |
1707dd16 | 523 | #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \ |
40a6d878 | 524 | EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ |
da2bc464 | 525 | EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) |
1707dd16 | 526 | |
1b701179 BH |
527 | /* |
528 | * Our exception common code can be passed various "additions" | |
529 | * to specify the behaviour of interrupts, whether to kick the | |
530 | * runlatch, etc... | |
531 | */ | |
532 | ||
9daf112b ME |
533 | /* |
534 | * This addition reconciles our actual IRQ state with the various software | |
535 | * flags that track it. This may call C code. | |
536 | */ | |
537 | #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) | |
f9ff0f30 | 538 | |
fe1952fc | 539 | #define ADD_NVGPRS \ |
b1576fec | 540 | bl save_nvgprs |
fe1952fc BH |
541 | |
542 | #define RUNLATCH_ON \ | |
543 | BEGIN_FTR_SECTION \ | |
9778b696 | 544 | CURRENT_THREAD_INFO(r3, r1); \ |
fe1952fc BH |
545 | ld r4,TI_LOCAL_FLAGS(r3); \ |
546 | andi. r0,r4,_TLF_RUNLATCH; \ | |
547 | beql ppc64_runlatch_on_trampoline; \ | |
548 | END_FTR_SECTION_IFSET(CPU_FTR_CTRL) | |
549 | ||
550 | #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \ | |
fe1952fc | 551 | EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ |
a1d711c5 | 552 | /* Volatile regs are potentially clobbered here */ \ |
fe1952fc BH |
553 | additions; \ |
554 | addi r3,r1,STACK_FRAME_OVERHEAD; \ | |
555 | bl hdlr; \ | |
556 | b ret | |
557 | ||
558 | #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ | |
559 | EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \ | |
9daf112b | 560 | ADD_NVGPRS;ADD_RECONCILE) |
f9ff0f30 SR |
561 | |
562 | /* | |
563 | * Like STD_EXCEPTION_COMMON, but for exceptions that can occur | |
7450f6f0 BH |
564 | * in the idle task and therefore need the special idle handling |
565 | * (finish nap and runlatch) | |
f9ff0f30 | 566 | */ |
fe1952fc BH |
567 | #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ |
568 | EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \ | |
9daf112b | 569 | FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) |
f9ff0f30 SR |
570 | |
571 | /* | |
572 | * When the idle code in power4_idle puts the CPU into NAP mode, | |
573 | * it has to do so in a loop, and relies on the external interrupt | |
574 | * and decrementer interrupt entry code to get it out of the loop. | |
575 | * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags | |
576 | * to signal that it is in the loop and needs help to get out. | |
577 | */ | |
578 | #ifdef CONFIG_PPC_970_NAP | |
579 | #define FINISH_NAP \ | |
580 | BEGIN_FTR_SECTION \ | |
9778b696 | 581 | CURRENT_THREAD_INFO(r11, r1); \ |
f9ff0f30 SR |
582 | ld r9,TI_LOCAL_FLAGS(r11); \ |
583 | andi. r10,r9,_TLF_NAPPING; \ | |
584 | bnel power4_fixup_nap; \ | |
585 | END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) | |
586 | #else | |
587 | #define FINISH_NAP | |
588 | #endif | |
589 | ||
590 | #endif /* _ASM_POWERPC_EXCEPTION_H */ |