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KVM: PPC: Accelerate H_PUT_TCE by implementing it in real mode
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1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 */
19
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20#ifndef __LINUX_KVM_POWERPC_H
21#define __LINUX_KVM_POWERPC_H
22
9f2cd967 23#include <linux/types.h>
bbf45ba5 24
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25/* Select powerpc specific features in <linux/kvm.h> */
26#define __KVM_HAVE_SPAPR_TCE
27
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28struct kvm_regs {
29 __u64 pc;
30 __u64 cr;
31 __u64 ctr;
32 __u64 lr;
33 __u64 xer;
34 __u64 msr;
35 __u64 srr0;
36 __u64 srr1;
37 __u64 pid;
38
39 __u64 sprg0;
40 __u64 sprg1;
41 __u64 sprg2;
42 __u64 sprg3;
43 __u64 sprg4;
44 __u64 sprg5;
45 __u64 sprg6;
46 __u64 sprg7;
47
48 __u64 gpr[32];
49};
50
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51#define KVM_SREGS_E_IMPL_NONE 0
52#define KVM_SREGS_E_IMPL_FSL 1
53
54#define KVM_SREGS_E_FSL_PIDn (1 << 0) /* PID1/PID2 */
55
56/*
57 * Feature bits indicate which sections of the sregs struct are valid,
58 * both in KVM_GET_SREGS and KVM_SET_SREGS. On KVM_SET_SREGS, registers
59 * corresponding to unset feature bits will not be modified. This allows
60 * restoring a checkpoint made without that feature, while keeping the
61 * default values of the new registers.
62 *
63 * KVM_SREGS_E_BASE contains:
64 * CSRR0/1 (refers to SRR2/3 on 40x)
65 * ESR
66 * DEAR
67 * MCSR
68 * TSR
69 * TCR
70 * DEC
71 * TB
72 * VRSAVE (USPRG0)
73 */
74#define KVM_SREGS_E_BASE (1 << 0)
75
76/*
77 * KVM_SREGS_E_ARCH206 contains:
78 *
79 * PIR
80 * MCSRR0/1
81 * DECAR
82 * IVPR
83 */
84#define KVM_SREGS_E_ARCH206 (1 << 1)
85
86/*
87 * Contains EPCR, plus the upper half of 64-bit registers
88 * that are 32-bit on 32-bit implementations.
89 */
90#define KVM_SREGS_E_64 (1 << 2)
91
92#define KVM_SREGS_E_SPRG8 (1 << 3)
93#define KVM_SREGS_E_MCIVPR (1 << 4)
94
95/*
96 * IVORs are used -- contains IVOR0-15, plus additional IVORs
97 * in combination with an appropriate feature bit.
98 */
99#define KVM_SREGS_E_IVOR (1 << 5)
100
101/*
102 * Contains MAS0-4, MAS6-7, TLBnCFG, MMUCFG.
103 * Also TLBnPS if MMUCFG[MAVN] = 1.
104 */
105#define KVM_SREGS_E_ARCH206_MMU (1 << 6)
106
107/* DBSR, DBCR, IAC, DAC, DVC */
108#define KVM_SREGS_E_DEBUG (1 << 7)
109
110/* Enhanced debug -- DSRR0/1, SPRG9 */
111#define KVM_SREGS_E_ED (1 << 8)
112
113/* Embedded Floating Point (SPE) -- IVOR32-34 if KVM_SREGS_E_IVOR */
114#define KVM_SREGS_E_SPE (1 << 9)
115
116/* External Proxy (EXP) -- EPR */
117#define KVM_SREGS_EXP (1 << 10)
118
119/* External PID (E.PD) -- EPSC/EPLC */
120#define KVM_SREGS_E_PD (1 << 11)
121
122/* Processor Control (E.PC) -- IVOR36-37 if KVM_SREGS_E_IVOR */
123#define KVM_SREGS_E_PC (1 << 12)
124
125/* Page table (E.PT) -- EPTCFG */
126#define KVM_SREGS_E_PT (1 << 13)
127
128/* Embedded Performance Monitor (E.PM) -- IVOR35 if KVM_SREGS_E_IVOR */
129#define KVM_SREGS_E_PM (1 << 14)
130
131/*
132 * Special updates:
133 *
134 * Some registers may change even while a vcpu is not running.
135 * To avoid losing these changes, by default these registers are
136 * not updated by KVM_SET_SREGS. To force an update, set the bit
137 * in u.e.update_special corresponding to the register to be updated.
138 *
139 * The update_special field is zero on return from KVM_GET_SREGS.
140 *
141 * When restoring a checkpoint, the caller can set update_special
142 * to 0xffffffff to ensure that everything is restored, even new features
143 * that the caller doesn't know about.
144 */
145#define KVM_SREGS_E_UPDATE_MCSR (1 << 0)
146#define KVM_SREGS_E_UPDATE_TSR (1 << 1)
147#define KVM_SREGS_E_UPDATE_DEC (1 << 2)
148#define KVM_SREGS_E_UPDATE_DBSR (1 << 3)
149
150/*
151 * In KVM_SET_SREGS, reserved/pad fields must be left untouched from a
152 * previous KVM_GET_REGS.
153 *
154 * Unless otherwise indicated, setting any register with KVM_SET_SREGS
155 * directly sets its value. It does not trigger any special semantics such
156 * as write-one-to-clear. Calling KVM_SET_SREGS on an unmodified struct
157 * just received from KVM_GET_SREGS is always a no-op.
158 */
bbf45ba5 159struct kvm_sregs {
ec3c11aa 160 __u32 pvr;
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161 union {
162 struct {
163 __u64 sdr1;
164 struct {
165 struct {
166 __u64 slbe;
167 __u64 slbv;
168 } slb[64];
169 } ppc64;
170 struct {
171 __u32 sr[16];
172 __u64 ibat[8];
173 __u64 dbat[8];
174 } ppc32;
175 } s;
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176 struct {
177 union {
178 struct { /* KVM_SREGS_E_IMPL_FSL */
179 __u32 features; /* KVM_SREGS_E_FSL_ */
180 __u32 svr;
181 __u64 mcar;
182 __u32 hid0;
183
184 /* KVM_SREGS_E_FSL_PIDn */
185 __u32 pid1, pid2;
186 } fsl;
187 __u8 pad[256];
188 } impl;
189
190 __u32 features; /* KVM_SREGS_E_ */
191 __u32 impl_id; /* KVM_SREGS_E_IMPL_ */
192 __u32 update_special; /* KVM_SREGS_E_UPDATE_ */
193 __u32 pir; /* read-only */
194 __u64 sprg8;
195 __u64 sprg9; /* E.ED */
196 __u64 csrr0;
197 __u64 dsrr0; /* E.ED */
198 __u64 mcsrr0;
199 __u32 csrr1;
200 __u32 dsrr1; /* E.ED */
201 __u32 mcsrr1;
202 __u32 esr;
203 __u64 dear;
204 __u64 ivpr;
205 __u64 mcivpr;
206 __u64 mcsr; /* KVM_SREGS_E_UPDATE_MCSR */
207
208 __u32 tsr; /* KVM_SREGS_E_UPDATE_TSR */
209 __u32 tcr;
210 __u32 decar;
211 __u32 dec; /* KVM_SREGS_E_UPDATE_DEC */
212
213 /*
214 * Userspace can read TB directly, but the
215 * value reported here is consistent with "dec".
216 *
217 * Read-only.
218 */
219 __u64 tb;
220
221 __u32 dbsr; /* KVM_SREGS_E_UPDATE_DBSR */
222 __u32 dbcr[3];
223 __u32 iac[4];
224 __u32 dac[2];
225 __u32 dvc[2];
226 __u8 num_iac; /* read-only */
227 __u8 num_dac; /* read-only */
228 __u8 num_dvc; /* read-only */
229 __u8 pad;
230
231 __u32 epr; /* EXP */
232 __u32 vrsave; /* a.k.a. USPRG0 */
233 __u32 epcr; /* KVM_SREGS_E_64 */
234
235 __u32 mas0;
236 __u32 mas1;
237 __u64 mas2;
238 __u64 mas7_3;
239 __u32 mas4;
240 __u32 mas6;
241
242 __u32 ivor_low[16]; /* IVOR0-15 */
243 __u32 ivor_high[18]; /* IVOR32+, plus room to expand */
244
245 __u32 mmucfg; /* read-only */
246 __u32 eptcfg; /* E.PT, read-only */
247 __u32 tlbcfg[4];/* read-only */
248 __u32 tlbps[4]; /* read-only */
249
250 __u32 eplc, epsc; /* E.PD */
251 } e;
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252 __u8 pad[1020];
253 } u;
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254};
255
256struct kvm_fpu {
257 __u64 fpr[32];
258};
dd135ebb 259
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260struct kvm_debug_exit_arch {
261};
262
263/* for KVM_SET_GUEST_DEBUG */
264struct kvm_guest_debug_arch {
265};
266
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267#define KVM_REG_MASK 0x001f
268#define KVM_REG_EXT_MASK 0xffe0
269#define KVM_REG_GPR 0x0000
270#define KVM_REG_FPR 0x0020
271#define KVM_REG_QPR 0x0040
272#define KVM_REG_FQPR 0x0060
273
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274#define KVM_INTERRUPT_SET -1U
275#define KVM_INTERRUPT_UNSET -2U
17bd1580 276#define KVM_INTERRUPT_SET_LEVEL -3U
18978768 277
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278/* for KVM_CAP_SPAPR_TCE */
279struct kvm_create_spapr_tce {
280 __u64 liobn;
281 __u32 window_size;
282};
283
bbf45ba5 284#endif /* __LINUX_KVM_POWERPC_H */