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Merge branch 'tip/perf/core' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt...
[mirror_ubuntu-eoan-kernel.git] / arch / powerpc / include / asm / kvm_book3s.h
CommitLineData
4e342025
AG		 1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright SUSE Linux Products GmbH 2009
16 *
17 * Authors: Alexander Graf <agraf@suse.de>
18 */
19
20#ifndef __ASM_KVM_BOOK3S_H__
21#define __ASM_KVM_BOOK3S_H__
22
23#include <linux/types.h>
24#include <linux/kvm_host.h>
2191d657 25#include <asm/kvm_book3s_asm.h>
4e342025 26
4e342025 27struct kvmppc_bat {
e15a1137 28 u64 raw;
4e342025
AG		 29 u32 bepi;
30 u32 bepi_mask;
4e342025
AG		 31 u32 brpn;
32 u8 wimg;
33 u8 pp;
3ed9c6d2
AG		 34 bool vs : 1;
35 bool vp : 1;
4e342025
AG		 36};
37
38struct kvmppc_sid_map {
39 u64 guest_vsid;
40 u64 guest_esid;
41 u64 host_vsid;
3ed9c6d2 42 bool valid : 1;
4e342025
AG		 43};
44
45#define SID_MAP_BITS 9
46#define SID_MAP_NUM (1 << SID_MAP_BITS)
47#define SID_MAP_MASK (SID_MAP_NUM - 1)
48
8b6db3bc
AG		 49#ifdef CONFIG_PPC_BOOK3S_64
50#define SID_CONTEXTS 1
51#else
52#define SID_CONTEXTS 128
53#define VSID_POOL_SIZE (SID_CONTEXTS * 16)
54#endif
55
c4befc58
PM		 56struct hpte_cache {
57 struct hlist_node list_pte;
58 struct hlist_node list_pte_long;
59 struct hlist_node list_vpte;
60 struct hlist_node list_vpte_long;
61 struct rcu_head rcu_head;
62 u64 host_va;
63 u64 pfn;
64 ulong slot;
65 struct kvmppc_pte pte;
66};
67
4e342025
AG		 68struct kvmppc_vcpu_book3s {
69 struct kvm_vcpu vcpu;
c7f38f46 70 struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
4e342025 71 struct kvmppc_sid_map sid_map[SID_MAP_NUM];
4e342025
AG		 72 struct {
73 u64 esid;
74 u64 vsid;
75 } slb_shadow[64];
76 u8 slb_shadow_max;
4e342025
AG		 77 struct kvmppc_bat ibat[8];
78 struct kvmppc_bat dbat[8];
79 u64 hid[6];
d6d549b2 80 u64 gqr[8];
4e342025 81 u64 sdr1;
4e342025
AG		 82 u64 hior;
83 u64 msr_mask;
4e342025 84 u64 vsid_next;
8b6db3bc
AG		 85#ifdef CONFIG_PPC_BOOK3S_32
86 u32 vsid_pool[VSID_POOL_SIZE];
87#else
88 u64 vsid_first;
4e342025 89 u64 vsid_max;
8b6db3bc
AG		 90#endif
91 int context_id[SID_CONTEXTS];
c4befc58
PM		 92
93 struct hlist_head hpte_hash_pte[HPTEG_HASH_NUM_PTE];
94 struct hlist_head hpte_hash_pte_long[HPTEG_HASH_NUM_PTE_LONG];
95 struct hlist_head hpte_hash_vpte[HPTEG_HASH_NUM_VPTE];
96 struct hlist_head hpte_hash_vpte_long[HPTEG_HASH_NUM_VPTE_LONG];
97 int hpte_cache_count;
98 spinlock_t mmu_lock;
4e342025
AG		 99};
100
101#define CONTEXT_HOST 0
102#define CONTEXT_GUEST 1
103#define CONTEXT_GUEST_END 2
104
f7bc74e1
AG		 105#define VSID_REAL 0x1fffffffffc00000ULL
106#define VSID_BAT 0x1fffffffffb00000ULL
107#define VSID_REAL_DR 0x2000000000000000ULL
108#define VSID_REAL_IR 0x4000000000000000ULL
5a1b419f 109#define VSID_PR 0x8000000000000000ULL
4e342025 110
af7b4d10 111extern void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong ea, ulong ea_mask);
4e342025 112extern void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 vp, u64 vp_mask);
af7b4d10 113extern void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, ulong pa_start, ulong pa_end);
4e342025 114extern void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 new_msr);
f05ed4d5 115extern void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr);
4e342025
AG		 116extern void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu);
117extern void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu);
de56a948 118extern void kvmppc_mmu_book3s_hv_init(struct kvm_vcpu *vcpu);
4e342025
AG		 119extern int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte);
120extern int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr);
121extern void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu);
fef093be
AG		 122
123extern void kvmppc_mmu_hpte_cache_map(struct kvm_vcpu *vcpu, struct hpte_cache *pte);
124extern struct hpte_cache *kvmppc_mmu_hpte_cache_next(struct kvm_vcpu *vcpu);
125extern void kvmppc_mmu_hpte_destroy(struct kvm_vcpu *vcpu);
126extern int kvmppc_mmu_hpte_init(struct kvm_vcpu *vcpu);
127extern void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte);
128extern int kvmppc_mmu_hpte_sysinit(void);
129extern void kvmppc_mmu_hpte_sysexit(void);
de56a948 130extern int kvmppc_mmu_hv_init(void);
fef093be 131
5467a97d
AG		 132extern int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, bool data);
133extern int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, bool data);
4e342025 134extern void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec);
de56a948 135extern void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags);
e15a1137
AG		 136extern void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat,
137 bool upper, u32 val);
aba3bd7f 138extern void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr);
831317b6 139extern int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu);
e8508940 140extern pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn);
4e342025 141
02143947 142extern void kvmppc_entry_trampoline(void);
de56a948 143extern void kvmppc_hv_entry_trampoline(void);
d5e52813
AG		 144extern void kvmppc_load_up_fpu(void);
145extern void kvmppc_load_up_altivec(void);
146extern void kvmppc_load_up_vsx(void);
ca7f4203
AG		 147extern u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst);
148extern ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst);
0254f074 149extern int kvmppc_h_pr(struct kvm_vcpu *vcpu, unsigned long cmd);
4e342025
AG		 150
151static inline struct kvmppc_vcpu_book3s *to_book3s(struct kvm_vcpu *vcpu)
152{
153 return container_of(vcpu, struct kvmppc_vcpu_book3s, vcpu);
154}
155
de56a948
PM		 156extern void kvm_return_point(void);
157
158/* Also add subarch specific defines */
159
160#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
161#include <asm/kvm_book3s_32.h>
162#endif
163#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
164#include <asm/kvm_book3s_64.h>
165#endif
166
167#ifdef CONFIG_KVM_BOOK3S_PR
168
f05ed4d5
PM		 169static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
170{
171 return to_book3s(vcpu)->hior;
172}
173
174static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
175 unsigned long pending_now, unsigned long old_pending)
176{
177 if (pending_now)
178 vcpu->arch.shared->int_pending = 1;
179 else if (old_pending)
180 vcpu->arch.shared->int_pending = 0;
181}
182
c7f38f46
AG		 183static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val)
184{
185 if ( num < 14 ) {
186 to_svcpu(vcpu)->gpr[num] = val;
187 to_book3s(vcpu)->shadow_vcpu->gpr[num] = val;
188 } else
189 vcpu->arch.gpr[num] = val;
190}
191
192static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num)
193{
194 if ( num < 14 )
195 return to_svcpu(vcpu)->gpr[num];
196 else
197 return vcpu->arch.gpr[num];
198}
199
200static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val)
201{
202 to_svcpu(vcpu)->cr = val;
203 to_book3s(vcpu)->shadow_vcpu->cr = val;
204}
205
206static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu)
207{
208 return to_svcpu(vcpu)->cr;
209}
210
211static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val)
212{
213 to_svcpu(vcpu)->xer = val;
214 to_book3s(vcpu)->shadow_vcpu->xer = val;
215}
216
217static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu)
218{
219 return to_svcpu(vcpu)->xer;
220}
221
222static inline void kvmppc_set_ctr(struct kvm_vcpu *vcpu, ulong val)
223{
224 to_svcpu(vcpu)->ctr = val;
225}
226
227static inline ulong kvmppc_get_ctr(struct kvm_vcpu *vcpu)
228{
229 return to_svcpu(vcpu)->ctr;
230}
231
232static inline void kvmppc_set_lr(struct kvm_vcpu *vcpu, ulong val)
233{
234 to_svcpu(vcpu)->lr = val;
235}
236
237static inline ulong kvmppc_get_lr(struct kvm_vcpu *vcpu)
238{
239 return to_svcpu(vcpu)->lr;
240}
241
242static inline void kvmppc_set_pc(struct kvm_vcpu *vcpu, ulong val)
243{
244 to_svcpu(vcpu)->pc = val;
245}
246
247static inline ulong kvmppc_get_pc(struct kvm_vcpu *vcpu)
248{
249 return to_svcpu(vcpu)->pc;
250}
251
252static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu)
253{
254 ulong pc = kvmppc_get_pc(vcpu);
255 struct kvmppc_book3s_shadow_vcpu *svcpu = to_svcpu(vcpu);
256
257 /* Load the instruction manually if it failed to do so in the
258 * exit path */
259 if (svcpu->last_inst == KVM_INST_FETCH_FAILED)
260 kvmppc_ld(vcpu, &pc, sizeof(u32), &svcpu->last_inst, false);
261
262 return svcpu->last_inst;
263}
264
265static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu)
266{
267 return to_svcpu(vcpu)->fault_dar;
268}
4e342025 269
f05ed4d5
PM		 270static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
271{
272 ulong crit_raw = vcpu->arch.shared->critical;
273 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
274 bool crit;
275
276 /* Truncate crit indicators in 32 bit mode */
277 if (!(vcpu->arch.shared->msr & MSR_SF)) {
278 crit_raw &= 0xffffffff;
279 crit_r1 &= 0xffffffff;
280 }
281
282 /* Critical section when crit == r1 */
283 crit = (crit_raw == crit_r1);
284 /* ... and we're in supervisor mode */
285 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
286
287 return crit;
288}
de56a948
PM		 289#else /* CONFIG_KVM_BOOK3S_PR */
290
291static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
292{
293 return 0;
294}
295
296static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
297 unsigned long pending_now, unsigned long old_pending)
298{
de56a948
PM		 299}
300
301static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val)
302{
303 vcpu->arch.gpr[num] = val;
304}
305
306static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num)
307{
308 return vcpu->arch.gpr[num];
309}
310
311static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val)
312{
313 vcpu->arch.cr = val;
314}
315
316static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu)
317{
318 return vcpu->arch.cr;
319}
320
321static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val)
322{
323 vcpu->arch.xer = val;
324}
325
326static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu)
327{
328 return vcpu->arch.xer;
329}
330
331static inline void kvmppc_set_ctr(struct kvm_vcpu *vcpu, ulong val)
332{
333 vcpu->arch.ctr = val;
334}
335
336static inline ulong kvmppc_get_ctr(struct kvm_vcpu *vcpu)
337{
338 return vcpu->arch.ctr;
339}
340
341static inline void kvmppc_set_lr(struct kvm_vcpu *vcpu, ulong val)
342{
343 vcpu->arch.lr = val;
344}
345
346static inline ulong kvmppc_get_lr(struct kvm_vcpu *vcpu)
347{
348 return vcpu->arch.lr;
349}
350
351static inline void kvmppc_set_pc(struct kvm_vcpu *vcpu, ulong val)
352{
353 vcpu->arch.pc = val;
354}
355
356static inline ulong kvmppc_get_pc(struct kvm_vcpu *vcpu)
357{
358 return vcpu->arch.pc;
359}
360
361static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu)
362{
363 ulong pc = kvmppc_get_pc(vcpu);
364
365 /* Load the instruction manually if it failed to do so in the
366 * exit path */
367 if (vcpu->arch.last_inst == KVM_INST_FETCH_FAILED)
368 kvmppc_ld(vcpu, &pc, sizeof(u32), &vcpu->arch.last_inst, false);
369
370 return vcpu->arch.last_inst;
371}
372
373static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu)
374{
375 return vcpu->arch.fault_dar;
376}
377
378static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
379{
380 return false;
381}
382#endif
f05ed4d5 383
db507c30
AG		 384static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
385 unsigned long pte_index)
386{
387 unsigned long rb, va_low;
388
389 rb = (v & ~0x7fUL) << 16; /* AVA field */
390 va_low = pte_index >> 3;
391 if (v & HPTE_V_SECONDARY)
392 va_low = ~va_low;
393 /* xor vsid from AVA */
394 if (!(v & HPTE_V_1TB_SEG))
395 va_low ^= v >> 12;
396 else
397 va_low ^= v >> 24;
398 va_low &= 0x7ff;
399 if (v & HPTE_V_LARGE) {
400 rb |= 1; /* L field */
401 if (cpu_has_feature(CPU_FTR_ARCH_206) &&
402 (r & 0xff000)) {
403 /* non-16MB large page, must be 64k */
404 /* (masks depend on page size) */
405 rb |= 0x1000; /* page encoding in LP field */
406 rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
407 rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
408 }
409 } else {
410 /* 4kB page */
411 rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
412 }
413 rb |= (v >> 54) & 0x300; /* B field */
414 return rb;
415}
416
ad0a048b
AG		 417/* Magic register values loaded into r3 and r4 before the 'sc' assembly
418 * instruction for the OSI hypercalls */
419#define OSI_SC_MAGIC_R3 0x113724FA
420#define OSI_SC_MAGIC_R4 0x77810F9B
421
4e342025
AG		 422#define INS_DCBZ 0x7c0007ec
423
424#endif /* __ASM_KVM_BOOK3S_H__ */
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