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bbf45ba5 HB |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify | |
3 | * it under the terms of the GNU General Public License, version 2, as | |
4 | * published by the Free Software Foundation. | |
5 | * | |
6 | * This program is distributed in the hope that it will be useful, | |
7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
9 | * GNU General Public License for more details. | |
10 | * | |
11 | * You should have received a copy of the GNU General Public License | |
12 | * along with this program; if not, write to the Free Software | |
13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | |
14 | * | |
15 | * Copyright IBM Corp. 2007 | |
16 | * | |
17 | * Authors: Hollis Blanchard <hollisb@us.ibm.com> | |
18 | */ | |
19 | ||
20 | #ifndef __POWERPC_KVM_HOST_H__ | |
21 | #define __POWERPC_KVM_HOST_H__ | |
22 | ||
23 | #include <linux/mutex.h> | |
544c6761 AG |
24 | #include <linux/hrtimer.h> |
25 | #include <linux/interrupt.h> | |
bbf45ba5 HB |
26 | #include <linux/types.h> |
27 | #include <linux/kvm_types.h> | |
371fefd6 PM |
28 | #include <linux/threads.h> |
29 | #include <linux/spinlock.h> | |
96bc451a | 30 | #include <linux/kvm_para.h> |
aa04b4cc PM |
31 | #include <linux/list.h> |
32 | #include <linux/atomic.h> | |
bbf45ba5 | 33 | #include <asm/kvm_asm.h> |
371fefd6 | 34 | #include <asm/processor.h> |
342d3db7 | 35 | #include <asm/page.h> |
249ba1ee | 36 | #include <asm/cacheflush.h> |
699a0ea0 | 37 | #include <asm/hvcall.h> |
e20bbd3d | 38 | #include <asm/mce.h> |
bbf45ba5 | 39 | |
371fefd6 PM |
40 | #define KVM_MAX_VCPUS NR_CPUS |
41 | #define KVM_MAX_VCORES NR_CPUS | |
696066f8 | 42 | #define KVM_USER_MEM_SLOTS 512 |
bbf45ba5 | 43 | |
0b1b1dfd GK |
44 | #include <asm/cputhreads.h> |
45 | #define KVM_MAX_VCPU_ID (threads_per_subcore * KVM_MAX_VCORES) | |
46 | ||
34a75b0f PM |
47 | #define __KVM_HAVE_ARCH_INTC_INITIALIZED |
48 | ||
f4944613 | 49 | #define KVM_HALT_POLL_NS_DEFAULT 10000 /* 10 us */ |
588968b6 | 50 | |
de9ba2f3 AG |
51 | /* These values are internal and can be increased later */ |
52 | #define KVM_NR_IRQCHIPS 1 | |
53 | #define KVM_IRQCHIP_NUM_PINS 256 | |
54 | ||
2860c4b1 | 55 | /* PPC-specific vcpu->requests bit members */ |
2387149e AJ |
56 | #define KVM_REQ_WATCHDOG KVM_ARCH_REQ(0) |
57 | #define KVM_REQ_EPR_EXIT KVM_ARCH_REQ(1) | |
2860c4b1 | 58 | |
342d3db7 PM |
59 | #include <linux/mmu_notifier.h> |
60 | ||
61 | #define KVM_ARCH_WANT_MMU_NOTIFIER | |
62 | ||
b3ae2096 TY |
63 | extern int kvm_unmap_hva_range(struct kvm *kvm, |
64 | unsigned long start, unsigned long end); | |
57128468 | 65 | extern int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); |
342d3db7 PM |
66 | extern int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); |
67 | extern void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); | |
68 | ||
fef093be AG |
69 | #define HPTEG_CACHE_NUM (1 << 15) |
70 | #define HPTEG_HASH_BITS_PTE 13 | |
2d27fc5e | 71 | #define HPTEG_HASH_BITS_PTE_LONG 12 |
fef093be AG |
72 | #define HPTEG_HASH_BITS_VPTE 13 |
73 | #define HPTEG_HASH_BITS_VPTE_LONG 5 | |
a4a0f252 | 74 | #define HPTEG_HASH_BITS_VPTE_64K 11 |
fef093be | 75 | #define HPTEG_HASH_NUM_PTE (1 << HPTEG_HASH_BITS_PTE) |
2d27fc5e | 76 | #define HPTEG_HASH_NUM_PTE_LONG (1 << HPTEG_HASH_BITS_PTE_LONG) |
fef093be AG |
77 | #define HPTEG_HASH_NUM_VPTE (1 << HPTEG_HASH_BITS_VPTE) |
78 | #define HPTEG_HASH_NUM_VPTE_LONG (1 << HPTEG_HASH_BITS_VPTE_LONG) | |
a4a0f252 | 79 | #define HPTEG_HASH_NUM_VPTE_64K (1 << HPTEG_HASH_BITS_VPTE_64K) |
ca95150b | 80 | |
28e83b4f AG |
81 | /* Physical Address Mask - allowed range of real mode RAM access */ |
82 | #define KVM_PAM 0x0fffffffffffffffULL | |
83 | ||
a8606e20 PM |
84 | struct lppaca; |
85 | struct slb_shadow; | |
2e25aa5f | 86 | struct dtl_entry; |
a8606e20 | 87 | |
3ff95502 PM |
88 | struct kvmppc_vcpu_book3s; |
89 | struct kvmppc_book3s_shadow_vcpu; | |
90 | ||
bbf45ba5 | 91 | struct kvm_vm_stat { |
8a7e75d4 | 92 | ulong remote_tlb_flush; |
bbf45ba5 HB |
93 | }; |
94 | ||
95 | struct kvm_vcpu_stat { | |
8a7e75d4 SJS |
96 | u64 sum_exits; |
97 | u64 mmio_exits; | |
98 | u64 signal_exits; | |
99 | u64 light_exits; | |
bbf45ba5 | 100 | /* Account for special types of light exits: */ |
8a7e75d4 SJS |
101 | u64 itlb_real_miss_exits; |
102 | u64 itlb_virt_miss_exits; | |
103 | u64 dtlb_real_miss_exits; | |
104 | u64 dtlb_virt_miss_exits; | |
105 | u64 syscall_exits; | |
106 | u64 isi_exits; | |
107 | u64 dsi_exits; | |
108 | u64 emulated_inst_exits; | |
109 | u64 dec_exits; | |
110 | u64 ext_intr_exits; | |
2a27f514 SJS |
111 | u64 halt_poll_success_ns; |
112 | u64 halt_poll_fail_ns; | |
113 | u64 halt_wait_ns; | |
8a7e75d4 SJS |
114 | u64 halt_successful_poll; |
115 | u64 halt_attempted_poll; | |
2a27f514 | 116 | u64 halt_successful_wait; |
8a7e75d4 SJS |
117 | u64 halt_poll_invalid; |
118 | u64 halt_wakeup; | |
119 | u64 dbell_exits; | |
120 | u64 gdbell_exits; | |
121 | u64 ld; | |
122 | u64 st; | |
00c3a37c | 123 | #ifdef CONFIG_PPC_BOOK3S |
8a7e75d4 SJS |
124 | u64 pf_storage; |
125 | u64 pf_instruc; | |
126 | u64 sp_storage; | |
127 | u64 sp_instruc; | |
128 | u64 queue_intr; | |
129 | u64 ld_slow; | |
130 | u64 st_slow; | |
ca95150b | 131 | #endif |
65e7026a SW |
132 | u64 pthru_all; |
133 | u64 pthru_host; | |
134 | u64 pthru_bad_aff; | |
bbf45ba5 HB |
135 | }; |
136 | ||
73e75b41 HB |
137 | enum kvm_exit_types { |
138 | MMIO_EXITS, | |
73e75b41 HB |
139 | SIGNAL_EXITS, |
140 | ITLB_REAL_MISS_EXITS, | |
141 | ITLB_VIRT_MISS_EXITS, | |
142 | DTLB_REAL_MISS_EXITS, | |
143 | DTLB_VIRT_MISS_EXITS, | |
144 | SYSCALL_EXITS, | |
145 | ISI_EXITS, | |
146 | DSI_EXITS, | |
147 | EMULATED_INST_EXITS, | |
148 | EMULATED_MTMSRWE_EXITS, | |
149 | EMULATED_WRTEE_EXITS, | |
150 | EMULATED_MTSPR_EXITS, | |
151 | EMULATED_MFSPR_EXITS, | |
152 | EMULATED_MTMSR_EXITS, | |
153 | EMULATED_MFMSR_EXITS, | |
154 | EMULATED_TLBSX_EXITS, | |
155 | EMULATED_TLBWE_EXITS, | |
156 | EMULATED_RFI_EXITS, | |
d30f6e48 | 157 | EMULATED_RFCI_EXITS, |
c8ca97ca | 158 | EMULATED_RFDI_EXITS, |
73e75b41 HB |
159 | DEC_EXITS, |
160 | EXT_INTR_EXITS, | |
161 | HALT_WAKEUP, | |
162 | USR_PR_INST, | |
163 | FP_UNAVAIL, | |
164 | DEBUG_EXITS, | |
165 | TIMEINGUEST, | |
d30f6e48 SW |
166 | DBELL_EXITS, |
167 | GDBELL_EXITS, | |
73e75b41 HB |
168 | __NUMBER_OF_KVM_EXIT_TYPES |
169 | }; | |
170 | ||
73e75b41 | 171 | /* allow access to big endian 32bit upper/lower parts and 64bit var */ |
7b701591 | 172 | struct kvmppc_exit_timing { |
73e75b41 HB |
173 | union { |
174 | u64 tv64; | |
175 | struct { | |
176 | u32 tbu, tbl; | |
177 | } tv32; | |
178 | }; | |
179 | }; | |
73e75b41 | 180 | |
de56a948 PM |
181 | struct kvmppc_pginfo { |
182 | unsigned long pfn; | |
183 | atomic_t refcnt; | |
184 | }; | |
185 | ||
121f80ba AK |
186 | struct kvmppc_spapr_tce_iommu_table { |
187 | struct rcu_head rcu; | |
188 | struct list_head next; | |
189 | struct iommu_table *tbl; | |
190 | struct kref kref; | |
191 | }; | |
192 | ||
54738c09 DG |
193 | struct kvmppc_spapr_tce_table { |
194 | struct list_head list; | |
195 | struct kvm *kvm; | |
196 | u64 liobn; | |
366baf28 | 197 | struct rcu_head rcu; |
fe26e527 | 198 | u32 page_shift; |
14f853f1 | 199 | u64 offset; /* in pages */ |
fe26e527 | 200 | u64 size; /* window size in pages */ |
121f80ba | 201 | struct list_head iommu_tables; |
54738c09 DG |
202 | struct page *pages[0]; |
203 | }; | |
204 | ||
bc5ad3f3 BH |
205 | /* XICS components, defined in book3s_xics.c */ |
206 | struct kvmppc_xics; | |
207 | struct kvmppc_icp; | |
5af50993 BH |
208 | extern struct kvm_device_ops kvm_xics_ops; |
209 | ||
210 | /* XIVE components, defined in book3s_xive.c */ | |
211 | struct kvmppc_xive; | |
212 | struct kvmppc_xive_vcpu; | |
213 | extern struct kvm_device_ops kvm_xive_ops; | |
bc5ad3f3 | 214 | |
8daaafc8 SW |
215 | struct kvmppc_passthru_irqmap; |
216 | ||
8936dda4 PM |
217 | /* |
218 | * The reverse mapping array has one entry for each HPTE, | |
219 | * which stores the guest's view of the second word of the HPTE | |
06ce2c63 PM |
220 | * (including the guest physical address of the mapping), |
221 | * plus forward and backward pointers in a doubly-linked ring | |
222 | * of HPTEs that map the same host page. The pointers in this | |
223 | * ring are 32-bit HPTE indexes, to save space. | |
8936dda4 PM |
224 | */ |
225 | struct revmap_entry { | |
226 | unsigned long guest_rpte; | |
06ce2c63 | 227 | unsigned int forw, back; |
8936dda4 PM |
228 | }; |
229 | ||
06ce2c63 | 230 | /* |
a66b48c3 | 231 | * We use the top bit of each memslot->arch.rmap entry as a lock bit, |
06ce2c63 PM |
232 | * and bit 32 as a present flag. The bottom 32 bits are the |
233 | * index in the guest HPT of a HPTE that points to the page. | |
234 | */ | |
235 | #define KVMPPC_RMAP_LOCK_BIT 63 | |
bad3b507 PM |
236 | #define KVMPPC_RMAP_RC_SHIFT 32 |
237 | #define KVMPPC_RMAP_REFERENCED (HPTE_R_R << KVMPPC_RMAP_RC_SHIFT) | |
06ce2c63 PM |
238 | #define KVMPPC_RMAP_PRESENT 0x100000000ul |
239 | #define KVMPPC_RMAP_INDEX 0xfffffffful | |
240 | ||
db3fe4eb | 241 | struct kvm_arch_memory_slot { |
9975f5e3 | 242 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
d89cc617 | 243 | unsigned long *rmap; |
9975f5e3 | 244 | #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ |
db3fe4eb TY |
245 | }; |
246 | ||
3f9d4f5a DG |
247 | struct kvm_hpt_info { |
248 | /* Host virtual (linear mapping) address of guest HPT */ | |
249 | unsigned long virt; | |
250 | /* Array of reverse mapping entries for each guest HPTE */ | |
251 | struct revmap_entry *rev; | |
3f9d4f5a DG |
252 | /* Guest HPT size is 2**(order) bytes */ |
253 | u32 order; | |
254 | /* 1 if HPT allocated with CMA, 0 otherwise */ | |
255 | int cma; | |
256 | }; | |
257 | ||
5e985969 DG |
258 | struct kvm_resize_hpt; |
259 | ||
bbf45ba5 | 260 | struct kvm_arch { |
d30f6e48 | 261 | unsigned int lpid; |
3c313524 | 262 | unsigned int smt_mode; /* # vcpus per virtual core */ |
57900694 | 263 | unsigned int emul_smt_mode; /* emualted SMT mode, on P9 */ |
9975f5e3 | 264 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
7c5b06ca | 265 | unsigned int tlb_sets; |
3f9d4f5a | 266 | struct kvm_hpt_info hpt; |
a56ee9f8 | 267 | atomic64_t mmio_update; |
de56a948 PM |
268 | unsigned int host_lpid; |
269 | unsigned long host_lpcr; | |
270 | unsigned long sdr1; | |
271 | unsigned long host_sdr1; | |
272 | int tlbie_lock; | |
aa04b4cc | 273 | unsigned long lpcr; |
697d3899 | 274 | unsigned long vrma_slb_v; |
1b151ce4 | 275 | int mmu_ready; |
32fad281 | 276 | atomic_t vcpus_running; |
1b400ba0 | 277 | u32 online_vcores; |
44e5f6be | 278 | atomic_t hpte_mod_interest; |
1b400ba0 | 279 | cpumask_t need_tlb_flush; |
a29ebeaf | 280 | cpumask_t cpu_in_guest; |
9e04ba69 | 281 | u8 radix; |
134764ed | 282 | u8 fwnmi_enabled; |
516f7898 | 283 | bool threads_indep; |
9e04ba69 | 284 | pgd_t *pgtable; |
468808bd | 285 | u64 process_table; |
e23a808b PM |
286 | struct dentry *debugfs_dir; |
287 | struct dentry *htab_dentry; | |
5e985969 | 288 | struct kvm_resize_hpt *resize_hpt; /* protected by kvm->lock */ |
9975f5e3 | 289 | #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ |
7aa79938 | 290 | #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE |
9308ab8e PM |
291 | struct mutex hpt_mutex; |
292 | #endif | |
f31e65e1 BH |
293 | #ifdef CONFIG_PPC_BOOK3S_64 |
294 | struct list_head spapr_tce_tables; | |
8e591cb7 | 295 | struct list_head rtas_tokens; |
699a0ea0 | 296 | DECLARE_BITMAP(enabled_hcalls, MAX_HCALL_OPCODE/4 + 1); |
f31e65e1 | 297 | #endif |
de9ba2f3 AG |
298 | #ifdef CONFIG_KVM_MPIC |
299 | struct openpic *mpic; | |
300 | #endif | |
bc5ad3f3 BH |
301 | #ifdef CONFIG_KVM_XICS |
302 | struct kvmppc_xics *xics; | |
5af50993 | 303 | struct kvmppc_xive *xive; |
8daaafc8 | 304 | struct kvmppc_passthru_irqmap *pimap; |
bc5ad3f3 | 305 | #endif |
cbbc58d4 | 306 | struct kvmppc_ops *kvm_ops; |
1287cb3f AG |
307 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
308 | /* This array can grow quite large, keep it at the end */ | |
309 | struct kvmppc_vcore *vcores[KVM_MAX_VCORES]; | |
310 | #endif | |
bbf45ba5 HB |
311 | }; |
312 | ||
7d6c40da PM |
313 | #define VCORE_ENTRY_MAP(vc) ((vc)->entry_exit_map & 0xff) |
314 | #define VCORE_EXIT_MAP(vc) ((vc)->entry_exit_map >> 8) | |
315 | #define VCORE_IS_EXITING(vc) (VCORE_EXIT_MAP(vc) != 0) | |
371fefd6 | 316 | |
b4deba5c PM |
317 | /* This bit is used when a vcore exit is triggered from outside the vcore */ |
318 | #define VCORE_EXIT_REQ 0x10000 | |
319 | ||
ec257165 PM |
320 | /* |
321 | * Values for vcore_state. | |
322 | * Note that these are arranged such that lower values | |
323 | * (< VCORE_SLEEPING) don't require stolen time accounting | |
324 | * on load/unload, and higher values do. | |
325 | */ | |
19ccb76a | 326 | #define VCORE_INACTIVE 0 |
ec257165 PM |
327 | #define VCORE_PREEMPT 1 |
328 | #define VCORE_PIGGYBACK 2 | |
329 | #define VCORE_SLEEPING 3 | |
330 | #define VCORE_RUNNING 4 | |
331 | #define VCORE_EXITING 5 | |
0cda69dd | 332 | #define VCORE_POLLING 6 |
19ccb76a | 333 | |
2e25aa5f PM |
334 | /* |
335 | * Struct used to manage memory for a virtual processor area | |
336 | * registered by a PAPR guest. There are three types of area | |
337 | * that a guest can register. | |
338 | */ | |
339 | struct kvmppc_vpa { | |
c35635ef | 340 | unsigned long gpa; /* Current guest phys addr */ |
2e25aa5f PM |
341 | void *pinned_addr; /* Address in kernel linear mapping */ |
342 | void *pinned_end; /* End of region */ | |
343 | unsigned long next_gpa; /* Guest phys addr for update */ | |
344 | unsigned long len; /* Number of bytes required */ | |
345 | u8 update_pending; /* 1 => update pinned_addr from next_gpa */ | |
c35635ef | 346 | bool dirty; /* true => area has been modified by kernel */ |
2e25aa5f PM |
347 | }; |
348 | ||
ca95150b | 349 | struct kvmppc_pte { |
af7b4d10 | 350 | ulong eaddr; |
ca95150b | 351 | u64 vpage; |
af7b4d10 | 352 | ulong raddr; |
3ed9c6d2 AG |
353 | bool may_read : 1; |
354 | bool may_write : 1; | |
355 | bool may_execute : 1; | |
96df2267 | 356 | unsigned long wimg; |
a4a0f252 | 357 | u8 page_size; /* MMU_PAGE_xxx */ |
ca95150b AG |
358 | }; |
359 | ||
360 | struct kvmppc_mmu { | |
361 | /* book3s_64 only */ | |
362 | void (*slbmte)(struct kvm_vcpu *vcpu, u64 rb, u64 rs); | |
363 | u64 (*slbmfee)(struct kvm_vcpu *vcpu, u64 slb_nr); | |
364 | u64 (*slbmfev)(struct kvm_vcpu *vcpu, u64 slb_nr); | |
365 | void (*slbie)(struct kvm_vcpu *vcpu, u64 slb_nr); | |
366 | void (*slbia)(struct kvm_vcpu *vcpu); | |
367 | /* book3s */ | |
368 | void (*mtsrin)(struct kvm_vcpu *vcpu, u32 srnum, ulong value); | |
369 | u32 (*mfsrin)(struct kvm_vcpu *vcpu, u32 srnum); | |
93b159b4 PM |
370 | int (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr, |
371 | struct kvmppc_pte *pte, bool data, bool iswrite); | |
ca95150b AG |
372 | void (*reset_msr)(struct kvm_vcpu *vcpu); |
373 | void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large); | |
af7b4d10 | 374 | int (*esid_to_vsid)(struct kvm_vcpu *vcpu, ulong esid, u64 *vsid); |
ca95150b AG |
375 | u64 (*ea_to_vp)(struct kvm_vcpu *vcpu, gva_t eaddr, bool data); |
376 | bool (*is_dcbz32)(struct kvm_vcpu *vcpu); | |
377 | }; | |
378 | ||
c4befc58 PM |
379 | struct kvmppc_slb { |
380 | u64 esid; | |
381 | u64 vsid; | |
382 | u64 orige; | |
383 | u64 origv; | |
384 | bool valid : 1; | |
385 | bool Ks : 1; | |
386 | bool Kp : 1; | |
387 | bool nx : 1; | |
388 | bool large : 1; /* PTEs are 16MB */ | |
389 | bool tb : 1; /* 1TB segment */ | |
390 | bool class : 1; | |
a4a0f252 | 391 | u8 base_page_size; /* MMU_PAGE_xxx */ |
ca95150b AG |
392 | }; |
393 | ||
b6c295df PM |
394 | /* Struct used to accumulate timing information in HV real mode code */ |
395 | struct kvmhv_tb_accumulator { | |
396 | u64 seqcount; /* used to synchronize access, also count * 2 */ | |
397 | u64 tb_total; /* total time in timebase ticks */ | |
398 | u64 tb_min; /* min time */ | |
399 | u64 tb_max; /* max time */ | |
400 | }; | |
401 | ||
8daaafc8 SW |
402 | #ifdef CONFIG_PPC_BOOK3S_64 |
403 | struct kvmppc_irq_map { | |
404 | u32 r_hwirq; | |
405 | u32 v_hwirq; | |
406 | struct irq_desc *desc; | |
407 | }; | |
408 | ||
409 | #define KVMPPC_PIRQ_MAPPED 1024 | |
410 | struct kvmppc_passthru_irqmap { | |
411 | int n_mapped; | |
412 | struct kvmppc_irq_map mapped[KVMPPC_PIRQ_MAPPED]; | |
413 | }; | |
414 | #endif | |
415 | ||
6df8d3fc BB |
416 | # ifdef CONFIG_PPC_FSL_BOOK3E |
417 | #define KVMPPC_BOOKE_IAC_NUM 2 | |
418 | #define KVMPPC_BOOKE_DAC_NUM 2 | |
419 | # else | |
420 | #define KVMPPC_BOOKE_IAC_NUM 4 | |
421 | #define KVMPPC_BOOKE_DAC_NUM 2 | |
422 | # endif | |
423 | #define KVMPPC_BOOKE_MAX_IAC 4 | |
424 | #define KVMPPC_BOOKE_MAX_DAC 2 | |
425 | ||
5df554ad SW |
426 | /* KVMPPC_EPR_USER takes precedence over KVMPPC_EPR_KERNEL */ |
427 | #define KVMPPC_EPR_NONE 0 /* EPR not supported */ | |
428 | #define KVMPPC_EPR_USER 1 /* exit to userspace to fill EPR */ | |
429 | #define KVMPPC_EPR_KERNEL 2 /* in-kernel irqchip */ | |
430 | ||
eb1e4f43 SW |
431 | #define KVMPPC_IRQ_DEFAULT 0 |
432 | #define KVMPPC_IRQ_MPIC 1 | |
5af50993 | 433 | #define KVMPPC_IRQ_XICS 2 /* Includes a XIVE option */ |
eb1e4f43 | 434 | |
a56ee9f8 YX |
435 | #define MMIO_HPTE_CACHE_SIZE 4 |
436 | ||
437 | struct mmio_hpte_cache_entry { | |
438 | unsigned long hpte_v; | |
439 | unsigned long hpte_r; | |
440 | unsigned long rpte; | |
441 | unsigned long pte_index; | |
442 | unsigned long eaddr; | |
443 | unsigned long slb_v; | |
444 | long mmio_update; | |
445 | unsigned int slb_base_pshift; | |
446 | }; | |
447 | ||
448 | struct mmio_hpte_cache { | |
449 | struct mmio_hpte_cache_entry entry[MMIO_HPTE_CACHE_SIZE]; | |
450 | unsigned int index; | |
451 | }; | |
452 | ||
6f63e81b BL |
453 | #define KVMPPC_VSX_COPY_NONE 0 |
454 | #define KVMPPC_VSX_COPY_WORD 1 | |
455 | #define KVMPPC_VSX_COPY_DWORD 2 | |
456 | #define KVMPPC_VSX_COPY_DWORD_LOAD_DUMP 3 | |
457 | ||
eb1e4f43 SW |
458 | struct openpic; |
459 | ||
5af50993 BH |
460 | /* W0 and W1 of a XIVE thread management context */ |
461 | union xive_tma_w01 { | |
462 | struct { | |
463 | u8 nsr; | |
464 | u8 cppr; | |
465 | u8 ipb; | |
466 | u8 lsmfb; | |
467 | u8 ack; | |
468 | u8 inc; | |
469 | u8 age; | |
470 | u8 pipr; | |
471 | }; | |
472 | __be64 w01; | |
473 | }; | |
474 | ||
bbf45ba5 | 475 | struct kvm_vcpu_arch { |
ca95150b | 476 | ulong host_stack; |
bbf45ba5 | 477 | u32 host_pid; |
00c3a37c | 478 | #ifdef CONFIG_PPC_BOOK3S |
c4befc58 | 479 | struct kvmppc_slb slb[64]; |
de56a948 | 480 | int slb_max; /* 1 + index of last valid entry in slb[] */ |
c4befc58 | 481 | int slb_nr; /* total number of entries in SLB */ |
ca95150b | 482 | struct kvmppc_mmu mmu; |
3ff95502 PM |
483 | struct kvmppc_vcpu_book3s *book3s; |
484 | #endif | |
485 | #ifdef CONFIG_PPC_BOOK3S_32 | |
486 | struct kvmppc_book3s_shadow_vcpu *shadow_vcpu; | |
ca95150b | 487 | #endif |
bbf45ba5 | 488 | |
5cf8ca22 | 489 | ulong gpr[32]; |
bbf45ba5 | 490 | |
efff1912 | 491 | struct thread_fp_state fp; |
180a34d2 | 492 | |
4cd35f67 SW |
493 | #ifdef CONFIG_SPE |
494 | ulong evr[32]; | |
495 | ulong spefscr; | |
496 | ulong host_spefscr; | |
497 | u64 acc; | |
498 | #endif | |
180a34d2 | 499 | #ifdef CONFIG_ALTIVEC |
efff1912 | 500 | struct thread_vr_state vr; |
180a34d2 AG |
501 | #endif |
502 | ||
d30f6e48 SW |
503 | #ifdef CONFIG_KVM_BOOKE_HV |
504 | u32 host_mas4; | |
505 | u32 host_mas6; | |
506 | u32 shadow_epcr; | |
d30f6e48 SW |
507 | u32 shadow_msrp; |
508 | u32 eplc; | |
509 | u32 epsc; | |
510 | u32 oldpir; | |
511 | #endif | |
512 | ||
62b4db00 AG |
513 | #if defined(CONFIG_BOOKE) |
514 | #if defined(CONFIG_KVM_BOOKE_HV) || defined(CONFIG_64BIT) | |
515 | u32 epcr; | |
516 | #endif | |
517 | #endif | |
518 | ||
5aa9e2f4 AG |
519 | #ifdef CONFIG_PPC_BOOK3S |
520 | /* For Gekko paired singles */ | |
521 | u32 qpr[32]; | |
522 | #endif | |
523 | ||
5cf8ca22 | 524 | ulong pc; |
5cf8ca22 HB |
525 | ulong ctr; |
526 | ulong lr; | |
e14e7a1e | 527 | #ifdef CONFIG_PPC_BOOK3S |
b005255e | 528 | ulong tar; |
e14e7a1e | 529 | #endif |
7e57cba0 | 530 | |
5cf8ca22 | 531 | ulong xer; |
7e57cba0 | 532 | u32 cr; |
bbf45ba5 | 533 | |
00c3a37c | 534 | #ifdef CONFIG_PPC_BOOK3S |
ca95150b | 535 | ulong hflags; |
180a34d2 | 536 | ulong guest_owned_ext; |
de56a948 PM |
537 | ulong purr; |
538 | ulong spurr; | |
b005255e | 539 | ulong ic; |
de56a948 PM |
540 | ulong dscr; |
541 | ulong amr; | |
542 | ulong uamor; | |
b005255e | 543 | ulong iamr; |
de56a948 | 544 | u32 ctrl; |
8563bf52 | 545 | u32 dabrx; |
de56a948 | 546 | ulong dabr; |
b005255e MN |
547 | ulong dawr; |
548 | ulong dawrx; | |
549 | ulong ciabr; | |
0acb9111 | 550 | ulong cfar; |
4b8473c9 | 551 | ulong ppr; |
f35f3a48 | 552 | u32 pspb; |
b005255e | 553 | ulong fscr; |
616dff86 | 554 | ulong shadow_fscr; |
b005255e MN |
555 | ulong ebbhr; |
556 | ulong ebbrr; | |
557 | ulong bescr; | |
558 | ulong csigr; | |
559 | ulong tacr; | |
560 | ulong tcscr; | |
561 | ulong acop; | |
562 | ulong wort; | |
e9cf1e08 PM |
563 | ulong tid; |
564 | ulong psscr; | |
769377f7 | 565 | ulong hfscr; |
a2d56020 | 566 | ulong shadow_srr1; |
ca95150b | 567 | #endif |
eab17672 | 568 | u32 vrsave; /* also USPRG0 */ |
bbf45ba5 | 569 | u32 mmucr; |
5fd8505e | 570 | /* shadow_msr is unused for BookE HV */ |
ecee273f | 571 | ulong shadow_msr; |
5cf8ca22 HB |
572 | ulong csrr0; |
573 | ulong csrr1; | |
574 | ulong dsrr0; | |
575 | ulong dsrr1; | |
5ce941ee SW |
576 | ulong mcsrr0; |
577 | ulong mcsrr1; | |
578 | ulong mcsr; | |
1bc3fe81 | 579 | ulong dec; |
21bd000a | 580 | #ifdef CONFIG_BOOKE |
bbf45ba5 | 581 | u32 decar; |
21bd000a | 582 | #endif |
3cd60e31 AK |
583 | /* Time base value when we entered the guest */ |
584 | u64 entry_tb; | |
8f42ab27 | 585 | u64 entry_vtb; |
06da28e7 | 586 | u64 entry_ic; |
bbf45ba5 | 587 | u32 tcr; |
dfd4d47e | 588 | ulong tsr; /* we need to perform set/clr_bits() which requires ulong */ |
bb3a8a17 | 589 | u32 ivor[64]; |
5cf8ca22 | 590 | ulong ivpr; |
ca95150b | 591 | u32 pvr; |
49dd2c49 HB |
592 | |
593 | u32 shadow_pid; | |
dd9ebf1f | 594 | u32 shadow_pid1; |
bbf45ba5 | 595 | u32 pid; |
49dd2c49 HB |
596 | u32 swap_pid; |
597 | ||
bbf45ba5 HB |
598 | u32 ccr0; |
599 | u32 ccr1; | |
f7b200af | 600 | u32 dbsr; |
bbf45ba5 | 601 | |
b005255e | 602 | u64 mmcr[5]; |
9e368f29 | 603 | u32 pmc[8]; |
b005255e | 604 | u32 spmc[2]; |
14941789 PM |
605 | u64 siar; |
606 | u64 sdar; | |
b005255e | 607 | u64 sier; |
7b490411 MN |
608 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
609 | u64 tfhar; | |
610 | u64 texasr; | |
611 | u64 tfiar; | |
4bb3c7a0 | 612 | u64 orig_texasr; |
7b490411 MN |
613 | |
614 | u32 cr_tm; | |
0d808df0 | 615 | u64 xer_tm; |
7b490411 MN |
616 | u64 lr_tm; |
617 | u64 ctr_tm; | |
618 | u64 amr_tm; | |
619 | u64 ppr_tm; | |
620 | u64 dscr_tm; | |
621 | u64 tar_tm; | |
622 | ||
623 | ulong gpr_tm[32]; | |
624 | ||
625 | struct thread_fp_state fp_tm; | |
626 | ||
627 | struct thread_vr_state vr_tm; | |
628 | u32 vrsave_tm; /* also USPRG0 */ | |
629 | ||
630 | #endif | |
de56a948 | 631 | |
73e75b41 | 632 | #ifdef CONFIG_KVM_EXIT_TIMING |
09000adb | 633 | struct mutex exit_timing_lock; |
7b701591 HB |
634 | struct kvmppc_exit_timing timing_exit; |
635 | struct kvmppc_exit_timing timing_last_enter; | |
73e75b41 HB |
636 | u32 last_exit_type; |
637 | u32 timing_count_type[__NUMBER_OF_KVM_EXIT_TYPES]; | |
638 | u64 timing_sum_duration[__NUMBER_OF_KVM_EXIT_TYPES]; | |
639 | u64 timing_sum_quad_duration[__NUMBER_OF_KVM_EXIT_TYPES]; | |
640 | u64 timing_min_duration[__NUMBER_OF_KVM_EXIT_TYPES]; | |
641 | u64 timing_max_duration[__NUMBER_OF_KVM_EXIT_TYPES]; | |
642 | u64 timing_last_exit; | |
643 | struct dentry *debugfs_exit_timing; | |
644 | #endif | |
645 | ||
de56a948 PM |
646 | #ifdef CONFIG_PPC_BOOK3S |
647 | ulong fault_dar; | |
648 | u32 fault_dsisr; | |
e5ee5422 | 649 | unsigned long intr_msr; |
f4c51f84 | 650 | ulong fault_gpa; /* guest real address of page fault (POWER9) */ |
de56a948 PM |
651 | #endif |
652 | ||
0604675f | 653 | #ifdef CONFIG_BOOKE |
5cf8ca22 HB |
654 | ulong fault_dear; |
655 | ulong fault_esr; | |
daf5e271 LY |
656 | ulong queued_dear; |
657 | ulong queued_esr; | |
f61c94bb BB |
658 | spinlock_t wdt_lock; |
659 | struct timer_list wdt_timer; | |
8fdd21a2 | 660 | u32 tlbcfg[4]; |
307d9008 | 661 | u32 tlbps[4]; |
8fdd21a2 | 662 | u32 mmucfg; |
9a6061d7 | 663 | u32 eptcfg; |
d30f6e48 | 664 | u32 epr; |
99e99d19 | 665 | u64 sprg9; |
debf27d6 | 666 | u32 pwrmgtcr0; |
15b708be | 667 | u32 crit_save; |
ce11e48b | 668 | /* guest debug registers*/ |
547465ef | 669 | struct debug_reg dbg_reg; |
0604675f | 670 | #endif |
bbf45ba5 | 671 | gpa_t paddr_accessed; |
6020c0f6 | 672 | gva_t vaddr_accessed; |
08c9a188 | 673 | pgd_t *pgdir; |
bbf45ba5 HB |
674 | |
675 | u8 io_gpr; /* GPR used as IO source/target */ | |
d078eed3 | 676 | u8 mmio_host_swabbed; |
3587d534 | 677 | u8 mmio_sign_extend; |
6f63e81b BL |
678 | /* conversion between single and double precision */ |
679 | u8 mmio_sp64_extend; | |
680 | /* | |
681 | * Number of simulations for vsx. | |
682 | * If we use 2*8bytes to simulate 1*16bytes, | |
683 | * then the number should be 2 and | |
684 | * mmio_vsx_copy_type=KVMPPC_VSX_COPY_DWORD. | |
685 | * If we use 4*4bytes to simulate 1*16bytes, | |
686 | * the number should be 4 and | |
687 | * mmio_vsx_copy_type=KVMPPC_VSX_COPY_WORD. | |
688 | */ | |
689 | u8 mmio_vsx_copy_nums; | |
690 | u8 mmio_vsx_offset; | |
691 | u8 mmio_vsx_copy_type; | |
692 | u8 mmio_vsx_tx_sx_enabled; | |
09f98496 | 693 | u8 mmio_vmx_copy_nums; |
ad0a048b AG |
694 | u8 osi_needed; |
695 | u8 osi_enabled; | |
9432ba60 | 696 | u8 papr_enabled; |
f61c94bb | 697 | u8 watchdog_enabled; |
af8f38b3 AG |
698 | u8 sane; |
699 | u8 cpu_type; | |
de56a948 | 700 | u8 hcall_needed; |
5df554ad | 701 | u8 epr_flags; /* KVMPPC_EPR_xxx */ |
1c810636 | 702 | u8 epr_needed; |
bbf45ba5 HB |
703 | |
704 | u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */ | |
705 | ||
544c6761 | 706 | struct hrtimer dec_timer; |
ca95150b | 707 | u64 dec_jiffies; |
de56a948 | 708 | u64 dec_expires; |
bbf45ba5 | 709 | unsigned long pending_exceptions; |
a8606e20 PM |
710 | u8 ceded; |
711 | u8 prodded; | |
57900694 | 712 | u8 doorbell_request; |
2267ea76 | 713 | u8 irq_pending; /* Used by XIVE to signal pending guest irqs */ |
de56a948 | 714 | u32 last_inst; |
a8606e20 | 715 | |
8577370f | 716 | struct swait_queue_head *wqp; |
371fefd6 PM |
717 | struct kvmppc_vcore *vcore; |
718 | int ret; | |
de56a948 | 719 | int trap; |
371fefd6 PM |
720 | int state; |
721 | int ptid; | |
ec257165 | 722 | int thread_cpu; |
a29ebeaf | 723 | int prev_cpu; |
19ccb76a | 724 | bool timer_running; |
371fefd6 | 725 | wait_queue_head_t cpu_run; |
e20bbd3d | 726 | struct machine_check_event mce_evt; /* Valid if trap == 0x200 */ |
371fefd6 | 727 | |
96bc451a | 728 | struct kvm_vcpu_arch_shared *shared; |
5deb8e7a AG |
729 | #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE) |
730 | bool shared_big_endian; | |
731 | #endif | |
beb03f14 AG |
732 | unsigned long magic_page_pa; /* phys addr to map the magic page to */ |
733 | unsigned long magic_page_ea; /* effect. addr to map the magic page to */ | |
f3383cf8 | 734 | bool disable_kernel_nx; |
de56a948 | 735 | |
eb1e4f43 SW |
736 | int irq_type; /* one of KVM_IRQ_* */ |
737 | int irq_cpu_id; | |
738 | struct openpic *mpic; /* KVM_IRQ_MPIC */ | |
bc5ad3f3 BH |
739 | #ifdef CONFIG_KVM_XICS |
740 | struct kvmppc_icp *icp; /* XICS presentation controller */ | |
5af50993 BH |
741 | struct kvmppc_xive_vcpu *xive_vcpu; /* XIVE virtual CPU data */ |
742 | __be32 xive_cam_word; /* Cooked W2 in proper endian with valid bit */ | |
35c2405e | 743 | u8 xive_pushed; /* Is the VP pushed on the physical CPU ? */ |
9b9b13a6 | 744 | u8 xive_esc_on; /* Is the escalation irq enabled ? */ |
5af50993 | 745 | union xive_tma_w01 xive_saved_state; /* W0..1 of XIVE thread state */ |
9b9b13a6 BH |
746 | u64 xive_esc_raddr; /* Escalation interrupt ESB real addr */ |
747 | u64 xive_esc_vaddr; /* Escalation interrupt ESB virt addr */ | |
bc5ad3f3 | 748 | #endif |
eb1e4f43 | 749 | |
9975f5e3 | 750 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
de56a948 | 751 | struct kvm_vcpu_arch_shared shregs; |
371fefd6 | 752 | |
a56ee9f8 | 753 | struct mmio_hpte_cache mmio_cache; |
697d3899 PM |
754 | unsigned long pgfault_addr; |
755 | long pgfault_index; | |
756 | unsigned long pgfault_hpte[2]; | |
a56ee9f8 | 757 | struct mmio_hpte_cache_entry *pgfault_cache; |
697d3899 | 758 | |
371fefd6 PM |
759 | struct task_struct *run_task; |
760 | struct kvm_run *kvm_run; | |
2e25aa5f PM |
761 | |
762 | spinlock_t vpa_update_lock; | |
763 | struct kvmppc_vpa vpa; | |
764 | struct kvmppc_vpa dtl; | |
765 | struct dtl_entry *dtl_ptr; | |
766 | unsigned long dtl_index; | |
0456ec4f | 767 | u64 stolen_logged; |
2e25aa5f | 768 | struct kvmppc_vpa slb_shadow; |
c7b67670 PM |
769 | |
770 | spinlock_t tbacct_lock; | |
771 | u64 busy_stolen; | |
772 | u64 busy_preempt; | |
4a157d61 PM |
773 | |
774 | u32 emul_inst; | |
de56a948 | 775 | #endif |
b6c295df PM |
776 | |
777 | #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING | |
778 | struct kvmhv_tb_accumulator *cur_activity; /* What we're timing */ | |
779 | u64 cur_tb_start; /* when it started */ | |
780 | struct kvmhv_tb_accumulator rm_entry; /* real-mode entry code */ | |
781 | struct kvmhv_tb_accumulator rm_intr; /* real-mode intr handling */ | |
782 | struct kvmhv_tb_accumulator rm_exit; /* real-mode exit code */ | |
783 | struct kvmhv_tb_accumulator guest_time; /* guest execution */ | |
784 | struct kvmhv_tb_accumulator cede_time; /* time napping inside guest */ | |
785 | ||
786 | struct dentry *debugfs_dir; | |
787 | struct dentry *debugfs_timings; | |
788 | #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ | |
bbf45ba5 HB |
789 | }; |
790 | ||
efff1912 | 791 | #define VCPU_FPR(vcpu, i) (vcpu)->arch.fp.fpr[i][TS_FPROFFSET] |
6f63e81b BL |
792 | #define VCPU_VSX_FPR(vcpu, i, j) ((vcpu)->arch.fp.fpr[i][j]) |
793 | #define VCPU_VSX_VR(vcpu, i) ((vcpu)->arch.vr.vr[i]) | |
efff1912 | 794 | |
19ccb76a | 795 | /* Values for vcpu->arch.state */ |
8455d79e PM |
796 | #define KVMPPC_VCPU_NOTREADY 0 |
797 | #define KVMPPC_VCPU_RUNNABLE 1 | |
c7b67670 | 798 | #define KVMPPC_VCPU_BUSY_IN_HOST 2 |
371fefd6 | 799 | |
b3c5d3c2 AG |
800 | /* Values for vcpu->arch.io_gpr */ |
801 | #define KVM_MMIO_REG_MASK 0x001f | |
802 | #define KVM_MMIO_REG_EXT_MASK 0xffe0 | |
803 | #define KVM_MMIO_REG_GPR 0x0000 | |
804 | #define KVM_MMIO_REG_FPR 0x0020 | |
805 | #define KVM_MMIO_REG_QPR 0x0040 | |
806 | #define KVM_MMIO_REG_FQPR 0x0060 | |
6f63e81b | 807 | #define KVM_MMIO_REG_VSX 0x0080 |
09f98496 | 808 | #define KVM_MMIO_REG_VMX 0x00c0 |
b3c5d3c2 | 809 | |
2246f8b5 | 810 | #define __KVM_HAVE_ARCH_WQP |
5df554ad | 811 | #define __KVM_HAVE_CREATE_DEVICE |
b6d33834 | 812 | |
13a34e06 | 813 | static inline void kvm_arch_hardware_disable(void) {} |
0865e636 RK |
814 | static inline void kvm_arch_hardware_unsetup(void) {} |
815 | static inline void kvm_arch_sync_events(struct kvm *kvm) {} | |
15f46015 | 816 | static inline void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots) {} |
0865e636 RK |
817 | static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {} |
818 | static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} | |
819 | static inline void kvm_arch_exit(void) {} | |
3217f7c2 CD |
820 | static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {} |
821 | static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {} | |
3491caf2 | 822 | static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} |
0865e636 | 823 | |
bbf45ba5 | 824 | #endif /* __POWERPC_KVM_HOST_H__ */ |