[mirror_ubuntu-eoan-kernel.git] / arch / powerpc / include / asm / kvm_host.h

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 *
 * Copyright IBM Corp. 2007
 *
 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
 */

#ifndef __POWERPC_KVM_HOST_H__
#define __POWERPC_KVM_HOST_H__

#include <linux/mutex.h>
#include <linux/hrtimer.h>
#include <linux/interrupt.h>
#include <linux/types.h>
#include <linux/kvm_types.h>
#include <linux/threads.h>
#include <linux/spinlock.h>
#include <linux/kvm_para.h>
#include <linux/list.h>
#include <linux/atomic.h>
#include <asm/kvm_asm.h>
#include <asm/processor.h>
#include <asm/page.h>
#include <asm/cacheflush.h>

#define KVM_MAX_VCPUS		NR_CPUS
#define KVM_MAX_VCORES		NR_CPUS
#define KVM_USER_MEM_SLOTS 32
#define KVM_MEM_SLOTS_NUM KVM_USER_MEM_SLOTS

#ifdef CONFIG_KVM_MMIO
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
#endif

/* These values are internal and can be increased later */
#define KVM_NR_IRQCHIPS          1
#define KVM_IRQCHIP_NUM_PINS     256

#if !defined(CONFIG_KVM_440)
#include <linux/mmu_notifier.h>

#define KVM_ARCH_WANT_MMU_NOTIFIER

struct kvm;
extern int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
extern int kvm_unmap_hva_range(struct kvm *kvm,
			       unsigned long start, unsigned long end);
extern int kvm_age_hva(struct kvm *kvm, unsigned long hva);
extern int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
extern void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);

#endif

#define HPTEG_CACHE_NUM			(1 << 15)
#define HPTEG_HASH_BITS_PTE		13
#define HPTEG_HASH_BITS_PTE_LONG	12
#define HPTEG_HASH_BITS_VPTE		13
#define HPTEG_HASH_BITS_VPTE_LONG	5
#define HPTEG_HASH_BITS_VPTE_64K	11
#define HPTEG_HASH_NUM_PTE		(1 << HPTEG_HASH_BITS_PTE)
#define HPTEG_HASH_NUM_PTE_LONG		(1 << HPTEG_HASH_BITS_PTE_LONG)
#define HPTEG_HASH_NUM_VPTE		(1 << HPTEG_HASH_BITS_VPTE)
#define HPTEG_HASH_NUM_VPTE_LONG	(1 << HPTEG_HASH_BITS_VPTE_LONG)
#define HPTEG_HASH_NUM_VPTE_64K		(1 << HPTEG_HASH_BITS_VPTE_64K)

/* Physical Address Mask - allowed range of real mode RAM access */
#define KVM_PAM			0x0fffffffffffffffULL

struct kvm;
struct kvm_run;
struct kvm_vcpu;

struct lppaca;
struct slb_shadow;
struct dtl_entry;

struct kvmppc_vcpu_book3s;
struct kvmppc_book3s_shadow_vcpu;

struct kvm_vm_stat {
	u32 remote_tlb_flush;
};

struct kvm_vcpu_stat {
	u32 sum_exits;
	u32 mmio_exits;
	u32 dcr_exits;
	u32 signal_exits;
	u32 light_exits;
	/* Account for special types of light exits: */
	u32 itlb_real_miss_exits;
	u32 itlb_virt_miss_exits;
	u32 dtlb_real_miss_exits;
	u32 dtlb_virt_miss_exits;
	u32 syscall_exits;
	u32 isi_exits;
	u32 dsi_exits;
	u32 emulated_inst_exits;
	u32 dec_exits;
	u32 ext_intr_exits;
	u32 halt_wakeup;
	u32 dbell_exits;
	u32 gdbell_exits;
#ifdef CONFIG_PPC_BOOK3S
	u32 pf_storage;
	u32 pf_instruc;
	u32 sp_storage;
	u32 sp_instruc;
	u32 queue_intr;
	u32 ld;
	u32 ld_slow;
	u32 st;
	u32 st_slow;
#endif
};

enum kvm_exit_types {
	MMIO_EXITS,
	DCR_EXITS,
	SIGNAL_EXITS,
	ITLB_REAL_MISS_EXITS,
	ITLB_VIRT_MISS_EXITS,
	DTLB_REAL_MISS_EXITS,
	DTLB_VIRT_MISS_EXITS,
	SYSCALL_EXITS,
	ISI_EXITS,
	DSI_EXITS,
	EMULATED_INST_EXITS,
	EMULATED_MTMSRWE_EXITS,
	EMULATED_WRTEE_EXITS,
	EMULATED_MTSPR_EXITS,
	EMULATED_MFSPR_EXITS,
	EMULATED_MTMSR_EXITS,
	EMULATED_MFMSR_EXITS,
	EMULATED_TLBSX_EXITS,
	EMULATED_TLBWE_EXITS,
	EMULATED_RFI_EXITS,
	EMULATED_RFCI_EXITS,
	DEC_EXITS,
	EXT_INTR_EXITS,
	HALT_WAKEUP,
	USR_PR_INST,
	FP_UNAVAIL,
	DEBUG_EXITS,
	TIMEINGUEST,
	DBELL_EXITS,
	GDBELL_EXITS,
	__NUMBER_OF_KVM_EXIT_TYPES
};

/* allow access to big endian 32bit upper/lower parts and 64bit var */
struct kvmppc_exit_timing {
	union {
		u64 tv64;
		struct {
			u32 tbu, tbl;
		} tv32;
	};
};

struct kvmppc_pginfo {
	unsigned long pfn;
	atomic_t refcnt;
};

struct kvmppc_spapr_tce_table {
	struct list_head list;
	struct kvm *kvm;
	u64 liobn;
	u32 window_size;
	struct page *pages[0];
};

struct kvm_rma_info {
	atomic_t use_count;
	unsigned long base_pfn;
};

/* XICS components, defined in book3s_xics.c */
struct kvmppc_xics;
struct kvmppc_icp;

/*
 * The reverse mapping array has one entry for each HPTE,
 * which stores the guest's view of the second word of the HPTE
 * (including the guest physical address of the mapping),
 * plus forward and backward pointers in a doubly-linked ring
 * of HPTEs that map the same host page.  The pointers in this
 * ring are 32-bit HPTE indexes, to save space.
 */
struct revmap_entry {
	unsigned long guest_rpte;
	unsigned int forw, back;
};

/*
 * We use the top bit of each memslot->arch.rmap entry as a lock bit,
 * and bit 32 as a present flag.  The bottom 32 bits are the
 * index in the guest HPT of a HPTE that points to the page.
 */
#define KVMPPC_RMAP_LOCK_BIT	63
#define KVMPPC_RMAP_RC_SHIFT	32
#define KVMPPC_RMAP_REFERENCED	(HPTE_R_R << KVMPPC_RMAP_RC_SHIFT)
#define KVMPPC_RMAP_CHANGED	(HPTE_R_C << KVMPPC_RMAP_RC_SHIFT)
#define KVMPPC_RMAP_PRESENT	0x100000000ul
#define KVMPPC_RMAP_INDEX	0xfffffffful

/* Low-order bits in memslot->arch.slot_phys[] */
#define KVMPPC_PAGE_ORDER_MASK	0x1f
#define KVMPPC_PAGE_NO_CACHE	HPTE_R_I	/* 0x20 */
#define KVMPPC_PAGE_WRITETHRU	HPTE_R_W	/* 0x40 */
#define KVMPPC_GOT_PAGE		0x80

struct kvm_arch_memory_slot {
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
	unsigned long *rmap;
	unsigned long *slot_phys;
#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
};

struct kvm_arch {
	unsigned int lpid;
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
	unsigned long hpt_virt;
	struct revmap_entry *revmap;
	unsigned int host_lpid;
	unsigned long host_lpcr;
	unsigned long sdr1;
	unsigned long host_sdr1;
	int tlbie_lock;
	unsigned long lpcr;
	unsigned long rmor;
	struct kvm_rma_info *rma;
	unsigned long vrma_slb_v;
	int rma_setup_done;
	int using_mmu_notifiers;
	u32 hpt_order;
	atomic_t vcpus_running;
	u32 online_vcores;
	unsigned long hpt_npte;
	unsigned long hpt_mask;
	atomic_t hpte_mod_interest;
	spinlock_t slot_phys_lock;
	cpumask_t need_tlb_flush;
	struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
	int hpt_cma_alloc;
#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
	struct mutex hpt_mutex;
#endif
#ifdef CONFIG_PPC_BOOK3S_64
	struct list_head spapr_tce_tables;
	struct list_head rtas_tokens;
#endif
#ifdef CONFIG_KVM_MPIC
	struct openpic *mpic;
#endif
#ifdef CONFIG_KVM_XICS
	struct kvmppc_xics *xics;
#endif
};

/*
 * Struct for a virtual core.
 * Note: entry_exit_count combines an entry count in the bottom 8 bits
 * and an exit count in the next 8 bits.  This is so that we can
 * atomically increment the entry count iff the exit count is 0
 * without taking the lock.
 */
struct kvmppc_vcore {
	int n_runnable;
	int n_busy;
	int num_threads;
	int entry_exit_count;
	int n_woken;
	int nap_count;
	int napping_threads;
	u16 pcpu;
	u16 last_cpu;
	u8 vcore_state;
	u8 in_guest;
	struct list_head runnable_threads;
	spinlock_t lock;
	wait_queue_head_t wq;
	u64 stolen_tb;
	u64 preempt_tb;
	struct kvm_vcpu *runner;
	u64 tb_offset;		/* guest timebase - host timebase */
	ulong lpcr;
	u32 arch_compat;
	ulong pcr;
};

#define VCORE_ENTRY_COUNT(vc)	((vc)->entry_exit_count & 0xff)
#define VCORE_EXIT_COUNT(vc)	((vc)->entry_exit_count >> 8)

/* Values for vcore_state */
#define VCORE_INACTIVE	0
#define VCORE_SLEEPING	1
#define VCORE_STARTING	2
#define VCORE_RUNNING	3
#define VCORE_EXITING	4

/*
 * Struct used to manage memory for a virtual processor area
 * registered by a PAPR guest.  There are three types of area
 * that a guest can register.
 */
struct kvmppc_vpa {
	unsigned long gpa;	/* Current guest phys addr */
	void *pinned_addr;	/* Address in kernel linear mapping */
	void *pinned_end;	/* End of region */
	unsigned long next_gpa;	/* Guest phys addr for update */
	unsigned long len;	/* Number of bytes required */
	u8 update_pending;	/* 1 => update pinned_addr from next_gpa */
	bool dirty;		/* true => area has been modified by kernel */
};

struct kvmppc_pte {
	ulong eaddr;
	u64 vpage;
	ulong raddr;
	bool may_read		: 1;
	bool may_write		: 1;
	bool may_execute	: 1;
	u8 page_size;		/* MMU_PAGE_xxx */
};

struct kvmppc_mmu {
	/* book3s_64 only */
	void (*slbmte)(struct kvm_vcpu *vcpu, u64 rb, u64 rs);
	u64  (*slbmfee)(struct kvm_vcpu *vcpu, u64 slb_nr);
	u64  (*slbmfev)(struct kvm_vcpu *vcpu, u64 slb_nr);
	void (*slbie)(struct kvm_vcpu *vcpu, u64 slb_nr);
	void (*slbia)(struct kvm_vcpu *vcpu);
	/* book3s */
	void (*mtsrin)(struct kvm_vcpu *vcpu, u32 srnum, ulong value);
	u32  (*mfsrin)(struct kvm_vcpu *vcpu, u32 srnum);
	int  (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr,
		      struct kvmppc_pte *pte, bool data, bool iswrite);
	void (*reset_msr)(struct kvm_vcpu *vcpu);
	void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large);
	int  (*esid_to_vsid)(struct kvm_vcpu *vcpu, ulong esid, u64 *vsid);
	u64  (*ea_to_vp)(struct kvm_vcpu *vcpu, gva_t eaddr, bool data);
	bool (*is_dcbz32)(struct kvm_vcpu *vcpu);
};

struct kvmppc_slb {
	u64 esid;
	u64 vsid;
	u64 orige;
	u64 origv;
	bool valid	: 1;
	bool Ks		: 1;
	bool Kp		: 1;
	bool nx		: 1;
	bool large	: 1;	/* PTEs are 16MB */
	bool tb		: 1;	/* 1TB segment */
	bool class	: 1;
	u8 base_page_size;	/* MMU_PAGE_xxx */
};

# ifdef CONFIG_PPC_FSL_BOOK3E
#define KVMPPC_BOOKE_IAC_NUM	2
#define KVMPPC_BOOKE_DAC_NUM	2
# else
#define KVMPPC_BOOKE_IAC_NUM	4
#define KVMPPC_BOOKE_DAC_NUM	2
# endif
#define KVMPPC_BOOKE_MAX_IAC	4
#define KVMPPC_BOOKE_MAX_DAC	2

/* KVMPPC_EPR_USER takes precedence over KVMPPC_EPR_KERNEL */
#define KVMPPC_EPR_NONE		0 /* EPR not supported */
#define KVMPPC_EPR_USER		1 /* exit to userspace to fill EPR */
#define KVMPPC_EPR_KERNEL	2 /* in-kernel irqchip */

#define KVMPPC_IRQ_DEFAULT	0
#define KVMPPC_IRQ_MPIC		1
#define KVMPPC_IRQ_XICS		2

struct openpic;

struct kvm_vcpu_arch {
	ulong host_stack;
	u32 host_pid;
#ifdef CONFIG_PPC_BOOK3S
	struct kvmppc_slb slb[64];
	int slb_max;		/* 1 + index of last valid entry in slb[] */
	int slb_nr;		/* total number of entries in SLB */
	struct kvmppc_mmu mmu;
	struct kvmppc_vcpu_book3s *book3s;
#endif
#ifdef CONFIG_PPC_BOOK3S_32
	struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
#endif

	ulong gpr[32];

	u64 fpr[32];
	u64 fpscr;

#ifdef CONFIG_SPE
	ulong evr[32];
	ulong spefscr;
	ulong host_spefscr;
	u64 acc;
#endif
#ifdef CONFIG_ALTIVEC
	vector128 vr[32];
	vector128 vscr;
#endif

#ifdef CONFIG_VSX
	u64 vsr[64];
#endif

#ifdef CONFIG_KVM_BOOKE_HV
	u32 host_mas4;
	u32 host_mas6;
	u32 shadow_epcr;
	u32 shadow_msrp;
	u32 eplc;
	u32 epsc;
	u32 oldpir;
#endif

#if defined(CONFIG_BOOKE)
#if defined(CONFIG_KVM_BOOKE_HV) || defined(CONFIG_64BIT)
	u32 epcr;
#endif
#endif

#ifdef CONFIG_PPC_BOOK3S
	/* For Gekko paired singles */
	u32 qpr[32];
#endif

	ulong pc;
	ulong ctr;
	ulong lr;

	ulong xer;
	u32 cr;

#ifdef CONFIG_PPC_BOOK3S
	ulong hflags;
	ulong guest_owned_ext;
	ulong purr;
	ulong spurr;
	ulong dscr;
	ulong amr;
	ulong uamor;
	u32 ctrl;
	ulong dabr;
	ulong cfar;
	ulong ppr;
	ulong shadow_srr1;
#endif
	u32 vrsave; /* also USPRG0 */
	u32 mmucr;
	/* shadow_msr is unused for BookE HV */
	ulong shadow_msr;
	ulong csrr0;
	ulong csrr1;
	ulong dsrr0;
	ulong dsrr1;
	ulong mcsrr0;
	ulong mcsrr1;
	ulong mcsr;
	u32 dec;
#ifdef CONFIG_BOOKE
	u32 decar;
#endif
	u32 tbl;
	u32 tbu;
	u32 tcr;
	ulong tsr; /* we need to perform set/clr_bits() which requires ulong */
	u32 ivor[64];
	ulong ivpr;
	u32 pvr;

	u32 shadow_pid;
	u32 shadow_pid1;
	u32 pid;
	u32 swap_pid;

	u32 ccr0;
	u32 ccr1;
	u32 dbsr;

	u64 mmcr[3];
	u32 pmc[8];
	u64 siar;
	u64 sdar;

#ifdef CONFIG_KVM_EXIT_TIMING
	struct mutex exit_timing_lock;
	struct kvmppc_exit_timing timing_exit;
	struct kvmppc_exit_timing timing_last_enter;
	u32 last_exit_type;
	u32 timing_count_type[__NUMBER_OF_KVM_EXIT_TYPES];
	u64 timing_sum_duration[__NUMBER_OF_KVM_EXIT_TYPES];
	u64 timing_sum_quad_duration[__NUMBER_OF_KVM_EXIT_TYPES];
	u64 timing_min_duration[__NUMBER_OF_KVM_EXIT_TYPES];
	u64 timing_max_duration[__NUMBER_OF_KVM_EXIT_TYPES];
	u64 timing_last_exit;
	struct dentry *debugfs_exit_timing;
#endif

#ifdef CONFIG_PPC_BOOK3S
	ulong fault_dar;
	u32 fault_dsisr;
#endif

#ifdef CONFIG_BOOKE
	ulong fault_dear;
	ulong fault_esr;
	ulong queued_dear;
	ulong queued_esr;
	spinlock_t wdt_lock;
	struct timer_list wdt_timer;
	u32 tlbcfg[4];
	u32 tlbps[4];
	u32 mmucfg;
	u32 eptcfg;
	u32 epr;
	u32 crit_save;
	/* guest debug registers*/
	struct debug_reg dbg_reg;
	/* hardware visible debug registers when in guest state */
	struct debug_reg shadow_dbg_reg;
#endif
	gpa_t paddr_accessed;
	gva_t vaddr_accessed;

	u8 io_gpr; /* GPR used as IO source/target */
	u8 mmio_is_bigendian;
	u8 mmio_sign_extend;
	u8 dcr_needed;
	u8 dcr_is_write;
	u8 osi_needed;
	u8 osi_enabled;
	u8 papr_enabled;
	u8 watchdog_enabled;
	u8 sane;
	u8 cpu_type;
	u8 hcall_needed;
	u8 epr_flags; /* KVMPPC_EPR_xxx */
	u8 epr_needed;

	u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */

	struct hrtimer dec_timer;
	struct tasklet_struct tasklet;
	u64 dec_jiffies;
	u64 dec_expires;
	unsigned long pending_exceptions;
	u8 ceded;
	u8 prodded;
	u32 last_inst;

	wait_queue_head_t *wqp;
	struct kvmppc_vcore *vcore;
	int ret;
	int trap;
	int state;
	int ptid;
	bool timer_running;
	wait_queue_head_t cpu_run;

	struct kvm_vcpu_arch_shared *shared;
	unsigned long magic_page_pa; /* phys addr to map the magic page to */
	unsigned long magic_page_ea; /* effect. addr to map the magic page to */

	int irq_type;		/* one of KVM_IRQ_* */
	int irq_cpu_id;
	struct openpic *mpic;	/* KVM_IRQ_MPIC */
#ifdef CONFIG_KVM_XICS
	struct kvmppc_icp *icp; /* XICS presentation controller */
#endif

#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
	struct kvm_vcpu_arch_shared shregs;

	unsigned long pgfault_addr;
	long pgfault_index;
	unsigned long pgfault_hpte[2];

	struct list_head run_list;
	struct task_struct *run_task;
	struct kvm_run *kvm_run;
	pgd_t *pgdir;

	spinlock_t vpa_update_lock;
	struct kvmppc_vpa vpa;
	struct kvmppc_vpa dtl;
	struct dtl_entry *dtl_ptr;
	unsigned long dtl_index;
	u64 stolen_logged;
	struct kvmppc_vpa slb_shadow;

	spinlock_t tbacct_lock;
	u64 busy_stolen;
	u64 busy_preempt;
#endif
};

/* Values for vcpu->arch.state */
#define KVMPPC_VCPU_NOTREADY		0
#define KVMPPC_VCPU_RUNNABLE		1
#define KVMPPC_VCPU_BUSY_IN_HOST	2

/* Values for vcpu->arch.io_gpr */
#define KVM_MMIO_REG_MASK	0x001f
#define KVM_MMIO_REG_EXT_MASK	0xffe0
#define KVM_MMIO_REG_GPR	0x0000
#define KVM_MMIO_REG_FPR	0x0020
#define KVM_MMIO_REG_QPR	0x0040
#define KVM_MMIO_REG_FQPR	0x0060

#define __KVM_HAVE_ARCH_WQP
#define __KVM_HAVE_CREATE_DEVICE

#endif /* __POWERPC_KVM_HOST_H__ */
Commit	Line	Data
bbf45ba5 HB	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License, version 2, as
	4	* published by the Free Software Foundation.
	5	*
	6	* This program is distributed in the hope that it will be useful,
	7	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	8	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	9	* GNU General Public License for more details.
	10	*
	11	* You should have received a copy of the GNU General Public License
	12	* along with this program; if not, write to the Free Software
	13	* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
	14	*
	15	* Copyright IBM Corp. 2007
	16	*
	17	* Authors: Hollis Blanchard <hollisb@us.ibm.com>
	18	*/
	19
	20	#ifndef __POWERPC_KVM_HOST_H__
	21	#define __POWERPC_KVM_HOST_H__
	22
	23	#include <linux/mutex.h>
544c6761 AG	24	#include <linux/hrtimer.h>
544c6761 AG	25	#include <linux/interrupt.h>
bbf45ba5 HB	26	#include <linux/types.h>
bbf45ba5 HB	27	#include <linux/kvm_types.h>
371fefd6 PM	28	#include <linux/threads.h>
371fefd6 PM	29	#include <linux/spinlock.h>
96bc451a	30	#include <linux/kvm_para.h>
aa04b4cc PM	31	#include <linux/list.h>
aa04b4cc PM	32	#include <linux/atomic.h>
bbf45ba5	33	#include <asm/kvm_asm.h>
371fefd6	34	#include <asm/processor.h>
342d3db7	35	#include <asm/page.h>
249ba1ee	36	#include <asm/cacheflush.h>
bbf45ba5	37
371fefd6 PM	38	#define KVM_MAX_VCPUS NR_CPUS
371fefd6 PM	39	#define KVM_MAX_VCORES NR_CPUS
bbacc0c1	40	#define KVM_USER_MEM_SLOTS 32
0743247f	41	#define KVM_MEM_SLOTS_NUM KVM_USER_MEM_SLOTS
bbf45ba5	42
de56a948	43	#ifdef CONFIG_KVM_MMIO
588968b6	44	#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
de56a948	45	#endif
588968b6	46
de9ba2f3 AG	47	/* These values are internal and can be increased later */
	48	#define KVM_NR_IRQCHIPS 1
	49	#define KVM_IRQCHIP_NUM_PINS 256
	50
9b0cb3c8	51	#if !defined(CONFIG_KVM_440)
342d3db7 PM	52	#include <linux/mmu_notifier.h>
	53
	54	#define KVM_ARCH_WANT_MMU_NOTIFIER
	55
	56	struct kvm;
	57	extern int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
b3ae2096 TY	58	extern int kvm_unmap_hva_range(struct kvm *kvm,
b3ae2096 TY	59	unsigned long start, unsigned long end);
342d3db7 PM	60	extern int kvm_age_hva(struct kvm *kvm, unsigned long hva);
	61	extern int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
	62	extern void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
	63
	64	#endif
	65
fef093be AG	66	#define HPTEG_CACHE_NUM (1 << 15)
fef093be AG	67	#define HPTEG_HASH_BITS_PTE 13
2d27fc5e	68	#define HPTEG_HASH_BITS_PTE_LONG 12
fef093be AG	69	#define HPTEG_HASH_BITS_VPTE 13
fef093be AG	70	#define HPTEG_HASH_BITS_VPTE_LONG 5
a4a0f252	71	#define HPTEG_HASH_BITS_VPTE_64K 11
fef093be	72	#define HPTEG_HASH_NUM_PTE (1 << HPTEG_HASH_BITS_PTE)
2d27fc5e	73	#define HPTEG_HASH_NUM_PTE_LONG (1 << HPTEG_HASH_BITS_PTE_LONG)
fef093be AG	74	#define HPTEG_HASH_NUM_VPTE (1 << HPTEG_HASH_BITS_VPTE)
fef093be AG	75	#define HPTEG_HASH_NUM_VPTE_LONG (1 << HPTEG_HASH_BITS_VPTE_LONG)
a4a0f252	76	#define HPTEG_HASH_NUM_VPTE_64K (1 << HPTEG_HASH_BITS_VPTE_64K)
ca95150b	77
28e83b4f AG	78	/* Physical Address Mask - allowed range of real mode RAM access */
	79	#define KVM_PAM 0x0fffffffffffffffULL
	80
bbf45ba5 HB	81	struct kvm;
	82	struct kvm_run;
	83	struct kvm_vcpu;
	84
a8606e20 PM	85	struct lppaca;
a8606e20 PM	86	struct slb_shadow;
2e25aa5f	87	struct dtl_entry;
a8606e20	88
3ff95502 PM	89	struct kvmppc_vcpu_book3s;
	90	struct kvmppc_book3s_shadow_vcpu;
	91
bbf45ba5 HB	92	struct kvm_vm_stat {
	93	u32 remote_tlb_flush;
	94	};
	95
	96	struct kvm_vcpu_stat {
	97	u32 sum_exits;
	98	u32 mmio_exits;
	99	u32 dcr_exits;
	100	u32 signal_exits;
	101	u32 light_exits;
	102	/* Account for special types of light exits: */
	103	u32 itlb_real_miss_exits;
	104	u32 itlb_virt_miss_exits;
	105	u32 dtlb_real_miss_exits;
	106	u32 dtlb_virt_miss_exits;
	107	u32 syscall_exits;
	108	u32 isi_exits;
	109	u32 dsi_exits;
	110	u32 emulated_inst_exits;
	111	u32 dec_exits;
	112	u32 ext_intr_exits;
45c5eb67	113	u32 halt_wakeup;
d30f6e48 SW	114	u32 dbell_exits;
d30f6e48 SW	115	u32 gdbell_exits;
00c3a37c	116	#ifdef CONFIG_PPC_BOOK3S
ca95150b AG	117	u32 pf_storage;
	118	u32 pf_instruc;
	119	u32 sp_storage;
	120	u32 sp_instruc;
	121	u32 queue_intr;
	122	u32 ld;
	123	u32 ld_slow;
	124	u32 st;
	125	u32 st_slow;
	126	#endif
bbf45ba5 HB	127	};
bbf45ba5 HB	128
73e75b41 HB	129	enum kvm_exit_types {
	130	MMIO_EXITS,
	131	DCR_EXITS,
	132	SIGNAL_EXITS,
	133	ITLB_REAL_MISS_EXITS,
	134	ITLB_VIRT_MISS_EXITS,
	135	DTLB_REAL_MISS_EXITS,
	136	DTLB_VIRT_MISS_EXITS,
	137	SYSCALL_EXITS,
	138	ISI_EXITS,
	139	DSI_EXITS,
	140	EMULATED_INST_EXITS,
	141	EMULATED_MTMSRWE_EXITS,
	142	EMULATED_WRTEE_EXITS,
	143	EMULATED_MTSPR_EXITS,
	144	EMULATED_MFSPR_EXITS,
	145	EMULATED_MTMSR_EXITS,
	146	EMULATED_MFMSR_EXITS,
	147	EMULATED_TLBSX_EXITS,
	148	EMULATED_TLBWE_EXITS,
	149	EMULATED_RFI_EXITS,
d30f6e48	150	EMULATED_RFCI_EXITS,
73e75b41 HB	151	DEC_EXITS,
	152	EXT_INTR_EXITS,
	153	HALT_WAKEUP,
	154	USR_PR_INST,
	155	FP_UNAVAIL,
	156	DEBUG_EXITS,
	157	TIMEINGUEST,
d30f6e48 SW	158	DBELL_EXITS,
d30f6e48 SW	159	GDBELL_EXITS,
73e75b41 HB	160	__NUMBER_OF_KVM_EXIT_TYPES
	161	};
	162
73e75b41	163	/* allow access to big endian 32bit upper/lower parts and 64bit var */
7b701591	164	struct kvmppc_exit_timing {
73e75b41 HB	165	union {
	166	u64 tv64;
	167	struct {
	168	u32 tbu, tbl;
	169	} tv32;
	170	};
	171	};
73e75b41	172
de56a948 PM	173	struct kvmppc_pginfo {
	174	unsigned long pfn;
	175	atomic_t refcnt;
	176	};
	177
54738c09 DG	178	struct kvmppc_spapr_tce_table {
	179	struct list_head list;
	180	struct kvm *kvm;
	181	u64 liobn;
	182	u32 window_size;
	183	struct page *pages[0];
	184	};
	185
6c45b810 AK	186	struct kvm_rma_info {
	187	atomic_t use_count;
	188	unsigned long base_pfn;
aa04b4cc PM	189	};
aa04b4cc PM	190
bc5ad3f3 BH	191	/* XICS components, defined in book3s_xics.c */
	192	struct kvmppc_xics;
	193	struct kvmppc_icp;
	194
8936dda4 PM	195	/*
	196	* The reverse mapping array has one entry for each HPTE,
	197	* which stores the guest's view of the second word of the HPTE
06ce2c63 PM	198	* (including the guest physical address of the mapping),
	199	* plus forward and backward pointers in a doubly-linked ring
	200	* of HPTEs that map the same host page. The pointers in this
	201	* ring are 32-bit HPTE indexes, to save space.
8936dda4 PM	202	*/
	203	struct revmap_entry {
	204	unsigned long guest_rpte;
06ce2c63	205	unsigned int forw, back;
8936dda4 PM	206	};
8936dda4 PM	207
06ce2c63	208	/*
a66b48c3	209	* We use the top bit of each memslot->arch.rmap entry as a lock bit,
06ce2c63 PM	210	* and bit 32 as a present flag. The bottom 32 bits are the
	211	* index in the guest HPT of a HPTE that points to the page.
	212	*/
	213	#define KVMPPC_RMAP_LOCK_BIT 63
bad3b507 PM	214	#define KVMPPC_RMAP_RC_SHIFT 32
	215	#define KVMPPC_RMAP_REFERENCED (HPTE_R_R << KVMPPC_RMAP_RC_SHIFT)
	216	#define KVMPPC_RMAP_CHANGED (HPTE_R_C << KVMPPC_RMAP_RC_SHIFT)
06ce2c63 PM	217	#define KVMPPC_RMAP_PRESENT 0x100000000ul
	218	#define KVMPPC_RMAP_INDEX 0xfffffffful
	219
a66b48c3	220	/* Low-order bits in memslot->arch.slot_phys[] */
da9d1d7f	221	#define KVMPPC_PAGE_ORDER_MASK 0x1f
9d0ef5ea PM	222	#define KVMPPC_PAGE_NO_CACHE HPTE_R_I /* 0x20 */
9d0ef5ea PM	223	#define KVMPPC_PAGE_WRITETHRU HPTE_R_W /* 0x40 */
b2b2f165 PM	224	#define KVMPPC_GOT_PAGE 0x80
b2b2f165 PM	225
db3fe4eb	226	struct kvm_arch_memory_slot {
9975f5e3	227	#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
d89cc617	228	unsigned long *rmap;
a66b48c3	229	unsigned long *slot_phys;
9975f5e3	230	#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
db3fe4eb TY	231	};
db3fe4eb TY	232
bbf45ba5	233	struct kvm_arch {
d30f6e48	234	unsigned int lpid;
9975f5e3	235	#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
de56a948	236	unsigned long hpt_virt;
8936dda4	237	struct revmap_entry *revmap;
de56a948 PM	238	unsigned int host_lpid;
	239	unsigned long host_lpcr;
	240	unsigned long sdr1;
	241	unsigned long host_sdr1;
	242	int tlbie_lock;
aa04b4cc PM	243	unsigned long lpcr;
aa04b4cc PM	244	unsigned long rmor;
6c45b810	245	struct kvm_rma_info *rma;
697d3899	246	unsigned long vrma_slb_v;
c77162de	247	int rma_setup_done;
342d3db7	248	int using_mmu_notifiers;
32fad281 PM	249	u32 hpt_order;
32fad281 PM	250	atomic_t vcpus_running;
1b400ba0	251	u32 online_vcores;
32fad281 PM	252	unsigned long hpt_npte;
32fad281 PM	253	unsigned long hpt_mask;
44e5f6be	254	atomic_t hpte_mod_interest;
c77162de	255	spinlock_t slot_phys_lock;
1b400ba0	256	cpumask_t need_tlb_flush;
371fefd6	257	struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
fa61a4e3	258	int hpt_cma_alloc;
9975f5e3	259	#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
7aa79938	260	#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
9308ab8e PM	261	struct mutex hpt_mutex;
9308ab8e PM	262	#endif
f31e65e1 BH	263	#ifdef CONFIG_PPC_BOOK3S_64
f31e65e1 BH	264	struct list_head spapr_tce_tables;
8e591cb7	265	struct list_head rtas_tokens;
f31e65e1	266	#endif
de9ba2f3 AG	267	#ifdef CONFIG_KVM_MPIC
	268	struct openpic *mpic;
	269	#endif
bc5ad3f3 BH	270	#ifdef CONFIG_KVM_XICS
	271	struct kvmppc_xics *xics;
	272	#endif
bbf45ba5 HB	273	};
bbf45ba5 HB	274
371fefd6 PM	275	/*
	276	* Struct for a virtual core.
	277	* Note: entry_exit_count combines an entry count in the bottom 8 bits
	278	* and an exit count in the next 8 bits. This is so that we can
	279	* atomically increment the entry count iff the exit count is 0
	280	* without taking the lock.
	281	*/
	282	struct kvmppc_vcore {
	283	int n_runnable;
19ccb76a	284	int n_busy;
371fefd6 PM	285	int num_threads;
	286	int entry_exit_count;
	287	int n_woken;
	288	int nap_count;
19ccb76a	289	int napping_threads;
371fefd6	290	u16 pcpu;
1b400ba0	291	u16 last_cpu;
19ccb76a	292	u8 vcore_state;
371fefd6 PM	293	u8 in_guest;
	294	struct list_head runnable_threads;
	295	spinlock_t lock;
19ccb76a	296	wait_queue_head_t wq;
0456ec4f PM	297	u64 stolen_tb;
	298	u64 preempt_tb;
	299	struct kvm_vcpu *runner;
93b0f4dc	300	u64 tb_offset; /* guest timebase - host timebase */
a0144e2a	301	ulong lpcr;
388cc6e1 PM	302	u32 arch_compat;
388cc6e1 PM	303	ulong pcr;
371fefd6 PM	304	};
	305
	306	#define VCORE_ENTRY_COUNT(vc) ((vc)->entry_exit_count & 0xff)
	307	#define VCORE_EXIT_COUNT(vc) ((vc)->entry_exit_count >> 8)
	308
19ccb76a PM	309	/* Values for vcore_state */
19ccb76a PM	310	#define VCORE_INACTIVE 0
2f12f034 PM	311	#define VCORE_SLEEPING 1
	312	#define VCORE_STARTING 2
	313	#define VCORE_RUNNING 3
	314	#define VCORE_EXITING 4
19ccb76a	315
2e25aa5f PM	316	/*
	317	* Struct used to manage memory for a virtual processor area
	318	* registered by a PAPR guest. There are three types of area
	319	* that a guest can register.
	320	*/
	321	struct kvmppc_vpa {
c35635ef	322	unsigned long gpa; /* Current guest phys addr */
2e25aa5f PM	323	void pinned_addr; / Address in kernel linear mapping */
	324	void pinned_end; / End of region */
	325	unsigned long next_gpa; /* Guest phys addr for update */
	326	unsigned long len; /* Number of bytes required */
	327	u8 update_pending; /* 1 => update pinned_addr from next_gpa */
c35635ef	328	bool dirty; /* true => area has been modified by kernel */
2e25aa5f PM	329	};
2e25aa5f PM	330
ca95150b	331	struct kvmppc_pte {
af7b4d10	332	ulong eaddr;
ca95150b	333	u64 vpage;
af7b4d10	334	ulong raddr;
3ed9c6d2 AG	335	bool may_read : 1;
	336	bool may_write : 1;
	337	bool may_execute : 1;
a4a0f252	338	u8 page_size; /* MMU_PAGE_xxx */
ca95150b AG	339	};
	340
	341	struct kvmppc_mmu {
	342	/* book3s_64 only */
	343	void (slbmte)(struct kvm_vcpu vcpu, u64 rb, u64 rs);
	344	u64 (slbmfee)(struct kvm_vcpu vcpu, u64 slb_nr);
	345	u64 (slbmfev)(struct kvm_vcpu vcpu, u64 slb_nr);
	346	void (slbie)(struct kvm_vcpu vcpu, u64 slb_nr);
	347	void (slbia)(struct kvm_vcpu vcpu);
	348	/* book3s */
	349	void (mtsrin)(struct kvm_vcpu vcpu, u32 srnum, ulong value);
	350	u32 (mfsrin)(struct kvm_vcpu vcpu, u32 srnum);
93b159b4 PM	351	int (xlate)(struct kvm_vcpu vcpu, gva_t eaddr,
93b159b4 PM	352	struct kvmppc_pte *pte, bool data, bool iswrite);
ca95150b AG	353	void (reset_msr)(struct kvm_vcpu vcpu);
ca95150b AG	354	void (tlbie)(struct kvm_vcpu vcpu, ulong addr, bool large);
af7b4d10	355	int (esid_to_vsid)(struct kvm_vcpu vcpu, ulong esid, u64 *vsid);
ca95150b AG	356	u64 (ea_to_vp)(struct kvm_vcpu vcpu, gva_t eaddr, bool data);
	357	bool (is_dcbz32)(struct kvm_vcpu vcpu);
	358	};
	359
c4befc58 PM	360	struct kvmppc_slb {
	361	u64 esid;
	362	u64 vsid;
	363	u64 orige;
	364	u64 origv;
	365	bool valid : 1;
	366	bool Ks : 1;
	367	bool Kp : 1;
	368	bool nx : 1;
	369	bool large : 1; /* PTEs are 16MB */
	370	bool tb : 1; /* 1TB segment */
	371	bool class : 1;
a4a0f252	372	u8 base_page_size; /* MMU_PAGE_xxx */
ca95150b AG	373	};
ca95150b AG	374
6df8d3fc BB	375	# ifdef CONFIG_PPC_FSL_BOOK3E
	376	#define KVMPPC_BOOKE_IAC_NUM 2
	377	#define KVMPPC_BOOKE_DAC_NUM 2
	378	# else
	379	#define KVMPPC_BOOKE_IAC_NUM 4
	380	#define KVMPPC_BOOKE_DAC_NUM 2
	381	# endif
	382	#define KVMPPC_BOOKE_MAX_IAC 4
	383	#define KVMPPC_BOOKE_MAX_DAC 2
	384
5df554ad SW	385	/* KVMPPC_EPR_USER takes precedence over KVMPPC_EPR_KERNEL */
	386	#define KVMPPC_EPR_NONE 0 /* EPR not supported */
	387	#define KVMPPC_EPR_USER 1 /* exit to userspace to fill EPR */
	388	#define KVMPPC_EPR_KERNEL 2 /* in-kernel irqchip */
	389
eb1e4f43 SW	390	#define KVMPPC_IRQ_DEFAULT 0
eb1e4f43 SW	391	#define KVMPPC_IRQ_MPIC 1
bc5ad3f3	392	#define KVMPPC_IRQ_XICS 2
eb1e4f43 SW	393
	394	struct openpic;
	395
bbf45ba5	396	struct kvm_vcpu_arch {
ca95150b	397	ulong host_stack;
bbf45ba5	398	u32 host_pid;
00c3a37c	399	#ifdef CONFIG_PPC_BOOK3S
c4befc58	400	struct kvmppc_slb slb[64];
de56a948	401	int slb_max; /* 1 + index of last valid entry in slb[] */
c4befc58	402	int slb_nr; /* total number of entries in SLB */
ca95150b	403	struct kvmppc_mmu mmu;
3ff95502 PM	404	struct kvmppc_vcpu_book3s *book3s;
	405	#endif
	406	#ifdef CONFIG_PPC_BOOK3S_32
	407	struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
ca95150b	408	#endif
bbf45ba5	409
5cf8ca22	410	ulong gpr[32];
bbf45ba5	411
180a34d2	412	u64 fpr[32];
c62e096d	413	u64 fpscr;
180a34d2	414
4cd35f67 SW	415	#ifdef CONFIG_SPE
	416	ulong evr[32];
	417	ulong spefscr;
	418	ulong host_spefscr;
	419	u64 acc;
	420	#endif
180a34d2 AG	421	#ifdef CONFIG_ALTIVEC
	422	vector128 vr[32];
	423	vector128 vscr;
	424	#endif
	425
	426	#ifdef CONFIG_VSX
de56a948	427	u64 vsr[64];
180a34d2 AG	428	#endif
180a34d2 AG	429
d30f6e48 SW	430	#ifdef CONFIG_KVM_BOOKE_HV
	431	u32 host_mas4;
	432	u32 host_mas6;
	433	u32 shadow_epcr;
d30f6e48 SW	434	u32 shadow_msrp;
	435	u32 eplc;
	436	u32 epsc;
	437	u32 oldpir;
	438	#endif
	439
62b4db00 AG	440	#if defined(CONFIG_BOOKE)
	441	#if defined(CONFIG_KVM_BOOKE_HV) \|\| defined(CONFIG_64BIT)
	442	u32 epcr;
	443	#endif
	444	#endif
	445
5aa9e2f4 AG	446	#ifdef CONFIG_PPC_BOOK3S
	447	/* For Gekko paired singles */
	448	u32 qpr[32];
	449	#endif
	450
5cf8ca22	451	ulong pc;
5cf8ca22 HB	452	ulong ctr;
5cf8ca22 HB	453	ulong lr;
7e57cba0	454
5cf8ca22	455	ulong xer;
7e57cba0	456	u32 cr;
bbf45ba5	457
00c3a37c	458	#ifdef CONFIG_PPC_BOOK3S
ca95150b	459	ulong hflags;
180a34d2	460	ulong guest_owned_ext;
de56a948 PM	461	ulong purr;
de56a948 PM	462	ulong spurr;
de56a948 PM	463	ulong dscr;
	464	ulong amr;
	465	ulong uamor;
	466	u32 ctrl;
	467	ulong dabr;
0acb9111	468	ulong cfar;
4b8473c9	469	ulong ppr;
a2d56020	470	ulong shadow_srr1;
ca95150b	471	#endif
eab17672	472	u32 vrsave; /* also USPRG0 */
bbf45ba5	473	u32 mmucr;
5fd8505e	474	/* shadow_msr is unused for BookE HV */
ecee273f	475	ulong shadow_msr;
5cf8ca22 HB	476	ulong csrr0;
	477	ulong csrr1;
	478	ulong dsrr0;
	479	ulong dsrr1;
5ce941ee SW	480	ulong mcsrr0;
	481	ulong mcsrr1;
	482	ulong mcsr;
bbf45ba5	483	u32 dec;
21bd000a	484	#ifdef CONFIG_BOOKE
bbf45ba5	485	u32 decar;
21bd000a	486	#endif
bbf45ba5 HB	487	u32 tbl;
	488	u32 tbu;
	489	u32 tcr;
dfd4d47e	490	ulong tsr; /* we need to perform set/clr_bits() which requires ulong */
bb3a8a17	491	u32 ivor[64];
5cf8ca22	492	ulong ivpr;
ca95150b	493	u32 pvr;
49dd2c49 HB	494
49dd2c49 HB	495	u32 shadow_pid;
dd9ebf1f	496	u32 shadow_pid1;
bbf45ba5	497	u32 pid;
49dd2c49 HB	498	u32 swap_pid;
49dd2c49 HB	499
bbf45ba5 HB	500	u32 ccr0;
bbf45ba5 HB	501	u32 ccr1;
f7b200af	502	u32 dbsr;
bbf45ba5	503
de56a948	504	u64 mmcr[3];
9e368f29	505	u32 pmc[8];
14941789 PM	506	u64 siar;
14941789 PM	507	u64 sdar;
de56a948	508
73e75b41	509	#ifdef CONFIG_KVM_EXIT_TIMING
09000adb	510	struct mutex exit_timing_lock;
7b701591 HB	511	struct kvmppc_exit_timing timing_exit;
7b701591 HB	512	struct kvmppc_exit_timing timing_last_enter;
73e75b41 HB	513	u32 last_exit_type;
	514	u32 timing_count_type[__NUMBER_OF_KVM_EXIT_TYPES];
	515	u64 timing_sum_duration[__NUMBER_OF_KVM_EXIT_TYPES];
	516	u64 timing_sum_quad_duration[__NUMBER_OF_KVM_EXIT_TYPES];
	517	u64 timing_min_duration[__NUMBER_OF_KVM_EXIT_TYPES];
	518	u64 timing_max_duration[__NUMBER_OF_KVM_EXIT_TYPES];
	519	u64 timing_last_exit;
	520	struct dentry *debugfs_exit_timing;
	521	#endif
	522
de56a948 PM	523	#ifdef CONFIG_PPC_BOOK3S
	524	ulong fault_dar;
	525	u32 fault_dsisr;
	526	#endif
	527
0604675f	528	#ifdef CONFIG_BOOKE
5cf8ca22 HB	529	ulong fault_dear;
5cf8ca22 HB	530	ulong fault_esr;
daf5e271 LY	531	ulong queued_dear;
daf5e271 LY	532	ulong queued_esr;
f61c94bb BB	533	spinlock_t wdt_lock;
f61c94bb BB	534	struct timer_list wdt_timer;
8fdd21a2	535	u32 tlbcfg[4];
307d9008	536	u32 tlbps[4];
8fdd21a2	537	u32 mmucfg;
9a6061d7	538	u32 eptcfg;
d30f6e48	539	u32 epr;
15b708be	540	u32 crit_save;
ce11e48b	541	/* guest debug registers*/
547465ef	542	struct debug_reg dbg_reg;
ce11e48b BB	543	/* hardware visible debug registers when in guest state */
ce11e48b BB	544	struct debug_reg shadow_dbg_reg;
0604675f	545	#endif
bbf45ba5	546	gpa_t paddr_accessed;
6020c0f6	547	gva_t vaddr_accessed;
bbf45ba5 HB	548
	549	u8 io_gpr; /* GPR used as IO source/target */
	550	u8 mmio_is_bigendian;
3587d534	551	u8 mmio_sign_extend;
bbf45ba5 HB	552	u8 dcr_needed;
bbf45ba5 HB	553	u8 dcr_is_write;
ad0a048b AG	554	u8 osi_needed;
ad0a048b AG	555	u8 osi_enabled;
9432ba60	556	u8 papr_enabled;
f61c94bb	557	u8 watchdog_enabled;
af8f38b3 AG	558	u8 sane;
af8f38b3 AG	559	u8 cpu_type;
de56a948	560	u8 hcall_needed;
5df554ad	561	u8 epr_flags; /* KVMPPC_EPR_xxx */
1c810636	562	u8 epr_needed;
bbf45ba5 HB	563
	564	u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */
	565
544c6761 AG	566	struct hrtimer dec_timer;
544c6761 AG	567	struct tasklet_struct tasklet;
ca95150b	568	u64 dec_jiffies;
de56a948	569	u64 dec_expires;
bbf45ba5	570	unsigned long pending_exceptions;
a8606e20 PM	571	u8 ceded;
a8606e20 PM	572	u8 prodded;
de56a948	573	u32 last_inst;
a8606e20	574
19ccb76a	575	wait_queue_head_t *wqp;
371fefd6 PM	576	struct kvmppc_vcore *vcore;
371fefd6 PM	577	int ret;
de56a948	578	int trap;
371fefd6 PM	579	int state;
371fefd6 PM	580	int ptid;
19ccb76a	581	bool timer_running;
371fefd6 PM	582	wait_queue_head_t cpu_run;
371fefd6 PM	583
96bc451a	584	struct kvm_vcpu_arch_shared *shared;
beb03f14 AG	585	unsigned long magic_page_pa; /* phys addr to map the magic page to */
beb03f14 AG	586	unsigned long magic_page_ea; /* effect. addr to map the magic page to */
de56a948	587
eb1e4f43 SW	588	int irq_type; /* one of KVM_IRQ_* */
	589	int irq_cpu_id;
	590	struct openpic mpic; / KVM_IRQ_MPIC */
bc5ad3f3 BH	591	#ifdef CONFIG_KVM_XICS
	592	struct kvmppc_icp icp; / XICS presentation controller */
	593	#endif
eb1e4f43	594
9975f5e3	595	#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
de56a948	596	struct kvm_vcpu_arch_shared shregs;
371fefd6	597
697d3899 PM	598	unsigned long pgfault_addr;
	599	long pgfault_index;
	600	unsigned long pgfault_hpte[2];
	601
371fefd6 PM	602	struct list_head run_list;
	603	struct task_struct *run_task;
	604	struct kvm_run *kvm_run;
342d3db7	605	pgd_t *pgdir;
2e25aa5f PM	606
	607	spinlock_t vpa_update_lock;
	608	struct kvmppc_vpa vpa;
	609	struct kvmppc_vpa dtl;
	610	struct dtl_entry *dtl_ptr;
	611	unsigned long dtl_index;
0456ec4f	612	u64 stolen_logged;
2e25aa5f	613	struct kvmppc_vpa slb_shadow;
c7b67670 PM	614
	615	spinlock_t tbacct_lock;
	616	u64 busy_stolen;
	617	u64 busy_preempt;
de56a948	618	#endif
bbf45ba5 HB	619	};
bbf45ba5 HB	620
19ccb76a	621	/* Values for vcpu->arch.state */
8455d79e PM	622	#define KVMPPC_VCPU_NOTREADY 0
8455d79e PM	623	#define KVMPPC_VCPU_RUNNABLE 1
c7b67670	624	#define KVMPPC_VCPU_BUSY_IN_HOST 2
371fefd6	625
b3c5d3c2 AG	626	/* Values for vcpu->arch.io_gpr */
	627	#define KVM_MMIO_REG_MASK 0x001f
	628	#define KVM_MMIO_REG_EXT_MASK 0xffe0
	629	#define KVM_MMIO_REG_GPR 0x0000
	630	#define KVM_MMIO_REG_FPR 0x0020
	631	#define KVM_MMIO_REG_QPR 0x0040
	632	#define KVM_MMIO_REG_FQPR 0x0060
	633
2246f8b5	634	#define __KVM_HAVE_ARCH_WQP
5df554ad	635	#define __KVM_HAVE_CREATE_DEVICE
b6d33834	636
bbf45ba5	637	#endif /* __POWERPC_KVM_HOST_H__ */