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047ea784 PM |
1 | #ifndef __ASM_POWERPC_MMU_CONTEXT_H |
2 | #define __ASM_POWERPC_MMU_CONTEXT_H | |
88ced031 | 3 | #ifdef __KERNEL__ |
047ea784 | 4 | |
5e696617 BH |
5 | #include <linux/kernel.h> |
6 | #include <linux/mm.h> | |
7 | #include <linux/sched.h> | |
8 | #include <linux/spinlock.h> | |
80a7cc6c KG |
9 | #include <asm/mmu.h> |
10 | #include <asm/cputable.h> | |
5e696617 | 11 | #include <asm/cputhreads.h> |
80a7cc6c KG |
12 | |
13 | /* | |
5e696617 | 14 | * Most if the context management is out of line |
80a7cc6c | 15 | */ |
1da177e4 LT |
16 | extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm); |
17 | extern void destroy_context(struct mm_struct *mm); | |
15b244a8 AK |
18 | #ifdef CONFIG_SPAPR_TCE_IOMMU |
19 | struct mm_iommu_table_group_mem_t; | |
20 | ||
2e5bbb54 | 21 | extern int isolate_lru_page(struct page *page); /* from internal.h */ |
d7baee69 AK |
22 | extern bool mm_iommu_preregistered(struct mm_struct *mm); |
23 | extern long mm_iommu_get(struct mm_struct *mm, | |
24 | unsigned long ua, unsigned long entries, | |
15b244a8 | 25 | struct mm_iommu_table_group_mem_t **pmem); |
d7baee69 AK |
26 | extern long mm_iommu_put(struct mm_struct *mm, |
27 | struct mm_iommu_table_group_mem_t *mem); | |
88f54a35 AK |
28 | extern void mm_iommu_init(struct mm_struct *mm); |
29 | extern void mm_iommu_cleanup(struct mm_struct *mm); | |
d7baee69 AK |
30 | extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup(struct mm_struct *mm, |
31 | unsigned long ua, unsigned long size); | |
6b5c19c5 AK |
32 | extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup_rm( |
33 | struct mm_struct *mm, unsigned long ua, unsigned long size); | |
d7baee69 AK |
34 | extern struct mm_iommu_table_group_mem_t *mm_iommu_find(struct mm_struct *mm, |
35 | unsigned long ua, unsigned long entries); | |
15b244a8 AK |
36 | extern long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem, |
37 | unsigned long ua, unsigned long *hpa); | |
6b5c19c5 AK |
38 | extern long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem, |
39 | unsigned long ua, unsigned long *hpa); | |
15b244a8 AK |
40 | extern long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem); |
41 | extern void mm_iommu_mapped_dec(struct mm_iommu_table_group_mem_t *mem); | |
42 | #endif | |
1da177e4 | 43 | extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm); |
5e696617 | 44 | extern void set_context(unsigned long id, pgd_t *pgd); |
1da177e4 | 45 | |
6f0ef0f5 | 46 | #ifdef CONFIG_PPC_BOOK3S_64 |
7e381c0f | 47 | extern void radix__switch_mmu_context(struct mm_struct *prev, |
a25bd72b | 48 | struct mm_struct *next); |
d2adba3f AK |
49 | static inline void switch_mmu_context(struct mm_struct *prev, |
50 | struct mm_struct *next, | |
51 | struct task_struct *tsk) | |
52 | { | |
7e381c0f AK |
53 | if (radix_enabled()) |
54 | return radix__switch_mmu_context(prev, next); | |
d2adba3f AK |
55 | return switch_slb(tsk, next); |
56 | } | |
57 | ||
a336f2f5 | 58 | extern int hash__alloc_context_id(void); |
82228e36 | 59 | extern void hash__reserve_context_id(int id); |
e85a4710 | 60 | extern void __destroy_context(int context_id); |
6f0ef0f5 BH |
61 | static inline void mmu_context_init(void) { } |
62 | #else | |
d2adba3f AK |
63 | extern void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next, |
64 | struct task_struct *tsk); | |
c83ec269 AG |
65 | extern unsigned long __init_new_context(void); |
66 | extern void __destroy_context(unsigned long context_id); | |
6f0ef0f5 BH |
67 | extern void mmu_context_init(void); |
68 | #endif | |
69 | ||
a25bd72b BH |
70 | #if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE) && defined(CONFIG_PPC_RADIX_MMU) |
71 | extern void radix_kvm_prefetch_workaround(struct mm_struct *mm); | |
72 | #else | |
73 | static inline void radix_kvm_prefetch_workaround(struct mm_struct *mm) { } | |
74 | #endif | |
75 | ||
851d2e2f THFL |
76 | extern void switch_cop(struct mm_struct *next); |
77 | extern int use_cop(unsigned long acop, struct mm_struct *mm); | |
78 | extern void drop_cop(unsigned long acop, struct mm_struct *mm); | |
79 | ||
1da177e4 LT |
80 | /* |
81 | * switch_mm is the entry point called from the architecture independent | |
0a0fca9d | 82 | * code in kernel/sched/core.c |
1da177e4 | 83 | */ |
9765ad13 DG |
84 | static inline void switch_mm_irqs_off(struct mm_struct *prev, |
85 | struct mm_struct *next, | |
86 | struct task_struct *tsk) | |
1da177e4 | 87 | { |
a25bd72b BH |
88 | bool new_on_cpu = false; |
89 | ||
5e696617 | 90 | /* Mark this context has been used on the new CPU */ |
a25bd72b | 91 | if (!cpumask_test_cpu(smp_processor_id(), mm_cpumask(next))) { |
bb85fb58 | 92 | cpumask_set_cpu(smp_processor_id(), mm_cpumask(next)); |
1a92a80a BH |
93 | |
94 | /* | |
95 | * This full barrier orders the store to the cpumask above vs | |
96 | * a subsequent operation which allows this CPU to begin loading | |
97 | * translations for next. | |
98 | * | |
99 | * When using the radix MMU that operation is the load of the | |
100 | * MMU context id, which is then moved to SPRN_PID. | |
101 | * | |
102 | * For the hash MMU it is either the first load from slb_cache | |
103 | * in switch_slb(), and/or the store of paca->mm_ctx_id in | |
104 | * copy_mm_to_paca(). | |
105 | * | |
106 | * On the read side the barrier is in pte_xchg(), which orders | |
107 | * the store to the PTE vs the load of mm_cpumask. | |
108 | */ | |
109 | smp_mb(); | |
110 | ||
a25bd72b BH |
111 | new_on_cpu = true; |
112 | } | |
5e696617 BH |
113 | |
114 | /* 32-bit keeps track of the current PGDIR in the thread struct */ | |
115 | #ifdef CONFIG_PPC32 | |
116 | tsk->thread.pgdir = next->pgd; | |
117 | #endif /* CONFIG_PPC32 */ | |
1da177e4 | 118 | |
25d21ad6 BH |
119 | /* 64-bit Book3E keeps track of current PGD in the PACA */ |
120 | #ifdef CONFIG_PPC_BOOK3E_64 | |
121 | get_paca()->pgd = next->pgd; | |
122 | #endif | |
5e696617 | 123 | /* Nothing else to do if we aren't actually switching */ |
1da177e4 LT |
124 | if (prev == next) |
125 | return; | |
126 | ||
851d2e2f THFL |
127 | #ifdef CONFIG_PPC_ICSWX |
128 | /* Switch coprocessor context only if prev or next uses a coprocessor */ | |
129 | if (prev->context.acop || next->context.acop) | |
130 | switch_cop(next); | |
131 | #endif /* CONFIG_PPC_ICSWX */ | |
132 | ||
5e696617 BH |
133 | /* We must stop all altivec streams before changing the HW |
134 | * context | |
135 | */ | |
1da177e4 LT |
136 | #ifdef CONFIG_ALTIVEC |
137 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) | |
138 | asm volatile ("dssall"); | |
139 | #endif /* CONFIG_ALTIVEC */ | |
a25bd72b BH |
140 | |
141 | if (new_on_cpu) | |
142 | radix_kvm_prefetch_workaround(next); | |
143 | ||
d2adba3f AK |
144 | /* |
145 | * The actual HW switching method differs between the various | |
146 | * sub architectures. Out of line for now | |
5e696617 | 147 | */ |
d2adba3f | 148 | switch_mmu_context(prev, next, tsk); |
1da177e4 LT |
149 | } |
150 | ||
9765ad13 DG |
151 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, |
152 | struct task_struct *tsk) | |
153 | { | |
154 | unsigned long flags; | |
155 | ||
156 | local_irq_save(flags); | |
157 | switch_mm_irqs_off(prev, next, tsk); | |
158 | local_irq_restore(flags); | |
159 | } | |
160 | #define switch_mm_irqs_off switch_mm_irqs_off | |
161 | ||
162 | ||
1da177e4 LT |
163 | #define deactivate_mm(tsk,mm) do { } while (0) |
164 | ||
165 | /* | |
166 | * After we have set current->mm to a new value, this activates | |
167 | * the context for the new mm so we see the new mappings. | |
168 | */ | |
169 | static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next) | |
170 | { | |
171 | unsigned long flags; | |
172 | ||
173 | local_irq_save(flags); | |
174 | switch_mm(prev, next, current); | |
175 | local_irq_restore(flags); | |
176 | } | |
177 | ||
5e696617 BH |
178 | /* We don't currently use enter_lazy_tlb() for anything */ |
179 | static inline void enter_lazy_tlb(struct mm_struct *mm, | |
180 | struct task_struct *tsk) | |
181 | { | |
25d21ad6 BH |
182 | /* 64-bit Book3E keeps track of current PGD in the PACA */ |
183 | #ifdef CONFIG_PPC_BOOK3E_64 | |
184 | get_paca()->pgd = NULL; | |
185 | #endif | |
5e696617 BH |
186 | } |
187 | ||
83d3f0e9 LD |
188 | static inline void arch_dup_mmap(struct mm_struct *oldmm, |
189 | struct mm_struct *mm) | |
190 | { | |
191 | } | |
192 | ||
193 | static inline void arch_exit_mmap(struct mm_struct *mm) | |
194 | { | |
195 | } | |
196 | ||
197 | static inline void arch_unmap(struct mm_struct *mm, | |
198 | struct vm_area_struct *vma, | |
199 | unsigned long start, unsigned long end) | |
200 | { | |
201 | if (start <= mm->context.vdso_base && mm->context.vdso_base < end) | |
202 | mm->context.vdso_base = 0; | |
203 | } | |
204 | ||
205 | static inline void arch_bprm_mm_init(struct mm_struct *mm, | |
206 | struct vm_area_struct *vma) | |
207 | { | |
208 | } | |
209 | ||
1b2ee126 | 210 | static inline bool arch_vma_access_permitted(struct vm_area_struct *vma, |
d61172b4 | 211 | bool write, bool execute, bool foreign) |
33a709b2 DH |
212 | { |
213 | /* by default, allow everything */ | |
214 | return true; | |
215 | } | |
88ced031 | 216 | #endif /* __KERNEL__ */ |
047ea784 | 217 | #endif /* __ASM_POWERPC_MMU_CONTEXT_H */ |