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1#ifndef _ASM_POWERPC_PROCESSOR_H
2#define _ASM_POWERPC_PROCESSOR_H
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3
4/*
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5 * Copyright (C) 2001 PPC 64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
1da177e4 11 */
1da177e4 12
9f04b9e3 13#include <asm/reg.h>
1da177e4 14
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15#ifdef CONFIG_VSX
16#define TS_FPRWIDTH 2
17#else
9c75a31c 18#define TS_FPRWIDTH 1
c6e6771b 19#endif
9c75a31c 20
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21#ifndef __ASSEMBLY__
22#include <linux/compiler.h>
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23#include <asm/ptrace.h>
24#include <asm/types.h>
1da177e4 25
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26/* We do _not_ want to define new machine types at all, those must die
27 * in favor of using the device-tree
28 * -- BenH.
1da177e4 29 */
1da177e4 30
799d6046 31/* PREP sub-platform types see residual.h for these */
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32#define _PREP_Motorola 0x01 /* motorola prep */
33#define _PREP_Firm 0x02 /* firmworks prep */
34#define _PREP_IBM 0x00 /* ibm prep */
35#define _PREP_Bull 0x03 /* bull prep */
36
799d6046 37/* CHRP sub-platform types. These are arbitrary */
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38#define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */
39#define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */
40#define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */
26c5032e 41#define _CHRP_briq 0x07 /* TotalImpact's briQ */
1da177e4 42
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43#if defined(__KERNEL__) && defined(CONFIG_PPC32)
44
45extern int _chrp_type;
799d6046 46
0a26b136 47#ifdef CONFIG_PPC_PREP
799d6046 48
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49/* what kind of prep workstation we are */
50extern int _prep_type;
1da177e4 51
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52#endif /* CONFIG_PPC_PREP */
53
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54#endif /* defined(__KERNEL__) && defined(CONFIG_PPC32) */
55
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56/*
57 * Default implementation of macro that returns current
58 * instruction pointer ("program counter").
59 */
60#define current_text_addr() ({ __label__ _l; _l: &&_l;})
61
62/* Macros for adjusting thread priority (hardware multi-threading) */
63#define HMT_very_low() asm volatile("or 31,31,31 # very low priority")
64#define HMT_low() asm volatile("or 1,1,1 # low priority")
65#define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority")
66#define HMT_medium() asm volatile("or 2,2,2 # medium priority")
67#define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority")
68#define HMT_high() asm volatile("or 3,3,3 # high priority")
69
70#ifdef __KERNEL__
71
1da177e4 72struct task_struct;
9f04b9e3 73void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp);
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74void release_thread(struct task_struct *);
75
76/* Prepare to copy thread state - unlazy all lazy status */
77extern void prepare_to_copy(struct task_struct *tsk);
78
9f04b9e3 79/* Create a new kernel thread. */
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80extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
81
82/* Lazy FPU handling on uni-processor */
83extern struct task_struct *last_task_used_math;
84extern struct task_struct *last_task_used_altivec;
c6e6771b 85extern struct task_struct *last_task_used_vsx;
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86extern struct task_struct *last_task_used_spe;
87
9f04b9e3 88#ifdef CONFIG_PPC32
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89
90#if CONFIG_TASK_SIZE > CONFIG_KERNEL_START
91#error User TASK_SIZE overlaps with KERNEL_START address
92#endif
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93#define TASK_SIZE (CONFIG_TASK_SIZE)
94
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95/* This decides where the kernel will search for a free chunk of vm
96 * space during mmap's.
97 */
98#define TASK_UNMAPPED_BASE (TASK_SIZE / 8 * 3)
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99#endif
100
101#ifdef CONFIG_PPC64
102/* 64-bit user address space is 44-bits (16TB user VM) */
103#define TASK_SIZE_USER64 (0x0000100000000000UL)
104
105/*
106 * 32-bit user address space is 4GB - 1 page
107 * (this 1 page is needed so referencing of 0xFFFFFFFF generates EFAULT
108 */
109#define TASK_SIZE_USER32 (0x0000000100000000UL - (1*PAGE_SIZE))
110
82455257 111#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
9f04b9e3 112 TASK_SIZE_USER32 : TASK_SIZE_USER64)
82455257 113#define TASK_SIZE TASK_SIZE_OF(current)
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114
115/* This decides where the kernel will search for a free chunk of vm
116 * space during mmap's.
117 */
118#define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4))
119#define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(TASK_SIZE_USER64 / 4))
120
121#define TASK_UNMAPPED_BASE ((test_thread_flag(TIF_32BIT)) ? \
122 TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 )
123#endif
1da177e4 124
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125#ifdef __KERNEL__
126#ifdef __powerpc64__
127
128#define STACK_TOP_USER64 TASK_SIZE_USER64
129#define STACK_TOP_USER32 TASK_SIZE_USER32
130
131#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
132 STACK_TOP_USER32 : STACK_TOP_USER64)
133
134#define STACK_TOP_MAX STACK_TOP_USER64
135
136#else /* __powerpc64__ */
137
138#define STACK_TOP TASK_SIZE
139#define STACK_TOP_MAX STACK_TOP
140
141#endif /* __powerpc64__ */
142#endif /* __KERNEL__ */
143
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144typedef struct {
145 unsigned long seg;
146} mm_segment_t;
147
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148#define TS_FPROFFSET 0
149#define TS_VSRLOWOFFSET 1
150#define TS_FPR(i) fpr[i][TS_FPROFFSET]
9c75a31c 151
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152struct thread_struct {
153 unsigned long ksp; /* Kernel stack pointer */
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154 unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */
155
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156#ifdef CONFIG_PPC64
157 unsigned long ksp_vsid;
158#endif
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159 struct pt_regs *regs; /* Pointer to saved register state */
160 mm_segment_t fs; /* for get_fs() validation */
9f04b9e3 161#ifdef CONFIG_PPC32
1da177e4 162 void *pgdir; /* root of page-table tree */
9f04b9e3 163#endif
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164#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE)
165 unsigned long dbcr0; /* debug control register values */
166 unsigned long dbcr1;
167#endif
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168 /* FP and VSX 0-31 register set */
169 double fpr[32][TS_FPRWIDTH];
170 struct {
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171
172 unsigned int pad;
173 unsigned int val; /* Floating point status */
174 } fpscr;
9f04b9e3 175 int fpexc_mode; /* floating-point exception mode */
e9370ae1 176 unsigned int align_ctl; /* alignment handling control */
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177#ifdef CONFIG_PPC64
178 unsigned long start_tb; /* Start purr when proc switched in */
179 unsigned long accum_tb; /* Total accumilated purr for process */
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180#endif
181 unsigned long dabr; /* Data address breakpoint register */
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182#ifdef CONFIG_ALTIVEC
183 /* Complete AltiVec register set */
fc624eae 184 vector128 vr[32] __attribute__((aligned(16)));
1da177e4 185 /* AltiVec status */
fc624eae 186 vector128 vscr __attribute__((aligned(16)));
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187 unsigned long vrsave;
188 int used_vr; /* set if process has used altivec */
189#endif /* CONFIG_ALTIVEC */
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190#ifdef CONFIG_VSX
191 /* VSR status */
192 int used_vsr; /* set if process has used altivec */
193#endif /* CONFIG_VSX */
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194#ifdef CONFIG_SPE
195 unsigned long evr[32]; /* upper 32-bits of SPE regs */
196 u64 acc; /* Accumulator */
197 unsigned long spefscr; /* SPE & eFP status */
198 int used_spe; /* set if process has used spe */
199#endif /* CONFIG_SPE */
200};
201
202#define ARCH_MIN_TASKALIGN 16
203
204#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack)
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205#define INIT_SP_LIMIT \
206 (_ALIGN_UP(sizeof(init_thread_info), 16) + (unsigned long) &init_stack)
1da177e4 207
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208#ifdef CONFIG_SPE
209#define SPEFSCR_INIT .spefscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | SPEFSCR_FUNFE | SPEFSCR_FOVFE,
210#else
211#define SPEFSCR_INIT
212#endif
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213
214#ifdef CONFIG_PPC32
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215#define INIT_THREAD { \
216 .ksp = INIT_SP, \
85218827 217 .ksp_limit = INIT_SP_LIMIT, \
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218 .fs = KERNEL_DS, \
219 .pgdir = swapper_pg_dir, \
220 .fpexc_mode = MSR_FE0 | MSR_FE1, \
6a800f36 221 SPEFSCR_INIT \
1da177e4 222}
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223#else
224#define INIT_THREAD { \
225 .ksp = INIT_SP, \
85218827 226 .ksp_limit = INIT_SP_LIMIT, \
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227 .regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \
228 .fs = KERNEL_DS, \
e17a2565 229 .fpr = {{0}}, \
25c8a78b 230 .fpscr = { .val = 0, }, \
ddf5f75a 231 .fpexc_mode = 0, \
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232}
233#endif
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234
235/*
236 * Return saved PC of a blocked thread. For now, this is the "user" PC
237 */
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238#define thread_saved_pc(tsk) \
239 ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
1da177e4 240
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241#define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.regs)
242
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243unsigned long get_wchan(struct task_struct *p);
244
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245#define KSTK_EIP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
246#define KSTK_ESP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0)
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247
248/* Get/set floating-point exception mode */
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249#define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr))
250#define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val))
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251
252extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr);
253extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val);
254
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255#define GET_ENDIAN(tsk, adr) get_endian((tsk), (adr))
256#define SET_ENDIAN(tsk, val) set_endian((tsk), (val))
257
258extern int get_endian(struct task_struct *tsk, unsigned long adr);
259extern int set_endian(struct task_struct *tsk, unsigned int val);
260
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261#define GET_UNALIGN_CTL(tsk, adr) get_unalign_ctl((tsk), (adr))
262#define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val))
263
264extern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr);
265extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val);
266
9f04b9e3 267static inline unsigned int __unpack_fe01(unsigned long msr_bits)
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268{
269 return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8);
270}
271
9f04b9e3 272static inline unsigned long __pack_fe01(unsigned int fpmode)
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273{
274 return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1);
275}
276
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277#ifdef CONFIG_PPC64
278#define cpu_relax() do { HMT_low(); HMT_medium(); barrier(); } while (0)
279#else
1da177e4 280#define cpu_relax() barrier()
9f04b9e3 281#endif
1da177e4 282
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283/* Check that a certain kernel stack pointer is valid in task_struct p */
284int validate_sp(unsigned long sp, struct task_struct *p,
285 unsigned long nbytes);
286
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287/*
288 * Prefetch macros.
289 */
290#define ARCH_HAS_PREFETCH
291#define ARCH_HAS_PREFETCHW
292#define ARCH_HAS_SPINLOCK_PREFETCH
293
9f04b9e3 294static inline void prefetch(const void *x)
1da177e4 295{
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296 if (unlikely(!x))
297 return;
298
299 __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x));
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300}
301
9f04b9e3 302static inline void prefetchw(const void *x)
1da177e4 303{
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304 if (unlikely(!x))
305 return;
306
307 __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x));
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308}
309
310#define spin_lock_prefetch(x) prefetchw(x)
311
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312#ifdef CONFIG_PPC64
313#define HAVE_ARCH_PICK_MMAP_LAYOUT
314#endif
1da177e4 315
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316#ifdef CONFIG_PPC64
317static inline unsigned long get_clean_sp(struct pt_regs *regs, int is_32)
318{
319 unsigned long sp;
320
321 if (is_32)
322 sp = regs->gpr[1] & 0x0ffffffffUL;
323 else
324 sp = regs->gpr[1];
325
326 return sp;
327}
328#else
329static inline unsigned long get_clean_sp(struct pt_regs *regs, int is_32)
330{
331 return regs->gpr[1];
332}
333#endif
334
1da177e4 335#endif /* __KERNEL__ */
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336#endif /* __ASSEMBLY__ */
337#endif /* _ASM_POWERPC_PROCESSOR_H */