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71087002 BH |
1 | /* Included from asm/pgtable-*.h only ! */ |
2 | ||
3 | /* | |
4 | * Some bits are only used on some cpu families... Make sure that all | |
5 | * the undefined gets a sensible default | |
6 | */ | |
7 | #ifndef _PAGE_HASHPTE | |
8 | #define _PAGE_HASHPTE 0 | |
9 | #endif | |
10 | #ifndef _PAGE_SHARED | |
11 | #define _PAGE_SHARED 0 | |
12 | #endif | |
13 | #ifndef _PAGE_HWWRITE | |
14 | #define _PAGE_HWWRITE 0 | |
15 | #endif | |
71087002 BH |
16 | #ifndef _PAGE_EXEC |
17 | #define _PAGE_EXEC 0 | |
18 | #endif | |
19 | #ifndef _PAGE_ENDIAN | |
20 | #define _PAGE_ENDIAN 0 | |
21 | #endif | |
22 | #ifndef _PAGE_COHERENT | |
23 | #define _PAGE_COHERENT 0 | |
24 | #endif | |
25 | #ifndef _PAGE_WRITETHRU | |
26 | #define _PAGE_WRITETHRU 0 | |
27 | #endif | |
71087002 BH |
28 | #ifndef _PAGE_4K_PFN |
29 | #define _PAGE_4K_PFN 0 | |
30 | #endif | |
57e2a99f BH |
31 | #ifndef _PAGE_SAO |
32 | #define _PAGE_SAO 0 | |
33 | #endif | |
71087002 BH |
34 | #ifndef _PAGE_PSIZE |
35 | #define _PAGE_PSIZE 0 | |
36 | #endif | |
a7b9f671 LC |
37 | /* _PAGE_RO and _PAGE_RW shall not be defined at the same time */ |
38 | #ifndef _PAGE_RO | |
39 | #define _PAGE_RO 0 | |
40 | #else | |
41 | #define _PAGE_RW 0 | |
42 | #endif | |
71087002 BH |
43 | #ifndef _PMD_PRESENT_MASK |
44 | #define _PMD_PRESENT_MASK _PMD_PRESENT | |
45 | #endif | |
46 | #ifndef _PMD_SIZE | |
47 | #define _PMD_SIZE 0 | |
48 | #define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE() | |
49 | #endif | |
50 | #ifndef _PAGE_KERNEL_RO | |
a7b9f671 | 51 | #define _PAGE_KERNEL_RO (_PAGE_RO) |
ea3cc330 BH |
52 | #endif |
53 | #ifndef _PAGE_KERNEL_ROX | |
a7b9f671 | 54 | #define _PAGE_KERNEL_ROX (_PAGE_EXEC | _PAGE_RO) |
71087002 BH |
55 | #endif |
56 | #ifndef _PAGE_KERNEL_RW | |
ea3cc330 BH |
57 | #define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE) |
58 | #endif | |
59 | #ifndef _PAGE_KERNEL_RWX | |
60 | #define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE | _PAGE_EXEC) | |
71087002 BH |
61 | #endif |
62 | #ifndef _PAGE_HPTEFLAGS | |
63 | #define _PAGE_HPTEFLAGS _PAGE_HASHPTE | |
64 | #endif | |
65 | #ifndef _PTE_NONE_MASK | |
66 | #define _PTE_NONE_MASK _PAGE_HPTEFLAGS | |
67 | #endif | |
68 | ||
69 | /* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a | |
70 | * kernel without large page PMD support | |
71 | */ | |
72 | #ifndef __ASSEMBLY__ | |
73 | extern unsigned long bad_call_to_PMD_PAGE_SIZE(void); | |
74 | #endif /* __ASSEMBLY__ */ | |
75 | ||
76 | /* Location of the PFN in the PTE. Most 32-bit platforms use the same | |
77 | * as _PAGE_SHIFT here (ie, naturally aligned). | |
78 | * Platform who don't just pre-define the value so we don't override it here | |
79 | */ | |
80 | #ifndef PTE_RPN_SHIFT | |
81 | #define PTE_RPN_SHIFT (PAGE_SHIFT) | |
82 | #endif | |
83 | ||
84 | /* The mask convered by the RPN must be a ULL on 32-bit platforms with | |
85 | * 64-bit PTEs | |
86 | */ | |
87 | #if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT) | |
71087002 BH |
88 | #define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1)) |
89 | #else | |
71087002 BH |
90 | #define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1)) |
91 | #endif | |
92 | ||
25985edc | 93 | /* _PAGE_CHG_MASK masks of bits that are to be preserved across |
71087002 BH |
94 | * pgprot changes |
95 | */ | |
96 | #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \ | |
97 | _PAGE_ACCESSED | _PAGE_SPECIAL) | |
98 | ||
99 | /* Mask of bits returned by pte_pgprot() */ | |
100 | #define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \ | |
101 | _PAGE_WRITETHRU | _PAGE_ENDIAN | _PAGE_4K_PFN | \ | |
a7b9f671 | 102 | _PAGE_USER | _PAGE_ACCESSED | _PAGE_RO | \ |
ea3cc330 | 103 | _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | _PAGE_EXEC) |
71087002 BH |
104 | |
105 | /* | |
106 | * We define 2 sets of base prot bits, one for basic pages (ie, | |
107 | * cacheable kernel and user pages) and one for non cacheable | |
108 | * pages. We always set _PAGE_COHERENT when SMP is enabled or | |
109 | * the processor might need it for DMA coherency. | |
110 | */ | |
111 | #define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE) | |
c6023202 SW |
112 | #if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU) || \ |
113 | defined(CONFIG_PPC_E500MC) | |
71087002 BH |
114 | #define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT) |
115 | #else | |
116 | #define _PAGE_BASE (_PAGE_BASE_NC) | |
117 | #endif | |
118 | ||
119 | /* Permission masks used to generate the __P and __S table, | |
120 | * | |
121 | * Note:__pgprot is defined in arch/powerpc/include/asm/page.h | |
122 | * | |
123 | * Write permissions imply read permissions for now (we could make write-only | |
124 | * pages on BookE but we don't bother for now). Execute permission control is | |
125 | * possible on platforms that define _PAGE_EXEC | |
126 | * | |
127 | * Note due to the way vm flags are laid out, the bits are XWR | |
128 | */ | |
129 | #define PAGE_NONE __pgprot(_PAGE_BASE) | |
130 | #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW) | |
a7b9f671 LC |
131 | #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | \ |
132 | _PAGE_EXEC) | |
133 | #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO) | |
134 | #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO | \ | |
135 | _PAGE_EXEC) | |
136 | #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO) | |
137 | #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO | \ | |
138 | _PAGE_EXEC) | |
71087002 BH |
139 | |
140 | #define __P000 PAGE_NONE | |
141 | #define __P001 PAGE_READONLY | |
142 | #define __P010 PAGE_COPY | |
143 | #define __P011 PAGE_COPY | |
144 | #define __P100 PAGE_READONLY_X | |
145 | #define __P101 PAGE_READONLY_X | |
146 | #define __P110 PAGE_COPY_X | |
147 | #define __P111 PAGE_COPY_X | |
148 | ||
149 | #define __S000 PAGE_NONE | |
150 | #define __S001 PAGE_READONLY | |
151 | #define __S010 PAGE_SHARED | |
152 | #define __S011 PAGE_SHARED | |
153 | #define __S100 PAGE_READONLY_X | |
154 | #define __S101 PAGE_READONLY_X | |
155 | #define __S110 PAGE_SHARED_X | |
156 | #define __S111 PAGE_SHARED_X | |
157 | ||
158 | /* Permission masks used for kernel mappings */ | |
159 | #define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW) | |
160 | #define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \ | |
161 | _PAGE_NO_CACHE) | |
162 | #define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \ | |
163 | _PAGE_NO_CACHE | _PAGE_GUARDED) | |
ea3cc330 | 164 | #define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX) |
71087002 | 165 | #define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO) |
ea3cc330 | 166 | #define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX) |
71087002 BH |
167 | |
168 | /* Protection used for kernel text. We want the debuggers to be able to | |
169 | * set breakpoints anywhere, so don't write protect the kernel text | |
170 | * on platforms where such control is possible. | |
171 | */ | |
172 | #if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\ | |
09597cfe | 173 | defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE) |
71087002 BH |
174 | #define PAGE_KERNEL_TEXT PAGE_KERNEL_X |
175 | #else | |
176 | #define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX | |
177 | #endif | |
178 | ||
179 | /* Make modules code happy. We don't set RO yet */ | |
180 | #define PAGE_KERNEL_EXEC PAGE_KERNEL_X | |
181 | ||
92437d41 PG |
182 | /* |
183 | * Don't just check for any non zero bits in __PAGE_USER, since for book3e | |
184 | * and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in | |
25985edc | 185 | * _PAGE_USER. Need to explicitly match _PAGE_BAP_UR bit in that case too. |
92437d41 PG |
186 | */ |
187 | #define pte_user(val) ((val & _PAGE_USER) == _PAGE_USER) | |
188 | ||
71087002 BH |
189 | /* Advertise special mapping type for AGP */ |
190 | #define PAGE_AGP (PAGE_KERNEL_NC) | |
191 | #define HAVE_PAGE_AGP | |
192 | ||
193 | /* Advertise support for _PAGE_SPECIAL */ | |
71087002 | 194 | #define __HAVE_ARCH_PTE_SPECIAL |
71087002 | 195 |