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Commit | Line | Data |
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c605782b | 1 | /* To be include by pgtable-hash64.h only */ |
3c726f8d BH |
2 | |
3 | /* Additional PTE bits (don't change without checking asm in hash_low.S) */ | |
83ac6a1e | 4 | #define _PAGE_SPECIAL 0x00000400 /* software: special page */ |
3c726f8d BH |
5 | #define _PAGE_HPTE_SUB 0x0ffff000 /* combo only: sub pages HPTE bits */ |
6 | #define _PAGE_HPTE_SUB0 0x08000000 /* combo only: first sub page */ | |
7 | #define _PAGE_COMBO 0x10000000 /* this is a combo 4k page */ | |
721151d0 | 8 | #define _PAGE_4K_PFN 0x20000000 /* PFN is for a single 4k page */ |
16c2d476 | 9 | |
41743a4e BH |
10 | /* For 64K page, we don't have a separate _PAGE_HASHPTE bit. Instead, |
11 | * we set that to be the whole sub-bits mask. The C code will only | |
12 | * test this, so a multi-bit mask will work. For combo pages, this | |
13 | * is equivalent as effectively, the old _PAGE_HASHPTE was an OR of | |
14 | * all the sub bits. For real 64k pages, we now have the assembly set | |
15 | * _PAGE_HPTE_SUB0 in addition to setting the HIDX bits which overlap | |
16 | * that mask. This is fine as long as the HIDX bits are never set on | |
17 | * a PTE that isn't hashed, which is the case today. | |
18 | * | |
19 | * A little nit is for the huge page C code, which does the hashing | |
20 | * in C, we need to provide which bit to use. | |
21 | */ | |
22 | #define _PAGE_HASHPTE _PAGE_HPTE_SUB | |
23 | ||
16c2d476 | 24 | /* Note the full page bits must be in the same location as for normal |
70f23fd6 | 25 | * 4k pages as the same assembly will be used to insert 64K pages |
48fc7f7e | 26 | * whether the kernel has CONFIG_PPC_64K_PAGES or not |
16c2d476 | 27 | */ |
3c726f8d BH |
28 | #define _PAGE_F_SECOND 0x00008000 /* full page: hidx bits */ |
29 | #define _PAGE_F_GIX 0x00007000 /* full page: hidx bits */ | |
30 | ||
31 | /* PTE flags to conserve for HPTE identification */ | |
41743a4e | 32 | #define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | _PAGE_COMBO) |
3c726f8d BH |
33 | |
34 | /* Shift to put page number into pte. | |
35 | * | |
c0f7c6cb PM |
36 | * That gives us a max RPN of 34 bits, which means a max of 50 bits |
37 | * of addressable physical space, or 46 bits for the special 4k PFNs. | |
3c726f8d | 38 | */ |
c0f7c6cb | 39 | #define PTE_RPN_SHIFT (30) |
3c726f8d | 40 | |
c605782b | 41 | #ifndef __ASSEMBLY__ |
3c726f8d | 42 | |
c605782b BH |
43 | /* |
44 | * With 64K pages on hash table, we have a special PTE format that | |
45 | * uses a second "half" of the page table to encode sub-page information | |
46 | * in order to deal with 64K made of 4K HW pages. Thus we override the | |
47 | * generic accessors and iterators here | |
48 | */ | |
3c726f8d | 49 | #define __real_pte(e,p) ((real_pte_t) { \ |
83d5e64b | 50 | (e), (pte_val(e) & _PAGE_COMBO) ? \ |
6c16a74d | 51 | (pte_val(*((p) + PTRS_PER_PTE))) : 0 }) |
3c726f8d BH |
52 | #define __rpte_to_hidx(r,index) ((pte_val((r).pte) & _PAGE_COMBO) ? \ |
53 | (((r).hidx >> ((index)<<2)) & 0xf) : ((pte_val((r).pte) >> 12) & 0xf)) | |
54 | #define __rpte_to_pte(r) ((r).pte) | |
55 | #define __rpte_sub_valid(rpte, index) \ | |
56 | (pte_val(rpte.pte) & (_PAGE_HPTE_SUB0 >> (index))) | |
57 | ||
3c726f8d BH |
58 | /* Trick: we set __end to va + 64k, which happens works for |
59 | * a 16M page as well as we want only one iteration | |
60 | */ | |
5524a27d AK |
61 | #define pte_iterate_hashed_subpages(rpte, psize, vpn, index, shift) \ |
62 | do { \ | |
63 | unsigned long __end = vpn + (1UL << (PAGE_SHIFT - VPN_SHIFT)); \ | |
64 | unsigned __split = (psize == MMU_PAGE_4K || \ | |
65 | psize == MMU_PAGE_64K_AP); \ | |
66 | shift = mmu_psize_defs[psize].shift; \ | |
67 | for (index = 0; vpn < __end; index++, \ | |
68 | vpn += (1L << (shift - VPN_SHIFT))) { \ | |
69 | if (!__split || __rpte_sub_valid(rpte, index)) \ | |
70 | do { | |
3c726f8d BH |
71 | |
72 | #define pte_iterate_hashed_end() } while(0); } } while(0) | |
73 | ||
16c2d476 | 74 | #define pte_pagesize_index(mm, addr, pte) \ |
bf72aeba | 75 | (((pte) & _PAGE_COMBO)? MMU_PAGE_4K: MMU_PAGE_64K) |
3c726f8d | 76 | |
721151d0 PM |
77 | #define remap_4k_pfn(vma, addr, pfn, prot) \ |
78 | remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, \ | |
79 | __pgprot(pgprot_val((prot)) | _PAGE_4K_PFN)) | |
80 | ||
c605782b | 81 | #endif /* __ASSEMBLY__ */ |