]>
Commit | Line | Data |
---|---|---|
1a59d1b8 | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
c707ffcf OJ |
2 | /* |
3 | * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation | |
4 | * Rewrite, cleanup: | |
91f14480 | 5 | * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation |
c707ffcf OJ |
6 | */ |
7 | ||
8882a4da DG |
8 | #ifndef _ASM_POWERPC_TCE_H |
9 | #define _ASM_POWERPC_TCE_H | |
88ced031 | 10 | #ifdef __KERNEL__ |
c707ffcf | 11 | |
5d2efba6 LV |
12 | #include <asm/iommu.h> |
13 | ||
c707ffcf OJ |
14 | /* |
15 | * Tces come in two formats, one for the virtual bus and a different | |
8d3d589a MM |
16 | * format for PCI. PCI TCEs can have hardware or software maintianed |
17 | * coherency. | |
c707ffcf | 18 | */ |
8d3d589a MM |
19 | #define TCE_VB 0 |
20 | #define TCE_PCI 1 | |
c707ffcf | 21 | |
d0035c62 OJ |
22 | /* TCE page size is 4096 bytes (1 << 12) */ |
23 | ||
24 | #define TCE_SHIFT 12 | |
25 | #define TCE_PAGE_SIZE (1 << TCE_SHIFT) | |
d0035c62 | 26 | |
bc97ce95 OJ |
27 | #define TCE_ENTRY_SIZE 8 /* each TCE is 64 bits */ |
28 | ||
29 | #define TCE_RPN_MASK 0xfffffffffful /* 40-bit RPN (4K pages) */ | |
30 | #define TCE_RPN_SHIFT 12 | |
31 | #define TCE_VALID 0x800 /* TCE valid */ | |
32 | #define TCE_ALLIO 0x400 /* TCE valid for all lpars */ | |
33 | #define TCE_PCI_WRITE 0x2 /* write from PCI allowed */ | |
34 | #define TCE_PCI_READ 0x1 /* read from PCI allowed */ | |
35 | #define TCE_VB_WRITE 0x1 /* write from VB allowed */ | |
c707ffcf | 36 | |
88ced031 | 37 | #endif /* __KERNEL__ */ |
8882a4da | 38 | #endif /* _ASM_POWERPC_TCE_H */ |