]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blame - arch/powerpc/kernel/asm-offsets.c
projects / mirror_ubuntu-zesty-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branches 'acpica' and 'acpi-scan'
[mirror_ubuntu-zesty-kernel.git] / arch / powerpc / kernel / asm-offsets.c
CommitLineData
14cf11af
PM		 1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
14cf11af
PM		 16#include <linux/signal.h>
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/types.h>
14cf11af
PM		 22#include <linux/mman.h>
23#include <linux/mm.h>
543b9fd3 24#include <linux/suspend.h>
ad7f7167 25#include <linux/hrtimer.h>
d1dead5c 26#ifdef CONFIG_PPC64
14cf11af
PM		 27#include <linux/time.h>
28#include <linux/hardirq.h>
d1dead5c 29#endif
d4d298fe 30#include <linux/kbuild.h>
d1dead5c 31
14cf11af
PM		 32#include <asm/io.h>
33#include <asm/page.h>
34#include <asm/pgtable.h>
35#include <asm/processor.h>
14cf11af
PM		 36#include <asm/cputable.h>
37#include <asm/thread_info.h>
033ef338 38#include <asm/rtas.h>
a7f290da 39#include <asm/vdso_datapage.h>
66feed61 40#include <asm/dbell.h>
14cf11af
PM		 41#ifdef CONFIG_PPC64
42#include <asm/paca.h>
43#include <asm/lppaca.h>
14cf11af 44#include <asm/cache.h>
14cf11af 45#include <asm/compat.h>
11a27ad7 46#include <asm/mmu.h>
f04da0bc 47#include <asm/hvcall.h>
19ccb76a 48#include <asm/xics.h>
14cf11af 49#endif
ed79ba9e
BH		 50#ifdef CONFIG_PPC_POWERNV
51#include <asm/opal.h>
52#endif
989044ee 53#if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
366d4b9b 54#include <linux/kvm_host.h>
0604675f 55#endif
989044ee
AG		 56#if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
57#include <asm/kvm_book3s.h>
5deb8e7a 58#include <asm/kvm_ppc.h>
db93f574 59#endif
14cf11af 60
57e2a99f 61#ifdef CONFIG_PPC32
fca622c5
KG		 62#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
63#include "head_booke.h"
64#endif
57e2a99f 65#endif
fca622c5 66
55fd766b 67#if defined(CONFIG_PPC_FSL_BOOK3E)
19f5465e
TP		 68#include "../mm/mmu_decl.h"
69#endif
70
f86ef74e
CL		 71#ifdef CONFIG_PPC_8xx
72#include <asm/fixmap.h>
73#endif
74
14cf11af
PM		 75int main(void)
76{
d1dead5c
SR		 77 DEFINE(THREAD, offsetof(struct task_struct, thread));
78 DEFINE(MM, offsetof(struct task_struct, mm));
5e696617 79 DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id));
14cf11af 80#ifdef CONFIG_PPC64
9c1e1052
PM		 81 DEFINE(SIGSEGV, SIGSEGV);
82 DEFINE(NMI_MASK, NMI_MASK);
92779245 83 DEFINE(TASKTHREADPPR, offsetof(struct task_struct, thread.ppr));
d1dead5c 84#else
f7e4217b 85 DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
cbc9565e
BH		 86 DEFINE(THREAD_INFO_GAP, _ALIGN_UP(sizeof(struct thread_info), 16));
87 DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
d1dead5c
SR		 88#endif /* CONFIG_PPC64 */
89
85baa095
ME		 90#ifdef CONFIG_LIVEPATCH
91 DEFINE(TI_livepatch_sp, offsetof(struct thread_info, livepatch_sp));
92#endif
93
14cf11af 94 DEFINE(KSP, offsetof(struct thread_struct, ksp));
14cf11af 95 DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
1325a684
AK		 96#ifdef CONFIG_BOOKE
97 DEFINE(THREAD_NORMSAVES, offsetof(struct thread_struct, normsave[0]));
98#endif
14cf11af 99 DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
de79f7b9 100 DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fp_state));
18461960 101 DEFINE(THREAD_FPSAVEAREA, offsetof(struct thread_struct, fp_save_area));
de79f7b9 102 DEFINE(FPSTATE_FPSCR, offsetof(struct thread_fp_state, fpscr));
70fe3d98 103 DEFINE(THREAD_LOAD_FP, offsetof(struct thread_struct, load_fp));
14cf11af 104#ifdef CONFIG_ALTIVEC
de79f7b9 105 DEFINE(THREAD_VRSTATE, offsetof(struct thread_struct, vr_state));
18461960 106 DEFINE(THREAD_VRSAVEAREA, offsetof(struct thread_struct, vr_save_area));
14cf11af 107 DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
14cf11af 108 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
de79f7b9 109 DEFINE(VRSTATE_VSCR, offsetof(struct thread_vr_state, vscr));
70fe3d98 110 DEFINE(THREAD_LOAD_VEC, offsetof(struct thread_struct, load_vec));
14cf11af 111#endif /* CONFIG_ALTIVEC */
c6e6771b 112#ifdef CONFIG_VSX
c6e6771b
MN		 113 DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
114#endif /* CONFIG_VSX */
d1dead5c
SR		 115#ifdef CONFIG_PPC64
116 DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
117#else /* CONFIG_PPC64 */
118 DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
14cf11af
PM		 119#ifdef CONFIG_SPE
120 DEFINE(THREAD_EVR0, offsetof(struct thread_struct, evr[0]));
121 DEFINE(THREAD_ACC, offsetof(struct thread_struct, acc));
122 DEFINE(THREAD_SPEFSCR, offsetof(struct thread_struct, spefscr));
123 DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe));
124#endif /* CONFIG_SPE */
d1dead5c 125#endif /* CONFIG_PPC64 */
13d543cd 126#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
51ae8d4a 127 DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, debug.dbcr0));
13d543cd 128#endif
97e49255
AG		 129#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
130 DEFINE(THREAD_KVM_SVCPU, offsetof(struct thread_struct, kvm_shadow_vcpu));
131#endif
ffe129ec 132#if defined(CONFIG_KVM) && defined(CONFIG_BOOKE)
d30f6e48
SW		 133 DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu));
134#endif
d1dead5c 135
8b3c34cf 136#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
afc07701 137 DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch));
8b3c34cf
MN		 138 DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar));
139 DEFINE(THREAD_TM_TEXASR, offsetof(struct thread_struct, tm_texasr));
140 DEFINE(THREAD_TM_TFIAR, offsetof(struct thread_struct, tm_tfiar));
28e61cc4
MN		 141 DEFINE(THREAD_TM_TAR, offsetof(struct thread_struct, tm_tar));
142 DEFINE(THREAD_TM_PPR, offsetof(struct thread_struct, tm_ppr));
143 DEFINE(THREAD_TM_DSCR, offsetof(struct thread_struct, tm_dscr));
8b3c34cf 144 DEFINE(PT_CKPT_REGS, offsetof(struct thread_struct, ckpt_regs));
000ec280
CB		 145 DEFINE(THREAD_CKVRSTATE, offsetof(struct thread_struct,
146 ckvr_state));
147 DEFINE(THREAD_CKVRSAVE, offsetof(struct thread_struct,
148 ckvrsave));
149 DEFINE(THREAD_CKFPSTATE, offsetof(struct thread_struct,
150 ckfp_state));
8b3c34cf
MN		 151 /* Local pt_regs on stack for Transactional Memory funcs. */
152 DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
153 sizeof(struct pt_regs) + 16);
154#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
2468dcf6 155
d1dead5c 156 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
f39224a8 157 DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
d1dead5c 158 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
d1dead5c 159 DEFINE(TI_TASK, offsetof(struct thread_info, task));
d1dead5c 160 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
d1dead5c
SR		 161
162#ifdef CONFIG_PPC64
163 DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
164 DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_dline_size));
165 DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, dlines_per_page));
166 DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
167 DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
168 DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
d1dead5c
SR		 169 /* paca */
170 DEFINE(PACA_SIZE, sizeof(struct paca_struct));
171 DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
172 DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
173 DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
174 DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
175 DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
d1dead5c
SR		 176 DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
177 DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
178 DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
1f6a93e4
PM		 179 DEFINE(PACAKBASE, offsetof(struct paca_struct, kernelbase));
180 DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
d04c56f7 181 DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
7230c564 182 DEFINE(PACAIRQHAPPENED, offsetof(struct paca_struct, irq_happened));
c395465d 183#ifdef CONFIG_PPC_BOOK3S
2fc251a8 184 DEFINE(PACACONTEXTID, offsetof(struct paca_struct, mm_ctx_id));
d0f13e3c
BH		 185#ifdef CONFIG_PPC_MM_SLICES
186 DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
2fc251a8 187 mm_ctx_low_slices_psize));
d0f13e3c 188 DEFINE(PACAHIGHSLICEPSIZE, offsetof(struct paca_struct,
2fc251a8 189 mm_ctx_high_slices_psize));
d0f13e3c 190 DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
91c60b5b 191#endif /* CONFIG_PPC_MM_SLICES */
c395465d 192#endif
dce6670a
BH		 193
194#ifdef CONFIG_PPC_BOOK3E
195 DEFINE(PACAPGD, offsetof(struct paca_struct, pgd));
196 DEFINE(PACA_KERNELPGD, offsetof(struct paca_struct, kernel_pgd));
197 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
198 DEFINE(PACA_EXTLB, offsetof(struct paca_struct, extlb));
199 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
200 DEFINE(PACA_EXCRIT, offsetof(struct paca_struct, excrit));
201 DEFINE(PACA_EXDBG, offsetof(struct paca_struct, exdbg));
202 DEFINE(PACA_MC_STACK, offsetof(struct paca_struct, mc_kstack));
203 DEFINE(PACA_CRIT_STACK, offsetof(struct paca_struct, crit_kstack));
204 DEFINE(PACA_DBG_STACK, offsetof(struct paca_struct, dbg_kstack));
28efc35f
SW		 205 DEFINE(PACA_TCD_PTR, offsetof(struct paca_struct, tcd_ptr));
206
207 DEFINE(TCD_ESEL_NEXT,
208 offsetof(struct tlb_core_data, esel_next));
209 DEFINE(TCD_ESEL_MAX,
210 offsetof(struct tlb_core_data, esel_max));
211 DEFINE(TCD_ESEL_FIRST,
212 offsetof(struct tlb_core_data, esel_first));
dce6670a
BH		 213#endif /* CONFIG_PPC_BOOK3E */
214
91c60b5b 215#ifdef CONFIG_PPC_STD_MMU_64
91c60b5b
BH		 216 DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
217 DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
218 DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp));
219#ifdef CONFIG_PPC_MM_SLICES
d0f13e3c
BH		 220 DEFINE(MMUPSIZESLLP, offsetof(struct mmu_psize_def, sllp));
221#else
2fc251a8 222 DEFINE(PACACONTEXTSLLP, offsetof(struct paca_struct, mm_ctx_sllp));
d0f13e3c 223#endif /* CONFIG_PPC_MM_SLICES */
d1dead5c
SR		 224 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
225 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
226 DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb));
3356bb9f 227 DEFINE(PACALPPACAPTR, offsetof(struct paca_struct, lppaca_ptr));
2f6093c8 228 DEFINE(PACA_SLBSHADOWPTR, offsetof(struct paca_struct, slb_shadow_ptr));
11a27ad7
MN		 229 DEFINE(SLBSHADOW_STACKVSID,
230 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid));
231 DEFINE(SLBSHADOW_STACKESID,
232 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid));
cf9efce0 233 DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area));
de56a948 234 DEFINE(LPPACA_PMCINUSE, offsetof(struct lppaca, pmcregs_in_use));
cf9efce0 235 DEFINE(LPPACA_DTLIDX, offsetof(struct lppaca, dtl_idx));
a8606e20 236 DEFINE(LPPACA_YIELDCOUNT, offsetof(struct lppaca, yield_count));
cf9efce0 237 DEFINE(PACA_DTL_RIDX, offsetof(struct paca_struct, dtl_ridx));
91c60b5b
BH		 238#endif /* CONFIG_PPC_STD_MMU_64 */
239 DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
1e9b4507
MS		 240#ifdef CONFIG_PPC_BOOK3S_64
241 DEFINE(PACAMCEMERGSP, offsetof(struct paca_struct, mc_emergency_sp));
242 DEFINE(PACA_IN_MCE, offsetof(struct paca_struct, in_mce));
243#endif
91c60b5b 244 DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
1fc711f7 245 DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state));
1db36525 246 DEFINE(PACA_DSCR_DEFAULT, offsetof(struct paca_struct, dscr_default));
c223c903
CL		 247 DEFINE(ACCOUNT_STARTTIME,
248 offsetof(struct paca_struct, accounting.starttime));
249 DEFINE(ACCOUNT_STARTTIME_USER,
250 offsetof(struct paca_struct, accounting.starttime_user));
251 DEFINE(ACCOUNT_USER_TIME,
252 offsetof(struct paca_struct, accounting.user_time));
253 DEFINE(ACCOUNT_SYSTEM_TIME,
254 offsetof(struct paca_struct, accounting.system_time));
91c60b5b 255 DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
2fde6d20 256 DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost));
9d378dfa 257 DEFINE(PACA_SPRG_VDSO, offsetof(struct paca_struct, sprg_vdso));
c223c903
CL		 258#else /* CONFIG_PPC64 */
259#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
260 DEFINE(ACCOUNT_STARTTIME,
261 offsetof(struct thread_info, accounting.starttime));
262 DEFINE(ACCOUNT_STARTTIME_USER,
263 offsetof(struct thread_info, accounting.starttime_user));
264 DEFINE(ACCOUNT_USER_TIME,
265 offsetof(struct thread_info, accounting.user_time));
266 DEFINE(ACCOUNT_SYSTEM_TIME,
267 offsetof(struct thread_info, accounting.system_time));
268#endif
033ef338 269#endif /* CONFIG_PPC64 */
d1dead5c
SR		 270
271 /* RTAS */
272 DEFINE(RTASBASE, offsetof(struct rtas_t, base));
273 DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
d1dead5c 274
14cf11af 275 /* Interrupt register frame */
91120cc8 276 DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
14cf11af 277 DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
218d169c 278#ifdef CONFIG_PPC64
d1dead5c
SR		 279 /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
280 DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
281 DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
282#endif /* CONFIG_PPC64 */
14cf11af
PM		 283 DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
284 DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
285 DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2]));
286 DEFINE(GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[3]));
287 DEFINE(GPR4, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[4]));
288 DEFINE(GPR5, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[5]));
289 DEFINE(GPR6, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[6]));
290 DEFINE(GPR7, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[7]));
291 DEFINE(GPR8, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[8]));
292 DEFINE(GPR9, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[9]));
293 DEFINE(GPR10, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[10]));
294 DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11]));
295 DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12]));
296 DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
d1dead5c 297#ifndef CONFIG_PPC64
14cf11af 298 DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
d1dead5c 299#endif /* CONFIG_PPC64 */
14cf11af
PM		 300 /*
301 * Note: these symbols include _ because they overlap with special
302 * register names
303 */
304 DEFINE(_NIP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, nip));
305 DEFINE(_MSR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, msr));
306 DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr));
307 DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
308 DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
14cf11af
PM		 309 DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
310 DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
311 DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
d1dead5c
SR		 312 DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
313 DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
d73e0c99 314 DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
d1dead5c 315#ifndef CONFIG_PPC64
d1dead5c
SR		 316 /*
317 * The PowerPC 400-class & Book-E processors have neither the DAR
318 * nor the DSISR SPRs. Hence, we overload them to hold the similar
319 * DEAR and ESR SPRs for such processors. For critical interrupts
320 * we use them to hold SRR0 and SRR1.
14cf11af
PM		 321 */
322 DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
323 DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
d1dead5c 324#else /* CONFIG_PPC64 */
d1dead5c
SR		 325 DEFINE(SOFTE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, softe));
326
327 /* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
328 DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
329 DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
330#endif /* CONFIG_PPC64 */
331
57e2a99f 332#if defined(CONFIG_PPC32)
fca622c5
KG		 333#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
334 DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
335 DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
336 /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
337 DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
338 DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
339 DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
340 DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
341 DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
342 DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
343 DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
344 DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
345 DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
346 DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
347 DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
348 DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
349 DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
350#endif
57e2a99f 351#endif
d1dead5c
SR		 352
353#ifndef CONFIG_PPC64
14cf11af 354 DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
d1dead5c 355#endif /* ! CONFIG_PPC64 */
14cf11af
PM		 356
357 /* About the CPU features table */
14cf11af
PM		 358 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
359 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
f39b7a55 360 DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
14cf11af 361
d1dead5c
SR		 362 DEFINE(pbe_address, offsetof(struct pbe, address));
363 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
364 DEFINE(pbe_next, offsetof(struct pbe, next));
14cf11af 365
543b9fd3 366#ifndef CONFIG_PPC64
fd582ec8 367 DEFINE(TASK_SIZE, TASK_SIZE);
d1dead5c 368 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
a7f290da 369#endif /* ! CONFIG_PPC64 */
14cf11af 370
a7f290da
BH		 371 /* datapage offsets for use by vdso */
372 DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
373 DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
374 DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
a7f290da
BH		 375 DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
376 DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
377 DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
378 DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
379 DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
380 DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
597bc5c0 381 DEFINE(STAMP_XTIME, offsetof(struct vdso_data, stamp_xtime));
8fd63a9e 382 DEFINE(STAMP_SEC_FRAC, offsetof(struct vdso_data, stamp_sec_fraction));
fbe48175
OJ		 383 DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
384 DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
385 DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
386 DEFINE(CFG_DCACHE_LOGBLOCKSZ, offsetof(struct vdso_data, dcache_log_block_size));
a7f290da
BH		 387#ifdef CONFIG_PPC64
388 DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64));
14cf11af
PM		 389 DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
390 DEFINE(TVAL64_TV_USEC, offsetof(struct timeval, tv_usec));
391 DEFINE(TVAL32_TV_SEC, offsetof(struct compat_timeval, tv_sec));
392 DEFINE(TVAL32_TV_USEC, offsetof(struct compat_timeval, tv_usec));
0c37ec2a
BH		 393 DEFINE(TSPC64_TV_SEC, offsetof(struct timespec, tv_sec));
394 DEFINE(TSPC64_TV_NSEC, offsetof(struct timespec, tv_nsec));
a7f290da
BH		 395 DEFINE(TSPC32_TV_SEC, offsetof(struct compat_timespec, tv_sec));
396 DEFINE(TSPC32_TV_NSEC, offsetof(struct compat_timespec, tv_nsec));
397#else
398 DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec));
399 DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec));
0c37ec2a
BH		 400 DEFINE(TSPC32_TV_SEC, offsetof(struct timespec, tv_sec));
401 DEFINE(TSPC32_TV_NSEC, offsetof(struct timespec, tv_nsec));
a7f290da
BH		 402#endif
403 /* timeval/timezone offsets for use by vdso */
14cf11af
PM		 404 DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
405 DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
a7f290da
BH		 406
407 /* Other bits used by the vdso */
408 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
409 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
410 DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
151db1fc 411 DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
a7f290da 412
007d88d0
DW		 413#ifdef CONFIG_BUG
414 DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
415#endif
16a15a30 416
dd1842a2
AK		 417#ifdef MAX_PGD_TABLE_SIZE
418 DEFINE(PGD_TABLE_SIZE, MAX_PGD_TABLE_SIZE);
419#else
ee7a76da 420 DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
dd1842a2 421#endif
4ee7084e 422 DEFINE(PTE_SIZE, sizeof(pte_t));
bee86f14 423
bbf45ba5 424#ifdef CONFIG_KVM
bbf45ba5
HB		 425 DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
426 DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
d30f6e48 427 DEFINE(VCPU_GUEST_PID, offsetof(struct kvm_vcpu, arch.pid));
bbf45ba5 428 DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
eab17672 429 DEFINE(VCPU_VRSAVE, offsetof(struct kvm_vcpu, arch.vrsave));
efff1912 430 DEFINE(VCPU_FPRS, offsetof(struct kvm_vcpu, arch.fp.fpr));
de56a948 431#ifdef CONFIG_ALTIVEC
efff1912 432 DEFINE(VCPU_VRS, offsetof(struct kvm_vcpu, arch.vr.vr));
de56a948
PM		 433#endif
434 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
435 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
436 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
e14e7a1e 437#ifdef CONFIG_PPC_BOOK3S
b005255e 438 DEFINE(VCPU_TAR, offsetof(struct kvm_vcpu, arch.tar));
e14e7a1e 439#endif
de56a948
PM		 440 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
441 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
9975f5e3 442#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
de56a948
PM		 443 DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.shregs.msr));
444 DEFINE(VCPU_SRR0, offsetof(struct kvm_vcpu, arch.shregs.srr0));
445 DEFINE(VCPU_SRR1, offsetof(struct kvm_vcpu, arch.shregs.srr1));
446 DEFINE(VCPU_SPRG0, offsetof(struct kvm_vcpu, arch.shregs.sprg0));
447 DEFINE(VCPU_SPRG1, offsetof(struct kvm_vcpu, arch.shregs.sprg1));
448 DEFINE(VCPU_SPRG2, offsetof(struct kvm_vcpu, arch.shregs.sprg2));
449 DEFINE(VCPU_SPRG3, offsetof(struct kvm_vcpu, arch.shregs.sprg3));
b6c295df
PM		 450#endif
451#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
452 DEFINE(VCPU_TB_RMENTRY, offsetof(struct kvm_vcpu, arch.rm_entry));
453 DEFINE(VCPU_TB_RMINTR, offsetof(struct kvm_vcpu, arch.rm_intr));
454 DEFINE(VCPU_TB_RMEXIT, offsetof(struct kvm_vcpu, arch.rm_exit));
455 DEFINE(VCPU_TB_GUEST, offsetof(struct kvm_vcpu, arch.guest_time));
456 DEFINE(VCPU_TB_CEDE, offsetof(struct kvm_vcpu, arch.cede_time));
457 DEFINE(VCPU_CUR_ACTIVITY, offsetof(struct kvm_vcpu, arch.cur_activity));
458 DEFINE(VCPU_ACTIVITY_START, offsetof(struct kvm_vcpu, arch.cur_tb_start));
459 DEFINE(TAS_SEQCOUNT, offsetof(struct kvmhv_tb_accumulator, seqcount));
460 DEFINE(TAS_TOTAL, offsetof(struct kvmhv_tb_accumulator, tb_total));
461 DEFINE(TAS_MIN, offsetof(struct kvmhv_tb_accumulator, tb_min));
462 DEFINE(TAS_MAX, offsetof(struct kvmhv_tb_accumulator, tb_max));
de56a948 463#endif
c8ae0ace 464 DEFINE(VCPU_SHARED_SPRG3, offsetof(struct kvm_vcpu_arch_shared, sprg3));
b5904972
SW		 465 DEFINE(VCPU_SHARED_SPRG4, offsetof(struct kvm_vcpu_arch_shared, sprg4));
466 DEFINE(VCPU_SHARED_SPRG5, offsetof(struct kvm_vcpu_arch_shared, sprg5));
467 DEFINE(VCPU_SHARED_SPRG6, offsetof(struct kvm_vcpu_arch_shared, sprg6));
468 DEFINE(VCPU_SHARED_SPRG7, offsetof(struct kvm_vcpu_arch_shared, sprg7));
49dd2c49 469 DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));
dd9ebf1f 470 DEFINE(VCPU_SHADOW_PID1, offsetof(struct kvm_vcpu, arch.shadow_pid1));
96bc451a 471 DEFINE(VCPU_SHARED, offsetof(struct kvm_vcpu, arch.shared));
666e7252 472 DEFINE(VCPU_SHARED_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
ecee273f 473 DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr));
5deb8e7a
AG		 474#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
475 DEFINE(VCPU_SHAREDBE, offsetof(struct kvm_vcpu, arch.shared_big_endian));
476#endif
bbf45ba5 477
b5904972
SW		 478 DEFINE(VCPU_SHARED_MAS0, offsetof(struct kvm_vcpu_arch_shared, mas0));
479 DEFINE(VCPU_SHARED_MAS1, offsetof(struct kvm_vcpu_arch_shared, mas1));
480 DEFINE(VCPU_SHARED_MAS2, offsetof(struct kvm_vcpu_arch_shared, mas2));
481 DEFINE(VCPU_SHARED_MAS7_3, offsetof(struct kvm_vcpu_arch_shared, mas7_3));
482 DEFINE(VCPU_SHARED_MAS4, offsetof(struct kvm_vcpu_arch_shared, mas4));
483 DEFINE(VCPU_SHARED_MAS6, offsetof(struct kvm_vcpu_arch_shared, mas6));
484
d30f6e48
SW		 485 DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
486 DEFINE(KVM_LPID, offsetof(struct kvm, arch.lpid));
487
00c3a37c 488 /* book3s */
9975f5e3 489#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
7c5b06ca 490 DEFINE(KVM_TLB_SETS, offsetof(struct kvm, arch.tlb_sets));
de56a948
PM		 491 DEFINE(KVM_SDR1, offsetof(struct kvm, arch.sdr1));
492 DEFINE(KVM_HOST_LPID, offsetof(struct kvm, arch.host_lpid));
493 DEFINE(KVM_HOST_LPCR, offsetof(struct kvm, arch.host_lpcr));
494 DEFINE(KVM_HOST_SDR1, offsetof(struct kvm, arch.host_sdr1));
1b400ba0 495 DEFINE(KVM_NEED_FLUSH, offsetof(struct kvm, arch.need_tlb_flush.bits));
699a0ea0 496 DEFINE(KVM_ENABLED_HCALLS, offsetof(struct kvm, arch.enabled_hcalls));
697d3899 497 DEFINE(KVM_VRMA_SLB_V, offsetof(struct kvm, arch.vrma_slb_v));
de56a948
PM		 498 DEFINE(VCPU_DSISR, offsetof(struct kvm_vcpu, arch.shregs.dsisr));
499 DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar));
7657f408 500 DEFINE(VCPU_VPA, offsetof(struct kvm_vcpu, arch.vpa.pinned_addr));
c35635ef 501 DEFINE(VCPU_VPA_DIRTY, offsetof(struct kvm_vcpu, arch.vpa.dirty));
4a157d61 502 DEFINE(VCPU_HEIR, offsetof(struct kvm_vcpu, arch.emul_inst));
ec257165
PM		 503 DEFINE(VCPU_CPU, offsetof(struct kvm_vcpu, cpu));
504 DEFINE(VCPU_THREAD_CPU, offsetof(struct kvm_vcpu, arch.thread_cpu));
de56a948 505#endif
00c3a37c 506#ifdef CONFIG_PPC_BOOK3S
de56a948
PM		 507 DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr));
508 DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr));
b005255e 509 DEFINE(VCPU_IC, offsetof(struct kvm_vcpu, arch.ic));
de56a948
PM		 510 DEFINE(VCPU_DSCR, offsetof(struct kvm_vcpu, arch.dscr));
511 DEFINE(VCPU_AMR, offsetof(struct kvm_vcpu, arch.amr));
512 DEFINE(VCPU_UAMOR, offsetof(struct kvm_vcpu, arch.uamor));
b005255e 513 DEFINE(VCPU_IAMR, offsetof(struct kvm_vcpu, arch.iamr));
de56a948
PM		 514 DEFINE(VCPU_CTRL, offsetof(struct kvm_vcpu, arch.ctrl));
515 DEFINE(VCPU_DABR, offsetof(struct kvm_vcpu, arch.dabr));
8563bf52 516 DEFINE(VCPU_DABRX, offsetof(struct kvm_vcpu, arch.dabrx));
b005255e
MN		 517 DEFINE(VCPU_DAWR, offsetof(struct kvm_vcpu, arch.dawr));
518 DEFINE(VCPU_DAWRX, offsetof(struct kvm_vcpu, arch.dawrx));
519 DEFINE(VCPU_CIABR, offsetof(struct kvm_vcpu, arch.ciabr));
62908905 520 DEFINE(VCPU_HFLAGS, offsetof(struct kvm_vcpu, arch.hflags));
de56a948
PM		 521 DEFINE(VCPU_DEC, offsetof(struct kvm_vcpu, arch.dec));
522 DEFINE(VCPU_DEC_EXPIRES, offsetof(struct kvm_vcpu, arch.dec_expires));
aa04b4cc 523 DEFINE(VCPU_PENDING_EXC, offsetof(struct kvm_vcpu, arch.pending_exceptions));
19ccb76a
PM		 524 DEFINE(VCPU_CEDED, offsetof(struct kvm_vcpu, arch.ceded));
525 DEFINE(VCPU_PRODDED, offsetof(struct kvm_vcpu, arch.prodded));
de56a948
PM		 526 DEFINE(VCPU_MMCR, offsetof(struct kvm_vcpu, arch.mmcr));
527 DEFINE(VCPU_PMC, offsetof(struct kvm_vcpu, arch.pmc));
b005255e 528 DEFINE(VCPU_SPMC, offsetof(struct kvm_vcpu, arch.spmc));
14941789
PM		 529 DEFINE(VCPU_SIAR, offsetof(struct kvm_vcpu, arch.siar));
530 DEFINE(VCPU_SDAR, offsetof(struct kvm_vcpu, arch.sdar));
b005255e 531 DEFINE(VCPU_SIER, offsetof(struct kvm_vcpu, arch.sier));
de56a948
PM		 532 DEFINE(VCPU_SLB, offsetof(struct kvm_vcpu, arch.slb));
533 DEFINE(VCPU_SLB_MAX, offsetof(struct kvm_vcpu, arch.slb_max));
534 DEFINE(VCPU_SLB_NR, offsetof(struct kvm_vcpu, arch.slb_nr));
de56a948
PM		 535 DEFINE(VCPU_FAULT_DSISR, offsetof(struct kvm_vcpu, arch.fault_dsisr));
536 DEFINE(VCPU_FAULT_DAR, offsetof(struct kvm_vcpu, arch.fault_dar));
e5ee5422 537 DEFINE(VCPU_INTR_MSR, offsetof(struct kvm_vcpu, arch.intr_msr));
de56a948
PM		 538 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
539 DEFINE(VCPU_TRAP, offsetof(struct kvm_vcpu, arch.trap));
0acb9111 540 DEFINE(VCPU_CFAR, offsetof(struct kvm_vcpu, arch.cfar));
4b8473c9 541 DEFINE(VCPU_PPR, offsetof(struct kvm_vcpu, arch.ppr));
b005255e
MN		 542 DEFINE(VCPU_FSCR, offsetof(struct kvm_vcpu, arch.fscr));
543 DEFINE(VCPU_PSPB, offsetof(struct kvm_vcpu, arch.pspb));
b005255e
MN		 544 DEFINE(VCPU_EBBHR, offsetof(struct kvm_vcpu, arch.ebbhr));
545 DEFINE(VCPU_EBBRR, offsetof(struct kvm_vcpu, arch.ebbrr));
546 DEFINE(VCPU_BESCR, offsetof(struct kvm_vcpu, arch.bescr));
547 DEFINE(VCPU_CSIGR, offsetof(struct kvm_vcpu, arch.csigr));
548 DEFINE(VCPU_TACR, offsetof(struct kvm_vcpu, arch.tacr));
549 DEFINE(VCPU_TCSCR, offsetof(struct kvm_vcpu, arch.tcscr));
550 DEFINE(VCPU_ACOP, offsetof(struct kvm_vcpu, arch.acop));
551 DEFINE(VCPU_WORT, offsetof(struct kvm_vcpu, arch.wort));
e9cf1e08
PM		 552 DEFINE(VCPU_TID, offsetof(struct kvm_vcpu, arch.tid));
553 DEFINE(VCPU_PSSCR, offsetof(struct kvm_vcpu, arch.psscr));
7d6c40da 554 DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_map));
371fefd6 555 DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest));
19ccb76a 556 DEFINE(VCORE_NAPPING_THREADS, offsetof(struct kvmppc_vcore, napping_threads));
e0b7ec05 557 DEFINE(VCORE_KVM, offsetof(struct kvmppc_vcore, kvm));
93b0f4dc 558 DEFINE(VCORE_TB_OFFSET, offsetof(struct kvmppc_vcore, tb_offset));
a0144e2a 559 DEFINE(VCORE_LPCR, offsetof(struct kvmppc_vcore, lpcr));
388cc6e1 560 DEFINE(VCORE_PCR, offsetof(struct kvmppc_vcore, pcr));
b005255e 561 DEFINE(VCORE_DPDES, offsetof(struct kvmppc_vcore, dpdes));
88b02cf9 562 DEFINE(VCORE_VTB, offsetof(struct kvmppc_vcore, vtb));
de56a948
PM		 563 DEFINE(VCPU_SLB_E, offsetof(struct kvmppc_slb, orige));
564 DEFINE(VCPU_SLB_V, offsetof(struct kvmppc_slb, origv));
565 DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
7b490411
MN		 566#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
567 DEFINE(VCPU_TFHAR, offsetof(struct kvm_vcpu, arch.tfhar));
568 DEFINE(VCPU_TFIAR, offsetof(struct kvm_vcpu, arch.tfiar));
569 DEFINE(VCPU_TEXASR, offsetof(struct kvm_vcpu, arch.texasr));
570 DEFINE(VCPU_GPR_TM, offsetof(struct kvm_vcpu, arch.gpr_tm));
571 DEFINE(VCPU_FPRS_TM, offsetof(struct kvm_vcpu, arch.fp_tm.fpr));
572 DEFINE(VCPU_VRS_TM, offsetof(struct kvm_vcpu, arch.vr_tm.vr));
573 DEFINE(VCPU_VRSAVE_TM, offsetof(struct kvm_vcpu, arch.vrsave_tm));
574 DEFINE(VCPU_CR_TM, offsetof(struct kvm_vcpu, arch.cr_tm));
0d808df0 575 DEFINE(VCPU_XER_TM, offsetof(struct kvm_vcpu, arch.xer_tm));
7b490411
MN		 576 DEFINE(VCPU_LR_TM, offsetof(struct kvm_vcpu, arch.lr_tm));
577 DEFINE(VCPU_CTR_TM, offsetof(struct kvm_vcpu, arch.ctr_tm));
578 DEFINE(VCPU_AMR_TM, offsetof(struct kvm_vcpu, arch.amr_tm));
579 DEFINE(VCPU_PPR_TM, offsetof(struct kvm_vcpu, arch.ppr_tm));
580 DEFINE(VCPU_DSCR_TM, offsetof(struct kvm_vcpu, arch.dscr_tm));
581 DEFINE(VCPU_TAR_TM, offsetof(struct kvm_vcpu, arch.tar_tm));
582#endif
3c42bf8a
PM		 583
584#ifdef CONFIG_PPC_BOOK3S_64
7aa79938 585#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
a2d56020 586 DEFINE(PACA_SVCPU, offsetof(struct paca_struct, shadow_vcpu));
3c42bf8a 587# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
de56a948
PM		 588#else
589# define SVCPU_FIELD(x, f)
590#endif
3c42bf8a
PM		 591# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
592#else /* 32-bit */
593# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
594# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
595#endif
596
597 SVCPU_FIELD(SVCPU_CR, cr);
598 SVCPU_FIELD(SVCPU_XER, xer);
599 SVCPU_FIELD(SVCPU_CTR, ctr);
600 SVCPU_FIELD(SVCPU_LR, lr);
601 SVCPU_FIELD(SVCPU_PC, pc);
602 SVCPU_FIELD(SVCPU_R0, gpr[0]);
603 SVCPU_FIELD(SVCPU_R1, gpr[1]);
604 SVCPU_FIELD(SVCPU_R2, gpr[2]);
605 SVCPU_FIELD(SVCPU_R3, gpr[3]);
606 SVCPU_FIELD(SVCPU_R4, gpr[4]);
607 SVCPU_FIELD(SVCPU_R5, gpr[5]);
608 SVCPU_FIELD(SVCPU_R6, gpr[6]);
609 SVCPU_FIELD(SVCPU_R7, gpr[7]);
610 SVCPU_FIELD(SVCPU_R8, gpr[8]);
611 SVCPU_FIELD(SVCPU_R9, gpr[9]);
612 SVCPU_FIELD(SVCPU_R10, gpr[10]);
613 SVCPU_FIELD(SVCPU_R11, gpr[11]);
614 SVCPU_FIELD(SVCPU_R12, gpr[12]);
615 SVCPU_FIELD(SVCPU_R13, gpr[13]);
616 SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
617 SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
618 SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
619 SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
0604675f 620#ifdef CONFIG_PPC_BOOK3S_32
3c42bf8a 621 SVCPU_FIELD(SVCPU_SR, sr);
0604675f 622#endif
3c42bf8a
PM		 623#ifdef CONFIG_PPC64
624 SVCPU_FIELD(SVCPU_SLB, slb);
625 SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
616dff86 626 SVCPU_FIELD(SVCPU_SHADOW_FSCR, shadow_fscr);
3c42bf8a
PM		 627#endif
628
629 HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
630 HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
de56a948 631 HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
3c42bf8a
PM		 632 HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
633 HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
634 HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
36e7bb38 635 HSTATE_FIELD(HSTATE_SCRATCH2, scratch2);
3c42bf8a 636 HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
02143947 637 HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
19ccb76a 638 HSTATE_FIELD(HSTATE_NAPPING, napping);
3c42bf8a 639
9975f5e3 640#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
7657f408
PM		 641 HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
642 HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
de56a948 643 HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
371fefd6
PM		 644 HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
645 HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);
54695c30
BH		 646 HSTATE_FIELD(HSTATE_SAVED_XIRR, saved_xirr);
647 HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi);
e0b7ec05 648 HSTATE_FIELD(HSTATE_PTID, ptid);
9a4fc4ea
ME		 649 HSTATE_FIELD(HSTATE_MMCR0, host_mmcr[0]);
650 HSTATE_FIELD(HSTATE_MMCR1, host_mmcr[1]);
651 HSTATE_FIELD(HSTATE_MMCRA, host_mmcr[2]);
652 HSTATE_FIELD(HSTATE_SIAR, host_mmcr[3]);
653 HSTATE_FIELD(HSTATE_SDAR, host_mmcr[4]);
654 HSTATE_FIELD(HSTATE_MMCR2, host_mmcr[5]);
655 HSTATE_FIELD(HSTATE_SIER, host_mmcr[6]);
656 HSTATE_FIELD(HSTATE_PMC1, host_pmc[0]);
657 HSTATE_FIELD(HSTATE_PMC2, host_pmc[1]);
658 HSTATE_FIELD(HSTATE_PMC3, host_pmc[2]);
659 HSTATE_FIELD(HSTATE_PMC4, host_pmc[3]);
660 HSTATE_FIELD(HSTATE_PMC5, host_pmc[4]);
661 HSTATE_FIELD(HSTATE_PMC6, host_pmc[5]);
de56a948
PM		 662 HSTATE_FIELD(HSTATE_PURR, host_purr);
663 HSTATE_FIELD(HSTATE_SPURR, host_spurr);
664 HSTATE_FIELD(HSTATE_DSCR, host_dscr);
665 HSTATE_FIELD(HSTATE_DABR, dabr);
666 HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
b4deba5c 667 HSTATE_FIELD(HSTATE_SPLIT_MODE, kvm_split_mode);
19ccb76a 668 DEFINE(IPI_PRIORITY, IPI_PRIORITY);
b4deba5c
PM		 669 DEFINE(KVM_SPLIT_RPR, offsetof(struct kvm_split_mode, rpr));
670 DEFINE(KVM_SPLIT_PMMAR, offsetof(struct kvm_split_mode, pmmar));
671 DEFINE(KVM_SPLIT_LDBAR, offsetof(struct kvm_split_mode, ldbar));
b4deba5c
PM		 672 DEFINE(KVM_SPLIT_DO_NAP, offsetof(struct kvm_split_mode, do_nap));
673 DEFINE(KVM_SPLIT_NAPPED, offsetof(struct kvm_split_mode, napped));
9975f5e3 674#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
de56a948 675
0acb9111
PM		 676#ifdef CONFIG_PPC_BOOK3S_64
677 HSTATE_FIELD(HSTATE_CFAR, cfar);
4b8473c9 678 HSTATE_FIELD(HSTATE_PPR, ppr);
616dff86 679 HSTATE_FIELD(HSTATE_HOST_FSCR, host_fscr);
0acb9111
PM		 680#endif /* CONFIG_PPC_BOOK3S_64 */
681
3c42bf8a 682#else /* CONFIG_PPC_BOOK3S */
7e57cba0
AG		 683 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
684 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
0604675f
AG		 685 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
686 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
687 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
99e99d19 688 DEFINE(VCPU_SPRG9, offsetof(struct kvm_vcpu, arch.sprg9));
0604675f
AG		 689 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
690 DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear));
691 DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr));
15b708be 692 DEFINE(VCPU_CRIT_SAVE, offsetof(struct kvm_vcpu, arch.crit_save));
00c3a37c 693#endif /* CONFIG_PPC_BOOK3S */
3c42bf8a 694#endif /* CONFIG_KVM */
d17051cb
AG		 695
696#ifdef CONFIG_KVM_GUEST
697 DEFINE(KVM_MAGIC_SCRATCH1, offsetof(struct kvm_vcpu_arch_shared,
698 scratch1));
699 DEFINE(KVM_MAGIC_SCRATCH2, offsetof(struct kvm_vcpu_arch_shared,
700 scratch2));
701 DEFINE(KVM_MAGIC_SCRATCH3, offsetof(struct kvm_vcpu_arch_shared,
702 scratch3));
703 DEFINE(KVM_MAGIC_INT, offsetof(struct kvm_vcpu_arch_shared,
704 int_pending));
705 DEFINE(KVM_MAGIC_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
706 DEFINE(KVM_MAGIC_CRITICAL, offsetof(struct kvm_vcpu_arch_shared,
707 critical));
cbe487fa 708 DEFINE(KVM_MAGIC_SR, offsetof(struct kvm_vcpu_arch_shared, sr));
d17051cb
AG		 709#endif
710
ca9153a3
IY		 711#ifdef CONFIG_44x
712 DEFINE(PGD_T_LOG2, PGD_T_LOG2);
713 DEFINE(PTE_T_LOG2, PTE_T_LOG2);
714#endif
55fd766b 715#ifdef CONFIG_PPC_FSL_BOOK3E
78f62237
KG		 716 DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
717 DEFINE(TLBCAM_MAS0, offsetof(struct tlbcam, MAS0));
718 DEFINE(TLBCAM_MAS1, offsetof(struct tlbcam, MAS1));
719 DEFINE(TLBCAM_MAS2, offsetof(struct tlbcam, MAS2));
720 DEFINE(TLBCAM_MAS3, offsetof(struct tlbcam, MAS3));
721 DEFINE(TLBCAM_MAS7, offsetof(struct tlbcam, MAS7));
722#endif
bbf45ba5 723
4cd35f67
SW		 724#if defined(CONFIG_KVM) && defined(CONFIG_SPE)
725 DEFINE(VCPU_EVR, offsetof(struct kvm_vcpu, arch.evr[0]));
726 DEFINE(VCPU_ACC, offsetof(struct kvm_vcpu, arch.acc));
727 DEFINE(VCPU_SPEFSCR, offsetof(struct kvm_vcpu, arch.spefscr));
728 DEFINE(VCPU_HOST_SPEFSCR, offsetof(struct kvm_vcpu, arch.host_spefscr));
729#endif
730
d30f6e48
SW		 731#ifdef CONFIG_KVM_BOOKE_HV
732 DEFINE(VCPU_HOST_MAS4, offsetof(struct kvm_vcpu, arch.host_mas4));
733 DEFINE(VCPU_HOST_MAS6, offsetof(struct kvm_vcpu, arch.host_mas6));
d30f6e48
SW		 734#endif
735
73e75b41
HB		 736#ifdef CONFIG_KVM_EXIT_TIMING
737 DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
738 arch.timing_exit.tv32.tbu));
739 DEFINE(VCPU_TIMING_EXIT_TBL, offsetof(struct kvm_vcpu,
740 arch.timing_exit.tv32.tbl));
741 DEFINE(VCPU_TIMING_LAST_ENTER_TBU, offsetof(struct kvm_vcpu,
742 arch.timing_last_enter.tv32.tbu));
743 DEFINE(VCPU_TIMING_LAST_ENTER_TBL, offsetof(struct kvm_vcpu,
744 arch.timing_last_enter.tv32.tbl));
745#endif
746
7cba160a
SP		 747#ifdef CONFIG_PPC_POWERNV
748 DEFINE(PACA_CORE_IDLE_STATE_PTR,
749 offsetof(struct paca_struct, core_idle_state_ptr));
750 DEFINE(PACA_THREAD_IDLE_STATE,
751 offsetof(struct paca_struct, thread_idle_state));
752 DEFINE(PACA_THREAD_MASK,
753 offsetof(struct paca_struct, thread_mask));
77b54e9f
SP		 754 DEFINE(PACA_SUBCORE_SIBLING_MASK,
755 offsetof(struct paca_struct, subcore_sibling_mask));
7cba160a
SP		 756#endif
757
66feed61
PM		 758 DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);
759
f86ef74e 760#ifdef CONFIG_PPC_8xx
9f595fd8 761 DEFINE(VIRT_IMMR_BASE, (u64)__fix_to_virt(FIX_IMMR_BASE));
f86ef74e
CL		 762#endif
763
14cf11af
PM		 764 return 0;
765}
ubuntu-zesty-kernel mirror