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Commit | Line | Data |
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77bd7415 LV |
1 | /* |
2 | * PCI Error Recovery Driver for RPA-compliant PPC64 platform. | |
3c8c90ab LV |
3 | * Copyright IBM Corp. 2004 2005 |
4 | * Copyright Linas Vepstas <linas@linas.org> 2004, 2005 | |
77bd7415 LV |
5 | * |
6 | * All rights reserved. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or (at | |
11 | * your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | |
16 | * NON INFRINGEMENT. See the GNU General Public License for more | |
17 | * details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | * | |
3c8c90ab | 23 | * Send comments and feedback to Linas Vepstas <linas@austin.ibm.com> |
77bd7415 LV |
24 | */ |
25 | #include <linux/delay.h> | |
77bd7415 | 26 | #include <linux/interrupt.h> |
ac325acd | 27 | #include <linux/irq.h> |
feadf7c0 | 28 | #include <linux/module.h> |
77bd7415 LV |
29 | #include <linux/pci.h> |
30 | #include <asm/eeh.h> | |
31 | #include <asm/eeh_event.h> | |
32 | #include <asm/ppc-pci.h> | |
33 | #include <asm/pci-bridge.h> | |
34 | #include <asm/prom.h> | |
35 | #include <asm/rtas.h> | |
36 | ||
67086e32 WY |
37 | struct eeh_rmv_data { |
38 | struct list_head edev_list; | |
39 | int removed; | |
40 | }; | |
41 | ||
29f8bf1b GS |
42 | /** |
43 | * eeh_pcid_name - Retrieve name of PCI device driver | |
44 | * @pdev: PCI device | |
45 | * | |
46 | * This routine is used to retrieve the name of PCI device driver | |
47 | * if that's valid. | |
48 | */ | |
40a7cd92 | 49 | static inline const char *eeh_pcid_name(struct pci_dev *pdev) |
77bd7415 | 50 | { |
273d2803 | 51 | if (pdev && pdev->dev.driver) |
77bd7415 LV |
52 | return pdev->dev.driver->name; |
53 | return ""; | |
54 | } | |
55 | ||
feadf7c0 GS |
56 | /** |
57 | * eeh_pcid_get - Get the PCI device driver | |
58 | * @pdev: PCI device | |
59 | * | |
60 | * The function is used to retrieve the PCI device driver for | |
61 | * the indicated PCI device. Besides, we will increase the reference | |
62 | * of the PCI device driver to prevent that being unloaded on | |
63 | * the fly. Otherwise, kernel crash would be seen. | |
64 | */ | |
65 | static inline struct pci_driver *eeh_pcid_get(struct pci_dev *pdev) | |
66 | { | |
67 | if (!pdev || !pdev->driver) | |
68 | return NULL; | |
69 | ||
70 | if (!try_module_get(pdev->driver->driver.owner)) | |
71 | return NULL; | |
72 | ||
73 | return pdev->driver; | |
74 | } | |
75 | ||
76 | /** | |
77 | * eeh_pcid_put - Dereference on the PCI device driver | |
78 | * @pdev: PCI device | |
79 | * | |
80 | * The function is called to do dereference on the PCI device | |
81 | * driver of the indicated PCI device. | |
82 | */ | |
83 | static inline void eeh_pcid_put(struct pci_dev *pdev) | |
84 | { | |
85 | if (!pdev || !pdev->driver) | |
86 | return; | |
87 | ||
88 | module_put(pdev->driver->driver.owner); | |
89 | } | |
90 | ||
8535ef05 | 91 | /** |
29f8bf1b GS |
92 | * eeh_disable_irq - Disable interrupt for the recovering device |
93 | * @dev: PCI device | |
94 | * | |
95 | * This routine must be called when reporting temporary or permanent | |
96 | * error to the particular PCI device to disable interrupt of that | |
97 | * device. If the device has enabled MSI or MSI-X interrupt, we needn't | |
98 | * do real work because EEH should freeze DMA transfers for those PCI | |
99 | * devices encountering EEH errors, which includes MSI or MSI-X. | |
8535ef05 MM |
100 | */ |
101 | static void eeh_disable_irq(struct pci_dev *dev) | |
102 | { | |
40a7cd92 | 103 | struct eeh_dev *edev = pci_dev_to_eeh_dev(dev); |
8535ef05 MM |
104 | |
105 | /* Don't disable MSI and MSI-X interrupts. They are | |
106 | * effectively disabled by the DMA Stopped state | |
107 | * when an EEH error occurs. | |
29f8bf1b | 108 | */ |
8535ef05 MM |
109 | if (dev->msi_enabled || dev->msix_enabled) |
110 | return; | |
111 | ||
59e3f837 | 112 | if (!irq_has_action(dev->irq)) |
8535ef05 MM |
113 | return; |
114 | ||
dbbceee1 | 115 | edev->mode |= EEH_DEV_IRQ_DISABLED; |
8535ef05 MM |
116 | disable_irq_nosync(dev->irq); |
117 | } | |
118 | ||
119 | /** | |
29f8bf1b GS |
120 | * eeh_enable_irq - Enable interrupt for the recovering device |
121 | * @dev: PCI device | |
122 | * | |
123 | * This routine must be called to enable interrupt while failed | |
124 | * device could be resumed. | |
8535ef05 MM |
125 | */ |
126 | static void eeh_enable_irq(struct pci_dev *dev) | |
127 | { | |
40a7cd92 | 128 | struct eeh_dev *edev = pci_dev_to_eeh_dev(dev); |
8535ef05 | 129 | |
dbbceee1 GS |
130 | if ((edev->mode) & EEH_DEV_IRQ_DISABLED) { |
131 | edev->mode &= ~EEH_DEV_IRQ_DISABLED; | |
b8a9a11b TG |
132 | /* |
133 | * FIXME !!!!! | |
134 | * | |
135 | * This is just ass backwards. This maze has | |
136 | * unbalanced irq_enable/disable calls. So instead of | |
137 | * finding the root cause it works around the warning | |
138 | * in the irq_enable code by conditionally calling | |
139 | * into it. | |
140 | * | |
141 | * That's just wrong.The warning in the core code is | |
027dfac6 | 142 | * there to tell people to fix their asymmetries in |
b8a9a11b TG |
143 | * their own code, not by abusing the core information |
144 | * to avoid it. | |
145 | * | |
146 | * I so wish that the assymetry would be the other way | |
147 | * round and a few more irq_disable calls render that | |
148 | * shit unusable forever. | |
149 | * | |
150 | * tglx | |
151 | */ | |
57310c3c | 152 | if (irqd_irq_disabled(irq_get_irq_data(dev->irq))) |
91150af3 | 153 | enable_irq(dev->irq); |
57310c3c | 154 | } |
8535ef05 MM |
155 | } |
156 | ||
d2b0f6f7 GS |
157 | static bool eeh_dev_removed(struct eeh_dev *edev) |
158 | { | |
159 | /* EEH device removed ? */ | |
160 | if (!edev || (edev->mode & EEH_DEV_REMOVED)) | |
161 | return true; | |
162 | ||
163 | return false; | |
164 | } | |
165 | ||
5cfb20b9 GS |
166 | static void *eeh_dev_save_state(void *data, void *userdata) |
167 | { | |
168 | struct eeh_dev *edev = data; | |
169 | struct pci_dev *pdev; | |
170 | ||
171 | if (!edev) | |
172 | return NULL; | |
173 | ||
5a0cdbfd GS |
174 | /* |
175 | * We cannot access the config space on some adapters. | |
176 | * Otherwise, it will cause fenced PHB. We don't save | |
177 | * the content in their config space and will restore | |
178 | * from the initial config space saved when the EEH | |
179 | * device is created. | |
180 | */ | |
181 | if (edev->pe && (edev->pe->state & EEH_PE_CFG_RESTRICTED)) | |
182 | return NULL; | |
183 | ||
5cfb20b9 GS |
184 | pdev = eeh_dev_to_pci_dev(edev); |
185 | if (!pdev) | |
186 | return NULL; | |
187 | ||
188 | pci_save_state(pdev); | |
189 | return NULL; | |
190 | } | |
191 | ||
cb5b5624 | 192 | /** |
29f8bf1b | 193 | * eeh_report_error - Report pci error to each device driver |
9b3c76f0 | 194 | * @data: eeh device |
29f8bf1b | 195 | * @userdata: return value |
a84f273c GS |
196 | * |
197 | * Report an EEH error to each device driver, collect up and | |
198 | * merge the device driver responses. Cumulative response | |
cb5b5624 | 199 | * passed back in "userdata". |
77bd7415 | 200 | */ |
9b3c76f0 | 201 | static void *eeh_report_error(void *data, void *userdata) |
77bd7415 | 202 | { |
9b3c76f0 GS |
203 | struct eeh_dev *edev = (struct eeh_dev *)data; |
204 | struct pci_dev *dev = eeh_dev_to_pci_dev(edev); | |
18eb3b39 | 205 | enum pci_ers_result rc, *res = userdata; |
feadf7c0 | 206 | struct pci_driver *driver; |
77bd7415 | 207 | |
2311cca5 | 208 | if (!dev || eeh_dev_removed(edev) || eeh_pe_passed(edev->pe)) |
d2b0f6f7 | 209 | return NULL; |
64f7a122 MN |
210 | |
211 | device_lock(&dev->dev); | |
77bd7415 LV |
212 | dev->error_state = pci_channel_io_frozen; |
213 | ||
feadf7c0 | 214 | driver = eeh_pcid_get(dev); |
64f7a122 | 215 | if (!driver) goto out_no_dev; |
77bd7415 | 216 | |
8535ef05 MM |
217 | eeh_disable_irq(dev); |
218 | ||
6a1ca373 | 219 | if (!driver->err_handler || |
64f7a122 MN |
220 | !driver->err_handler->error_detected) |
221 | goto out; | |
77bd7415 | 222 | |
29f8bf1b | 223 | rc = driver->err_handler->error_detected(dev, pci_channel_io_frozen); |
2a50f144 LV |
224 | |
225 | /* A driver that needs a reset trumps all others */ | |
226 | if (rc == PCI_ERS_RESULT_NEED_RESET) *res = rc; | |
18eb3b39 | 227 | if (*res == PCI_ERS_RESULT_NONE) *res = rc; |
70298c6e | 228 | |
67086e32 | 229 | edev->in_error = true; |
64f7a122 | 230 | out: |
feadf7c0 | 231 | eeh_pcid_put(dev); |
64f7a122 MN |
232 | out_no_dev: |
233 | device_unlock(&dev->dev); | |
9b3c76f0 | 234 | return NULL; |
6a1ca373 LV |
235 | } |
236 | ||
237 | /** | |
29f8bf1b | 238 | * eeh_report_mmio_enabled - Tell drivers that MMIO has been enabled |
9b3c76f0 | 239 | * @data: eeh device |
29f8bf1b | 240 | * @userdata: return value |
6a1ca373 | 241 | * |
638799b3 LV |
242 | * Tells each device driver that IO ports, MMIO and config space I/O |
243 | * are now enabled. Collects up and merges the device driver responses. | |
244 | * Cumulative response passed back in "userdata". | |
6a1ca373 | 245 | */ |
9b3c76f0 | 246 | static void *eeh_report_mmio_enabled(void *data, void *userdata) |
6a1ca373 | 247 | { |
9b3c76f0 GS |
248 | struct eeh_dev *edev = (struct eeh_dev *)data; |
249 | struct pci_dev *dev = eeh_dev_to_pci_dev(edev); | |
6a1ca373 | 250 | enum pci_ers_result rc, *res = userdata; |
9b3c76f0 | 251 | struct pci_driver *driver; |
6a1ca373 | 252 | |
2311cca5 | 253 | if (!dev || eeh_dev_removed(edev) || eeh_pe_passed(edev->pe)) |
d2b0f6f7 GS |
254 | return NULL; |
255 | ||
64f7a122 | 256 | device_lock(&dev->dev); |
feadf7c0 | 257 | driver = eeh_pcid_get(dev); |
64f7a122 | 258 | if (!driver) goto out_no_dev; |
9b3c76f0 | 259 | |
feadf7c0 | 260 | if (!driver->err_handler || |
f26c7a03 | 261 | !driver->err_handler->mmio_enabled || |
64f7a122 MN |
262 | (edev->mode & EEH_DEV_NO_HANDLER)) |
263 | goto out; | |
6a1ca373 | 264 | |
29f8bf1b | 265 | rc = driver->err_handler->mmio_enabled(dev); |
2a50f144 LV |
266 | |
267 | /* A driver that needs a reset trumps all others */ | |
268 | if (rc == PCI_ERS_RESULT_NEED_RESET) *res = rc; | |
6a1ca373 | 269 | if (*res == PCI_ERS_RESULT_NONE) *res = rc; |
70298c6e | 270 | |
64f7a122 | 271 | out: |
feadf7c0 | 272 | eeh_pcid_put(dev); |
64f7a122 MN |
273 | out_no_dev: |
274 | device_unlock(&dev->dev); | |
9b3c76f0 | 275 | return NULL; |
77bd7415 LV |
276 | } |
277 | ||
cb5b5624 | 278 | /** |
29f8bf1b | 279 | * eeh_report_reset - Tell device that slot has been reset |
9b3c76f0 | 280 | * @data: eeh device |
29f8bf1b GS |
281 | * @userdata: return value |
282 | * | |
283 | * This routine must be called while EEH tries to reset particular | |
284 | * PCI device so that the associated PCI device driver could take | |
285 | * some actions, usually to save data the driver needs so that the | |
286 | * driver can work again while the device is recovered. | |
77bd7415 | 287 | */ |
9b3c76f0 | 288 | static void *eeh_report_reset(void *data, void *userdata) |
77bd7415 | 289 | { |
9b3c76f0 GS |
290 | struct eeh_dev *edev = (struct eeh_dev *)data; |
291 | struct pci_dev *dev = eeh_dev_to_pci_dev(edev); | |
6a1ca373 | 292 | enum pci_ers_result rc, *res = userdata; |
9b3c76f0 | 293 | struct pci_driver *driver; |
77bd7415 | 294 | |
2311cca5 | 295 | if (!dev || eeh_dev_removed(edev) || eeh_pe_passed(edev->pe)) |
d2b0f6f7 | 296 | return NULL; |
64f7a122 MN |
297 | |
298 | device_lock(&dev->dev); | |
c58dc575 MM |
299 | dev->error_state = pci_channel_io_normal; |
300 | ||
feadf7c0 | 301 | driver = eeh_pcid_get(dev); |
64f7a122 | 302 | if (!driver) goto out_no_dev; |
feadf7c0 | 303 | |
8535ef05 MM |
304 | eeh_enable_irq(dev); |
305 | ||
6a1ca373 | 306 | if (!driver->err_handler || |
f26c7a03 | 307 | !driver->err_handler->slot_reset || |
67086e32 | 308 | (edev->mode & EEH_DEV_NO_HANDLER) || |
64f7a122 MN |
309 | (!edev->in_error)) |
310 | goto out; | |
77bd7415 | 311 | |
6a1ca373 | 312 | rc = driver->err_handler->slot_reset(dev); |
5794dbcb LV |
313 | if ((*res == PCI_ERS_RESULT_NONE) || |
314 | (*res == PCI_ERS_RESULT_RECOVERED)) *res = rc; | |
6a1ca373 LV |
315 | if (*res == PCI_ERS_RESULT_DISCONNECT && |
316 | rc == PCI_ERS_RESULT_NEED_RESET) *res = rc; | |
70298c6e | 317 | |
64f7a122 | 318 | out: |
feadf7c0 | 319 | eeh_pcid_put(dev); |
64f7a122 MN |
320 | out_no_dev: |
321 | device_unlock(&dev->dev); | |
9b3c76f0 | 322 | return NULL; |
77bd7415 LV |
323 | } |
324 | ||
5cfb20b9 GS |
325 | static void *eeh_dev_restore_state(void *data, void *userdata) |
326 | { | |
327 | struct eeh_dev *edev = data; | |
328 | struct pci_dev *pdev; | |
329 | ||
330 | if (!edev) | |
331 | return NULL; | |
332 | ||
5a0cdbfd GS |
333 | /* |
334 | * The content in the config space isn't saved because | |
335 | * the blocked config space on some adapters. We have | |
336 | * to restore the initial saved config space when the | |
337 | * EEH device is created. | |
338 | */ | |
339 | if (edev->pe && (edev->pe->state & EEH_PE_CFG_RESTRICTED)) { | |
340 | if (list_is_last(&edev->list, &edev->pe->edevs)) | |
341 | eeh_pe_restore_bars(edev->pe); | |
342 | ||
343 | return NULL; | |
344 | } | |
345 | ||
5cfb20b9 GS |
346 | pdev = eeh_dev_to_pci_dev(edev); |
347 | if (!pdev) | |
348 | return NULL; | |
349 | ||
350 | pci_restore_state(pdev); | |
351 | return NULL; | |
352 | } | |
353 | ||
cb5b5624 | 354 | /** |
29f8bf1b | 355 | * eeh_report_resume - Tell device to resume normal operations |
9b3c76f0 | 356 | * @data: eeh device |
29f8bf1b GS |
357 | * @userdata: return value |
358 | * | |
359 | * This routine must be called to notify the device driver that it | |
360 | * could resume so that the device driver can do some initialization | |
361 | * to make the recovered device work again. | |
cb5b5624 | 362 | */ |
9b3c76f0 | 363 | static void *eeh_report_resume(void *data, void *userdata) |
77bd7415 | 364 | { |
9b3c76f0 GS |
365 | struct eeh_dev *edev = (struct eeh_dev *)data; |
366 | struct pci_dev *dev = eeh_dev_to_pci_dev(edev); | |
67086e32 | 367 | bool was_in_error; |
9b3c76f0 GS |
368 | struct pci_driver *driver; |
369 | ||
2311cca5 | 370 | if (!dev || eeh_dev_removed(edev) || eeh_pe_passed(edev->pe)) |
d2b0f6f7 | 371 | return NULL; |
64f7a122 MN |
372 | |
373 | device_lock(&dev->dev); | |
77bd7415 LV |
374 | dev->error_state = pci_channel_io_normal; |
375 | ||
feadf7c0 | 376 | driver = eeh_pcid_get(dev); |
64f7a122 | 377 | if (!driver) goto out_no_dev; |
d0e70341 | 378 | |
67086e32 WY |
379 | was_in_error = edev->in_error; |
380 | edev->in_error = false; | |
8535ef05 MM |
381 | eeh_enable_irq(dev); |
382 | ||
d0e70341 | 383 | if (!driver->err_handler || |
f26c7a03 | 384 | !driver->err_handler->resume || |
67086e32 | 385 | (edev->mode & EEH_DEV_NO_HANDLER) || !was_in_error) { |
f26c7a03 | 386 | edev->mode &= ~EEH_DEV_NO_HANDLER; |
64f7a122 | 387 | goto out; |
feadf7c0 | 388 | } |
77bd7415 LV |
389 | |
390 | driver->err_handler->resume(dev); | |
70298c6e | 391 | |
64f7a122 | 392 | out: |
feadf7c0 | 393 | eeh_pcid_put(dev); |
64f7a122 MN |
394 | out_no_dev: |
395 | device_unlock(&dev->dev); | |
9b3c76f0 | 396 | return NULL; |
77bd7415 LV |
397 | } |
398 | ||
cb5b5624 | 399 | /** |
29f8bf1b | 400 | * eeh_report_failure - Tell device driver that device is dead. |
9b3c76f0 | 401 | * @data: eeh device |
29f8bf1b | 402 | * @userdata: return value |
cb5b5624 LV |
403 | * |
404 | * This informs the device driver that the device is permanently | |
405 | * dead, and that no further recovery attempts will be made on it. | |
406 | */ | |
9b3c76f0 | 407 | static void *eeh_report_failure(void *data, void *userdata) |
77bd7415 | 408 | { |
9b3c76f0 GS |
409 | struct eeh_dev *edev = (struct eeh_dev *)data; |
410 | struct pci_dev *dev = eeh_dev_to_pci_dev(edev); | |
411 | struct pci_driver *driver; | |
412 | ||
2311cca5 | 413 | if (!dev || eeh_dev_removed(edev) || eeh_pe_passed(edev->pe)) |
d2b0f6f7 | 414 | return NULL; |
64f7a122 MN |
415 | |
416 | device_lock(&dev->dev); | |
77bd7415 LV |
417 | dev->error_state = pci_channel_io_perm_failure; |
418 | ||
feadf7c0 | 419 | driver = eeh_pcid_get(dev); |
64f7a122 | 420 | if (!driver) goto out_no_dev; |
77bd7415 | 421 | |
8535ef05 MM |
422 | eeh_disable_irq(dev); |
423 | ||
424 | if (!driver->err_handler || | |
64f7a122 MN |
425 | !driver->err_handler->error_detected) |
426 | goto out; | |
8535ef05 | 427 | |
77bd7415 | 428 | driver->err_handler->error_detected(dev, pci_channel_io_perm_failure); |
70298c6e | 429 | |
64f7a122 | 430 | out: |
feadf7c0 | 431 | eeh_pcid_put(dev); |
64f7a122 MN |
432 | out_no_dev: |
433 | device_unlock(&dev->dev); | |
9b3c76f0 | 434 | return NULL; |
77bd7415 LV |
435 | } |
436 | ||
67086e32 WY |
437 | static void *eeh_add_virt_device(void *data, void *userdata) |
438 | { | |
439 | struct pci_driver *driver; | |
440 | struct eeh_dev *edev = (struct eeh_dev *)data; | |
441 | struct pci_dev *dev = eeh_dev_to_pci_dev(edev); | |
442 | struct pci_dn *pdn = eeh_dev_to_pdn(edev); | |
443 | ||
444 | if (!(edev->physfn)) { | |
445 | pr_warn("%s: EEH dev %04x:%02x:%02x.%01x not for VF\n", | |
69672bd7 | 446 | __func__, pdn->phb->global_number, pdn->busno, |
67086e32 WY |
447 | PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn)); |
448 | return NULL; | |
449 | } | |
450 | ||
451 | driver = eeh_pcid_get(dev); | |
452 | if (driver) { | |
453 | eeh_pcid_put(dev); | |
454 | if (driver->err_handler) | |
455 | return NULL; | |
456 | } | |
457 | ||
458 | #ifdef CONFIG_PPC_POWERNV | |
753f6124 | 459 | pci_iov_add_virtfn(edev->physfn, pdn->vf_index); |
67086e32 WY |
460 | #endif |
461 | return NULL; | |
462 | } | |
463 | ||
f5c57710 GS |
464 | static void *eeh_rmv_device(void *data, void *userdata) |
465 | { | |
466 | struct pci_driver *driver; | |
467 | struct eeh_dev *edev = (struct eeh_dev *)data; | |
468 | struct pci_dev *dev = eeh_dev_to_pci_dev(edev); | |
67086e32 WY |
469 | struct eeh_rmv_data *rmv_data = (struct eeh_rmv_data *)userdata; |
470 | int *removed = rmv_data ? &rmv_data->removed : NULL; | |
f5c57710 GS |
471 | |
472 | /* | |
473 | * Actually, we should remove the PCI bridges as well. | |
474 | * However, that's lots of complexity to do that, | |
475 | * particularly some of devices under the bridge might | |
476 | * support EEH. So we just care about PCI devices for | |
477 | * simplicity here. | |
478 | */ | |
93de6901 | 479 | if (!dev || (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE)) |
f5c57710 | 480 | return NULL; |
8cc6b6cd | 481 | |
d2b0f6f7 GS |
482 | /* |
483 | * We rely on count-based pcibios_release_device() to | |
484 | * detach permanently offlined PEs. Unfortunately, that's | |
485 | * not reliable enough. We might have the permanently | |
486 | * offlined PEs attached, but we needn't take care of | |
487 | * them and their child devices. | |
488 | */ | |
489 | if (eeh_dev_removed(edev)) | |
490 | return NULL; | |
491 | ||
f5c57710 | 492 | driver = eeh_pcid_get(dev); |
8cc6b6cd TLSC |
493 | if (driver) { |
494 | eeh_pcid_put(dev); | |
3fa7bf72 GS |
495 | if (removed && |
496 | eeh_pe_passed(edev->pe)) | |
497 | return NULL; | |
67086e32 WY |
498 | if (removed && |
499 | driver->err_handler && | |
f2da4ccf | 500 | driver->err_handler->error_detected && |
f6bf0fa1 | 501 | driver->err_handler->slot_reset) |
8cc6b6cd TLSC |
502 | return NULL; |
503 | } | |
f5c57710 GS |
504 | |
505 | /* Remove it from PCI subsystem */ | |
506 | pr_debug("EEH: Removing %s without EEH sensitive driver\n", | |
507 | pci_name(dev)); | |
508 | edev->bus = dev->bus; | |
509 | edev->mode |= EEH_DEV_DISCONNECTED; | |
67086e32 WY |
510 | if (removed) |
511 | (*removed)++; | |
f5c57710 | 512 | |
67086e32 WY |
513 | if (edev->physfn) { |
514 | #ifdef CONFIG_PPC_POWERNV | |
515 | struct pci_dn *pdn = eeh_dev_to_pdn(edev); | |
516 | ||
753f6124 | 517 | pci_iov_remove_virtfn(edev->physfn, pdn->vf_index); |
67086e32 WY |
518 | edev->pdev = NULL; |
519 | ||
520 | /* | |
521 | * We have to set the VF PE number to invalid one, which is | |
522 | * required to plug the VF successfully. | |
523 | */ | |
524 | pdn->pe_number = IODA_INVALID_PE; | |
525 | #endif | |
526 | if (rmv_data) | |
527 | list_add(&edev->rmv_list, &rmv_data->edev_list); | |
528 | } else { | |
529 | pci_lock_rescan_remove(); | |
530 | pci_stop_and_remove_bus_device(dev); | |
531 | pci_unlock_rescan_remove(); | |
532 | } | |
f5c57710 GS |
533 | |
534 | return NULL; | |
535 | } | |
536 | ||
537 | static void *eeh_pe_detach_dev(void *data, void *userdata) | |
538 | { | |
539 | struct eeh_pe *pe = (struct eeh_pe *)data; | |
540 | struct eeh_dev *edev, *tmp; | |
541 | ||
542 | eeh_pe_for_each_dev(pe, edev, tmp) { | |
543 | if (!(edev->mode & EEH_DEV_DISCONNECTED)) | |
544 | continue; | |
545 | ||
546 | edev->mode &= ~(EEH_DEV_DISCONNECTED | EEH_DEV_IRQ_DISABLED); | |
547 | eeh_rmv_from_parent_pe(edev); | |
548 | } | |
549 | ||
550 | return NULL; | |
551 | } | |
552 | ||
78954700 GS |
553 | /* |
554 | * Explicitly clear PE's frozen state for PowerNV where | |
555 | * we have frozen PE until BAR restore is completed. It's | |
556 | * harmless to clear it for pSeries. To be consistent with | |
557 | * PE reset (for 3 times), we try to clear the frozen state | |
558 | * for 3 times as well. | |
559 | */ | |
2c665992 | 560 | static void *__eeh_clear_pe_frozen_state(void *data, void *flag) |
78954700 | 561 | { |
2c665992 | 562 | struct eeh_pe *pe = (struct eeh_pe *)data; |
f05fea5b | 563 | bool clear_sw_state = *(bool *)flag; |
c9dd0143 | 564 | int i, rc = 1; |
78954700 | 565 | |
c9dd0143 | 566 | for (i = 0; rc && i < 3; i++) |
5cfb20b9 | 567 | rc = eeh_unfreeze_pe(pe, clear_sw_state); |
78954700 | 568 | |
c9dd0143 | 569 | /* Stop immediately on any errors */ |
2c665992 | 570 | if (rc) { |
c9dd0143 GS |
571 | pr_warn("%s: Failure %d unfreezing PHB#%x-PE#%x\n", |
572 | __func__, rc, pe->phb->global_number, pe->addr); | |
2c665992 GS |
573 | return (void *)pe; |
574 | } | |
575 | ||
576 | return NULL; | |
577 | } | |
578 | ||
5cfb20b9 GS |
579 | static int eeh_clear_pe_frozen_state(struct eeh_pe *pe, |
580 | bool clear_sw_state) | |
2c665992 GS |
581 | { |
582 | void *rc; | |
583 | ||
5cfb20b9 | 584 | rc = eeh_pe_traverse(pe, __eeh_clear_pe_frozen_state, &clear_sw_state); |
2c665992 | 585 | if (!rc) |
78954700 GS |
586 | eeh_pe_state_clear(pe, EEH_PE_ISOLATED); |
587 | ||
2c665992 | 588 | return rc ? -EIO : 0; |
78954700 GS |
589 | } |
590 | ||
5cfb20b9 GS |
591 | int eeh_pe_reset_and_recover(struct eeh_pe *pe) |
592 | { | |
2efc771f | 593 | int ret; |
5cfb20b9 GS |
594 | |
595 | /* Bail if the PE is being recovered */ | |
596 | if (pe->state & EEH_PE_RECOVERING) | |
597 | return 0; | |
598 | ||
599 | /* Put the PE into recovery mode */ | |
600 | eeh_pe_state_mark(pe, EEH_PE_RECOVERING); | |
601 | ||
602 | /* Save states */ | |
603 | eeh_pe_dev_traverse(pe, eeh_dev_save_state, NULL); | |
604 | ||
5cfb20b9 | 605 | /* Issue reset */ |
6654c936 | 606 | ret = eeh_pe_reset_full(pe); |
5cfb20b9 | 607 | if (ret) { |
28bf36f9 | 608 | eeh_pe_state_clear(pe, EEH_PE_RECOVERING); |
5cfb20b9 GS |
609 | return ret; |
610 | } | |
5cfb20b9 GS |
611 | |
612 | /* Unfreeze the PE */ | |
613 | ret = eeh_clear_pe_frozen_state(pe, true); | |
614 | if (ret) { | |
615 | eeh_pe_state_clear(pe, EEH_PE_RECOVERING); | |
616 | return ret; | |
617 | } | |
618 | ||
5cfb20b9 GS |
619 | /* Restore device state */ |
620 | eeh_pe_dev_traverse(pe, eeh_dev_restore_state, NULL); | |
621 | ||
5cfb20b9 GS |
622 | /* Clear recovery mode */ |
623 | eeh_pe_state_clear(pe, EEH_PE_RECOVERING); | |
624 | ||
625 | return 0; | |
626 | } | |
627 | ||
77bd7415 | 628 | /** |
29f8bf1b | 629 | * eeh_reset_device - Perform actual reset of a pci slot |
9b3c76f0 | 630 | * @pe: EEH PE |
29f8bf1b | 631 | * @bus: PCI bus corresponding to the isolcated slot |
77bd7415 | 632 | * |
29f8bf1b GS |
633 | * This routine must be called to do reset on the indicated PE. |
634 | * During the reset, udev might be invoked because those affected | |
635 | * PCI devices will be removed and then added. | |
77bd7415 | 636 | */ |
67086e32 WY |
637 | static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus, |
638 | struct eeh_rmv_data *rmv_data) | |
77bd7415 | 639 | { |
f5c57710 | 640 | struct pci_bus *frozen_bus = eeh_pe_bus_get(pe); |
edfd17ff | 641 | time64_t tstamp; |
67086e32 WY |
642 | int cnt, rc; |
643 | struct eeh_dev *edev; | |
42405456 LV |
644 | |
645 | /* pcibios will clear the counter; save the value */ | |
9b3c76f0 | 646 | cnt = pe->freeze_count; |
5a71978e | 647 | tstamp = pe->tstamp; |
42405456 | 648 | |
20ee6a97 GS |
649 | /* |
650 | * We don't remove the corresponding PE instances because | |
651 | * we need the information afterwords. The attached EEH | |
652 | * devices are expected to be attached soon when calling | |
bd251b89 | 653 | * into pci_hp_add_devices(). |
20ee6a97 | 654 | */ |
f5c57710 | 655 | eeh_pe_state_mark(pe, EEH_PE_KEEP); |
1c2042c8 | 656 | if (bus) { |
67086e32 WY |
657 | if (pe->type & EEH_PE_VF) { |
658 | eeh_pe_dev_traverse(pe, eeh_rmv_device, NULL); | |
659 | } else { | |
67086e32 | 660 | pci_lock_rescan_remove(); |
bd251b89 | 661 | pci_hp_remove_devices(bus); |
67086e32 WY |
662 | pci_unlock_rescan_remove(); |
663 | } | |
1c2042c8 | 664 | } else if (frozen_bus) { |
cca0e542 | 665 | eeh_pe_dev_traverse(pe, eeh_rmv_device, rmv_data); |
1c2042c8 | 666 | } |
77bd7415 | 667 | |
d0914f50 GS |
668 | /* |
669 | * Reset the pci controller. (Asserts RST#; resets config space). | |
b6495c0c | 670 | * Reconfigure bridges and devices. Don't try to bring the system |
29f8bf1b | 671 | * up if the reset failed for some reason. |
d0914f50 GS |
672 | * |
673 | * During the reset, it's very dangerous to have uncontrolled PCI | |
674 | * config accesses. So we prefer to block them. However, controlled | |
675 | * PCI config accesses initiated from EEH itself are allowed. | |
29f8bf1b | 676 | */ |
6654c936 | 677 | rc = eeh_pe_reset_full(pe); |
28bf36f9 | 678 | if (rc) |
b6495c0c | 679 | return rc; |
77bd7415 | 680 | |
1c2042c8 RW |
681 | pci_lock_rescan_remove(); |
682 | ||
9b3c76f0 GS |
683 | /* Restore PE */ |
684 | eeh_ops->configure_bridge(pe); | |
685 | eeh_pe_restore_bars(pe); | |
77bd7415 | 686 | |
dc9c41bd AD |
687 | /* Clear frozen state */ |
688 | rc = eeh_clear_pe_frozen_state(pe, false); | |
409bf7f8 AD |
689 | if (rc) { |
690 | pci_unlock_rescan_remove(); | |
dc9c41bd | 691 | return rc; |
409bf7f8 | 692 | } |
78954700 | 693 | |
77bd7415 | 694 | /* Give the system 5 seconds to finish running the user-space |
a84f273c GS |
695 | * hotplug shutdown scripts, e.g. ifdown for ethernet. Yes, |
696 | * this is a hack, but if we don't do this, and try to bring | |
697 | * the device up before the scripts have taken it down, | |
77bd7415 LV |
698 | * potentially weird things happen. |
699 | */ | |
700 | if (bus) { | |
f5c57710 | 701 | pr_info("EEH: Sleep 5s ahead of complete hotplug\n"); |
29f8bf1b | 702 | ssleep(5); |
f5c57710 GS |
703 | |
704 | /* | |
705 | * The EEH device is still connected with its parent | |
706 | * PE. We should disconnect it so the binding can be | |
707 | * rebuilt when adding PCI devices. | |
708 | */ | |
67086e32 | 709 | edev = list_first_entry(&pe->edevs, struct eeh_dev, list); |
f5c57710 | 710 | eeh_pe_traverse(pe, eeh_pe_detach_dev, NULL); |
a3aa256b | 711 | if (pe->type & EEH_PE_VF) { |
67086e32 | 712 | eeh_add_virt_device(edev, NULL); |
a3aa256b GS |
713 | } else { |
714 | eeh_pe_state_clear(pe, EEH_PE_PRI_BUS); | |
bd251b89 | 715 | pci_hp_add_devices(bus); |
a3aa256b | 716 | } |
67086e32 | 717 | } else if (frozen_bus && rmv_data->removed) { |
f5c57710 GS |
718 | pr_info("EEH: Sleep 5s ahead of partial hotplug\n"); |
719 | ssleep(5); | |
720 | ||
67086e32 | 721 | edev = list_first_entry(&pe->edevs, struct eeh_dev, list); |
f5c57710 | 722 | eeh_pe_traverse(pe, eeh_pe_detach_dev, NULL); |
67086e32 WY |
723 | if (pe->type & EEH_PE_VF) |
724 | eeh_add_virt_device(edev, NULL); | |
725 | else | |
bd251b89 | 726 | pci_hp_add_devices(frozen_bus); |
77bd7415 | 727 | } |
f5c57710 | 728 | eeh_pe_state_clear(pe, EEH_PE_KEEP); |
5a71978e GS |
729 | |
730 | pe->tstamp = tstamp; | |
9b3c76f0 | 731 | pe->freeze_count = cnt; |
b6495c0c | 732 | |
1c2042c8 | 733 | pci_unlock_rescan_remove(); |
b6495c0c | 734 | return 0; |
77bd7415 LV |
735 | } |
736 | ||
737 | /* The longest amount of time to wait for a pci device | |
738 | * to come back on line, in seconds. | |
739 | */ | |
fb48dc22 | 740 | #define MAX_WAIT_FOR_RECOVERY 300 |
77bd7415 | 741 | |
c0b64978 RC |
742 | /** |
743 | * eeh_handle_normal_event - Handle EEH events on a specific PE | |
744 | * @pe: EEH PE | |
745 | * | |
746 | * Attempts to recover the given PE. If recovery fails or the PE has failed | |
747 | * too many times, remove the PE. | |
748 | * | |
749 | * Returns true if @pe should no longer be used, else false. | |
750 | */ | |
daeba295 | 751 | static bool eeh_handle_normal_event(struct eeh_pe *pe) |
77bd7415 | 752 | { |
77bd7415 | 753 | struct pci_bus *frozen_bus; |
67086e32 | 754 | struct eeh_dev *edev, *tmp; |
b6495c0c | 755 | int rc = 0; |
18eb3b39 | 756 | enum pci_ers_result result = PCI_ERS_RESULT_NONE; |
67086e32 | 757 | struct eeh_rmv_data rmv_data = {LIST_HEAD_INIT(rmv_data.edev_list), 0}; |
77bd7415 | 758 | |
9b3c76f0 | 759 | frozen_bus = eeh_pe_bus_get(pe); |
77bd7415 | 760 | if (!frozen_bus) { |
1f52f176 | 761 | pr_err("%s: Cannot find PCI bus for PHB#%x-PE#%x\n", |
9b3c76f0 | 762 | __func__, pe->phb->global_number, pe->addr); |
daeba295 | 763 | return false; |
77bd7415 LV |
764 | } |
765 | ||
5a71978e | 766 | eeh_pe_update_time_stamp(pe); |
9b3c76f0 | 767 | pe->freeze_count++; |
c0b64978 RC |
768 | if (pe->freeze_count > eeh_max_freezes) { |
769 | pr_err("EEH: PHB#%x-PE#%x has failed %d times in the\n" | |
770 | "last hour and has been permanently disabled.\n", | |
771 | pe->phb->global_number, pe->addr, | |
772 | pe->freeze_count); | |
773 | goto hard_fail; | |
774 | } | |
0dae2743 | 775 | pr_warn("EEH: This PCI device has failed %d times in the last hour\n", |
9b3c76f0 | 776 | pe->freeze_count); |
77bd7415 LV |
777 | |
778 | /* Walk the various device drivers attached to this slot through | |
779 | * a reset sequence, giving each an opportunity to do what it needs | |
780 | * to accomplish the reset. Each child gets a report of the | |
781 | * status ... if any child can't handle the reset, then the entire | |
782 | * slot is dlpar removed and added. | |
8234fced GS |
783 | * |
784 | * When the PHB is fenced, we have to issue a reset to recover from | |
785 | * the error. Override the result if necessary to have partially | |
786 | * hotplug for this case. | |
77bd7415 | 787 | */ |
56ca4fde | 788 | pr_info("EEH: Notify device drivers to shutdown\n"); |
9b3c76f0 | 789 | eeh_pe_dev_traverse(pe, eeh_report_error, &result); |
8234fced GS |
790 | if ((pe->type & EEH_PE_PHB) && |
791 | result != PCI_ERS_RESULT_NONE && | |
792 | result != PCI_ERS_RESULT_NEED_RESET) | |
793 | result = PCI_ERS_RESULT_NEED_RESET; | |
77bd7415 | 794 | |
5f1a7c81 | 795 | /* Get the current PCI slot state. This can take a long time, |
2ac3990c | 796 | * sometimes over 300 seconds for certain systems. |
29f8bf1b | 797 | */ |
9b3c76f0 | 798 | rc = eeh_ops->wait_state(pe, MAX_WAIT_FOR_RECOVERY*1000); |
eb594a47 | 799 | if (rc < 0 || rc == EEH_STATE_NOT_SUPPORT) { |
0dae2743 | 800 | pr_warn("EEH: Permanent failure\n"); |
5f1a7c81 LV |
801 | goto hard_fail; |
802 | } | |
803 | ||
ede8ca26 LV |
804 | /* Since rtas may enable MMIO when posting the error log, |
805 | * don't post the error log until after all dev drivers | |
17213c3b LV |
806 | * have been informed. |
807 | */ | |
56ca4fde | 808 | pr_info("EEH: Collect temporary log\n"); |
9b3c76f0 | 809 | eeh_slot_error_detail(pe, EEH_LOG_TEMP); |
ede8ca26 | 810 | |
77bd7415 LV |
811 | /* If all device drivers were EEH-unaware, then shut |
812 | * down all of the device drivers, and hope they | |
813 | * go down willingly, without panicing the system. | |
814 | */ | |
18eb3b39 | 815 | if (result == PCI_ERS_RESULT_NONE) { |
56ca4fde | 816 | pr_info("EEH: Reset with hotplug activity\n"); |
67086e32 | 817 | rc = eeh_reset_device(pe, frozen_bus, NULL); |
e0f90b64 | 818 | if (rc) { |
0dae2743 GS |
819 | pr_warn("%s: Unable to reset, err=%d\n", |
820 | __func__, rc); | |
b6495c0c | 821 | goto hard_fail; |
e0f90b64 | 822 | } |
77bd7415 LV |
823 | } |
824 | ||
6a1ca373 LV |
825 | /* If all devices reported they can proceed, then re-enable MMIO */ |
826 | if (result == PCI_ERS_RESULT_CAN_RECOVER) { | |
56ca4fde | 827 | pr_info("EEH: Enable I/O for affected devices\n"); |
9b3c76f0 | 828 | rc = eeh_pci_enable(pe, EEH_OPT_THAW_MMIO); |
6a1ca373 | 829 | |
fa1be476 LV |
830 | if (rc < 0) |
831 | goto hard_fail; | |
6a1ca373 LV |
832 | if (rc) { |
833 | result = PCI_ERS_RESULT_NEED_RESET; | |
834 | } else { | |
56ca4fde | 835 | pr_info("EEH: Notify device drivers to resume I/O\n"); |
9b3c76f0 | 836 | eeh_pe_dev_traverse(pe, eeh_report_mmio_enabled, &result); |
6a1ca373 | 837 | } |
77bd7415 LV |
838 | } |
839 | ||
6a1ca373 | 840 | /* If all devices reported they can proceed, then re-enable DMA */ |
18eb3b39 | 841 | if (result == PCI_ERS_RESULT_CAN_RECOVER) { |
56ca4fde | 842 | pr_info("EEH: Enabled DMA for affected devices\n"); |
9b3c76f0 | 843 | rc = eeh_pci_enable(pe, EEH_OPT_THAW_DMA); |
6a1ca373 | 844 | |
fa1be476 LV |
845 | if (rc < 0) |
846 | goto hard_fail; | |
35845a78 | 847 | if (rc) { |
6a1ca373 | 848 | result = PCI_ERS_RESULT_NEED_RESET; |
35845a78 GS |
849 | } else { |
850 | /* | |
851 | * We didn't do PE reset for the case. The PE | |
852 | * is still in frozen state. Clear it before | |
853 | * resuming the PE. | |
854 | */ | |
855 | eeh_pe_state_clear(pe, EEH_PE_ISOLATED); | |
d0e70341 | 856 | result = PCI_ERS_RESULT_RECOVERED; |
35845a78 | 857 | } |
6a1ca373 LV |
858 | } |
859 | ||
860 | /* If any device has a hard failure, then shut off everything. */ | |
e0f90b64 | 861 | if (result == PCI_ERS_RESULT_DISCONNECT) { |
0dae2743 | 862 | pr_warn("EEH: Device driver gave up\n"); |
6a1ca373 | 863 | goto hard_fail; |
e0f90b64 | 864 | } |
6a1ca373 LV |
865 | |
866 | /* If any device called out for a reset, then reset the slot */ | |
867 | if (result == PCI_ERS_RESULT_NEED_RESET) { | |
56ca4fde | 868 | pr_info("EEH: Reset without hotplug activity\n"); |
67086e32 | 869 | rc = eeh_reset_device(pe, NULL, &rmv_data); |
e0f90b64 | 870 | if (rc) { |
0dae2743 GS |
871 | pr_warn("%s: Cannot reset, err=%d\n", |
872 | __func__, rc); | |
b6495c0c | 873 | goto hard_fail; |
e0f90b64 | 874 | } |
56ca4fde GS |
875 | |
876 | pr_info("EEH: Notify device drivers " | |
877 | "the completion of reset\n"); | |
6a1ca373 | 878 | result = PCI_ERS_RESULT_NONE; |
9b3c76f0 | 879 | eeh_pe_dev_traverse(pe, eeh_report_reset, &result); |
77bd7415 LV |
880 | } |
881 | ||
6a1ca373 | 882 | /* All devices should claim they have recovered by now. */ |
90fdd613 LV |
883 | if ((result != PCI_ERS_RESULT_RECOVERED) && |
884 | (result != PCI_ERS_RESULT_NONE)) { | |
0dae2743 | 885 | pr_warn("EEH: Not recovered\n"); |
6a1ca373 | 886 | goto hard_fail; |
e0f90b64 | 887 | } |
6a1ca373 | 888 | |
67086e32 WY |
889 | /* |
890 | * For those hot removed VFs, we should add back them after PF get | |
891 | * recovered properly. | |
892 | */ | |
893 | list_for_each_entry_safe(edev, tmp, &rmv_data.edev_list, rmv_list) { | |
894 | eeh_add_virt_device(edev, NULL); | |
895 | list_del(&edev->rmv_list); | |
896 | } | |
897 | ||
77bd7415 | 898 | /* Tell all device drivers that they can resume operations */ |
56ca4fde | 899 | pr_info("EEH: Notify device driver to resume\n"); |
9b3c76f0 | 900 | eeh_pe_dev_traverse(pe, eeh_report_resume, NULL); |
b6495c0c | 901 | |
daeba295 | 902 | return false; |
a84f273c | 903 | |
c0b64978 | 904 | hard_fail: |
b6495c0c LV |
905 | /* |
906 | * About 90% of all real-life EEH failures in the field | |
907 | * are due to poorly seated PCI cards. Only 10% or so are | |
908 | * due to actual, failed cards. | |
909 | */ | |
1f52f176 | 910 | pr_err("EEH: Unable to recover from failure from PHB#%x-PE#%x.\n" |
9b3c76f0 GS |
911 | "Please try reseating or replacing it\n", |
912 | pe->phb->global_number, pe->addr); | |
b6495c0c | 913 | |
9b3c76f0 | 914 | eeh_slot_error_detail(pe, EEH_LOG_PERM); |
b6495c0c LV |
915 | |
916 | /* Notify all devices that they're about to go down. */ | |
9b3c76f0 | 917 | eeh_pe_dev_traverse(pe, eeh_report_failure, NULL); |
b6495c0c | 918 | |
d2b0f6f7 | 919 | /* Mark the PE to be removed permanently */ |
432227e9 | 920 | eeh_pe_state_mark(pe, EEH_PE_REMOVED); |
d2b0f6f7 GS |
921 | |
922 | /* | |
923 | * Shut down the device drivers for good. We mark | |
924 | * all removed devices correctly to avoid access | |
925 | * the their PCI config any more. | |
926 | */ | |
1c2042c8 | 927 | if (frozen_bus) { |
67086e32 WY |
928 | if (pe->type & EEH_PE_VF) { |
929 | eeh_pe_dev_traverse(pe, eeh_rmv_device, NULL); | |
930 | eeh_pe_dev_mode_mark(pe, EEH_DEV_REMOVED); | |
931 | } else { | |
932 | eeh_pe_state_clear(pe, EEH_PE_PRI_BUS); | |
933 | eeh_pe_dev_mode_mark(pe, EEH_DEV_REMOVED); | |
d2b0f6f7 | 934 | |
67086e32 | 935 | pci_lock_rescan_remove(); |
bd251b89 | 936 | pci_hp_remove_devices(frozen_bus); |
67086e32 | 937 | pci_unlock_rescan_remove(); |
daeba295 RC |
938 | |
939 | /* The passed PE should no longer be used */ | |
940 | return true; | |
67086e32 | 941 | } |
1c2042c8 | 942 | } |
daeba295 | 943 | return false; |
77bd7415 | 944 | } |
8a6b1bc7 | 945 | |
c0b64978 RC |
946 | /** |
947 | * eeh_handle_special_event - Handle EEH events without a specific failing PE | |
948 | * | |
949 | * Called when an EEH event is detected but can't be narrowed down to a | |
950 | * specific PE. Iterates through possible failures and handles them as | |
951 | * necessary. | |
952 | */ | |
8a6b1bc7 GS |
953 | static void eeh_handle_special_event(void) |
954 | { | |
955 | struct eeh_pe *pe, *phb_pe; | |
956 | struct pci_bus *bus; | |
7e4e7867 | 957 | struct pci_controller *hose; |
8a6b1bc7 | 958 | unsigned long flags; |
7e4e7867 | 959 | int rc; |
8a6b1bc7 | 960 | |
8a6b1bc7 | 961 | |
7e4e7867 GS |
962 | do { |
963 | rc = eeh_ops->next_error(&pe); | |
964 | ||
965 | switch (rc) { | |
966 | case EEH_NEXT_ERR_DEAD_IOC: | |
967 | /* Mark all PHBs in dead state */ | |
968 | eeh_serialize_lock(&flags); | |
969 | ||
970 | /* Purge all events */ | |
5c7a35e3 | 971 | eeh_remove_event(NULL, true); |
7e4e7867 GS |
972 | |
973 | list_for_each_entry(hose, &hose_list, list_node) { | |
974 | phb_pe = eeh_phb_pe_get(hose); | |
975 | if (!phb_pe) continue; | |
976 | ||
9e049375 | 977 | eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED); |
7e4e7867 GS |
978 | } |
979 | ||
980 | eeh_serialize_unlock(flags); | |
981 | ||
982 | break; | |
983 | case EEH_NEXT_ERR_FROZEN_PE: | |
984 | case EEH_NEXT_ERR_FENCED_PHB: | |
985 | case EEH_NEXT_ERR_DEAD_PHB: | |
986 | /* Mark the PE in fenced state */ | |
987 | eeh_serialize_lock(&flags); | |
988 | ||
989 | /* Purge all events of the PHB */ | |
5c7a35e3 | 990 | eeh_remove_event(pe, true); |
7e4e7867 GS |
991 | |
992 | if (rc == EEH_NEXT_ERR_DEAD_PHB) | |
9e049375 | 993 | eeh_pe_state_mark(pe, EEH_PE_ISOLATED); |
7e4e7867 GS |
994 | else |
995 | eeh_pe_state_mark(pe, | |
996 | EEH_PE_ISOLATED | EEH_PE_RECOVERING); | |
997 | ||
998 | eeh_serialize_unlock(flags); | |
999 | ||
1000 | break; | |
1001 | case EEH_NEXT_ERR_NONE: | |
1002 | return; | |
1003 | default: | |
1004 | pr_warn("%s: Invalid value %d from next_error()\n", | |
1005 | __func__, rc); | |
1006 | return; | |
8a6b1bc7 | 1007 | } |
8a6b1bc7 | 1008 | |
7e4e7867 GS |
1009 | /* |
1010 | * For fenced PHB and frozen PE, it's handled as normal | |
1011 | * event. We have to remove the affected PHBs for dead | |
1012 | * PHB and IOC | |
1013 | */ | |
1014 | if (rc == EEH_NEXT_ERR_FROZEN_PE || | |
1015 | rc == EEH_NEXT_ERR_FENCED_PHB) { | |
daeba295 RC |
1016 | /* |
1017 | * eeh_handle_normal_event() can make the PE stale if it | |
1018 | * determines that the PE cannot possibly be recovered. | |
1019 | * Don't modify the PE state if that's the case. | |
1020 | */ | |
1021 | if (eeh_handle_normal_event(pe)) | |
1022 | continue; | |
1023 | ||
9e049375 | 1024 | eeh_pe_state_clear(pe, EEH_PE_RECOVERING); |
7e4e7867 | 1025 | } else { |
1b17366d | 1026 | pci_lock_rescan_remove(); |
7e4e7867 GS |
1027 | list_for_each_entry(hose, &hose_list, list_node) { |
1028 | phb_pe = eeh_phb_pe_get(hose); | |
1029 | if (!phb_pe || | |
9e049375 GS |
1030 | !(phb_pe->state & EEH_PE_ISOLATED) || |
1031 | (phb_pe->state & EEH_PE_RECOVERING)) | |
7e4e7867 GS |
1032 | continue; |
1033 | ||
1034 | /* Notify all devices to be down */ | |
05ba75f8 | 1035 | eeh_pe_state_clear(pe, EEH_PE_PRI_BUS); |
af2e3a00 RC |
1036 | eeh_pe_dev_traverse(pe, |
1037 | eeh_report_failure, NULL); | |
7e4e7867 | 1038 | bus = eeh_pe_bus_get(phb_pe); |
04fec21c RC |
1039 | if (!bus) { |
1040 | pr_err("%s: Cannot find PCI bus for " | |
1f52f176 | 1041 | "PHB#%x-PE#%x\n", |
04fec21c RC |
1042 | __func__, |
1043 | pe->phb->global_number, | |
1044 | pe->addr); | |
1045 | break; | |
1046 | } | |
bd251b89 | 1047 | pci_hp_remove_devices(bus); |
7e4e7867 | 1048 | } |
1b17366d | 1049 | pci_unlock_rescan_remove(); |
8a6b1bc7 | 1050 | } |
7e4e7867 GS |
1051 | |
1052 | /* | |
1053 | * If we have detected dead IOC, we needn't proceed | |
1054 | * any more since all PHBs would have been removed | |
1055 | */ | |
1056 | if (rc == EEH_NEXT_ERR_DEAD_IOC) | |
1057 | break; | |
1058 | } while (rc != EEH_NEXT_ERR_NONE); | |
8a6b1bc7 GS |
1059 | } |
1060 | ||
1061 | /** | |
1062 | * eeh_handle_event - Reset a PCI device after hard lockup. | |
1063 | * @pe: EEH PE | |
1064 | * | |
1065 | * While PHB detects address or data parity errors on particular PCI | |
1066 | * slot, the associated PE will be frozen. Besides, DMA's occurring | |
1067 | * to wild addresses (which usually happen due to bugs in device | |
1068 | * drivers or in PCI adapter firmware) can cause EEH error. #SERR, | |
1069 | * #PERR or other misc PCI-related errors also can trigger EEH errors. | |
1070 | * | |
1071 | * Recovery process consists of unplugging the device driver (which | |
1072 | * generated hotplug events to userspace), then issuing a PCI #RST to | |
1073 | * the device, then reconfiguring the PCI config space for all bridges | |
1074 | * & devices under this slot, and then finally restarting the device | |
1075 | * drivers (which cause a second set of hotplug events to go out to | |
1076 | * userspace). | |
1077 | */ | |
1078 | void eeh_handle_event(struct eeh_pe *pe) | |
1079 | { | |
1080 | if (pe) | |
1081 | eeh_handle_normal_event(pe); | |
1082 | else | |
1083 | eeh_handle_special_event(); | |
1084 | } |