projects / mirror_ubuntu-focal-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 2874c5fd | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 1da177e4 | 2 | /* |
| ff2e6d7e | 3 | * This file contains the power_save function for 970-family CPUs. |
| 1da177e4 LT |
4 | */ |
| 5 | ||
| 1da177e4 LT |
6 | #include <linux/threads.h> |
| 7 | #include <asm/processor.h> | |
| 8 | #include <asm/page.h> | |
| 9 | #include <asm/cputable.h> | |
| 10 | #include <asm/thread_info.h> | |
| 11 | #include <asm/ppc_asm.h> | |
| 0013a854 | 12 | #include <asm/asm-offsets.h> |
| 7230c564 | 13 | #include <asm/irqflags.h> |
| c2e480ba | 14 | #include <asm/hw_irq.h> |
| 2c86cd18 | 15 | #include <asm/feature-fixups.h> |
| 1da177e4 LT |
16 | |
| 17 | #undef DEBUG | |
| 18 | ||
| 19 | .text | |
| 20 | ||
| 1da177e4 LT |
21 | _GLOBAL(power4_idle) |
| 22 | BEGIN_FTR_SECTION | |
| 23 | blr | |
| 24 | END_FTR_SECTION_IFCLR(CPU_FTR_CAN_NAP) | |
| 1da177e4 | 25 | /* Now check if user or arch enabled NAP mode */ |
| e58c3495 DG |
26 | LOAD_REG_ADDRBASE(r3,powersave_nap) |
| 27 | lwz r4,ADDROFF(powersave_nap)(r3) | |
| 1da177e4 LT |
28 | cmpwi 0,r4,0 |
| 29 | beqlr | |
| 30 | ||
| 993ff6d9 NP |
31 | /* This sequence is similar to prep_irq_for_idle() */ |
| 32 | ||
| 7230c564 | 33 | /* Hard disable interrupts */ |
| d04c56f7 PM |
34 | mfmsr r7 |
| 35 | rldicl r0,r7,48,1 | |
| 36 | rotldi r0,r0,16 | |
| 7230c564 BH |
37 | mtmsrd r0,1 |
| 38 | ||
| 39 | /* Check if something happened while soft-disabled */ | |
| 40 | lbz r0,PACAIRQHAPPENED(r13) | |
| 41 | cmpwi cr0,r0,0 | |
| 993ff6d9 | 42 | bne- 2f |
| 7230c564 | 43 | |
| 993ff6d9 NP |
44 | /* |
| 45 | * Soft-enable interrupts. This will make power4_fixup_nap return | |
| 46 | * to our caller with interrupts enabled (soft and hard). The caller | |
| 47 | * can cope with either interrupts disabled or enabled upon return. | |
| 48 | */ | |
| 7230c564 | 49 | #ifdef CONFIG_TRACE_IRQFLAGS |
| 993ff6d9 | 50 | /* Tell the tracer interrupts are on, because idle responds to them. */ |
| 7230c564 BH |
51 | mflr r0 |
| 52 | std r0,16(r1) | |
| 53 | stdu r1,-128(r1) | |
| b1576fec | 54 | bl trace_hardirqs_on |
| 7230c564 BH |
55 | addi r1,r1,128 |
| 56 | ld r0,16(r1) | |
| 57 | mtlr r0 | |
| 01e8ec44 | 58 | mfmsr r7 |
| 7230c564 BH |
59 | #endif /* CONFIG_TRACE_IRQFLAGS */ |
| 60 | ||
| c2e480ba | 61 | li r0,IRQS_ENABLED |
| 4e26bc4a | 62 | stb r0,PACAIRQSOFTMASK(r13) /* we'll hard-enable shortly */ |
| 1da177e4 LT |
63 | BEGIN_FTR_SECTION |
| 64 | DSSALL | |
| 65 | sync | |
| 66 | END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) | |
| c911d2e1 | 67 | ld r9, PACA_THREAD_INFO(r13) |
| f39224a8 PM |
68 | ld r8,TI_LOCAL_FLAGS(r9) /* set napping bit */ |
| 69 | ori r8,r8,_TLF_NAPPING /* so when we take an exception */ | |
| 70 | std r8,TI_LOCAL_FLAGS(r9) /* it will return to our caller */ | |
| ff2e6d7e | 71 | ori r7,r7,MSR_EE |
| 1da177e4 | 72 | oris r7,r7,MSR_POW@h |
| f39224a8 | 73 | 1: sync |
| 1da177e4 LT |
74 | isync |
| 75 | mtmsrd r7 | |
| 76 | isync | |
| f39224a8 PM |
77 | b 1b |
| 78 | ||
| 993ff6d9 NP |
79 | 2: /* Return if an interrupt had happened while soft disabled */ |
| 80 | /* Set the HARD_DIS flag because interrupts are now hard disabled */ | |
| 81 | ori r0,r0,PACA_IRQ_HARD_DIS | |
| 82 | stb r0,PACAIRQHAPPENED(r13) | |
| 83 | blr |