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Commit | Line | Data |
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948cf67c | 1 | /* |
7230c564 | 2 | * This file contains the power_save function for Power7 CPUs. |
948cf67c BH |
3 | * |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License | |
6 | * as published by the Free Software Foundation; either version | |
7 | * 2 of the License, or (at your option) any later version. | |
8 | */ | |
9 | ||
10 | #include <linux/threads.h> | |
11 | #include <asm/processor.h> | |
12 | #include <asm/page.h> | |
13 | #include <asm/cputable.h> | |
14 | #include <asm/thread_info.h> | |
15 | #include <asm/ppc_asm.h> | |
16 | #include <asm/asm-offsets.h> | |
17 | #include <asm/ppc-opcode.h> | |
7230c564 | 18 | #include <asm/hw_irq.h> |
f0888f70 | 19 | #include <asm/kvm_book3s_asm.h> |
948cf67c BH |
20 | |
21 | #undef DEBUG | |
22 | ||
23 | .text | |
24 | ||
25 | _GLOBAL(power7_idle) | |
26 | /* Now check if user or arch enabled NAP mode */ | |
27 | LOAD_REG_ADDRBASE(r3,powersave_nap) | |
28 | lwz r4,ADDROFF(powersave_nap)(r3) | |
29 | cmpwi 0,r4,0 | |
30 | beqlr | |
31 | ||
32 | /* NAP is a state loss, we create a regs frame on the | |
33 | * stack, fill it up with the state we care about and | |
34 | * stick a pointer to it in PACAR1. We really only | |
35 | * need to save PC, some CR bits and the NV GPRs, | |
36 | * but for now an interrupt frame will do. | |
37 | */ | |
38 | mflr r0 | |
39 | std r0,16(r1) | |
40 | stdu r1,-INT_FRAME_SIZE(r1) | |
41 | std r0,_LINK(r1) | |
42 | std r0,_NIP(r1) | |
43 | ||
44 | #ifndef CONFIG_SMP | |
45 | /* Make sure FPU, VSX etc... are flushed as we may lose | |
46 | * state when going to nap mode | |
47 | */ | |
48 | bl .discard_lazy_cpu_state | |
49 | #endif /* CONFIG_SMP */ | |
50 | ||
51 | /* Hard disable interrupts */ | |
52 | mfmsr r9 | |
53 | rldicl r9,r9,48,1 | |
54 | rotldi r9,r9,16 | |
55 | mtmsrd r9,1 /* hard-disable interrupts */ | |
7230c564 BH |
56 | |
57 | /* Check if something happened while soft-disabled */ | |
58 | lbz r0,PACAIRQHAPPENED(r13) | |
59 | cmpwi cr0,r0,0 | |
60 | beq 1f | |
61 | addi r1,r1,INT_FRAME_SIZE | |
62 | ld r0,16(r1) | |
63 | mtlr r0 | |
64 | blr | |
65 | ||
66 | 1: /* We mark irqs hard disabled as this is the state we'll | |
67 | * be in when returning and we need to tell arch_local_irq_restore() | |
68 | * about it | |
69 | */ | |
70 | li r0,PACA_IRQ_HARD_DIS | |
71 | stb r0,PACAIRQHAPPENED(r13) | |
72 | ||
73 | /* We haven't lost state ... yet */ | |
948cf67c | 74 | li r0,0 |
2fde6d20 | 75 | stb r0,PACA_NAPSTATELOST(r13) |
948cf67c BH |
76 | |
77 | /* Continue saving state */ | |
78 | SAVE_GPR(2, r1) | |
79 | SAVE_NVGPRS(r1) | |
80 | mfcr r3 | |
81 | std r3,_CCR(r1) | |
82 | std r9,_MSR(r1) | |
83 | std r1,PACAR1(r13) | |
84 | ||
f0888f70 PM |
85 | #ifdef CONFIG_KVM_BOOK3S_64_HV |
86 | /* Tell KVM we're napping */ | |
87 | li r4,KVM_HWTHREAD_IN_NAP | |
88 | stb r4,HSTATE_HWTHREAD_STATE(r13) | |
89 | #endif | |
90 | ||
948cf67c BH |
91 | /* Magic NAP mode enter sequence */ |
92 | std r0,0(r1) | |
93 | ptesync | |
94 | ld r0,0(r1) | |
95 | 1: cmp cr0,r0,r0 | |
96 | bne 1b | |
97 | PPC_NAP | |
98 | b . | |
99 | ||
100 | _GLOBAL(power7_wakeup_loss) | |
948cf67c BH |
101 | ld r1,PACAR1(r13) |
102 | REST_NVGPRS(r1) | |
103 | REST_GPR(2, r1) | |
104 | ld r3,_CCR(r1) | |
105 | ld r4,_MSR(r1) | |
106 | ld r5,_NIP(r1) | |
107 | addi r1,r1,INT_FRAME_SIZE | |
108 | mtcr r3 | |
109 | mtspr SPRN_SRR1,r4 | |
110 | mtspr SPRN_SRR0,r5 | |
111 | rfid | |
112 | ||
113 | _GLOBAL(power7_wakeup_noloss) | |
2fde6d20 PM |
114 | lbz r0,PACA_NAPSTATELOST(r13) |
115 | cmpwi r0,0 | |
116 | bne .power7_wakeup_loss | |
948cf67c BH |
117 | ld r1,PACAR1(r13) |
118 | ld r4,_MSR(r1) | |
119 | ld r5,_NIP(r1) | |
120 | addi r1,r1,INT_FRAME_SIZE | |
121 | mtspr SPRN_SRR1,r4 | |
122 | mtspr SPRN_SRR0,r5 | |
123 | rfid |