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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
756e7104 | 10 | * |
1da177e4 LT |
11 | * This program is free software; you can redistribute it and/or |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | * | |
16 | * This file contains the code used by various IRQ handling routines: | |
17 | * asking for different IRQ's should be done through these routines | |
18 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
19 | * shouldn't result in any weird surprises, and installing new handlers | |
20 | * should be easier. | |
756e7104 SR |
21 | * |
22 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
23 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
24 | * mask register (of which only 16 are defined), hence the weird shifting | |
25 | * and complement of the cached_irq_mask. I want to be able to stuff | |
26 | * this right into the SIU SMASK register. | |
27 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
28 | * to reduce code space and undefined function references. | |
1da177e4 LT |
29 | */ |
30 | ||
0ebfff14 BH |
31 | #undef DEBUG |
32 | ||
1da177e4 LT |
33 | #include <linux/module.h> |
34 | #include <linux/threads.h> | |
35 | #include <linux/kernel_stat.h> | |
36 | #include <linux/signal.h> | |
37 | #include <linux/sched.h> | |
756e7104 | 38 | #include <linux/ptrace.h> |
1da177e4 LT |
39 | #include <linux/ioport.h> |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/timex.h> | |
1da177e4 LT |
42 | #include <linux/init.h> |
43 | #include <linux/slab.h> | |
1da177e4 LT |
44 | #include <linux/delay.h> |
45 | #include <linux/irq.h> | |
756e7104 SR |
46 | #include <linux/seq_file.h> |
47 | #include <linux/cpumask.h> | |
1da177e4 LT |
48 | #include <linux/profile.h> |
49 | #include <linux/bitops.h> | |
0ebfff14 BH |
50 | #include <linux/list.h> |
51 | #include <linux/radix-tree.h> | |
52 | #include <linux/mutex.h> | |
53 | #include <linux/bootmem.h> | |
45934c47 | 54 | #include <linux/pci.h> |
60b332e7 | 55 | #include <linux/debugfs.h> |
e3873444 GL |
56 | #include <linux/of.h> |
57 | #include <linux/of_irq.h> | |
1da177e4 LT |
58 | |
59 | #include <asm/uaccess.h> | |
60 | #include <asm/system.h> | |
61 | #include <asm/io.h> | |
62 | #include <asm/pgtable.h> | |
63 | #include <asm/irq.h> | |
64 | #include <asm/cache.h> | |
65 | #include <asm/prom.h> | |
66 | #include <asm/ptrace.h> | |
1da177e4 | 67 | #include <asm/machdep.h> |
0ebfff14 | 68 | #include <asm/udbg.h> |
3e7f45ad | 69 | #include <asm/smp.h> |
89c81797 | 70 | |
d04c56f7 | 71 | #ifdef CONFIG_PPC64 |
1da177e4 | 72 | #include <asm/paca.h> |
d04c56f7 | 73 | #include <asm/firmware.h> |
0874dd40 | 74 | #include <asm/lv1call.h> |
756e7104 | 75 | #endif |
1bf4af16 AB |
76 | #define CREATE_TRACE_POINTS |
77 | #include <asm/trace.h> | |
1da177e4 | 78 | |
8c007bfd AB |
79 | DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat); |
80 | EXPORT_PER_CPU_SYMBOL(irq_stat); | |
81 | ||
868accb7 | 82 | int __irq_offset_value; |
756e7104 | 83 | |
756e7104 | 84 | #ifdef CONFIG_PPC32 |
b9e5b4e6 BH |
85 | EXPORT_SYMBOL(__irq_offset_value); |
86 | atomic_t ppc_n_lost_interrupts; | |
756e7104 | 87 | |
756e7104 SR |
88 | #ifdef CONFIG_TAU_INT |
89 | extern int tau_initialized; | |
90 | extern int tau_interrupts(int); | |
91 | #endif | |
b9e5b4e6 | 92 | #endif /* CONFIG_PPC32 */ |
756e7104 | 93 | |
756e7104 | 94 | #ifdef CONFIG_PPC64 |
cd015707 ME |
95 | |
96 | #ifndef CONFIG_SPARSE_IRQ | |
1da177e4 | 97 | EXPORT_SYMBOL(irq_desc); |
cd015707 | 98 | #endif |
1da177e4 LT |
99 | |
100 | int distribute_irqs = 1; | |
d04c56f7 | 101 | |
4e491d14 | 102 | static inline notrace unsigned long get_hard_enabled(void) |
ef2b343e HD |
103 | { |
104 | unsigned long enabled; | |
105 | ||
106 | __asm__ __volatile__("lbz %0,%1(13)" | |
107 | : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled))); | |
108 | ||
109 | return enabled; | |
110 | } | |
111 | ||
4e491d14 | 112 | static inline notrace void set_soft_enabled(unsigned long enable) |
ef2b343e HD |
113 | { |
114 | __asm__ __volatile__("stb %0,%1(13)" | |
115 | : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled))); | |
116 | } | |
117 | ||
df9ee292 | 118 | notrace void arch_local_irq_restore(unsigned long en) |
d04c56f7 | 119 | { |
ef2b343e HD |
120 | /* |
121 | * get_paca()->soft_enabled = en; | |
122 | * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1? | |
123 | * That was allowed before, and in such a case we do need to take care | |
124 | * that gcc will set soft_enabled directly via r13, not choose to use | |
125 | * an intermediate register, lest we're preempted to a different cpu. | |
126 | */ | |
127 | set_soft_enabled(en); | |
d04c56f7 PM |
128 | if (!en) |
129 | return; | |
130 | ||
94491685 | 131 | #ifdef CONFIG_PPC_STD_MMU_64 |
d04c56f7 | 132 | if (firmware_has_feature(FW_FEATURE_ISERIES)) { |
ef2b343e HD |
133 | /* |
134 | * Do we need to disable preemption here? Not really: in the | |
135 | * unlikely event that we're preempted to a different cpu in | |
136 | * between getting r13, loading its lppaca_ptr, and loading | |
137 | * its any_int, we might call iseries_handle_interrupts without | |
138 | * an interrupt pending on the new cpu, but that's no disaster, | |
139 | * is it? And the business of preempting us off the old cpu | |
140 | * would itself involve a local_irq_restore which handles the | |
141 | * interrupt to that cpu. | |
142 | * | |
143 | * But use "local_paca->lppaca_ptr" instead of "get_lppaca()" | |
144 | * to avoid any preemption checking added into get_paca(). | |
145 | */ | |
146 | if (local_paca->lppaca_ptr->int_dword.any_int) | |
d04c56f7 | 147 | iseries_handle_interrupts(); |
d04c56f7 | 148 | } |
94491685 | 149 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
d04c56f7 | 150 | |
ef2b343e HD |
151 | /* |
152 | * if (get_paca()->hard_enabled) return; | |
153 | * But again we need to take care that gcc gets hard_enabled directly | |
154 | * via r13, not choose to use an intermediate register, lest we're | |
155 | * preempted to a different cpu in between the two instructions. | |
156 | */ | |
157 | if (get_hard_enabled()) | |
d04c56f7 | 158 | return; |
ef2b343e HD |
159 | |
160 | /* | |
161 | * Need to hard-enable interrupts here. Since currently disabled, | |
162 | * no need to take further asm precautions against preemption; but | |
163 | * use local_paca instead of get_paca() to avoid preemption checking. | |
164 | */ | |
165 | local_paca->hard_enabled = en; | |
e8775d4a BH |
166 | |
167 | #ifndef CONFIG_BOOKE | |
168 | /* On server, re-trigger the decrementer if it went negative since | |
169 | * some processors only trigger on edge transitions of the sign bit. | |
170 | * | |
171 | * BookE has a level sensitive decrementer (latches in TSR) so we | |
172 | * don't need that | |
173 | */ | |
d04c56f7 PM |
174 | if ((int)mfspr(SPRN_DEC) < 0) |
175 | mtspr(SPRN_DEC, 1); | |
e8775d4a | 176 | #endif /* CONFIG_BOOKE */ |
0874dd40 TS |
177 | |
178 | /* | |
179 | * Force the delivery of pending soft-disabled interrupts on PS3. | |
180 | * Any HV call will have this side effect. | |
181 | */ | |
182 | if (firmware_has_feature(FW_FEATURE_PS3_LV1)) { | |
183 | u64 tmp; | |
184 | lv1_get_version_info(&tmp); | |
185 | } | |
186 | ||
e1fa2e13 | 187 | __hard_irq_enable(); |
d04c56f7 | 188 | } |
df9ee292 | 189 | EXPORT_SYMBOL(arch_local_irq_restore); |
756e7104 | 190 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 191 | |
433c9c67 | 192 | int arch_show_interrupts(struct seq_file *p, int prec) |
c86845ed AB |
193 | { |
194 | int j; | |
195 | ||
196 | #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT) | |
197 | if (tau_initialized) { | |
198 | seq_printf(p, "%*s: ", prec, "TAU"); | |
199 | for_each_online_cpu(j) | |
200 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
201 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); | |
202 | } | |
203 | #endif /* CONFIG_PPC32 && CONFIG_TAU_INT */ | |
204 | ||
89713ed1 AB |
205 | seq_printf(p, "%*s: ", prec, "LOC"); |
206 | for_each_online_cpu(j) | |
207 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs); | |
208 | seq_printf(p, " Local timer interrupts\n"); | |
209 | ||
17081102 AB |
210 | seq_printf(p, "%*s: ", prec, "SPU"); |
211 | for_each_online_cpu(j) | |
212 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs); | |
213 | seq_printf(p, " Spurious interrupts\n"); | |
214 | ||
89713ed1 AB |
215 | seq_printf(p, "%*s: ", prec, "CNT"); |
216 | for_each_online_cpu(j) | |
217 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs); | |
218 | seq_printf(p, " Performance monitoring interrupts\n"); | |
219 | ||
220 | seq_printf(p, "%*s: ", prec, "MCE"); | |
221 | for_each_online_cpu(j) | |
222 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions); | |
223 | seq_printf(p, " Machine check exceptions\n"); | |
224 | ||
c86845ed AB |
225 | return 0; |
226 | } | |
227 | ||
89713ed1 AB |
228 | /* |
229 | * /proc/stat helpers | |
230 | */ | |
231 | u64 arch_irq_stat_cpu(unsigned int cpu) | |
232 | { | |
233 | u64 sum = per_cpu(irq_stat, cpu).timer_irqs; | |
234 | ||
235 | sum += per_cpu(irq_stat, cpu).pmu_irqs; | |
236 | sum += per_cpu(irq_stat, cpu).mce_exceptions; | |
17081102 | 237 | sum += per_cpu(irq_stat, cpu).spurious_irqs; |
89713ed1 AB |
238 | |
239 | return sum; | |
240 | } | |
241 | ||
1da177e4 | 242 | #ifdef CONFIG_HOTPLUG_CPU |
1c91cc57 | 243 | void migrate_irqs(void) |
1da177e4 | 244 | { |
6cff46f4 | 245 | struct irq_desc *desc; |
1da177e4 LT |
246 | unsigned int irq; |
247 | static int warned; | |
b6decb70 | 248 | cpumask_var_t mask; |
1c91cc57 | 249 | const struct cpumask *map = cpu_online_mask; |
1da177e4 | 250 | |
b6decb70 | 251 | alloc_cpumask_var(&mask, GFP_KERNEL); |
1da177e4 | 252 | |
b6decb70 | 253 | for_each_irq(irq) { |
7bfbc1f2 | 254 | struct irq_data *data; |
e1180287 LB |
255 | struct irq_chip *chip; |
256 | ||
6cff46f4 | 257 | desc = irq_to_desc(irq); |
3cd85192 JB |
258 | if (!desc) |
259 | continue; | |
260 | ||
7bfbc1f2 TG |
261 | data = irq_desc_get_irq_data(desc); |
262 | if (irqd_is_per_cpu(data)) | |
1da177e4 LT |
263 | continue; |
264 | ||
7bfbc1f2 | 265 | chip = irq_data_get_irq_chip(data); |
e1180287 | 266 | |
7bfbc1f2 | 267 | cpumask_and(mask, data->affinity, map); |
b6decb70 | 268 | if (cpumask_any(mask) >= nr_cpu_ids) { |
1da177e4 | 269 | printk("Breaking affinity for irq %i\n", irq); |
b6decb70 | 270 | cpumask_copy(mask, map); |
1da177e4 | 271 | } |
e1180287 | 272 | if (chip->irq_set_affinity) |
7bfbc1f2 | 273 | chip->irq_set_affinity(data, mask, true); |
6cff46f4 | 274 | else if (desc->action && !(warned++)) |
1da177e4 LT |
275 | printk("Cannot set affinity for irq %i\n", irq); |
276 | } | |
277 | ||
b6decb70 AB |
278 | free_cpumask_var(mask); |
279 | ||
1da177e4 LT |
280 | local_irq_enable(); |
281 | mdelay(1); | |
282 | local_irq_disable(); | |
283 | } | |
284 | #endif | |
285 | ||
f2694ba5 ME |
286 | static inline void handle_one_irq(unsigned int irq) |
287 | { | |
288 | struct thread_info *curtp, *irqtp; | |
289 | unsigned long saved_sp_limit; | |
290 | struct irq_desc *desc; | |
f2694ba5 | 291 | |
2e455257 MM |
292 | desc = irq_to_desc(irq); |
293 | if (!desc) | |
294 | return; | |
295 | ||
f2694ba5 ME |
296 | /* Switch to the irq stack to handle this */ |
297 | curtp = current_thread_info(); | |
298 | irqtp = hardirq_ctx[smp_processor_id()]; | |
299 | ||
300 | if (curtp == irqtp) { | |
301 | /* We're already on the irq stack, just handle it */ | |
2e455257 | 302 | desc->handle_irq(irq, desc); |
f2694ba5 ME |
303 | return; |
304 | } | |
305 | ||
f2694ba5 ME |
306 | saved_sp_limit = current->thread.ksp_limit; |
307 | ||
f2694ba5 ME |
308 | irqtp->task = curtp->task; |
309 | irqtp->flags = 0; | |
310 | ||
311 | /* Copy the softirq bits in preempt_count so that the | |
312 | * softirq checks work in the hardirq context. */ | |
313 | irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) | | |
314 | (curtp->preempt_count & SOFTIRQ_MASK); | |
315 | ||
316 | current->thread.ksp_limit = (unsigned long)irqtp + | |
317 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
318 | ||
835363e6 | 319 | call_handle_irq(irq, desc, irqtp, desc->handle_irq); |
f2694ba5 ME |
320 | current->thread.ksp_limit = saved_sp_limit; |
321 | irqtp->task = NULL; | |
322 | ||
323 | /* Set any flag that may have been set on the | |
324 | * alternate stack | |
325 | */ | |
326 | if (irqtp->flags) | |
327 | set_bits(irqtp->flags, &curtp->flags); | |
328 | } | |
f2694ba5 | 329 | |
d7cb10d6 ME |
330 | static inline void check_stack_overflow(void) |
331 | { | |
332 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
333 | long sp; | |
334 | ||
335 | sp = __get_SP() & (THREAD_SIZE-1); | |
336 | ||
337 | /* check for stack overflow: is there less than 2KB free? */ | |
338 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
339 | printk("do_IRQ: stack overflow: %ld\n", | |
340 | sp - sizeof(struct thread_info)); | |
341 | dump_stack(); | |
342 | } | |
343 | #endif | |
344 | } | |
345 | ||
1da177e4 LT |
346 | void do_IRQ(struct pt_regs *regs) |
347 | { | |
7d12e780 | 348 | struct pt_regs *old_regs = set_irq_regs(regs); |
0ebfff14 | 349 | unsigned int irq; |
1da177e4 | 350 | |
1bf4af16 AB |
351 | trace_irq_entry(regs); |
352 | ||
4b218e9b | 353 | irq_enter(); |
1da177e4 | 354 | |
d7cb10d6 | 355 | check_stack_overflow(); |
1da177e4 | 356 | |
35a84c2f | 357 | irq = ppc_md.get_irq(); |
1da177e4 | 358 | |
f2694ba5 ME |
359 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) |
360 | handle_one_irq(irq); | |
361 | else if (irq != NO_IRQ_IGNORE) | |
17081102 | 362 | __get_cpu_var(irq_stat).spurious_irqs++; |
e199500c | 363 | |
4b218e9b | 364 | irq_exit(); |
7d12e780 | 365 | set_irq_regs(old_regs); |
756e7104 | 366 | |
e199500c | 367 | #ifdef CONFIG_PPC_ISERIES |
b06a3183 SR |
368 | if (firmware_has_feature(FW_FEATURE_ISERIES) && |
369 | get_lppaca()->int_dword.fields.decr_int) { | |
3356bb9f DG |
370 | get_lppaca()->int_dword.fields.decr_int = 0; |
371 | /* Signal a fake decrementer interrupt */ | |
372 | timer_interrupt(regs); | |
e199500c SR |
373 | } |
374 | #endif | |
1bf4af16 AB |
375 | |
376 | trace_irq_exit(regs); | |
e199500c | 377 | } |
1da177e4 LT |
378 | |
379 | void __init init_IRQ(void) | |
380 | { | |
70584578 SR |
381 | if (ppc_md.init_IRQ) |
382 | ppc_md.init_IRQ(); | |
bcf0b088 KG |
383 | |
384 | exc_lvl_ctx_init(); | |
385 | ||
1da177e4 LT |
386 | irq_ctx_init(); |
387 | } | |
388 | ||
bcf0b088 KG |
389 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
390 | struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; | |
391 | struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; | |
392 | struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | |
393 | ||
394 | void exc_lvl_ctx_init(void) | |
395 | { | |
396 | struct thread_info *tp; | |
ca1769f7 | 397 | int i, cpu_nr; |
bcf0b088 KG |
398 | |
399 | for_each_possible_cpu(i) { | |
ca1769f7 ME |
400 | #ifdef CONFIG_PPC64 |
401 | cpu_nr = i; | |
402 | #else | |
403 | cpu_nr = get_hard_smp_processor_id(i); | |
404 | #endif | |
405 | memset((void *)critirq_ctx[cpu_nr], 0, THREAD_SIZE); | |
406 | tp = critirq_ctx[cpu_nr]; | |
407 | tp->cpu = cpu_nr; | |
bcf0b088 KG |
408 | tp->preempt_count = 0; |
409 | ||
410 | #ifdef CONFIG_BOOKE | |
ca1769f7 ME |
411 | memset((void *)dbgirq_ctx[cpu_nr], 0, THREAD_SIZE); |
412 | tp = dbgirq_ctx[cpu_nr]; | |
413 | tp->cpu = cpu_nr; | |
bcf0b088 KG |
414 | tp->preempt_count = 0; |
415 | ||
ca1769f7 ME |
416 | memset((void *)mcheckirq_ctx[cpu_nr], 0, THREAD_SIZE); |
417 | tp = mcheckirq_ctx[cpu_nr]; | |
418 | tp->cpu = cpu_nr; | |
bcf0b088 KG |
419 | tp->preempt_count = HARDIRQ_OFFSET; |
420 | #endif | |
421 | } | |
422 | } | |
423 | #endif | |
1da177e4 | 424 | |
22722051 AM |
425 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
426 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | |
1da177e4 LT |
427 | |
428 | void irq_ctx_init(void) | |
429 | { | |
430 | struct thread_info *tp; | |
431 | int i; | |
432 | ||
0e551954 | 433 | for_each_possible_cpu(i) { |
1da177e4 LT |
434 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
435 | tp = softirq_ctx[i]; | |
436 | tp->cpu = i; | |
e6768a4f | 437 | tp->preempt_count = 0; |
1da177e4 LT |
438 | |
439 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
440 | tp = hardirq_ctx[i]; | |
441 | tp->cpu = i; | |
442 | tp->preempt_count = HARDIRQ_OFFSET; | |
443 | } | |
444 | } | |
445 | ||
c6622f63 PM |
446 | static inline void do_softirq_onstack(void) |
447 | { | |
448 | struct thread_info *curtp, *irqtp; | |
85218827 | 449 | unsigned long saved_sp_limit = current->thread.ksp_limit; |
c6622f63 PM |
450 | |
451 | curtp = current_thread_info(); | |
452 | irqtp = softirq_ctx[smp_processor_id()]; | |
453 | irqtp->task = curtp->task; | |
50d2a422 | 454 | irqtp->flags = 0; |
85218827 KG |
455 | current->thread.ksp_limit = (unsigned long)irqtp + |
456 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
c6622f63 | 457 | call_do_softirq(irqtp); |
85218827 | 458 | current->thread.ksp_limit = saved_sp_limit; |
c6622f63 | 459 | irqtp->task = NULL; |
50d2a422 BH |
460 | |
461 | /* Set any flag that may have been set on the | |
462 | * alternate stack | |
463 | */ | |
464 | if (irqtp->flags) | |
465 | set_bits(irqtp->flags, &curtp->flags); | |
c6622f63 | 466 | } |
1da177e4 | 467 | |
1da177e4 LT |
468 | void do_softirq(void) |
469 | { | |
470 | unsigned long flags; | |
1da177e4 LT |
471 | |
472 | if (in_interrupt()) | |
1da177e4 LT |
473 | return; |
474 | ||
1da177e4 | 475 | local_irq_save(flags); |
1da177e4 | 476 | |
912b2539 | 477 | if (local_softirq_pending()) |
c6622f63 | 478 | do_softirq_onstack(); |
1da177e4 LT |
479 | |
480 | local_irq_restore(flags); | |
1da177e4 | 481 | } |
1da177e4 | 482 | |
1da177e4 | 483 | |
1da177e4 | 484 | /* |
0ebfff14 | 485 | * IRQ controller and virtual interrupts |
1da177e4 LT |
486 | */ |
487 | ||
476eb491 GL |
488 | /* The main irq map itself is an array of NR_IRQ entries containing the |
489 | * associate host and irq number. An entry with a host of NULL is free. | |
490 | * An entry can be allocated if it's free, the allocator always then sets | |
491 | * hwirq first to the host's invalid irq number and then fills ops. | |
492 | */ | |
493 | struct irq_map_entry { | |
494 | irq_hw_number_t hwirq; | |
495 | struct irq_host *host; | |
496 | }; | |
497 | ||
0ebfff14 | 498 | static LIST_HEAD(irq_hosts); |
f95e085b | 499 | static DEFINE_RAW_SPINLOCK(irq_big_lock); |
150c6c8f | 500 | static DEFINE_MUTEX(revmap_trees_mutex); |
476eb491 | 501 | static struct irq_map_entry irq_map[NR_IRQS]; |
0ebfff14 BH |
502 | static unsigned int irq_virq_count = NR_IRQS; |
503 | static struct irq_host *irq_default_host; | |
1da177e4 | 504 | |
476eb491 GL |
505 | irq_hw_number_t irqd_to_hwirq(struct irq_data *d) |
506 | { | |
507 | return irq_map[d->irq].hwirq; | |
508 | } | |
509 | EXPORT_SYMBOL_GPL(irqd_to_hwirq); | |
510 | ||
35923f12 OJ |
511 | irq_hw_number_t virq_to_hw(unsigned int virq) |
512 | { | |
513 | return irq_map[virq].hwirq; | |
514 | } | |
515 | EXPORT_SYMBOL_GPL(virq_to_hw); | |
516 | ||
3ee62d36 MM |
517 | bool virq_is_host(unsigned int virq, struct irq_host *host) |
518 | { | |
519 | return irq_map[virq].host == host; | |
520 | } | |
521 | EXPORT_SYMBOL_GPL(virq_is_host); | |
522 | ||
68158006 ME |
523 | static int default_irq_host_match(struct irq_host *h, struct device_node *np) |
524 | { | |
525 | return h->of_node != NULL && h->of_node == np; | |
526 | } | |
527 | ||
5669c3cf | 528 | struct irq_host *irq_alloc_host(struct device_node *of_node, |
52964f87 ME |
529 | unsigned int revmap_type, |
530 | unsigned int revmap_arg, | |
531 | struct irq_host_ops *ops, | |
532 | irq_hw_number_t inval_irq) | |
1da177e4 | 533 | { |
0ebfff14 BH |
534 | struct irq_host *host; |
535 | unsigned int size = sizeof(struct irq_host); | |
536 | unsigned int i; | |
537 | unsigned int *rmap; | |
538 | unsigned long flags; | |
539 | ||
540 | /* Allocate structure and revmap table if using linear mapping */ | |
541 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | |
542 | size += revmap_arg * sizeof(unsigned int); | |
3af259d1 | 543 | host = kzalloc(size, GFP_KERNEL); |
0ebfff14 BH |
544 | if (host == NULL) |
545 | return NULL; | |
7d01c880 | 546 | |
0ebfff14 BH |
547 | /* Fill structure */ |
548 | host->revmap_type = revmap_type; | |
549 | host->inval_irq = inval_irq; | |
550 | host->ops = ops; | |
19fc65b5 | 551 | host->of_node = of_node_get(of_node); |
7d01c880 | 552 | |
68158006 ME |
553 | if (host->ops->match == NULL) |
554 | host->ops->match = default_irq_host_match; | |
7d01c880 | 555 | |
f95e085b | 556 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
557 | |
558 | /* If it's a legacy controller, check for duplicates and | |
559 | * mark it as allocated (we use irq 0 host pointer for that | |
560 | */ | |
561 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | |
562 | if (irq_map[0].host != NULL) { | |
f95e085b | 563 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
3d1b5e20 MM |
564 | of_node_put(host->of_node); |
565 | kfree(host); | |
0ebfff14 BH |
566 | return NULL; |
567 | } | |
568 | irq_map[0].host = host; | |
569 | } | |
570 | ||
571 | list_add(&host->link, &irq_hosts); | |
f95e085b | 572 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
573 | |
574 | /* Additional setups per revmap type */ | |
575 | switch(revmap_type) { | |
576 | case IRQ_HOST_MAP_LEGACY: | |
577 | /* 0 is always the invalid number for legacy */ | |
578 | host->inval_irq = 0; | |
579 | /* setup us as the host for all legacy interrupts */ | |
580 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | |
7866291d | 581 | irq_map[i].hwirq = i; |
0ebfff14 BH |
582 | smp_wmb(); |
583 | irq_map[i].host = host; | |
584 | smp_wmb(); | |
585 | ||
0ebfff14 BH |
586 | /* Legacy flags are left to default at this point, |
587 | * one can then use irq_create_mapping() to | |
c03983ac | 588 | * explicitly change them |
0ebfff14 | 589 | */ |
6e99e458 | 590 | ops->map(host, i, i); |
41fb5e62 MM |
591 | |
592 | /* Clear norequest flags */ | |
593 | irq_clear_status_flags(i, IRQ_NOREQUEST); | |
0ebfff14 BH |
594 | } |
595 | break; | |
596 | case IRQ_HOST_MAP_LINEAR: | |
597 | rmap = (unsigned int *)(host + 1); | |
598 | for (i = 0; i < revmap_arg; i++) | |
f5921697 | 599 | rmap[i] = NO_IRQ; |
0ebfff14 BH |
600 | host->revmap_data.linear.size = revmap_arg; |
601 | smp_wmb(); | |
602 | host->revmap_data.linear.revmap = rmap; | |
603 | break; | |
3af259d1 MM |
604 | case IRQ_HOST_MAP_TREE: |
605 | INIT_RADIX_TREE(&host->revmap_data.tree, GFP_KERNEL); | |
606 | break; | |
0ebfff14 BH |
607 | default: |
608 | break; | |
609 | } | |
610 | ||
611 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | |
612 | ||
613 | return host; | |
1da177e4 LT |
614 | } |
615 | ||
0ebfff14 | 616 | struct irq_host *irq_find_host(struct device_node *node) |
1da177e4 | 617 | { |
0ebfff14 BH |
618 | struct irq_host *h, *found = NULL; |
619 | unsigned long flags; | |
620 | ||
621 | /* We might want to match the legacy controller last since | |
622 | * it might potentially be set to match all interrupts in | |
623 | * the absence of a device node. This isn't a problem so far | |
624 | * yet though... | |
625 | */ | |
f95e085b | 626 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 | 627 | list_for_each_entry(h, &irq_hosts, link) |
68158006 | 628 | if (h->ops->match(h, node)) { |
0ebfff14 BH |
629 | found = h; |
630 | break; | |
631 | } | |
f95e085b | 632 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
633 | return found; |
634 | } | |
635 | EXPORT_SYMBOL_GPL(irq_find_host); | |
636 | ||
637 | void irq_set_default_host(struct irq_host *host) | |
638 | { | |
639 | pr_debug("irq: Default host set to @0x%p\n", host); | |
1da177e4 | 640 | |
0ebfff14 BH |
641 | irq_default_host = host; |
642 | } | |
1da177e4 | 643 | |
0ebfff14 BH |
644 | void irq_set_virq_count(unsigned int count) |
645 | { | |
646 | pr_debug("irq: Trying to set virq count to %d\n", count); | |
fef1c772 | 647 | |
0ebfff14 BH |
648 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
649 | if (count < NR_IRQS) | |
650 | irq_virq_count = count; | |
651 | } | |
652 | ||
6fde40f3 ME |
653 | static int irq_setup_virq(struct irq_host *host, unsigned int virq, |
654 | irq_hw_number_t hwirq) | |
655 | { | |
a9d8946b | 656 | int res; |
cd015707 | 657 | |
a9d8946b TG |
658 | res = irq_alloc_desc_at(virq, 0); |
659 | if (res != virq) { | |
cd015707 ME |
660 | pr_debug("irq: -> allocating desc failed\n"); |
661 | goto error; | |
662 | } | |
663 | ||
6fde40f3 ME |
664 | /* map it */ |
665 | smp_wmb(); | |
666 | irq_map[virq].hwirq = hwirq; | |
667 | smp_mb(); | |
668 | ||
669 | if (host->ops->map(host, virq, hwirq)) { | |
670 | pr_debug("irq: -> mapping failed, freeing\n"); | |
a9d8946b | 671 | goto errdesc; |
6fde40f3 ME |
672 | } |
673 | ||
41fb5e62 MM |
674 | irq_clear_status_flags(virq, IRQ_NOREQUEST); |
675 | ||
6fde40f3 | 676 | return 0; |
cd015707 | 677 | |
a9d8946b TG |
678 | errdesc: |
679 | irq_free_descs(virq, 1); | |
cd015707 ME |
680 | error: |
681 | irq_free_virt(virq, 1); | |
682 | return -1; | |
6fde40f3 | 683 | } |
8ec8f2e8 | 684 | |
ee51de56 ME |
685 | unsigned int irq_create_direct_mapping(struct irq_host *host) |
686 | { | |
687 | unsigned int virq; | |
688 | ||
689 | if (host == NULL) | |
690 | host = irq_default_host; | |
691 | ||
692 | BUG_ON(host == NULL); | |
693 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP); | |
694 | ||
695 | virq = irq_alloc_virt(host, 1, 0); | |
696 | if (virq == NO_IRQ) { | |
697 | pr_debug("irq: create_direct virq allocation failed\n"); | |
698 | return NO_IRQ; | |
699 | } | |
700 | ||
701 | pr_debug("irq: create_direct obtained virq %d\n", virq); | |
702 | ||
703 | if (irq_setup_virq(host, virq, virq)) | |
704 | return NO_IRQ; | |
705 | ||
706 | return virq; | |
707 | } | |
708 | ||
0ebfff14 | 709 | unsigned int irq_create_mapping(struct irq_host *host, |
6e99e458 | 710 | irq_hw_number_t hwirq) |
0ebfff14 BH |
711 | { |
712 | unsigned int virq, hint; | |
713 | ||
6e99e458 | 714 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
0ebfff14 BH |
715 | |
716 | /* Look for default host if nececssary */ | |
717 | if (host == NULL) | |
718 | host = irq_default_host; | |
719 | if (host == NULL) { | |
720 | printk(KERN_WARNING "irq_create_mapping called for" | |
721 | " NULL host, hwirq=%lx\n", hwirq); | |
722 | WARN_ON(1); | |
723 | return NO_IRQ; | |
1da177e4 | 724 | } |
0ebfff14 | 725 | pr_debug("irq: -> using host @%p\n", host); |
1da177e4 | 726 | |
8142f032 | 727 | /* Check if mapping already exists */ |
0ebfff14 | 728 | virq = irq_find_mapping(host, hwirq); |
f5921697 | 729 | if (virq != NO_IRQ) { |
0ebfff14 | 730 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
0ebfff14 | 731 | return virq; |
1da177e4 LT |
732 | } |
733 | ||
0ebfff14 BH |
734 | /* Get a virtual interrupt number */ |
735 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | |
736 | /* Handle legacy */ | |
737 | virq = (unsigned int)hwirq; | |
738 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | |
739 | return NO_IRQ; | |
740 | return virq; | |
741 | } else { | |
742 | /* Allocate a virtual interrupt number */ | |
743 | hint = hwirq % irq_virq_count; | |
744 | virq = irq_alloc_virt(host, 1, hint); | |
745 | if (virq == NO_IRQ) { | |
746 | pr_debug("irq: -> virq allocation failed\n"); | |
747 | return NO_IRQ; | |
748 | } | |
749 | } | |
0ebfff14 | 750 | |
6fde40f3 | 751 | if (irq_setup_virq(host, virq, hwirq)) |
0ebfff14 | 752 | return NO_IRQ; |
6fde40f3 | 753 | |
88962934 | 754 | pr_debug("irq: irq %lu on host %s mapped to virtual irq %u\n", |
c7d07fdd ME |
755 | hwirq, host->of_node ? host->of_node->full_name : "null", virq); |
756 | ||
1da177e4 | 757 | return virq; |
0ebfff14 BH |
758 | } |
759 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
760 | ||
f3d2ab41 | 761 | unsigned int irq_create_of_mapping(struct device_node *controller, |
40d50cf7 | 762 | const u32 *intspec, unsigned int intsize) |
0ebfff14 BH |
763 | { |
764 | struct irq_host *host; | |
765 | irq_hw_number_t hwirq; | |
6e99e458 BH |
766 | unsigned int type = IRQ_TYPE_NONE; |
767 | unsigned int virq; | |
1da177e4 | 768 | |
0ebfff14 BH |
769 | if (controller == NULL) |
770 | host = irq_default_host; | |
771 | else | |
772 | host = irq_find_host(controller); | |
6e99e458 BH |
773 | if (host == NULL) { |
774 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | |
775 | controller->full_name); | |
0ebfff14 | 776 | return NO_IRQ; |
6e99e458 | 777 | } |
0ebfff14 BH |
778 | |
779 | /* If host has no translation, then we assume interrupt line */ | |
780 | if (host->ops->xlate == NULL) | |
781 | hwirq = intspec[0]; | |
782 | else { | |
783 | if (host->ops->xlate(host, controller, intspec, intsize, | |
6e99e458 | 784 | &hwirq, &type)) |
0ebfff14 | 785 | return NO_IRQ; |
1da177e4 | 786 | } |
0ebfff14 | 787 | |
6e99e458 BH |
788 | /* Create mapping */ |
789 | virq = irq_create_mapping(host, hwirq); | |
790 | if (virq == NO_IRQ) | |
791 | return virq; | |
792 | ||
793 | /* Set type if specified and different than the current one */ | |
794 | if (type != IRQ_TYPE_NONE && | |
7bfbc1f2 | 795 | type != (irqd_get_trigger_type(irq_get_irq_data(virq)))) |
ec775d0e | 796 | irq_set_irq_type(virq, type); |
6e99e458 | 797 | return virq; |
1da177e4 | 798 | } |
0ebfff14 | 799 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
1da177e4 | 800 | |
0ebfff14 BH |
801 | void irq_dispose_mapping(unsigned int virq) |
802 | { | |
5414c6be | 803 | struct irq_host *host; |
0ebfff14 | 804 | irq_hw_number_t hwirq; |
1da177e4 | 805 | |
5414c6be ME |
806 | if (virq == NO_IRQ) |
807 | return; | |
808 | ||
809 | host = irq_map[virq].host; | |
2d441681 | 810 | if (WARN_ON(host == NULL)) |
0ebfff14 | 811 | return; |
1da177e4 | 812 | |
0ebfff14 BH |
813 | /* Never unmap legacy interrupts */ |
814 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
815 | return; | |
1da177e4 | 816 | |
41fb5e62 MM |
817 | irq_set_status_flags(virq, IRQ_NOREQUEST); |
818 | ||
0ebfff14 | 819 | /* remove chip and handler */ |
ec775d0e | 820 | irq_set_chip_and_handler(virq, NULL, NULL); |
0ebfff14 BH |
821 | |
822 | /* Make sure it's completed */ | |
823 | synchronize_irq(virq); | |
824 | ||
825 | /* Tell the PIC about it */ | |
826 | if (host->ops->unmap) | |
827 | host->ops->unmap(host, virq); | |
828 | smp_mb(); | |
829 | ||
830 | /* Clear reverse map */ | |
831 | hwirq = irq_map[virq].hwirq; | |
832 | switch(host->revmap_type) { | |
833 | case IRQ_HOST_MAP_LINEAR: | |
834 | if (hwirq < host->revmap_data.linear.size) | |
f5921697 | 835 | host->revmap_data.linear.revmap[hwirq] = NO_IRQ; |
0ebfff14 BH |
836 | break; |
837 | case IRQ_HOST_MAP_TREE: | |
150c6c8f | 838 | mutex_lock(&revmap_trees_mutex); |
0ebfff14 | 839 | radix_tree_delete(&host->revmap_data.tree, hwirq); |
150c6c8f | 840 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 BH |
841 | break; |
842 | } | |
1da177e4 | 843 | |
0ebfff14 BH |
844 | /* Destroy map */ |
845 | smp_mb(); | |
846 | irq_map[virq].hwirq = host->inval_irq; | |
1da177e4 | 847 | |
a9d8946b | 848 | irq_free_descs(virq, 1); |
0ebfff14 BH |
849 | /* Free it */ |
850 | irq_free_virt(virq, 1); | |
1da177e4 | 851 | } |
0ebfff14 | 852 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
1da177e4 | 853 | |
0ebfff14 BH |
854 | unsigned int irq_find_mapping(struct irq_host *host, |
855 | irq_hw_number_t hwirq) | |
856 | { | |
857 | unsigned int i; | |
858 | unsigned int hint = hwirq % irq_virq_count; | |
859 | ||
860 | /* Look for default host if nececssary */ | |
861 | if (host == NULL) | |
862 | host = irq_default_host; | |
863 | if (host == NULL) | |
864 | return NO_IRQ; | |
865 | ||
866 | /* legacy -> bail early */ | |
867 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
868 | return hwirq; | |
869 | ||
870 | /* Slow path does a linear search of the map */ | |
871 | if (hint < NUM_ISA_INTERRUPTS) | |
872 | hint = NUM_ISA_INTERRUPTS; | |
873 | i = hint; | |
874 | do { | |
875 | if (irq_map[i].host == host && | |
876 | irq_map[i].hwirq == hwirq) | |
877 | return i; | |
878 | i++; | |
879 | if (i >= irq_virq_count) | |
880 | i = NUM_ISA_INTERRUPTS; | |
881 | } while(i != hint); | |
882 | return NO_IRQ; | |
883 | } | |
884 | EXPORT_SYMBOL_GPL(irq_find_mapping); | |
1da177e4 | 885 | |
6ec36b58 SY |
886 | #ifdef CONFIG_SMP |
887 | int irq_choose_cpu(const struct cpumask *mask) | |
888 | { | |
889 | int cpuid; | |
890 | ||
891 | if (cpumask_equal(mask, cpu_all_mask)) { | |
892 | static int irq_rover; | |
893 | static DEFINE_RAW_SPINLOCK(irq_rover_lock); | |
894 | unsigned long flags; | |
895 | ||
896 | /* Round-robin distribution... */ | |
897 | do_round_robin: | |
898 | raw_spin_lock_irqsave(&irq_rover_lock, flags); | |
899 | ||
900 | irq_rover = cpumask_next(irq_rover, cpu_online_mask); | |
901 | if (irq_rover >= nr_cpu_ids) | |
902 | irq_rover = cpumask_first(cpu_online_mask); | |
903 | ||
904 | cpuid = irq_rover; | |
905 | ||
906 | raw_spin_unlock_irqrestore(&irq_rover_lock, flags); | |
907 | } else { | |
908 | cpuid = cpumask_first_and(mask, cpu_online_mask); | |
909 | if (cpuid >= nr_cpu_ids) | |
910 | goto do_round_robin; | |
911 | } | |
912 | ||
913 | return get_hard_smp_processor_id(cpuid); | |
914 | } | |
915 | #else | |
916 | int irq_choose_cpu(const struct cpumask *mask) | |
917 | { | |
918 | return hard_smp_processor_id(); | |
919 | } | |
920 | #endif | |
0ebfff14 | 921 | |
967e012e SD |
922 | unsigned int irq_radix_revmap_lookup(struct irq_host *host, |
923 | irq_hw_number_t hwirq) | |
1da177e4 | 924 | { |
0ebfff14 BH |
925 | struct irq_map_entry *ptr; |
926 | unsigned int virq; | |
1da177e4 | 927 | |
2d441681 MM |
928 | if (WARN_ON_ONCE(host->revmap_type != IRQ_HOST_MAP_TREE)) |
929 | return irq_find_mapping(host, hwirq); | |
1da177e4 | 930 | |
150c6c8f | 931 | /* |
9b788251 MM |
932 | * The ptr returned references the static global irq_map. |
933 | * but freeing an irq can delete nodes along the path to | |
934 | * do the lookup via call_rcu. | |
150c6c8f | 935 | */ |
9b788251 | 936 | rcu_read_lock(); |
967e012e | 937 | ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq); |
9b788251 | 938 | rcu_read_unlock(); |
8ec8f2e8 | 939 | |
967e012e SD |
940 | /* |
941 | * If found in radix tree, then fine. | |
942 | * Else fallback to linear lookup - this should not happen in practice | |
943 | * as it means that we failed to insert the node in the radix tree. | |
944 | */ | |
945 | if (ptr) | |
0ebfff14 | 946 | virq = ptr - irq_map; |
967e012e SD |
947 | else |
948 | virq = irq_find_mapping(host, hwirq); | |
949 | ||
950 | return virq; | |
951 | } | |
952 | ||
953 | void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq, | |
954 | irq_hw_number_t hwirq) | |
955 | { | |
2d441681 MM |
956 | if (WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE)) |
957 | return; | |
967e012e | 958 | |
8ec8f2e8 | 959 | if (virq != NO_IRQ) { |
150c6c8f | 960 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
961 | radix_tree_insert(&host->revmap_data.tree, hwirq, |
962 | &irq_map[virq]); | |
150c6c8f | 963 | mutex_unlock(&revmap_trees_mutex); |
8ec8f2e8 | 964 | } |
1da177e4 LT |
965 | } |
966 | ||
0ebfff14 BH |
967 | unsigned int irq_linear_revmap(struct irq_host *host, |
968 | irq_hw_number_t hwirq) | |
c6622f63 | 969 | { |
0ebfff14 | 970 | unsigned int *revmap; |
c6622f63 | 971 | |
2d441681 MM |
972 | if (WARN_ON_ONCE(host->revmap_type != IRQ_HOST_MAP_LINEAR)) |
973 | return irq_find_mapping(host, hwirq); | |
0ebfff14 BH |
974 | |
975 | /* Check revmap bounds */ | |
976 | if (unlikely(hwirq >= host->revmap_data.linear.size)) | |
977 | return irq_find_mapping(host, hwirq); | |
978 | ||
979 | /* Check if revmap was allocated */ | |
980 | revmap = host->revmap_data.linear.revmap; | |
981 | if (unlikely(revmap == NULL)) | |
982 | return irq_find_mapping(host, hwirq); | |
983 | ||
984 | /* Fill up revmap with slow path if no mapping found */ | |
985 | if (unlikely(revmap[hwirq] == NO_IRQ)) | |
986 | revmap[hwirq] = irq_find_mapping(host, hwirq); | |
987 | ||
988 | return revmap[hwirq]; | |
c6622f63 PM |
989 | } |
990 | ||
0ebfff14 BH |
991 | unsigned int irq_alloc_virt(struct irq_host *host, |
992 | unsigned int count, | |
993 | unsigned int hint) | |
994 | { | |
995 | unsigned long flags; | |
996 | unsigned int i, j, found = NO_IRQ; | |
c6622f63 | 997 | |
0ebfff14 BH |
998 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
999 | return NO_IRQ; | |
1000 | ||
f95e085b | 1001 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
1002 | |
1003 | /* Use hint for 1 interrupt if any */ | |
1004 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | |
1005 | hint < irq_virq_count && irq_map[hint].host == NULL) { | |
1006 | found = hint; | |
1007 | goto hint_found; | |
1008 | } | |
1009 | ||
1010 | /* Look for count consecutive numbers in the allocatable | |
1011 | * (non-legacy) space | |
1012 | */ | |
e1251465 ME |
1013 | for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) { |
1014 | if (irq_map[i].host != NULL) | |
1015 | j = 0; | |
1016 | else | |
1017 | j++; | |
1018 | ||
1019 | if (j == count) { | |
1020 | found = i - count + 1; | |
1021 | break; | |
1022 | } | |
0ebfff14 BH |
1023 | } |
1024 | if (found == NO_IRQ) { | |
f95e085b | 1025 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
1026 | return NO_IRQ; |
1027 | } | |
1028 | hint_found: | |
1029 | for (i = found; i < (found + count); i++) { | |
1030 | irq_map[i].hwirq = host->inval_irq; | |
1031 | smp_wmb(); | |
1032 | irq_map[i].host = host; | |
1033 | } | |
f95e085b | 1034 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
1035 | return found; |
1036 | } | |
1037 | ||
1038 | void irq_free_virt(unsigned int virq, unsigned int count) | |
1da177e4 LT |
1039 | { |
1040 | unsigned long flags; | |
0ebfff14 | 1041 | unsigned int i; |
1da177e4 | 1042 | |
0ebfff14 BH |
1043 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
1044 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | |
1da177e4 | 1045 | |
4dd60290 MM |
1046 | if (virq < NUM_ISA_INTERRUPTS) { |
1047 | if (virq + count < NUM_ISA_INTERRUPTS) | |
1048 | return; | |
1049 | count =- NUM_ISA_INTERRUPTS - virq; | |
1050 | virq = NUM_ISA_INTERRUPTS; | |
1051 | } | |
1052 | ||
1053 | if (count > irq_virq_count || virq > irq_virq_count - count) { | |
1054 | if (virq > irq_virq_count) | |
1055 | return; | |
1056 | count = irq_virq_count - virq; | |
1057 | } | |
1058 | ||
f95e085b | 1059 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
1060 | for (i = virq; i < (virq + count); i++) { |
1061 | struct irq_host *host; | |
1da177e4 | 1062 | |
0ebfff14 BH |
1063 | host = irq_map[i].host; |
1064 | irq_map[i].hwirq = host->inval_irq; | |
1065 | smp_wmb(); | |
1066 | irq_map[i].host = NULL; | |
1067 | } | |
f95e085b | 1068 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
1da177e4 | 1069 | } |
0ebfff14 | 1070 | |
cd015707 | 1071 | int arch_early_irq_init(void) |
0ebfff14 | 1072 | { |
cd015707 | 1073 | return 0; |
0ebfff14 BH |
1074 | } |
1075 | ||
60b332e7 ME |
1076 | #ifdef CONFIG_VIRQ_DEBUG |
1077 | static int virq_debug_show(struct seq_file *m, void *private) | |
1078 | { | |
1079 | unsigned long flags; | |
97f7d6bc | 1080 | struct irq_desc *desc; |
60b332e7 | 1081 | const char *p; |
4e74fd7d | 1082 | static const char none[] = "none"; |
73706c32 | 1083 | void *data; |
60b332e7 ME |
1084 | int i; |
1085 | ||
73706c32 ME |
1086 | seq_printf(m, "%-5s %-7s %-15s %-18s %s\n", "virq", "hwirq", |
1087 | "chip name", "chip data", "host name"); | |
60b332e7 | 1088 | |
76f1d94f | 1089 | for (i = 1; i < nr_irqs; i++) { |
6cff46f4 | 1090 | desc = irq_to_desc(i); |
76f1d94f ME |
1091 | if (!desc) |
1092 | continue; | |
1093 | ||
239007b8 | 1094 | raw_spin_lock_irqsave(&desc->lock, flags); |
60b332e7 ME |
1095 | |
1096 | if (desc->action && desc->action->handler) { | |
e1180287 LB |
1097 | struct irq_chip *chip; |
1098 | ||
60b332e7 | 1099 | seq_printf(m, "%5d ", i); |
476eb491 | 1100 | seq_printf(m, "0x%05lx ", irq_map[i].hwirq); |
60b332e7 | 1101 | |
ec775d0e | 1102 | chip = irq_desc_get_chip(desc); |
e1180287 LB |
1103 | if (chip && chip->name) |
1104 | p = chip->name; | |
60b332e7 ME |
1105 | else |
1106 | p = none; | |
1107 | seq_printf(m, "%-15s ", p); | |
1108 | ||
73706c32 ME |
1109 | data = irq_desc_get_chip_data(desc); |
1110 | seq_printf(m, "0x%16p ", data); | |
1111 | ||
60b332e7 ME |
1112 | if (irq_map[i].host && irq_map[i].host->of_node) |
1113 | p = irq_map[i].host->of_node->full_name; | |
1114 | else | |
1115 | p = none; | |
1116 | seq_printf(m, "%s\n", p); | |
1117 | } | |
1118 | ||
239007b8 | 1119 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
60b332e7 ME |
1120 | } |
1121 | ||
1122 | return 0; | |
1123 | } | |
1124 | ||
1125 | static int virq_debug_open(struct inode *inode, struct file *file) | |
1126 | { | |
1127 | return single_open(file, virq_debug_show, inode->i_private); | |
1128 | } | |
1129 | ||
1130 | static const struct file_operations virq_debug_fops = { | |
1131 | .open = virq_debug_open, | |
1132 | .read = seq_read, | |
1133 | .llseek = seq_lseek, | |
1134 | .release = single_release, | |
1135 | }; | |
1136 | ||
1137 | static int __init irq_debugfs_init(void) | |
1138 | { | |
1139 | if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root, | |
476ff8a0 | 1140 | NULL, &virq_debug_fops) == NULL) |
60b332e7 ME |
1141 | return -ENOMEM; |
1142 | ||
1143 | return 0; | |
1144 | } | |
1145 | __initcall(irq_debugfs_init); | |
1146 | #endif /* CONFIG_VIRQ_DEBUG */ | |
1147 | ||
c6622f63 | 1148 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
1149 | static int __init setup_noirqdistrib(char *str) |
1150 | { | |
1151 | distribute_irqs = 0; | |
1152 | return 1; | |
1153 | } | |
1154 | ||
1155 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 1156 | #endif /* CONFIG_PPC64 */ |