]>
Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
10 | * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). | |
756e7104 | 11 | * |
1da177e4 LT |
12 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version | |
15 | * 2 of the License, or (at your option) any later version. | |
16 | * | |
17 | * This file contains the code used by various IRQ handling routines: | |
18 | * asking for different IRQ's should be done through these routines | |
19 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
20 | * shouldn't result in any weird surprises, and installing new handlers | |
21 | * should be easier. | |
756e7104 SR |
22 | * |
23 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
24 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
25 | * mask register (of which only 16 are defined), hence the weird shifting | |
26 | * and complement of the cached_irq_mask. I want to be able to stuff | |
27 | * this right into the SIU SMASK register. | |
28 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
29 | * to reduce code space and undefined function references. | |
1da177e4 LT |
30 | */ |
31 | ||
1da177e4 LT |
32 | #include <linux/module.h> |
33 | #include <linux/threads.h> | |
34 | #include <linux/kernel_stat.h> | |
35 | #include <linux/signal.h> | |
36 | #include <linux/sched.h> | |
756e7104 | 37 | #include <linux/ptrace.h> |
1da177e4 LT |
38 | #include <linux/ioport.h> |
39 | #include <linux/interrupt.h> | |
40 | #include <linux/timex.h> | |
41 | #include <linux/config.h> | |
42 | #include <linux/init.h> | |
43 | #include <linux/slab.h> | |
1da177e4 LT |
44 | #include <linux/delay.h> |
45 | #include <linux/irq.h> | |
756e7104 SR |
46 | #include <linux/seq_file.h> |
47 | #include <linux/cpumask.h> | |
1da177e4 LT |
48 | #include <linux/profile.h> |
49 | #include <linux/bitops.h> | |
204face4 | 50 | #include <linux/pci.h> |
1da177e4 LT |
51 | |
52 | #include <asm/uaccess.h> | |
53 | #include <asm/system.h> | |
54 | #include <asm/io.h> | |
55 | #include <asm/pgtable.h> | |
56 | #include <asm/irq.h> | |
57 | #include <asm/cache.h> | |
58 | #include <asm/prom.h> | |
59 | #include <asm/ptrace.h> | |
1da177e4 | 60 | #include <asm/machdep.h> |
a50b56d2 | 61 | #ifdef CONFIG_PPC_ISERIES |
1da177e4 | 62 | #include <asm/paca.h> |
756e7104 | 63 | #endif |
1da177e4 | 64 | |
868accb7 SR |
65 | int __irq_offset_value; |
66 | #ifdef CONFIG_PPC32 | |
67 | EXPORT_SYMBOL(__irq_offset_value); | |
68 | #endif | |
69 | ||
756e7104 SR |
70 | static int ppc_spurious_interrupts; |
71 | ||
756e7104 SR |
72 | #ifdef CONFIG_PPC32 |
73 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) | |
74 | ||
75 | unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; | |
76 | atomic_t ppc_n_lost_interrupts; | |
77 | ||
78 | #ifdef CONFIG_TAU_INT | |
79 | extern int tau_initialized; | |
80 | extern int tau_interrupts(int); | |
81 | #endif | |
82 | ||
83 | #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) | |
84 | extern atomic_t ipi_recv; | |
85 | extern atomic_t ipi_sent; | |
86 | #endif | |
87 | #endif /* CONFIG_PPC32 */ | |
88 | ||
89 | #ifdef CONFIG_PPC64 | |
1da177e4 LT |
90 | EXPORT_SYMBOL(irq_desc); |
91 | ||
92 | int distribute_irqs = 1; | |
1da177e4 | 93 | u64 ppc64_interrupt_controller; |
756e7104 | 94 | #endif /* CONFIG_PPC64 */ |
1da177e4 LT |
95 | |
96 | int show_interrupts(struct seq_file *p, void *v) | |
97 | { | |
756e7104 SR |
98 | int i = *(loff_t *)v, j; |
99 | struct irqaction *action; | |
1da177e4 LT |
100 | irq_desc_t *desc; |
101 | unsigned long flags; | |
102 | ||
103 | if (i == 0) { | |
756e7104 SR |
104 | seq_puts(p, " "); |
105 | for_each_online_cpu(j) | |
106 | seq_printf(p, "CPU%d ", j); | |
1da177e4 LT |
107 | seq_putc(p, '\n'); |
108 | } | |
109 | ||
110 | if (i < NR_IRQS) { | |
111 | desc = get_irq_desc(i); | |
112 | spin_lock_irqsave(&desc->lock, flags); | |
113 | action = desc->action; | |
114 | if (!action || !action->handler) | |
115 | goto skip; | |
116 | seq_printf(p, "%3d: ", i); | |
117 | #ifdef CONFIG_SMP | |
756e7104 SR |
118 | for_each_online_cpu(j) |
119 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | |
1da177e4 LT |
120 | #else |
121 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
122 | #endif /* CONFIG_SMP */ | |
123 | if (desc->handler) | |
756e7104 | 124 | seq_printf(p, " %s ", desc->handler->typename); |
1da177e4 | 125 | else |
756e7104 | 126 | seq_puts(p, " None "); |
1da177e4 | 127 | seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); |
756e7104 SR |
128 | seq_printf(p, " %s", action->name); |
129 | for (action = action->next; action; action = action->next) | |
1da177e4 LT |
130 | seq_printf(p, ", %s", action->name); |
131 | seq_putc(p, '\n'); | |
132 | skip: | |
133 | spin_unlock_irqrestore(&desc->lock, flags); | |
756e7104 SR |
134 | } else if (i == NR_IRQS) { |
135 | #ifdef CONFIG_PPC32 | |
136 | #ifdef CONFIG_TAU_INT | |
137 | if (tau_initialized){ | |
138 | seq_puts(p, "TAU: "); | |
394e3902 AM |
139 | for_each_online_cpu(j) |
140 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
756e7104 SR |
141 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); |
142 | } | |
143 | #endif | |
144 | #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) | |
145 | /* should this be per processor send/receive? */ | |
146 | seq_printf(p, "IPI (recv/sent): %10u/%u\n", | |
147 | atomic_read(&ipi_recv), atomic_read(&ipi_sent)); | |
148 | #endif | |
149 | #endif /* CONFIG_PPC32 */ | |
1da177e4 | 150 | seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts); |
756e7104 | 151 | } |
1da177e4 LT |
152 | return 0; |
153 | } | |
154 | ||
155 | #ifdef CONFIG_HOTPLUG_CPU | |
156 | void fixup_irqs(cpumask_t map) | |
157 | { | |
158 | unsigned int irq; | |
159 | static int warned; | |
160 | ||
161 | for_each_irq(irq) { | |
162 | cpumask_t mask; | |
163 | ||
164 | if (irq_desc[irq].status & IRQ_PER_CPU) | |
165 | continue; | |
166 | ||
167 | cpus_and(mask, irq_affinity[irq], map); | |
168 | if (any_online_cpu(mask) == NR_CPUS) { | |
169 | printk("Breaking affinity for irq %i\n", irq); | |
170 | mask = map; | |
171 | } | |
172 | if (irq_desc[irq].handler->set_affinity) | |
173 | irq_desc[irq].handler->set_affinity(irq, mask); | |
174 | else if (irq_desc[irq].action && !(warned++)) | |
175 | printk("Cannot set affinity for irq %i\n", irq); | |
176 | } | |
177 | ||
178 | local_irq_enable(); | |
179 | mdelay(1); | |
180 | local_irq_disable(); | |
181 | } | |
182 | #endif | |
183 | ||
1da177e4 LT |
184 | void do_IRQ(struct pt_regs *regs) |
185 | { | |
186 | int irq; | |
b709c083 SR |
187 | #ifdef CONFIG_IRQSTACKS |
188 | struct thread_info *curtp, *irqtp; | |
189 | #endif | |
1da177e4 | 190 | |
756e7104 | 191 | irq_enter(); |
1da177e4 LT |
192 | |
193 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
194 | /* Debugging check for stack overflow: is there less than 2KB free? */ | |
195 | { | |
196 | long sp; | |
197 | ||
198 | sp = __get_SP() & (THREAD_SIZE-1); | |
199 | ||
200 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
201 | printk("do_IRQ: stack overflow: %ld\n", | |
202 | sp - sizeof(struct thread_info)); | |
203 | dump_stack(); | |
204 | } | |
205 | } | |
206 | #endif | |
207 | ||
756e7104 SR |
208 | /* |
209 | * Every platform is required to implement ppc_md.get_irq. | |
210 | * This function will either return an irq number or -1 to | |
211 | * indicate there are no more pending. | |
212 | * The value -2 is for buggy hardware and means that this IRQ | |
213 | * has already been handled. -- Tom | |
214 | */ | |
1da177e4 LT |
215 | irq = ppc_md.get_irq(regs); |
216 | ||
b709c083 SR |
217 | if (irq >= 0) { |
218 | #ifdef CONFIG_IRQSTACKS | |
219 | /* Switch to the irq stack to handle this */ | |
220 | curtp = current_thread_info(); | |
221 | irqtp = hardirq_ctx[smp_processor_id()]; | |
222 | if (curtp != irqtp) { | |
223 | irqtp->task = curtp->task; | |
224 | irqtp->flags = 0; | |
d4be4f37 | 225 | call___do_IRQ(irq, regs, irqtp); |
b709c083 SR |
226 | irqtp->task = NULL; |
227 | if (irqtp->flags) | |
228 | set_bits(irqtp->flags, &curtp->flags); | |
229 | } else | |
230 | #endif | |
d4be4f37 | 231 | __do_IRQ(irq, regs); |
e199500c SR |
232 | } else if (irq != -2) |
233 | /* That's not SMP safe ... but who cares ? */ | |
234 | ppc_spurious_interrupts++; | |
235 | ||
756e7104 | 236 | irq_exit(); |
756e7104 | 237 | |
e199500c | 238 | #ifdef CONFIG_PPC_ISERIES |
3356bb9f DG |
239 | if (get_lppaca()->int_dword.fields.decr_int) { |
240 | get_lppaca()->int_dword.fields.decr_int = 0; | |
241 | /* Signal a fake decrementer interrupt */ | |
242 | timer_interrupt(regs); | |
e199500c SR |
243 | } |
244 | #endif | |
245 | } | |
1da177e4 LT |
246 | |
247 | void __init init_IRQ(void) | |
248 | { | |
756e7104 | 249 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
250 | static int once = 0; |
251 | ||
252 | if (once) | |
253 | return; | |
254 | ||
255 | once++; | |
256 | ||
756e7104 | 257 | #endif |
1da177e4 | 258 | ppc_md.init_IRQ(); |
756e7104 | 259 | #ifdef CONFIG_PPC64 |
1da177e4 | 260 | irq_ctx_init(); |
756e7104 | 261 | #endif |
1da177e4 LT |
262 | } |
263 | ||
756e7104 | 264 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
265 | /* |
266 | * Virtual IRQ mapping code, used on systems with XICS interrupt controllers. | |
267 | */ | |
268 | ||
269 | #define UNDEFINED_IRQ 0xffffffff | |
270 | unsigned int virt_irq_to_real_map[NR_IRQS]; | |
271 | ||
272 | /* | |
273 | * Don't use virtual irqs 0, 1, 2 for devices. | |
274 | * The pcnet32 driver considers interrupt numbers < 2 to be invalid, | |
275 | * and 2 is the XICS IPI interrupt. | |
7d01c880 SR |
276 | * We limit virtual irqs to __irq_offet_value less than virt_irq_max so |
277 | * that when we offset them we don't end up with an interrupt | |
278 | * number >= virt_irq_max. | |
1da177e4 LT |
279 | */ |
280 | #define MIN_VIRT_IRQ 3 | |
7d01c880 SR |
281 | |
282 | unsigned int virt_irq_max; | |
283 | static unsigned int max_virt_irq; | |
284 | static unsigned int nr_virt_irqs; | |
1da177e4 LT |
285 | |
286 | void | |
287 | virt_irq_init(void) | |
288 | { | |
289 | int i; | |
7d01c880 SR |
290 | |
291 | if ((virt_irq_max == 0) || (virt_irq_max > (NR_IRQS - 1))) | |
292 | virt_irq_max = NR_IRQS - 1; | |
293 | max_virt_irq = virt_irq_max - __irq_offset_value; | |
294 | nr_virt_irqs = max_virt_irq - MIN_VIRT_IRQ + 1; | |
295 | ||
1da177e4 LT |
296 | for (i = 0; i < NR_IRQS; i++) |
297 | virt_irq_to_real_map[i] = UNDEFINED_IRQ; | |
298 | } | |
299 | ||
300 | /* Create a mapping for a real_irq if it doesn't already exist. | |
301 | * Return the virtual irq as a convenience. | |
302 | */ | |
303 | int virt_irq_create_mapping(unsigned int real_irq) | |
304 | { | |
305 | unsigned int virq, first_virq; | |
306 | static int warned; | |
307 | ||
308 | if (ppc64_interrupt_controller == IC_OPEN_PIC) | |
309 | return real_irq; /* no mapping for openpic (for now) */ | |
310 | ||
f3f66f59 | 311 | if (ppc64_interrupt_controller == IC_CELL_PIC) |
fef1c772 AB |
312 | return real_irq; /* no mapping for iic either */ |
313 | ||
1da177e4 LT |
314 | /* don't map interrupts < MIN_VIRT_IRQ */ |
315 | if (real_irq < MIN_VIRT_IRQ) { | |
316 | virt_irq_to_real_map[real_irq] = real_irq; | |
317 | return real_irq; | |
318 | } | |
319 | ||
7d01c880 | 320 | /* map to a number between MIN_VIRT_IRQ and max_virt_irq */ |
1da177e4 | 321 | virq = real_irq; |
7d01c880 SR |
322 | if (virq > max_virt_irq) |
323 | virq = (virq % nr_virt_irqs) + MIN_VIRT_IRQ; | |
1da177e4 LT |
324 | |
325 | /* search for this number or a free slot */ | |
326 | first_virq = virq; | |
327 | while (virt_irq_to_real_map[virq] != UNDEFINED_IRQ) { | |
328 | if (virt_irq_to_real_map[virq] == real_irq) | |
329 | return virq; | |
7d01c880 | 330 | if (++virq > max_virt_irq) |
1da177e4 LT |
331 | virq = MIN_VIRT_IRQ; |
332 | if (virq == first_virq) | |
333 | goto nospace; /* oops, no free slots */ | |
334 | } | |
335 | ||
336 | virt_irq_to_real_map[virq] = real_irq; | |
337 | return virq; | |
338 | ||
339 | nospace: | |
340 | if (!warned) { | |
341 | printk(KERN_CRIT "Interrupt table is full\n"); | |
7d01c880 SR |
342 | printk(KERN_CRIT "Increase virt_irq_max (currently %d) " |
343 | "in your kernel sources and rebuild.\n", virt_irq_max); | |
1da177e4 LT |
344 | warned = 1; |
345 | } | |
346 | return NO_IRQ; | |
347 | } | |
348 | ||
349 | /* | |
350 | * In most cases will get a hit on the very first slot checked in the | |
351 | * virt_irq_to_real_map. Only when there are a large number of | |
352 | * IRQs will this be expensive. | |
353 | */ | |
354 | unsigned int real_irq_to_virt_slowpath(unsigned int real_irq) | |
355 | { | |
356 | unsigned int virq; | |
357 | unsigned int first_virq; | |
358 | ||
359 | virq = real_irq; | |
360 | ||
7d01c880 SR |
361 | if (virq > max_virt_irq) |
362 | virq = (virq % nr_virt_irqs) + MIN_VIRT_IRQ; | |
1da177e4 LT |
363 | |
364 | first_virq = virq; | |
365 | ||
366 | do { | |
367 | if (virt_irq_to_real_map[virq] == real_irq) | |
368 | return virq; | |
369 | ||
370 | virq++; | |
371 | ||
7d01c880 | 372 | if (virq >= max_virt_irq) |
1da177e4 LT |
373 | virq = 0; |
374 | ||
375 | } while (first_virq != virq); | |
376 | ||
377 | return NO_IRQ; | |
378 | ||
379 | } | |
c6622f63 | 380 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 381 | |
1da177e4 LT |
382 | #ifdef CONFIG_IRQSTACKS |
383 | struct thread_info *softirq_ctx[NR_CPUS]; | |
384 | struct thread_info *hardirq_ctx[NR_CPUS]; | |
385 | ||
386 | void irq_ctx_init(void) | |
387 | { | |
388 | struct thread_info *tp; | |
389 | int i; | |
390 | ||
0e551954 | 391 | for_each_possible_cpu(i) { |
1da177e4 LT |
392 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
393 | tp = softirq_ctx[i]; | |
394 | tp->cpu = i; | |
395 | tp->preempt_count = SOFTIRQ_OFFSET; | |
396 | ||
397 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
398 | tp = hardirq_ctx[i]; | |
399 | tp->cpu = i; | |
400 | tp->preempt_count = HARDIRQ_OFFSET; | |
401 | } | |
402 | } | |
403 | ||
c6622f63 PM |
404 | static inline void do_softirq_onstack(void) |
405 | { | |
406 | struct thread_info *curtp, *irqtp; | |
407 | ||
408 | curtp = current_thread_info(); | |
409 | irqtp = softirq_ctx[smp_processor_id()]; | |
410 | irqtp->task = curtp->task; | |
411 | call_do_softirq(irqtp); | |
412 | irqtp->task = NULL; | |
413 | } | |
414 | ||
415 | #else | |
416 | #define do_softirq_onstack() __do_softirq() | |
417 | #endif /* CONFIG_IRQSTACKS */ | |
418 | ||
1da177e4 LT |
419 | void do_softirq(void) |
420 | { | |
421 | unsigned long flags; | |
1da177e4 LT |
422 | |
423 | if (in_interrupt()) | |
424 | return; | |
425 | ||
426 | local_irq_save(flags); | |
427 | ||
428 | if (local_softirq_pending()) { | |
c6622f63 PM |
429 | account_system_vtime(current); |
430 | local_bh_disable(); | |
431 | do_softirq_onstack(); | |
432 | account_system_vtime(current); | |
433 | __local_bh_enable(); | |
1da177e4 LT |
434 | } |
435 | ||
436 | local_irq_restore(flags); | |
437 | } | |
438 | EXPORT_SYMBOL(do_softirq); | |
439 | ||
204face4 JM |
440 | #ifdef CONFIG_PCI_MSI |
441 | int pci_enable_msi(struct pci_dev * pdev) | |
442 | { | |
443 | if (ppc_md.enable_msi) | |
444 | return ppc_md.enable_msi(pdev); | |
445 | else | |
446 | return -1; | |
447 | } | |
448 | ||
449 | void pci_disable_msi(struct pci_dev * pdev) | |
450 | { | |
451 | if (ppc_md.disable_msi) | |
452 | ppc_md.disable_msi(pdev); | |
453 | } | |
454 | ||
455 | void pci_scan_msi_device(struct pci_dev *dev) {} | |
456 | int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) {return -1;} | |
457 | void pci_disable_msix(struct pci_dev *dev) {} | |
458 | void msi_remove_pci_irq_vectors(struct pci_dev *dev) {} | |
459 | void disable_msi_mode(struct pci_dev *dev, int pos, int type) {} | |
460 | void pci_no_msi(void) {} | |
461 | ||
462 | #endif | |
463 | ||
c6622f63 | 464 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
465 | static int __init setup_noirqdistrib(char *str) |
466 | { | |
467 | distribute_irqs = 0; | |
468 | return 1; | |
469 | } | |
470 | ||
471 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 472 | #endif /* CONFIG_PPC64 */ |