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CommitLineData
1da177e4 1/*
1da177e4
LT
2 * Derived from arch/i386/kernel/irq.c
3 * Copyright (C) 1992 Linus Torvalds
4 * Adapted from arch/i386 by Gary Thomas
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
756e7104
SR
6 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
7 * Copyright (C) 1996-2001 Cort Dougan
1da177e4
LT
8 * Adapted for Power Macintosh by Paul Mackerras
9 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
756e7104 10 *
1da177e4
LT
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 *
16 * This file contains the code used by various IRQ handling routines:
17 * asking for different IRQ's should be done through these routines
18 * instead of just grabbing them. Thus setups with different IRQ numbers
19 * shouldn't result in any weird surprises, and installing new handlers
20 * should be easier.
756e7104
SR
21 *
22 * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
23 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
24 * mask register (of which only 16 are defined), hence the weird shifting
25 * and complement of the cached_irq_mask. I want to be able to stuff
26 * this right into the SIU SMASK register.
27 * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
28 * to reduce code space and undefined function references.
1da177e4
LT
29 */
30
0ebfff14
BH
31#undef DEBUG
32
1da177e4
LT
33#include <linux/module.h>
34#include <linux/threads.h>
35#include <linux/kernel_stat.h>
36#include <linux/signal.h>
37#include <linux/sched.h>
756e7104 38#include <linux/ptrace.h>
1da177e4
LT
39#include <linux/ioport.h>
40#include <linux/interrupt.h>
41#include <linux/timex.h>
1da177e4
LT
42#include <linux/init.h>
43#include <linux/slab.h>
1da177e4
LT
44#include <linux/delay.h>
45#include <linux/irq.h>
756e7104
SR
46#include <linux/seq_file.h>
47#include <linux/cpumask.h>
1da177e4
LT
48#include <linux/profile.h>
49#include <linux/bitops.h>
0ebfff14
BH
50#include <linux/list.h>
51#include <linux/radix-tree.h>
52#include <linux/mutex.h>
53#include <linux/bootmem.h>
45934c47 54#include <linux/pci.h>
60b332e7 55#include <linux/debugfs.h>
1da177e4
LT
56
57#include <asm/uaccess.h>
58#include <asm/system.h>
59#include <asm/io.h>
60#include <asm/pgtable.h>
61#include <asm/irq.h>
62#include <asm/cache.h>
63#include <asm/prom.h>
64#include <asm/ptrace.h>
1da177e4 65#include <asm/machdep.h>
0ebfff14 66#include <asm/udbg.h>
d04c56f7 67#ifdef CONFIG_PPC64
1da177e4 68#include <asm/paca.h>
d04c56f7 69#include <asm/firmware.h>
0874dd40 70#include <asm/lv1call.h>
756e7104 71#endif
1da177e4 72
868accb7 73int __irq_offset_value;
756e7104
SR
74static int ppc_spurious_interrupts;
75
756e7104 76#ifdef CONFIG_PPC32
b9e5b4e6
BH
77EXPORT_SYMBOL(__irq_offset_value);
78atomic_t ppc_n_lost_interrupts;
756e7104 79
b9e5b4e6
BH
80#ifndef CONFIG_PPC_MERGE
81#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
756e7104 82unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
b9e5b4e6 83#endif
756e7104
SR
84
85#ifdef CONFIG_TAU_INT
86extern int tau_initialized;
87extern int tau_interrupts(int);
88#endif
b9e5b4e6 89#endif /* CONFIG_PPC32 */
756e7104
SR
90
91#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
92extern atomic_t ipi_recv;
93extern atomic_t ipi_sent;
94#endif
756e7104
SR
95
96#ifdef CONFIG_PPC64
1da177e4
LT
97EXPORT_SYMBOL(irq_desc);
98
99int distribute_irqs = 1;
d04c56f7 100
ef2b343e
HD
101static inline unsigned long get_hard_enabled(void)
102{
103 unsigned long enabled;
104
105 __asm__ __volatile__("lbz %0,%1(13)"
106 : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled)));
107
108 return enabled;
109}
110
111static inline void set_soft_enabled(unsigned long enable)
112{
113 __asm__ __volatile__("stb %0,%1(13)"
114 : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
115}
116
d04c56f7
PM
117void local_irq_restore(unsigned long en)
118{
ef2b343e
HD
119 /*
120 * get_paca()->soft_enabled = en;
121 * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1?
122 * That was allowed before, and in such a case we do need to take care
123 * that gcc will set soft_enabled directly via r13, not choose to use
124 * an intermediate register, lest we're preempted to a different cpu.
125 */
126 set_soft_enabled(en);
d04c56f7
PM
127 if (!en)
128 return;
129
130 if (firmware_has_feature(FW_FEATURE_ISERIES)) {
ef2b343e
HD
131 /*
132 * Do we need to disable preemption here? Not really: in the
133 * unlikely event that we're preempted to a different cpu in
134 * between getting r13, loading its lppaca_ptr, and loading
135 * its any_int, we might call iseries_handle_interrupts without
136 * an interrupt pending on the new cpu, but that's no disaster,
137 * is it? And the business of preempting us off the old cpu
138 * would itself involve a local_irq_restore which handles the
139 * interrupt to that cpu.
140 *
141 * But use "local_paca->lppaca_ptr" instead of "get_lppaca()"
142 * to avoid any preemption checking added into get_paca().
143 */
144 if (local_paca->lppaca_ptr->int_dword.any_int)
d04c56f7 145 iseries_handle_interrupts();
d04c56f7
PM
146 }
147
ef2b343e
HD
148 /*
149 * if (get_paca()->hard_enabled) return;
150 * But again we need to take care that gcc gets hard_enabled directly
151 * via r13, not choose to use an intermediate register, lest we're
152 * preempted to a different cpu in between the two instructions.
153 */
154 if (get_hard_enabled())
d04c56f7 155 return;
ef2b343e
HD
156
157 /*
158 * Need to hard-enable interrupts here. Since currently disabled,
159 * no need to take further asm precautions against preemption; but
160 * use local_paca instead of get_paca() to avoid preemption checking.
161 */
162 local_paca->hard_enabled = en;
d04c56f7
PM
163 if ((int)mfspr(SPRN_DEC) < 0)
164 mtspr(SPRN_DEC, 1);
0874dd40
TS
165
166 /*
167 * Force the delivery of pending soft-disabled interrupts on PS3.
168 * Any HV call will have this side effect.
169 */
170 if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
171 u64 tmp;
172 lv1_get_version_info(&tmp);
173 }
174
e1fa2e13 175 __hard_irq_enable();
d04c56f7 176}
756e7104 177#endif /* CONFIG_PPC64 */
1da177e4
LT
178
179int show_interrupts(struct seq_file *p, void *v)
180{
756e7104
SR
181 int i = *(loff_t *)v, j;
182 struct irqaction *action;
1da177e4
LT
183 irq_desc_t *desc;
184 unsigned long flags;
185
186 if (i == 0) {
756e7104
SR
187 seq_puts(p, " ");
188 for_each_online_cpu(j)
189 seq_printf(p, "CPU%d ", j);
1da177e4
LT
190 seq_putc(p, '\n');
191 }
192
193 if (i < NR_IRQS) {
194 desc = get_irq_desc(i);
195 spin_lock_irqsave(&desc->lock, flags);
196 action = desc->action;
197 if (!action || !action->handler)
198 goto skip;
199 seq_printf(p, "%3d: ", i);
200#ifdef CONFIG_SMP
756e7104
SR
201 for_each_online_cpu(j)
202 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
1da177e4
LT
203#else
204 seq_printf(p, "%10u ", kstat_irqs(i));
205#endif /* CONFIG_SMP */
d1bef4ed
IM
206 if (desc->chip)
207 seq_printf(p, " %s ", desc->chip->typename);
1da177e4 208 else
756e7104 209 seq_puts(p, " None ");
1da177e4 210 seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge ");
756e7104
SR
211 seq_printf(p, " %s", action->name);
212 for (action = action->next; action; action = action->next)
1da177e4
LT
213 seq_printf(p, ", %s", action->name);
214 seq_putc(p, '\n');
215skip:
216 spin_unlock_irqrestore(&desc->lock, flags);
756e7104
SR
217 } else if (i == NR_IRQS) {
218#ifdef CONFIG_PPC32
219#ifdef CONFIG_TAU_INT
220 if (tau_initialized){
221 seq_puts(p, "TAU: ");
394e3902
AM
222 for_each_online_cpu(j)
223 seq_printf(p, "%10u ", tau_interrupts(j));
756e7104
SR
224 seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
225 }
226#endif
227#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
228 /* should this be per processor send/receive? */
229 seq_printf(p, "IPI (recv/sent): %10u/%u\n",
230 atomic_read(&ipi_recv), atomic_read(&ipi_sent));
231#endif
232#endif /* CONFIG_PPC32 */
1da177e4 233 seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
756e7104 234 }
1da177e4
LT
235 return 0;
236}
237
238#ifdef CONFIG_HOTPLUG_CPU
239void fixup_irqs(cpumask_t map)
240{
241 unsigned int irq;
242 static int warned;
243
244 for_each_irq(irq) {
245 cpumask_t mask;
246
247 if (irq_desc[irq].status & IRQ_PER_CPU)
248 continue;
249
a53da52f 250 cpus_and(mask, irq_desc[irq].affinity, map);
1da177e4
LT
251 if (any_online_cpu(mask) == NR_CPUS) {
252 printk("Breaking affinity for irq %i\n", irq);
253 mask = map;
254 }
d1bef4ed
IM
255 if (irq_desc[irq].chip->set_affinity)
256 irq_desc[irq].chip->set_affinity(irq, mask);
1da177e4
LT
257 else if (irq_desc[irq].action && !(warned++))
258 printk("Cannot set affinity for irq %i\n", irq);
259 }
260
261 local_irq_enable();
262 mdelay(1);
263 local_irq_disable();
264}
265#endif
266
1da177e4
LT
267void do_IRQ(struct pt_regs *regs)
268{
7d12e780 269 struct pt_regs *old_regs = set_irq_regs(regs);
0ebfff14 270 unsigned int irq;
b709c083
SR
271#ifdef CONFIG_IRQSTACKS
272 struct thread_info *curtp, *irqtp;
273#endif
1da177e4 274
4b218e9b 275 irq_enter();
1da177e4
LT
276
277#ifdef CONFIG_DEBUG_STACKOVERFLOW
278 /* Debugging check for stack overflow: is there less than 2KB free? */
279 {
280 long sp;
281
282 sp = __get_SP() & (THREAD_SIZE-1);
283
284 if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
285 printk("do_IRQ: stack overflow: %ld\n",
286 sp - sizeof(struct thread_info));
287 dump_stack();
288 }
289 }
290#endif
291
756e7104
SR
292 /*
293 * Every platform is required to implement ppc_md.get_irq.
92d4dda3 294 * This function will either return an irq number or NO_IRQ to
756e7104 295 * indicate there are no more pending.
92d4dda3
JB
296 * The value NO_IRQ_IGNORE is for buggy hardware and means that this
297 * IRQ has already been handled. -- Tom
756e7104 298 */
35a84c2f 299 irq = ppc_md.get_irq();
1da177e4 300
0ebfff14 301 if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
b709c083
SR
302#ifdef CONFIG_IRQSTACKS
303 /* Switch to the irq stack to handle this */
304 curtp = current_thread_info();
305 irqtp = hardirq_ctx[smp_processor_id()];
306 if (curtp != irqtp) {
b9e5b4e6
BH
307 struct irq_desc *desc = irq_desc + irq;
308 void *handler = desc->handle_irq;
309 if (handler == NULL)
310 handler = &__do_IRQ;
b709c083
SR
311 irqtp->task = curtp->task;
312 irqtp->flags = 0;
7d12e780 313 call_handle_irq(irq, desc, irqtp, handler);
b709c083
SR
314 irqtp->task = NULL;
315 if (irqtp->flags)
316 set_bits(irqtp->flags, &curtp->flags);
317 } else
318#endif
7d12e780 319 generic_handle_irq(irq);
0ebfff14 320 } else if (irq != NO_IRQ_IGNORE)
e199500c
SR
321 /* That's not SMP safe ... but who cares ? */
322 ppc_spurious_interrupts++;
323
4b218e9b 324 irq_exit();
7d12e780 325 set_irq_regs(old_regs);
756e7104 326
e199500c 327#ifdef CONFIG_PPC_ISERIES
b06a3183
SR
328 if (firmware_has_feature(FW_FEATURE_ISERIES) &&
329 get_lppaca()->int_dword.fields.decr_int) {
3356bb9f
DG
330 get_lppaca()->int_dword.fields.decr_int = 0;
331 /* Signal a fake decrementer interrupt */
332 timer_interrupt(regs);
e199500c
SR
333 }
334#endif
335}
1da177e4
LT
336
337void __init init_IRQ(void)
338{
70584578
SR
339 if (ppc_md.init_IRQ)
340 ppc_md.init_IRQ();
756e7104 341#ifdef CONFIG_PPC64
1da177e4 342 irq_ctx_init();
756e7104 343#endif
1da177e4
LT
344}
345
1da177e4 346
1da177e4 347#ifdef CONFIG_IRQSTACKS
22722051
AM
348struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
349struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
1da177e4
LT
350
351void irq_ctx_init(void)
352{
353 struct thread_info *tp;
354 int i;
355
0e551954 356 for_each_possible_cpu(i) {
1da177e4
LT
357 memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
358 tp = softirq_ctx[i];
359 tp->cpu = i;
360 tp->preempt_count = SOFTIRQ_OFFSET;
361
362 memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
363 tp = hardirq_ctx[i];
364 tp->cpu = i;
365 tp->preempt_count = HARDIRQ_OFFSET;
366 }
367}
368
c6622f63
PM
369static inline void do_softirq_onstack(void)
370{
371 struct thread_info *curtp, *irqtp;
372
373 curtp = current_thread_info();
374 irqtp = softirq_ctx[smp_processor_id()];
375 irqtp->task = curtp->task;
376 call_do_softirq(irqtp);
377 irqtp->task = NULL;
378}
1da177e4 379
c6622f63
PM
380#else
381#define do_softirq_onstack() __do_softirq()
382#endif /* CONFIG_IRQSTACKS */
383
1da177e4
LT
384void do_softirq(void)
385{
386 unsigned long flags;
1da177e4
LT
387
388 if (in_interrupt())
1da177e4
LT
389 return;
390
1da177e4 391 local_irq_save(flags);
1da177e4 392
912b2539 393 if (local_softirq_pending())
c6622f63 394 do_softirq_onstack();
1da177e4
LT
395
396 local_irq_restore(flags);
1da177e4 397}
1da177e4 398
1da177e4 399
1da177e4 400/*
0ebfff14 401 * IRQ controller and virtual interrupts
1da177e4
LT
402 */
403
0ebfff14 404#ifdef CONFIG_PPC_MERGE
1da177e4 405
0ebfff14 406static LIST_HEAD(irq_hosts);
057b184a 407static DEFINE_SPINLOCK(irq_big_lock);
8ec8f2e8
BH
408static DEFINE_PER_CPU(unsigned int, irq_radix_reader);
409static unsigned int irq_radix_writer;
0ebfff14
BH
410struct irq_map_entry irq_map[NR_IRQS];
411static unsigned int irq_virq_count = NR_IRQS;
412static struct irq_host *irq_default_host;
1da177e4 413
35923f12
OJ
414irq_hw_number_t virq_to_hw(unsigned int virq)
415{
416 return irq_map[virq].hwirq;
417}
418EXPORT_SYMBOL_GPL(virq_to_hw);
419
68158006
ME
420static int default_irq_host_match(struct irq_host *h, struct device_node *np)
421{
422 return h->of_node != NULL && h->of_node == np;
423}
424
5669c3cf 425struct irq_host *irq_alloc_host(struct device_node *of_node,
52964f87
ME
426 unsigned int revmap_type,
427 unsigned int revmap_arg,
428 struct irq_host_ops *ops,
429 irq_hw_number_t inval_irq)
1da177e4 430{
0ebfff14
BH
431 struct irq_host *host;
432 unsigned int size = sizeof(struct irq_host);
433 unsigned int i;
434 unsigned int *rmap;
435 unsigned long flags;
436
437 /* Allocate structure and revmap table if using linear mapping */
438 if (revmap_type == IRQ_HOST_MAP_LINEAR)
439 size += revmap_arg * sizeof(unsigned int);
5669c3cf 440 host = zalloc_maybe_bootmem(size, GFP_KERNEL);
0ebfff14
BH
441 if (host == NULL)
442 return NULL;
7d01c880 443
0ebfff14
BH
444 /* Fill structure */
445 host->revmap_type = revmap_type;
446 host->inval_irq = inval_irq;
447 host->ops = ops;
52964f87 448 host->of_node = of_node;
7d01c880 449
68158006
ME
450 if (host->ops->match == NULL)
451 host->ops->match = default_irq_host_match;
7d01c880 452
0ebfff14
BH
453 spin_lock_irqsave(&irq_big_lock, flags);
454
455 /* If it's a legacy controller, check for duplicates and
456 * mark it as allocated (we use irq 0 host pointer for that
457 */
458 if (revmap_type == IRQ_HOST_MAP_LEGACY) {
459 if (irq_map[0].host != NULL) {
460 spin_unlock_irqrestore(&irq_big_lock, flags);
461 /* If we are early boot, we can't free the structure,
462 * too bad...
463 * this will be fixed once slab is made available early
464 * instead of the current cruft
465 */
466 if (mem_init_done)
467 kfree(host);
468 return NULL;
469 }
470 irq_map[0].host = host;
471 }
472
473 list_add(&host->link, &irq_hosts);
474 spin_unlock_irqrestore(&irq_big_lock, flags);
475
476 /* Additional setups per revmap type */
477 switch(revmap_type) {
478 case IRQ_HOST_MAP_LEGACY:
479 /* 0 is always the invalid number for legacy */
480 host->inval_irq = 0;
481 /* setup us as the host for all legacy interrupts */
482 for (i = 1; i < NUM_ISA_INTERRUPTS; i++) {
7866291d 483 irq_map[i].hwirq = i;
0ebfff14
BH
484 smp_wmb();
485 irq_map[i].host = host;
486 smp_wmb();
487
6e99e458
BH
488 /* Clear norequest flags */
489 get_irq_desc(i)->status &= ~IRQ_NOREQUEST;
0ebfff14
BH
490
491 /* Legacy flags are left to default at this point,
492 * one can then use irq_create_mapping() to
c03983ac 493 * explicitly change them
0ebfff14 494 */
6e99e458 495 ops->map(host, i, i);
0ebfff14
BH
496 }
497 break;
498 case IRQ_HOST_MAP_LINEAR:
499 rmap = (unsigned int *)(host + 1);
500 for (i = 0; i < revmap_arg; i++)
f5921697 501 rmap[i] = NO_IRQ;
0ebfff14
BH
502 host->revmap_data.linear.size = revmap_arg;
503 smp_wmb();
504 host->revmap_data.linear.revmap = rmap;
505 break;
506 default:
507 break;
508 }
509
510 pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host);
511
512 return host;
1da177e4
LT
513}
514
0ebfff14 515struct irq_host *irq_find_host(struct device_node *node)
1da177e4 516{
0ebfff14
BH
517 struct irq_host *h, *found = NULL;
518 unsigned long flags;
519
520 /* We might want to match the legacy controller last since
521 * it might potentially be set to match all interrupts in
522 * the absence of a device node. This isn't a problem so far
523 * yet though...
524 */
525 spin_lock_irqsave(&irq_big_lock, flags);
526 list_for_each_entry(h, &irq_hosts, link)
68158006 527 if (h->ops->match(h, node)) {
0ebfff14
BH
528 found = h;
529 break;
530 }
531 spin_unlock_irqrestore(&irq_big_lock, flags);
532 return found;
533}
534EXPORT_SYMBOL_GPL(irq_find_host);
535
536void irq_set_default_host(struct irq_host *host)
537{
538 pr_debug("irq: Default host set to @0x%p\n", host);
1da177e4 539
0ebfff14
BH
540 irq_default_host = host;
541}
1da177e4 542
0ebfff14
BH
543void irq_set_virq_count(unsigned int count)
544{
545 pr_debug("irq: Trying to set virq count to %d\n", count);
fef1c772 546
0ebfff14
BH
547 BUG_ON(count < NUM_ISA_INTERRUPTS);
548 if (count < NR_IRQS)
549 irq_virq_count = count;
550}
551
8ec8f2e8
BH
552/* radix tree not lockless safe ! we use a brlock-type mecanism
553 * for now, until we can use a lockless radix tree
554 */
555static void irq_radix_wrlock(unsigned long *flags)
556{
557 unsigned int cpu, ok;
558
559 spin_lock_irqsave(&irq_big_lock, *flags);
560 irq_radix_writer = 1;
561 smp_mb();
562 do {
563 barrier();
564 ok = 1;
565 for_each_possible_cpu(cpu) {
566 if (per_cpu(irq_radix_reader, cpu)) {
567 ok = 0;
568 break;
569 }
570 }
571 if (!ok)
572 cpu_relax();
573 } while(!ok);
574}
575
576static void irq_radix_wrunlock(unsigned long flags)
577{
578 smp_wmb();
579 irq_radix_writer = 0;
580 spin_unlock_irqrestore(&irq_big_lock, flags);
581}
582
583static void irq_radix_rdlock(unsigned long *flags)
584{
585 local_irq_save(*flags);
586 __get_cpu_var(irq_radix_reader) = 1;
587 smp_mb();
588 if (likely(irq_radix_writer == 0))
589 return;
590 __get_cpu_var(irq_radix_reader) = 0;
591 smp_wmb();
592 spin_lock(&irq_big_lock);
593 __get_cpu_var(irq_radix_reader) = 1;
594 spin_unlock(&irq_big_lock);
595}
596
597static void irq_radix_rdunlock(unsigned long flags)
598{
599 __get_cpu_var(irq_radix_reader) = 0;
600 local_irq_restore(flags);
601}
602
6fde40f3
ME
603static int irq_setup_virq(struct irq_host *host, unsigned int virq,
604 irq_hw_number_t hwirq)
605{
606 /* Clear IRQ_NOREQUEST flag */
607 get_irq_desc(virq)->status &= ~IRQ_NOREQUEST;
608
609 /* map it */
610 smp_wmb();
611 irq_map[virq].hwirq = hwirq;
612 smp_mb();
613
614 if (host->ops->map(host, virq, hwirq)) {
615 pr_debug("irq: -> mapping failed, freeing\n");
616 irq_free_virt(virq, 1);
617 return -1;
618 }
619
620 return 0;
621}
8ec8f2e8 622
ee51de56
ME
623unsigned int irq_create_direct_mapping(struct irq_host *host)
624{
625 unsigned int virq;
626
627 if (host == NULL)
628 host = irq_default_host;
629
630 BUG_ON(host == NULL);
631 WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP);
632
633 virq = irq_alloc_virt(host, 1, 0);
634 if (virq == NO_IRQ) {
635 pr_debug("irq: create_direct virq allocation failed\n");
636 return NO_IRQ;
637 }
638
639 pr_debug("irq: create_direct obtained virq %d\n", virq);
640
641 if (irq_setup_virq(host, virq, virq))
642 return NO_IRQ;
643
644 return virq;
645}
646
0ebfff14 647unsigned int irq_create_mapping(struct irq_host *host,
6e99e458 648 irq_hw_number_t hwirq)
0ebfff14
BH
649{
650 unsigned int virq, hint;
651
6e99e458 652 pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq);
0ebfff14
BH
653
654 /* Look for default host if nececssary */
655 if (host == NULL)
656 host = irq_default_host;
657 if (host == NULL) {
658 printk(KERN_WARNING "irq_create_mapping called for"
659 " NULL host, hwirq=%lx\n", hwirq);
660 WARN_ON(1);
661 return NO_IRQ;
1da177e4 662 }
0ebfff14 663 pr_debug("irq: -> using host @%p\n", host);
1da177e4 664
0ebfff14
BH
665 /* Check if mapping already exist, if it does, call
666 * host->ops->map() to update the flags
667 */
668 virq = irq_find_mapping(host, hwirq);
f5921697 669 if (virq != NO_IRQ) {
acc900ef
IK
670 if (host->ops->remap)
671 host->ops->remap(host, virq, hwirq);
0ebfff14 672 pr_debug("irq: -> existing mapping on virq %d\n", virq);
0ebfff14 673 return virq;
1da177e4
LT
674 }
675
0ebfff14
BH
676 /* Get a virtual interrupt number */
677 if (host->revmap_type == IRQ_HOST_MAP_LEGACY) {
678 /* Handle legacy */
679 virq = (unsigned int)hwirq;
680 if (virq == 0 || virq >= NUM_ISA_INTERRUPTS)
681 return NO_IRQ;
682 return virq;
683 } else {
684 /* Allocate a virtual interrupt number */
685 hint = hwirq % irq_virq_count;
686 virq = irq_alloc_virt(host, 1, hint);
687 if (virq == NO_IRQ) {
688 pr_debug("irq: -> virq allocation failed\n");
689 return NO_IRQ;
690 }
691 }
692 pr_debug("irq: -> obtained virq %d\n", virq);
693
6fde40f3 694 if (irq_setup_virq(host, virq, hwirq))
0ebfff14 695 return NO_IRQ;
6fde40f3 696
1da177e4 697 return virq;
0ebfff14
BH
698}
699EXPORT_SYMBOL_GPL(irq_create_mapping);
700
f3d2ab41
AV
701unsigned int irq_create_of_mapping(struct device_node *controller,
702 u32 *intspec, unsigned int intsize)
0ebfff14
BH
703{
704 struct irq_host *host;
705 irq_hw_number_t hwirq;
6e99e458
BH
706 unsigned int type = IRQ_TYPE_NONE;
707 unsigned int virq;
1da177e4 708
0ebfff14
BH
709 if (controller == NULL)
710 host = irq_default_host;
711 else
712 host = irq_find_host(controller);
6e99e458
BH
713 if (host == NULL) {
714 printk(KERN_WARNING "irq: no irq host found for %s !\n",
715 controller->full_name);
0ebfff14 716 return NO_IRQ;
6e99e458 717 }
0ebfff14
BH
718
719 /* If host has no translation, then we assume interrupt line */
720 if (host->ops->xlate == NULL)
721 hwirq = intspec[0];
722 else {
723 if (host->ops->xlate(host, controller, intspec, intsize,
6e99e458 724 &hwirq, &type))
0ebfff14 725 return NO_IRQ;
1da177e4 726 }
0ebfff14 727
6e99e458
BH
728 /* Create mapping */
729 virq = irq_create_mapping(host, hwirq);
730 if (virq == NO_IRQ)
731 return virq;
732
733 /* Set type if specified and different than the current one */
734 if (type != IRQ_TYPE_NONE &&
735 type != (get_irq_desc(virq)->status & IRQF_TRIGGER_MASK))
736 set_irq_type(virq, type);
737 return virq;
1da177e4 738}
0ebfff14 739EXPORT_SYMBOL_GPL(irq_create_of_mapping);
1da177e4 740
0ebfff14 741unsigned int irq_of_parse_and_map(struct device_node *dev, int index)
1da177e4 742{
0ebfff14 743 struct of_irq oirq;
1da177e4 744
0ebfff14
BH
745 if (of_irq_map_one(dev, index, &oirq))
746 return NO_IRQ;
1da177e4 747
0ebfff14
BH
748 return irq_create_of_mapping(oirq.controller, oirq.specifier,
749 oirq.size);
750}
751EXPORT_SYMBOL_GPL(irq_of_parse_and_map);
1da177e4 752
0ebfff14
BH
753void irq_dispose_mapping(unsigned int virq)
754{
5414c6be 755 struct irq_host *host;
0ebfff14
BH
756 irq_hw_number_t hwirq;
757 unsigned long flags;
1da177e4 758
5414c6be
ME
759 if (virq == NO_IRQ)
760 return;
761
762 host = irq_map[virq].host;
0ebfff14
BH
763 WARN_ON (host == NULL);
764 if (host == NULL)
765 return;
1da177e4 766
0ebfff14
BH
767 /* Never unmap legacy interrupts */
768 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
769 return;
1da177e4 770
0ebfff14
BH
771 /* remove chip and handler */
772 set_irq_chip_and_handler(virq, NULL, NULL);
773
774 /* Make sure it's completed */
775 synchronize_irq(virq);
776
777 /* Tell the PIC about it */
778 if (host->ops->unmap)
779 host->ops->unmap(host, virq);
780 smp_mb();
781
782 /* Clear reverse map */
783 hwirq = irq_map[virq].hwirq;
784 switch(host->revmap_type) {
785 case IRQ_HOST_MAP_LINEAR:
786 if (hwirq < host->revmap_data.linear.size)
f5921697 787 host->revmap_data.linear.revmap[hwirq] = NO_IRQ;
0ebfff14
BH
788 break;
789 case IRQ_HOST_MAP_TREE:
790 /* Check if radix tree allocated yet */
791 if (host->revmap_data.tree.gfp_mask == 0)
792 break;
8ec8f2e8 793 irq_radix_wrlock(&flags);
0ebfff14 794 radix_tree_delete(&host->revmap_data.tree, hwirq);
8ec8f2e8 795 irq_radix_wrunlock(flags);
0ebfff14
BH
796 break;
797 }
1da177e4 798
0ebfff14
BH
799 /* Destroy map */
800 smp_mb();
801 irq_map[virq].hwirq = host->inval_irq;
1da177e4 802
0ebfff14
BH
803 /* Set some flags */
804 get_irq_desc(virq)->status |= IRQ_NOREQUEST;
1da177e4 805
0ebfff14
BH
806 /* Free it */
807 irq_free_virt(virq, 1);
1da177e4 808}
0ebfff14 809EXPORT_SYMBOL_GPL(irq_dispose_mapping);
1da177e4 810
0ebfff14
BH
811unsigned int irq_find_mapping(struct irq_host *host,
812 irq_hw_number_t hwirq)
813{
814 unsigned int i;
815 unsigned int hint = hwirq % irq_virq_count;
816
817 /* Look for default host if nececssary */
818 if (host == NULL)
819 host = irq_default_host;
820 if (host == NULL)
821 return NO_IRQ;
822
823 /* legacy -> bail early */
824 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
825 return hwirq;
826
827 /* Slow path does a linear search of the map */
828 if (hint < NUM_ISA_INTERRUPTS)
829 hint = NUM_ISA_INTERRUPTS;
830 i = hint;
831 do {
832 if (irq_map[i].host == host &&
833 irq_map[i].hwirq == hwirq)
834 return i;
835 i++;
836 if (i >= irq_virq_count)
837 i = NUM_ISA_INTERRUPTS;
838 } while(i != hint);
839 return NO_IRQ;
840}
841EXPORT_SYMBOL_GPL(irq_find_mapping);
1da177e4 842
0ebfff14
BH
843
844unsigned int irq_radix_revmap(struct irq_host *host,
845 irq_hw_number_t hwirq)
1da177e4 846{
0ebfff14
BH
847 struct radix_tree_root *tree;
848 struct irq_map_entry *ptr;
849 unsigned int virq;
850 unsigned long flags;
1da177e4 851
0ebfff14 852 WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
1da177e4 853
0ebfff14
BH
854 /* Check if the radix tree exist yet. We test the value of
855 * the gfp_mask for that. Sneaky but saves another int in the
856 * structure. If not, we fallback to slow mode
857 */
858 tree = &host->revmap_data.tree;
859 if (tree->gfp_mask == 0)
860 return irq_find_mapping(host, hwirq);
861
0ebfff14 862 /* Now try to resolve */
8ec8f2e8 863 irq_radix_rdlock(&flags);
0ebfff14 864 ptr = radix_tree_lookup(tree, hwirq);
8ec8f2e8
BH
865 irq_radix_rdunlock(flags);
866
0ebfff14
BH
867 /* Found it, return */
868 if (ptr) {
869 virq = ptr - irq_map;
8ec8f2e8 870 return virq;
1da177e4 871 }
0ebfff14
BH
872
873 /* If not there, try to insert it */
874 virq = irq_find_mapping(host, hwirq);
8ec8f2e8
BH
875 if (virq != NO_IRQ) {
876 irq_radix_wrlock(&flags);
e5c14ce1 877 radix_tree_insert(tree, hwirq, &irq_map[virq]);
8ec8f2e8
BH
878 irq_radix_wrunlock(flags);
879 }
0ebfff14 880 return virq;
1da177e4
LT
881}
882
0ebfff14
BH
883unsigned int irq_linear_revmap(struct irq_host *host,
884 irq_hw_number_t hwirq)
c6622f63 885{
0ebfff14 886 unsigned int *revmap;
c6622f63 887
0ebfff14
BH
888 WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR);
889
890 /* Check revmap bounds */
891 if (unlikely(hwirq >= host->revmap_data.linear.size))
892 return irq_find_mapping(host, hwirq);
893
894 /* Check if revmap was allocated */
895 revmap = host->revmap_data.linear.revmap;
896 if (unlikely(revmap == NULL))
897 return irq_find_mapping(host, hwirq);
898
899 /* Fill up revmap with slow path if no mapping found */
900 if (unlikely(revmap[hwirq] == NO_IRQ))
901 revmap[hwirq] = irq_find_mapping(host, hwirq);
902
903 return revmap[hwirq];
c6622f63
PM
904}
905
0ebfff14
BH
906unsigned int irq_alloc_virt(struct irq_host *host,
907 unsigned int count,
908 unsigned int hint)
909{
910 unsigned long flags;
911 unsigned int i, j, found = NO_IRQ;
c6622f63 912
0ebfff14
BH
913 if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS))
914 return NO_IRQ;
915
916 spin_lock_irqsave(&irq_big_lock, flags);
917
918 /* Use hint for 1 interrupt if any */
919 if (count == 1 && hint >= NUM_ISA_INTERRUPTS &&
920 hint < irq_virq_count && irq_map[hint].host == NULL) {
921 found = hint;
922 goto hint_found;
923 }
924
925 /* Look for count consecutive numbers in the allocatable
926 * (non-legacy) space
927 */
e1251465
ME
928 for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) {
929 if (irq_map[i].host != NULL)
930 j = 0;
931 else
932 j++;
933
934 if (j == count) {
935 found = i - count + 1;
936 break;
937 }
0ebfff14
BH
938 }
939 if (found == NO_IRQ) {
940 spin_unlock_irqrestore(&irq_big_lock, flags);
941 return NO_IRQ;
942 }
943 hint_found:
944 for (i = found; i < (found + count); i++) {
945 irq_map[i].hwirq = host->inval_irq;
946 smp_wmb();
947 irq_map[i].host = host;
948 }
949 spin_unlock_irqrestore(&irq_big_lock, flags);
950 return found;
951}
952
953void irq_free_virt(unsigned int virq, unsigned int count)
1da177e4
LT
954{
955 unsigned long flags;
0ebfff14 956 unsigned int i;
1da177e4 957
0ebfff14
BH
958 WARN_ON (virq < NUM_ISA_INTERRUPTS);
959 WARN_ON (count == 0 || (virq + count) > irq_virq_count);
1da177e4 960
0ebfff14
BH
961 spin_lock_irqsave(&irq_big_lock, flags);
962 for (i = virq; i < (virq + count); i++) {
963 struct irq_host *host;
1da177e4 964
0ebfff14
BH
965 if (i < NUM_ISA_INTERRUPTS ||
966 (virq + count) > irq_virq_count)
967 continue;
1da177e4 968
0ebfff14
BH
969 host = irq_map[i].host;
970 irq_map[i].hwirq = host->inval_irq;
971 smp_wmb();
972 irq_map[i].host = NULL;
973 }
974 spin_unlock_irqrestore(&irq_big_lock, flags);
1da177e4 975}
0ebfff14
BH
976
977void irq_early_init(void)
978{
979 unsigned int i;
980
981 for (i = 0; i < NR_IRQS; i++)
982 get_irq_desc(i)->status |= IRQ_NOREQUEST;
983}
984
985/* We need to create the radix trees late */
986static int irq_late_init(void)
987{
988 struct irq_host *h;
989 unsigned long flags;
990
8ec8f2e8 991 irq_radix_wrlock(&flags);
0ebfff14
BH
992 list_for_each_entry(h, &irq_hosts, link) {
993 if (h->revmap_type == IRQ_HOST_MAP_TREE)
994 INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC);
995 }
8ec8f2e8 996 irq_radix_wrunlock(flags);
0ebfff14
BH
997
998 return 0;
999}
1000arch_initcall(irq_late_init);
1001
60b332e7
ME
1002#ifdef CONFIG_VIRQ_DEBUG
1003static int virq_debug_show(struct seq_file *m, void *private)
1004{
1005 unsigned long flags;
1006 irq_desc_t *desc;
1007 const char *p;
1008 char none[] = "none";
1009 int i;
1010
1011 seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq",
1012 "chip name", "host name");
1013
1014 for (i = 1; i < NR_IRQS; i++) {
1015 desc = get_irq_desc(i);
1016 spin_lock_irqsave(&desc->lock, flags);
1017
1018 if (desc->action && desc->action->handler) {
1019 seq_printf(m, "%5d ", i);
1020 seq_printf(m, "0x%05lx ", virq_to_hw(i));
1021
1022 if (desc->chip && desc->chip->typename)
1023 p = desc->chip->typename;
1024 else
1025 p = none;
1026 seq_printf(m, "%-15s ", p);
1027
1028 if (irq_map[i].host && irq_map[i].host->of_node)
1029 p = irq_map[i].host->of_node->full_name;
1030 else
1031 p = none;
1032 seq_printf(m, "%s\n", p);
1033 }
1034
1035 spin_unlock_irqrestore(&desc->lock, flags);
1036 }
1037
1038 return 0;
1039}
1040
1041static int virq_debug_open(struct inode *inode, struct file *file)
1042{
1043 return single_open(file, virq_debug_show, inode->i_private);
1044}
1045
1046static const struct file_operations virq_debug_fops = {
1047 .open = virq_debug_open,
1048 .read = seq_read,
1049 .llseek = seq_lseek,
1050 .release = single_release,
1051};
1052
1053static int __init irq_debugfs_init(void)
1054{
1055 if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root,
1056 NULL, &virq_debug_fops))
1057 return -ENOMEM;
1058
1059 return 0;
1060}
1061__initcall(irq_debugfs_init);
1062#endif /* CONFIG_VIRQ_DEBUG */
1063
0ebfff14 1064#endif /* CONFIG_PPC_MERGE */
1da177e4 1065
c6622f63 1066#ifdef CONFIG_PPC64
1da177e4
LT
1067static int __init setup_noirqdistrib(char *str)
1068{
1069 distribute_irqs = 0;
1070 return 1;
1071}
1072
1073__setup("noirqdistrib", setup_noirqdistrib);
756e7104 1074#endif /* CONFIG_PPC64 */