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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
10 | * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). | |
756e7104 | 11 | * |
1da177e4 LT |
12 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version | |
15 | * 2 of the License, or (at your option) any later version. | |
16 | * | |
17 | * This file contains the code used by various IRQ handling routines: | |
18 | * asking for different IRQ's should be done through these routines | |
19 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
20 | * shouldn't result in any weird surprises, and installing new handlers | |
21 | * should be easier. | |
756e7104 SR |
22 | * |
23 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
24 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
25 | * mask register (of which only 16 are defined), hence the weird shifting | |
26 | * and complement of the cached_irq_mask. I want to be able to stuff | |
27 | * this right into the SIU SMASK register. | |
28 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
29 | * to reduce code space and undefined function references. | |
1da177e4 LT |
30 | */ |
31 | ||
0ebfff14 BH |
32 | #undef DEBUG |
33 | ||
1da177e4 LT |
34 | #include <linux/module.h> |
35 | #include <linux/threads.h> | |
36 | #include <linux/kernel_stat.h> | |
37 | #include <linux/signal.h> | |
38 | #include <linux/sched.h> | |
756e7104 | 39 | #include <linux/ptrace.h> |
1da177e4 LT |
40 | #include <linux/ioport.h> |
41 | #include <linux/interrupt.h> | |
42 | #include <linux/timex.h> | |
1da177e4 LT |
43 | #include <linux/init.h> |
44 | #include <linux/slab.h> | |
1da177e4 LT |
45 | #include <linux/delay.h> |
46 | #include <linux/irq.h> | |
756e7104 SR |
47 | #include <linux/seq_file.h> |
48 | #include <linux/cpumask.h> | |
1da177e4 LT |
49 | #include <linux/profile.h> |
50 | #include <linux/bitops.h> | |
0ebfff14 BH |
51 | #include <linux/list.h> |
52 | #include <linux/radix-tree.h> | |
53 | #include <linux/mutex.h> | |
54 | #include <linux/bootmem.h> | |
1da177e4 LT |
55 | |
56 | #include <asm/uaccess.h> | |
57 | #include <asm/system.h> | |
58 | #include <asm/io.h> | |
59 | #include <asm/pgtable.h> | |
60 | #include <asm/irq.h> | |
61 | #include <asm/cache.h> | |
62 | #include <asm/prom.h> | |
63 | #include <asm/ptrace.h> | |
1da177e4 | 64 | #include <asm/machdep.h> |
0ebfff14 | 65 | #include <asm/udbg.h> |
a50b56d2 | 66 | #ifdef CONFIG_PPC_ISERIES |
1da177e4 | 67 | #include <asm/paca.h> |
756e7104 | 68 | #endif |
1da177e4 | 69 | |
868accb7 | 70 | int __irq_offset_value; |
756e7104 SR |
71 | static int ppc_spurious_interrupts; |
72 | ||
756e7104 | 73 | #ifdef CONFIG_PPC32 |
b9e5b4e6 BH |
74 | EXPORT_SYMBOL(__irq_offset_value); |
75 | atomic_t ppc_n_lost_interrupts; | |
756e7104 | 76 | |
b9e5b4e6 BH |
77 | #ifndef CONFIG_PPC_MERGE |
78 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) | |
756e7104 | 79 | unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; |
b9e5b4e6 | 80 | #endif |
756e7104 SR |
81 | |
82 | #ifdef CONFIG_TAU_INT | |
83 | extern int tau_initialized; | |
84 | extern int tau_interrupts(int); | |
85 | #endif | |
b9e5b4e6 | 86 | #endif /* CONFIG_PPC32 */ |
756e7104 SR |
87 | |
88 | #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) | |
89 | extern atomic_t ipi_recv; | |
90 | extern atomic_t ipi_sent; | |
91 | #endif | |
756e7104 SR |
92 | |
93 | #ifdef CONFIG_PPC64 | |
1da177e4 LT |
94 | EXPORT_SYMBOL(irq_desc); |
95 | ||
96 | int distribute_irqs = 1; | |
756e7104 | 97 | #endif /* CONFIG_PPC64 */ |
1da177e4 LT |
98 | |
99 | int show_interrupts(struct seq_file *p, void *v) | |
100 | { | |
756e7104 SR |
101 | int i = *(loff_t *)v, j; |
102 | struct irqaction *action; | |
1da177e4 LT |
103 | irq_desc_t *desc; |
104 | unsigned long flags; | |
105 | ||
106 | if (i == 0) { | |
756e7104 SR |
107 | seq_puts(p, " "); |
108 | for_each_online_cpu(j) | |
109 | seq_printf(p, "CPU%d ", j); | |
1da177e4 LT |
110 | seq_putc(p, '\n'); |
111 | } | |
112 | ||
113 | if (i < NR_IRQS) { | |
114 | desc = get_irq_desc(i); | |
115 | spin_lock_irqsave(&desc->lock, flags); | |
116 | action = desc->action; | |
117 | if (!action || !action->handler) | |
118 | goto skip; | |
119 | seq_printf(p, "%3d: ", i); | |
120 | #ifdef CONFIG_SMP | |
756e7104 SR |
121 | for_each_online_cpu(j) |
122 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | |
1da177e4 LT |
123 | #else |
124 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
125 | #endif /* CONFIG_SMP */ | |
d1bef4ed IM |
126 | if (desc->chip) |
127 | seq_printf(p, " %s ", desc->chip->typename); | |
1da177e4 | 128 | else |
756e7104 | 129 | seq_puts(p, " None "); |
1da177e4 | 130 | seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); |
756e7104 SR |
131 | seq_printf(p, " %s", action->name); |
132 | for (action = action->next; action; action = action->next) | |
1da177e4 LT |
133 | seq_printf(p, ", %s", action->name); |
134 | seq_putc(p, '\n'); | |
135 | skip: | |
136 | spin_unlock_irqrestore(&desc->lock, flags); | |
756e7104 SR |
137 | } else if (i == NR_IRQS) { |
138 | #ifdef CONFIG_PPC32 | |
139 | #ifdef CONFIG_TAU_INT | |
140 | if (tau_initialized){ | |
141 | seq_puts(p, "TAU: "); | |
394e3902 AM |
142 | for_each_online_cpu(j) |
143 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
756e7104 SR |
144 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); |
145 | } | |
146 | #endif | |
147 | #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) | |
148 | /* should this be per processor send/receive? */ | |
149 | seq_printf(p, "IPI (recv/sent): %10u/%u\n", | |
150 | atomic_read(&ipi_recv), atomic_read(&ipi_sent)); | |
151 | #endif | |
152 | #endif /* CONFIG_PPC32 */ | |
1da177e4 | 153 | seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts); |
756e7104 | 154 | } |
1da177e4 LT |
155 | return 0; |
156 | } | |
157 | ||
158 | #ifdef CONFIG_HOTPLUG_CPU | |
159 | void fixup_irqs(cpumask_t map) | |
160 | { | |
161 | unsigned int irq; | |
162 | static int warned; | |
163 | ||
164 | for_each_irq(irq) { | |
165 | cpumask_t mask; | |
166 | ||
167 | if (irq_desc[irq].status & IRQ_PER_CPU) | |
168 | continue; | |
169 | ||
a53da52f | 170 | cpus_and(mask, irq_desc[irq].affinity, map); |
1da177e4 LT |
171 | if (any_online_cpu(mask) == NR_CPUS) { |
172 | printk("Breaking affinity for irq %i\n", irq); | |
173 | mask = map; | |
174 | } | |
d1bef4ed IM |
175 | if (irq_desc[irq].chip->set_affinity) |
176 | irq_desc[irq].chip->set_affinity(irq, mask); | |
1da177e4 LT |
177 | else if (irq_desc[irq].action && !(warned++)) |
178 | printk("Cannot set affinity for irq %i\n", irq); | |
179 | } | |
180 | ||
181 | local_irq_enable(); | |
182 | mdelay(1); | |
183 | local_irq_disable(); | |
184 | } | |
185 | #endif | |
186 | ||
1da177e4 LT |
187 | void do_IRQ(struct pt_regs *regs) |
188 | { | |
0ebfff14 | 189 | unsigned int irq; |
b709c083 SR |
190 | #ifdef CONFIG_IRQSTACKS |
191 | struct thread_info *curtp, *irqtp; | |
192 | #endif | |
1da177e4 | 193 | |
756e7104 | 194 | irq_enter(); |
1da177e4 LT |
195 | |
196 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
197 | /* Debugging check for stack overflow: is there less than 2KB free? */ | |
198 | { | |
199 | long sp; | |
200 | ||
201 | sp = __get_SP() & (THREAD_SIZE-1); | |
202 | ||
203 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
204 | printk("do_IRQ: stack overflow: %ld\n", | |
205 | sp - sizeof(struct thread_info)); | |
206 | dump_stack(); | |
207 | } | |
208 | } | |
209 | #endif | |
210 | ||
756e7104 SR |
211 | /* |
212 | * Every platform is required to implement ppc_md.get_irq. | |
213 | * This function will either return an irq number or -1 to | |
214 | * indicate there are no more pending. | |
215 | * The value -2 is for buggy hardware and means that this IRQ | |
216 | * has already been handled. -- Tom | |
217 | */ | |
1da177e4 LT |
218 | irq = ppc_md.get_irq(regs); |
219 | ||
0ebfff14 | 220 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) { |
b709c083 SR |
221 | #ifdef CONFIG_IRQSTACKS |
222 | /* Switch to the irq stack to handle this */ | |
223 | curtp = current_thread_info(); | |
224 | irqtp = hardirq_ctx[smp_processor_id()]; | |
225 | if (curtp != irqtp) { | |
b9e5b4e6 BH |
226 | struct irq_desc *desc = irq_desc + irq; |
227 | void *handler = desc->handle_irq; | |
228 | if (handler == NULL) | |
229 | handler = &__do_IRQ; | |
b709c083 SR |
230 | irqtp->task = curtp->task; |
231 | irqtp->flags = 0; | |
b9e5b4e6 | 232 | call_handle_irq(irq, desc, regs, irqtp, handler); |
b709c083 SR |
233 | irqtp->task = NULL; |
234 | if (irqtp->flags) | |
235 | set_bits(irqtp->flags, &curtp->flags); | |
236 | } else | |
237 | #endif | |
b9e5b4e6 | 238 | generic_handle_irq(irq, regs); |
0ebfff14 | 239 | } else if (irq != NO_IRQ_IGNORE) |
e199500c SR |
240 | /* That's not SMP safe ... but who cares ? */ |
241 | ppc_spurious_interrupts++; | |
242 | ||
756e7104 | 243 | irq_exit(); |
756e7104 | 244 | |
e199500c | 245 | #ifdef CONFIG_PPC_ISERIES |
3356bb9f DG |
246 | if (get_lppaca()->int_dword.fields.decr_int) { |
247 | get_lppaca()->int_dword.fields.decr_int = 0; | |
248 | /* Signal a fake decrementer interrupt */ | |
249 | timer_interrupt(regs); | |
e199500c SR |
250 | } |
251 | #endif | |
252 | } | |
1da177e4 LT |
253 | |
254 | void __init init_IRQ(void) | |
255 | { | |
1da177e4 | 256 | ppc_md.init_IRQ(); |
756e7104 | 257 | #ifdef CONFIG_PPC64 |
1da177e4 | 258 | irq_ctx_init(); |
756e7104 | 259 | #endif |
1da177e4 LT |
260 | } |
261 | ||
1da177e4 | 262 | |
1da177e4 | 263 | #ifdef CONFIG_IRQSTACKS |
22722051 AM |
264 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
265 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | |
1da177e4 LT |
266 | |
267 | void irq_ctx_init(void) | |
268 | { | |
269 | struct thread_info *tp; | |
270 | int i; | |
271 | ||
0e551954 | 272 | for_each_possible_cpu(i) { |
1da177e4 LT |
273 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
274 | tp = softirq_ctx[i]; | |
275 | tp->cpu = i; | |
276 | tp->preempt_count = SOFTIRQ_OFFSET; | |
277 | ||
278 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
279 | tp = hardirq_ctx[i]; | |
280 | tp->cpu = i; | |
281 | tp->preempt_count = HARDIRQ_OFFSET; | |
282 | } | |
283 | } | |
284 | ||
c6622f63 PM |
285 | static inline void do_softirq_onstack(void) |
286 | { | |
287 | struct thread_info *curtp, *irqtp; | |
288 | ||
289 | curtp = current_thread_info(); | |
290 | irqtp = softirq_ctx[smp_processor_id()]; | |
291 | irqtp->task = curtp->task; | |
292 | call_do_softirq(irqtp); | |
293 | irqtp->task = NULL; | |
294 | } | |
1da177e4 | 295 | |
c6622f63 PM |
296 | #else |
297 | #define do_softirq_onstack() __do_softirq() | |
298 | #endif /* CONFIG_IRQSTACKS */ | |
299 | ||
1da177e4 LT |
300 | void do_softirq(void) |
301 | { | |
302 | unsigned long flags; | |
1da177e4 LT |
303 | |
304 | if (in_interrupt()) | |
1da177e4 LT |
305 | return; |
306 | ||
1da177e4 | 307 | local_irq_save(flags); |
1da177e4 | 308 | |
912b2539 | 309 | if (local_softirq_pending()) |
c6622f63 | 310 | do_softirq_onstack(); |
1da177e4 LT |
311 | |
312 | local_irq_restore(flags); | |
1da177e4 | 313 | } |
1da177e4 LT |
314 | EXPORT_SYMBOL(do_softirq); |
315 | ||
1da177e4 | 316 | |
1da177e4 | 317 | /* |
0ebfff14 | 318 | * IRQ controller and virtual interrupts |
1da177e4 LT |
319 | */ |
320 | ||
0ebfff14 | 321 | #ifdef CONFIG_PPC_MERGE |
1da177e4 | 322 | |
0ebfff14 BH |
323 | static LIST_HEAD(irq_hosts); |
324 | static spinlock_t irq_big_lock = SPIN_LOCK_UNLOCKED; | |
7d01c880 | 325 | |
0ebfff14 BH |
326 | struct irq_map_entry irq_map[NR_IRQS]; |
327 | static unsigned int irq_virq_count = NR_IRQS; | |
328 | static struct irq_host *irq_default_host; | |
1da177e4 | 329 | |
0ebfff14 BH |
330 | struct irq_host *irq_alloc_host(unsigned int revmap_type, |
331 | unsigned int revmap_arg, | |
332 | struct irq_host_ops *ops, | |
333 | irq_hw_number_t inval_irq) | |
1da177e4 | 334 | { |
0ebfff14 BH |
335 | struct irq_host *host; |
336 | unsigned int size = sizeof(struct irq_host); | |
337 | unsigned int i; | |
338 | unsigned int *rmap; | |
339 | unsigned long flags; | |
340 | ||
341 | /* Allocate structure and revmap table if using linear mapping */ | |
342 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | |
343 | size += revmap_arg * sizeof(unsigned int); | |
344 | if (mem_init_done) | |
345 | host = kzalloc(size, GFP_KERNEL); | |
346 | else { | |
347 | host = alloc_bootmem(size); | |
348 | if (host) | |
349 | memset(host, 0, size); | |
350 | } | |
351 | if (host == NULL) | |
352 | return NULL; | |
7d01c880 | 353 | |
0ebfff14 BH |
354 | /* Fill structure */ |
355 | host->revmap_type = revmap_type; | |
356 | host->inval_irq = inval_irq; | |
357 | host->ops = ops; | |
7d01c880 | 358 | |
0ebfff14 BH |
359 | spin_lock_irqsave(&irq_big_lock, flags); |
360 | ||
361 | /* If it's a legacy controller, check for duplicates and | |
362 | * mark it as allocated (we use irq 0 host pointer for that | |
363 | */ | |
364 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | |
365 | if (irq_map[0].host != NULL) { | |
366 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
367 | /* If we are early boot, we can't free the structure, | |
368 | * too bad... | |
369 | * this will be fixed once slab is made available early | |
370 | * instead of the current cruft | |
371 | */ | |
372 | if (mem_init_done) | |
373 | kfree(host); | |
374 | return NULL; | |
375 | } | |
376 | irq_map[0].host = host; | |
377 | } | |
378 | ||
379 | list_add(&host->link, &irq_hosts); | |
380 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
381 | ||
382 | /* Additional setups per revmap type */ | |
383 | switch(revmap_type) { | |
384 | case IRQ_HOST_MAP_LEGACY: | |
385 | /* 0 is always the invalid number for legacy */ | |
386 | host->inval_irq = 0; | |
387 | /* setup us as the host for all legacy interrupts */ | |
388 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | |
389 | irq_map[i].hwirq = 0; | |
390 | smp_wmb(); | |
391 | irq_map[i].host = host; | |
392 | smp_wmb(); | |
393 | ||
6e99e458 BH |
394 | /* Clear norequest flags */ |
395 | get_irq_desc(i)->status &= ~IRQ_NOREQUEST; | |
0ebfff14 BH |
396 | |
397 | /* Legacy flags are left to default at this point, | |
398 | * one can then use irq_create_mapping() to | |
399 | * explicitely change them | |
400 | */ | |
6e99e458 | 401 | ops->map(host, i, i); |
0ebfff14 BH |
402 | } |
403 | break; | |
404 | case IRQ_HOST_MAP_LINEAR: | |
405 | rmap = (unsigned int *)(host + 1); | |
406 | for (i = 0; i < revmap_arg; i++) | |
407 | rmap[i] = IRQ_NONE; | |
408 | host->revmap_data.linear.size = revmap_arg; | |
409 | smp_wmb(); | |
410 | host->revmap_data.linear.revmap = rmap; | |
411 | break; | |
412 | default: | |
413 | break; | |
414 | } | |
415 | ||
416 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | |
417 | ||
418 | return host; | |
1da177e4 LT |
419 | } |
420 | ||
0ebfff14 | 421 | struct irq_host *irq_find_host(struct device_node *node) |
1da177e4 | 422 | { |
0ebfff14 BH |
423 | struct irq_host *h, *found = NULL; |
424 | unsigned long flags; | |
425 | ||
426 | /* We might want to match the legacy controller last since | |
427 | * it might potentially be set to match all interrupts in | |
428 | * the absence of a device node. This isn't a problem so far | |
429 | * yet though... | |
430 | */ | |
431 | spin_lock_irqsave(&irq_big_lock, flags); | |
432 | list_for_each_entry(h, &irq_hosts, link) | |
433 | if (h->ops->match == NULL || h->ops->match(h, node)) { | |
434 | found = h; | |
435 | break; | |
436 | } | |
437 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
438 | return found; | |
439 | } | |
440 | EXPORT_SYMBOL_GPL(irq_find_host); | |
441 | ||
442 | void irq_set_default_host(struct irq_host *host) | |
443 | { | |
444 | pr_debug("irq: Default host set to @0x%p\n", host); | |
1da177e4 | 445 | |
0ebfff14 BH |
446 | irq_default_host = host; |
447 | } | |
1da177e4 | 448 | |
0ebfff14 BH |
449 | void irq_set_virq_count(unsigned int count) |
450 | { | |
451 | pr_debug("irq: Trying to set virq count to %d\n", count); | |
fef1c772 | 452 | |
0ebfff14 BH |
453 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
454 | if (count < NR_IRQS) | |
455 | irq_virq_count = count; | |
456 | } | |
457 | ||
458 | unsigned int irq_create_mapping(struct irq_host *host, | |
6e99e458 | 459 | irq_hw_number_t hwirq) |
0ebfff14 BH |
460 | { |
461 | unsigned int virq, hint; | |
462 | ||
6e99e458 | 463 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
0ebfff14 BH |
464 | |
465 | /* Look for default host if nececssary */ | |
466 | if (host == NULL) | |
467 | host = irq_default_host; | |
468 | if (host == NULL) { | |
469 | printk(KERN_WARNING "irq_create_mapping called for" | |
470 | " NULL host, hwirq=%lx\n", hwirq); | |
471 | WARN_ON(1); | |
472 | return NO_IRQ; | |
1da177e4 | 473 | } |
0ebfff14 | 474 | pr_debug("irq: -> using host @%p\n", host); |
1da177e4 | 475 | |
0ebfff14 BH |
476 | /* Check if mapping already exist, if it does, call |
477 | * host->ops->map() to update the flags | |
478 | */ | |
479 | virq = irq_find_mapping(host, hwirq); | |
480 | if (virq != IRQ_NONE) { | |
481 | pr_debug("irq: -> existing mapping on virq %d\n", virq); | |
0ebfff14 | 482 | return virq; |
1da177e4 LT |
483 | } |
484 | ||
0ebfff14 BH |
485 | /* Get a virtual interrupt number */ |
486 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | |
487 | /* Handle legacy */ | |
488 | virq = (unsigned int)hwirq; | |
489 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | |
490 | return NO_IRQ; | |
491 | return virq; | |
492 | } else { | |
493 | /* Allocate a virtual interrupt number */ | |
494 | hint = hwirq % irq_virq_count; | |
495 | virq = irq_alloc_virt(host, 1, hint); | |
496 | if (virq == NO_IRQ) { | |
497 | pr_debug("irq: -> virq allocation failed\n"); | |
498 | return NO_IRQ; | |
499 | } | |
500 | } | |
501 | pr_debug("irq: -> obtained virq %d\n", virq); | |
502 | ||
6e99e458 BH |
503 | /* Clear IRQ_NOREQUEST flag */ |
504 | get_irq_desc(virq)->status &= ~IRQ_NOREQUEST; | |
0ebfff14 BH |
505 | |
506 | /* map it */ | |
6e99e458 BH |
507 | smp_wmb(); |
508 | irq_map[virq].hwirq = hwirq; | |
509 | smp_mb(); | |
510 | if (host->ops->map(host, virq, hwirq)) { | |
0ebfff14 BH |
511 | pr_debug("irq: -> mapping failed, freeing\n"); |
512 | irq_free_virt(virq, 1); | |
513 | return NO_IRQ; | |
514 | } | |
1da177e4 | 515 | return virq; |
0ebfff14 BH |
516 | } |
517 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
518 | ||
519 | extern unsigned int irq_create_of_mapping(struct device_node *controller, | |
520 | u32 *intspec, unsigned int intsize) | |
521 | { | |
522 | struct irq_host *host; | |
523 | irq_hw_number_t hwirq; | |
6e99e458 BH |
524 | unsigned int type = IRQ_TYPE_NONE; |
525 | unsigned int virq; | |
1da177e4 | 526 | |
0ebfff14 BH |
527 | if (controller == NULL) |
528 | host = irq_default_host; | |
529 | else | |
530 | host = irq_find_host(controller); | |
6e99e458 BH |
531 | if (host == NULL) { |
532 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | |
533 | controller->full_name); | |
0ebfff14 | 534 | return NO_IRQ; |
6e99e458 | 535 | } |
0ebfff14 BH |
536 | |
537 | /* If host has no translation, then we assume interrupt line */ | |
538 | if (host->ops->xlate == NULL) | |
539 | hwirq = intspec[0]; | |
540 | else { | |
541 | if (host->ops->xlate(host, controller, intspec, intsize, | |
6e99e458 | 542 | &hwirq, &type)) |
0ebfff14 | 543 | return NO_IRQ; |
1da177e4 | 544 | } |
0ebfff14 | 545 | |
6e99e458 BH |
546 | /* Create mapping */ |
547 | virq = irq_create_mapping(host, hwirq); | |
548 | if (virq == NO_IRQ) | |
549 | return virq; | |
550 | ||
551 | /* Set type if specified and different than the current one */ | |
552 | if (type != IRQ_TYPE_NONE && | |
553 | type != (get_irq_desc(virq)->status & IRQF_TRIGGER_MASK)) | |
554 | set_irq_type(virq, type); | |
555 | return virq; | |
1da177e4 | 556 | } |
0ebfff14 | 557 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
1da177e4 | 558 | |
0ebfff14 | 559 | unsigned int irq_of_parse_and_map(struct device_node *dev, int index) |
1da177e4 | 560 | { |
0ebfff14 | 561 | struct of_irq oirq; |
1da177e4 | 562 | |
0ebfff14 BH |
563 | if (of_irq_map_one(dev, index, &oirq)) |
564 | return NO_IRQ; | |
1da177e4 | 565 | |
0ebfff14 BH |
566 | return irq_create_of_mapping(oirq.controller, oirq.specifier, |
567 | oirq.size); | |
568 | } | |
569 | EXPORT_SYMBOL_GPL(irq_of_parse_and_map); | |
1da177e4 | 570 | |
0ebfff14 BH |
571 | void irq_dispose_mapping(unsigned int virq) |
572 | { | |
573 | struct irq_host *host = irq_map[virq].host; | |
574 | irq_hw_number_t hwirq; | |
575 | unsigned long flags; | |
1da177e4 | 576 | |
0ebfff14 BH |
577 | WARN_ON (host == NULL); |
578 | if (host == NULL) | |
579 | return; | |
1da177e4 | 580 | |
0ebfff14 BH |
581 | /* Never unmap legacy interrupts */ |
582 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
583 | return; | |
1da177e4 | 584 | |
0ebfff14 BH |
585 | /* remove chip and handler */ |
586 | set_irq_chip_and_handler(virq, NULL, NULL); | |
587 | ||
588 | /* Make sure it's completed */ | |
589 | synchronize_irq(virq); | |
590 | ||
591 | /* Tell the PIC about it */ | |
592 | if (host->ops->unmap) | |
593 | host->ops->unmap(host, virq); | |
594 | smp_mb(); | |
595 | ||
596 | /* Clear reverse map */ | |
597 | hwirq = irq_map[virq].hwirq; | |
598 | switch(host->revmap_type) { | |
599 | case IRQ_HOST_MAP_LINEAR: | |
600 | if (hwirq < host->revmap_data.linear.size) | |
601 | host->revmap_data.linear.revmap[hwirq] = IRQ_NONE; | |
602 | break; | |
603 | case IRQ_HOST_MAP_TREE: | |
604 | /* Check if radix tree allocated yet */ | |
605 | if (host->revmap_data.tree.gfp_mask == 0) | |
606 | break; | |
607 | /* XXX radix tree not safe ! remove lock whem it becomes safe | |
608 | * and use some RCU sync to make sure everything is ok before we | |
609 | * can re-use that map entry | |
610 | */ | |
611 | spin_lock_irqsave(&irq_big_lock, flags); | |
612 | radix_tree_delete(&host->revmap_data.tree, hwirq); | |
613 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
614 | break; | |
615 | } | |
1da177e4 | 616 | |
0ebfff14 BH |
617 | /* Destroy map */ |
618 | smp_mb(); | |
619 | irq_map[virq].hwirq = host->inval_irq; | |
1da177e4 | 620 | |
0ebfff14 BH |
621 | /* Set some flags */ |
622 | get_irq_desc(virq)->status |= IRQ_NOREQUEST; | |
1da177e4 | 623 | |
0ebfff14 BH |
624 | /* Free it */ |
625 | irq_free_virt(virq, 1); | |
1da177e4 | 626 | } |
0ebfff14 | 627 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
1da177e4 | 628 | |
0ebfff14 BH |
629 | unsigned int irq_find_mapping(struct irq_host *host, |
630 | irq_hw_number_t hwirq) | |
631 | { | |
632 | unsigned int i; | |
633 | unsigned int hint = hwirq % irq_virq_count; | |
634 | ||
635 | /* Look for default host if nececssary */ | |
636 | if (host == NULL) | |
637 | host = irq_default_host; | |
638 | if (host == NULL) | |
639 | return NO_IRQ; | |
640 | ||
641 | /* legacy -> bail early */ | |
642 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
643 | return hwirq; | |
644 | ||
645 | /* Slow path does a linear search of the map */ | |
646 | if (hint < NUM_ISA_INTERRUPTS) | |
647 | hint = NUM_ISA_INTERRUPTS; | |
648 | i = hint; | |
649 | do { | |
650 | if (irq_map[i].host == host && | |
651 | irq_map[i].hwirq == hwirq) | |
652 | return i; | |
653 | i++; | |
654 | if (i >= irq_virq_count) | |
655 | i = NUM_ISA_INTERRUPTS; | |
656 | } while(i != hint); | |
657 | return NO_IRQ; | |
658 | } | |
659 | EXPORT_SYMBOL_GPL(irq_find_mapping); | |
1da177e4 | 660 | |
0ebfff14 BH |
661 | |
662 | unsigned int irq_radix_revmap(struct irq_host *host, | |
663 | irq_hw_number_t hwirq) | |
1da177e4 | 664 | { |
0ebfff14 BH |
665 | struct radix_tree_root *tree; |
666 | struct irq_map_entry *ptr; | |
667 | unsigned int virq; | |
668 | unsigned long flags; | |
1da177e4 | 669 | |
0ebfff14 | 670 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); |
1da177e4 | 671 | |
0ebfff14 BH |
672 | /* Check if the radix tree exist yet. We test the value of |
673 | * the gfp_mask for that. Sneaky but saves another int in the | |
674 | * structure. If not, we fallback to slow mode | |
675 | */ | |
676 | tree = &host->revmap_data.tree; | |
677 | if (tree->gfp_mask == 0) | |
678 | return irq_find_mapping(host, hwirq); | |
679 | ||
680 | /* XXX Current radix trees are NOT SMP safe !!! Remove that lock | |
681 | * when that is fixed (when Nick's patch gets in | |
682 | */ | |
683 | spin_lock_irqsave(&irq_big_lock, flags); | |
684 | ||
685 | /* Now try to resolve */ | |
686 | ptr = radix_tree_lookup(tree, hwirq); | |
687 | /* Found it, return */ | |
688 | if (ptr) { | |
689 | virq = ptr - irq_map; | |
690 | goto bail; | |
1da177e4 | 691 | } |
0ebfff14 BH |
692 | |
693 | /* If not there, try to insert it */ | |
694 | virq = irq_find_mapping(host, hwirq); | |
695 | if (virq != NO_IRQ) | |
696 | radix_tree_insert(tree, virq, &irq_map[virq]); | |
697 | bail: | |
698 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
699 | return virq; | |
1da177e4 LT |
700 | } |
701 | ||
0ebfff14 BH |
702 | unsigned int irq_linear_revmap(struct irq_host *host, |
703 | irq_hw_number_t hwirq) | |
c6622f63 | 704 | { |
0ebfff14 | 705 | unsigned int *revmap; |
c6622f63 | 706 | |
0ebfff14 BH |
707 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR); |
708 | ||
709 | /* Check revmap bounds */ | |
710 | if (unlikely(hwirq >= host->revmap_data.linear.size)) | |
711 | return irq_find_mapping(host, hwirq); | |
712 | ||
713 | /* Check if revmap was allocated */ | |
714 | revmap = host->revmap_data.linear.revmap; | |
715 | if (unlikely(revmap == NULL)) | |
716 | return irq_find_mapping(host, hwirq); | |
717 | ||
718 | /* Fill up revmap with slow path if no mapping found */ | |
719 | if (unlikely(revmap[hwirq] == NO_IRQ)) | |
720 | revmap[hwirq] = irq_find_mapping(host, hwirq); | |
721 | ||
722 | return revmap[hwirq]; | |
c6622f63 PM |
723 | } |
724 | ||
0ebfff14 BH |
725 | unsigned int irq_alloc_virt(struct irq_host *host, |
726 | unsigned int count, | |
727 | unsigned int hint) | |
728 | { | |
729 | unsigned long flags; | |
730 | unsigned int i, j, found = NO_IRQ; | |
731 | unsigned int limit = irq_virq_count - count; | |
c6622f63 | 732 | |
0ebfff14 BH |
733 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
734 | return NO_IRQ; | |
735 | ||
736 | spin_lock_irqsave(&irq_big_lock, flags); | |
737 | ||
738 | /* Use hint for 1 interrupt if any */ | |
739 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | |
740 | hint < irq_virq_count && irq_map[hint].host == NULL) { | |
741 | found = hint; | |
742 | goto hint_found; | |
743 | } | |
744 | ||
745 | /* Look for count consecutive numbers in the allocatable | |
746 | * (non-legacy) space | |
747 | */ | |
748 | for (i = NUM_ISA_INTERRUPTS; i <= limit; ) { | |
749 | for (j = i; j < (i + count); j++) | |
750 | if (irq_map[j].host != NULL) { | |
751 | i = j + 1; | |
752 | continue; | |
753 | } | |
754 | found = i; | |
755 | break; | |
756 | } | |
757 | if (found == NO_IRQ) { | |
758 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
759 | return NO_IRQ; | |
760 | } | |
761 | hint_found: | |
762 | for (i = found; i < (found + count); i++) { | |
763 | irq_map[i].hwirq = host->inval_irq; | |
764 | smp_wmb(); | |
765 | irq_map[i].host = host; | |
766 | } | |
767 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
768 | return found; | |
769 | } | |
770 | ||
771 | void irq_free_virt(unsigned int virq, unsigned int count) | |
1da177e4 LT |
772 | { |
773 | unsigned long flags; | |
0ebfff14 | 774 | unsigned int i; |
1da177e4 | 775 | |
0ebfff14 BH |
776 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
777 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | |
1da177e4 | 778 | |
0ebfff14 BH |
779 | spin_lock_irqsave(&irq_big_lock, flags); |
780 | for (i = virq; i < (virq + count); i++) { | |
781 | struct irq_host *host; | |
1da177e4 | 782 | |
0ebfff14 BH |
783 | if (i < NUM_ISA_INTERRUPTS || |
784 | (virq + count) > irq_virq_count) | |
785 | continue; | |
1da177e4 | 786 | |
0ebfff14 BH |
787 | host = irq_map[i].host; |
788 | irq_map[i].hwirq = host->inval_irq; | |
789 | smp_wmb(); | |
790 | irq_map[i].host = NULL; | |
791 | } | |
792 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
1da177e4 | 793 | } |
0ebfff14 BH |
794 | |
795 | void irq_early_init(void) | |
796 | { | |
797 | unsigned int i; | |
798 | ||
799 | for (i = 0; i < NR_IRQS; i++) | |
800 | get_irq_desc(i)->status |= IRQ_NOREQUEST; | |
801 | } | |
802 | ||
803 | /* We need to create the radix trees late */ | |
804 | static int irq_late_init(void) | |
805 | { | |
806 | struct irq_host *h; | |
807 | unsigned long flags; | |
808 | ||
809 | spin_lock_irqsave(&irq_big_lock, flags); | |
810 | list_for_each_entry(h, &irq_hosts, link) { | |
811 | if (h->revmap_type == IRQ_HOST_MAP_TREE) | |
812 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC); | |
813 | } | |
814 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
815 | ||
816 | return 0; | |
817 | } | |
818 | arch_initcall(irq_late_init); | |
819 | ||
820 | #endif /* CONFIG_PPC_MERGE */ | |
1da177e4 | 821 | |
204face4 JM |
822 | #ifdef CONFIG_PCI_MSI |
823 | int pci_enable_msi(struct pci_dev * pdev) | |
824 | { | |
825 | if (ppc_md.enable_msi) | |
826 | return ppc_md.enable_msi(pdev); | |
827 | else | |
828 | return -1; | |
829 | } | |
830 | ||
831 | void pci_disable_msi(struct pci_dev * pdev) | |
832 | { | |
833 | if (ppc_md.disable_msi) | |
834 | ppc_md.disable_msi(pdev); | |
835 | } | |
836 | ||
837 | void pci_scan_msi_device(struct pci_dev *dev) {} | |
838 | int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) {return -1;} | |
839 | void pci_disable_msix(struct pci_dev *dev) {} | |
840 | void msi_remove_pci_irq_vectors(struct pci_dev *dev) {} | |
841 | void disable_msi_mode(struct pci_dev *dev, int pos, int type) {} | |
842 | void pci_no_msi(void) {} | |
843 | ||
844 | #endif | |
845 | ||
c6622f63 | 846 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
847 | static int __init setup_noirqdistrib(char *str) |
848 | { | |
849 | distribute_irqs = 0; | |
850 | return 1; | |
851 | } | |
852 | ||
853 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 854 | #endif /* CONFIG_PPC64 */ |