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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
756e7104 | 10 | * |
1da177e4 LT |
11 | * This program is free software; you can redistribute it and/or |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | * | |
16 | * This file contains the code used by various IRQ handling routines: | |
17 | * asking for different IRQ's should be done through these routines | |
18 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
19 | * shouldn't result in any weird surprises, and installing new handlers | |
20 | * should be easier. | |
756e7104 SR |
21 | * |
22 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
23 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
24 | * mask register (of which only 16 are defined), hence the weird shifting | |
25 | * and complement of the cached_irq_mask. I want to be able to stuff | |
26 | * this right into the SIU SMASK register. | |
27 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
28 | * to reduce code space and undefined function references. | |
1da177e4 LT |
29 | */ |
30 | ||
0ebfff14 BH |
31 | #undef DEBUG |
32 | ||
1da177e4 LT |
33 | #include <linux/module.h> |
34 | #include <linux/threads.h> | |
35 | #include <linux/kernel_stat.h> | |
36 | #include <linux/signal.h> | |
37 | #include <linux/sched.h> | |
756e7104 | 38 | #include <linux/ptrace.h> |
1da177e4 LT |
39 | #include <linux/ioport.h> |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/timex.h> | |
1da177e4 LT |
42 | #include <linux/init.h> |
43 | #include <linux/slab.h> | |
1da177e4 LT |
44 | #include <linux/delay.h> |
45 | #include <linux/irq.h> | |
756e7104 SR |
46 | #include <linux/seq_file.h> |
47 | #include <linux/cpumask.h> | |
1da177e4 LT |
48 | #include <linux/profile.h> |
49 | #include <linux/bitops.h> | |
0ebfff14 BH |
50 | #include <linux/list.h> |
51 | #include <linux/radix-tree.h> | |
52 | #include <linux/mutex.h> | |
53 | #include <linux/bootmem.h> | |
45934c47 | 54 | #include <linux/pci.h> |
60b332e7 | 55 | #include <linux/debugfs.h> |
cdd6c482 | 56 | #include <linux/perf_event.h> |
1da177e4 LT |
57 | |
58 | #include <asm/uaccess.h> | |
59 | #include <asm/system.h> | |
60 | #include <asm/io.h> | |
61 | #include <asm/pgtable.h> | |
62 | #include <asm/irq.h> | |
63 | #include <asm/cache.h> | |
64 | #include <asm/prom.h> | |
65 | #include <asm/ptrace.h> | |
1da177e4 | 66 | #include <asm/machdep.h> |
0ebfff14 | 67 | #include <asm/udbg.h> |
d04c56f7 | 68 | #ifdef CONFIG_PPC64 |
1da177e4 | 69 | #include <asm/paca.h> |
d04c56f7 | 70 | #include <asm/firmware.h> |
0874dd40 | 71 | #include <asm/lv1call.h> |
756e7104 | 72 | #endif |
1da177e4 | 73 | |
868accb7 | 74 | int __irq_offset_value; |
756e7104 SR |
75 | static int ppc_spurious_interrupts; |
76 | ||
756e7104 | 77 | #ifdef CONFIG_PPC32 |
b9e5b4e6 BH |
78 | EXPORT_SYMBOL(__irq_offset_value); |
79 | atomic_t ppc_n_lost_interrupts; | |
756e7104 | 80 | |
756e7104 SR |
81 | #ifdef CONFIG_TAU_INT |
82 | extern int tau_initialized; | |
83 | extern int tau_interrupts(int); | |
84 | #endif | |
b9e5b4e6 | 85 | #endif /* CONFIG_PPC32 */ |
756e7104 | 86 | |
756e7104 | 87 | #ifdef CONFIG_PPC64 |
cd015707 ME |
88 | |
89 | #ifndef CONFIG_SPARSE_IRQ | |
1da177e4 | 90 | EXPORT_SYMBOL(irq_desc); |
cd015707 | 91 | #endif |
1da177e4 LT |
92 | |
93 | int distribute_irqs = 1; | |
d04c56f7 | 94 | |
4e491d14 | 95 | static inline notrace unsigned long get_hard_enabled(void) |
ef2b343e HD |
96 | { |
97 | unsigned long enabled; | |
98 | ||
99 | __asm__ __volatile__("lbz %0,%1(13)" | |
100 | : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled))); | |
101 | ||
102 | return enabled; | |
103 | } | |
104 | ||
4e491d14 | 105 | static inline notrace void set_soft_enabled(unsigned long enable) |
ef2b343e HD |
106 | { |
107 | __asm__ __volatile__("stb %0,%1(13)" | |
108 | : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled))); | |
109 | } | |
110 | ||
4e491d14 | 111 | notrace void raw_local_irq_restore(unsigned long en) |
d04c56f7 | 112 | { |
ef2b343e HD |
113 | /* |
114 | * get_paca()->soft_enabled = en; | |
115 | * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1? | |
116 | * That was allowed before, and in such a case we do need to take care | |
117 | * that gcc will set soft_enabled directly via r13, not choose to use | |
118 | * an intermediate register, lest we're preempted to a different cpu. | |
119 | */ | |
120 | set_soft_enabled(en); | |
d04c56f7 PM |
121 | if (!en) |
122 | return; | |
123 | ||
94491685 | 124 | #ifdef CONFIG_PPC_STD_MMU_64 |
d04c56f7 | 125 | if (firmware_has_feature(FW_FEATURE_ISERIES)) { |
ef2b343e HD |
126 | /* |
127 | * Do we need to disable preemption here? Not really: in the | |
128 | * unlikely event that we're preempted to a different cpu in | |
129 | * between getting r13, loading its lppaca_ptr, and loading | |
130 | * its any_int, we might call iseries_handle_interrupts without | |
131 | * an interrupt pending on the new cpu, but that's no disaster, | |
132 | * is it? And the business of preempting us off the old cpu | |
133 | * would itself involve a local_irq_restore which handles the | |
134 | * interrupt to that cpu. | |
135 | * | |
136 | * But use "local_paca->lppaca_ptr" instead of "get_lppaca()" | |
137 | * to avoid any preemption checking added into get_paca(). | |
138 | */ | |
139 | if (local_paca->lppaca_ptr->int_dword.any_int) | |
d04c56f7 | 140 | iseries_handle_interrupts(); |
d04c56f7 | 141 | } |
94491685 | 142 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
d04c56f7 | 143 | |
cdd6c482 IM |
144 | if (test_perf_event_pending()) { |
145 | clear_perf_event_pending(); | |
146 | perf_event_do_pending(); | |
b6c5a71d | 147 | } |
93a6d3ce | 148 | |
ef2b343e HD |
149 | /* |
150 | * if (get_paca()->hard_enabled) return; | |
151 | * But again we need to take care that gcc gets hard_enabled directly | |
152 | * via r13, not choose to use an intermediate register, lest we're | |
153 | * preempted to a different cpu in between the two instructions. | |
154 | */ | |
155 | if (get_hard_enabled()) | |
d04c56f7 | 156 | return; |
ef2b343e HD |
157 | |
158 | /* | |
159 | * Need to hard-enable interrupts here. Since currently disabled, | |
160 | * no need to take further asm precautions against preemption; but | |
161 | * use local_paca instead of get_paca() to avoid preemption checking. | |
162 | */ | |
163 | local_paca->hard_enabled = en; | |
d04c56f7 PM |
164 | if ((int)mfspr(SPRN_DEC) < 0) |
165 | mtspr(SPRN_DEC, 1); | |
0874dd40 TS |
166 | |
167 | /* | |
168 | * Force the delivery of pending soft-disabled interrupts on PS3. | |
169 | * Any HV call will have this side effect. | |
170 | */ | |
171 | if (firmware_has_feature(FW_FEATURE_PS3_LV1)) { | |
172 | u64 tmp; | |
173 | lv1_get_version_info(&tmp); | |
174 | } | |
175 | ||
e1fa2e13 | 176 | __hard_irq_enable(); |
d04c56f7 | 177 | } |
945feb17 | 178 | EXPORT_SYMBOL(raw_local_irq_restore); |
756e7104 | 179 | #endif /* CONFIG_PPC64 */ |
1da177e4 LT |
180 | |
181 | int show_interrupts(struct seq_file *p, void *v) | |
182 | { | |
756e7104 SR |
183 | int i = *(loff_t *)v, j; |
184 | struct irqaction *action; | |
97f7d6bc | 185 | struct irq_desc *desc; |
1da177e4 LT |
186 | unsigned long flags; |
187 | ||
188 | if (i == 0) { | |
756e7104 SR |
189 | seq_puts(p, " "); |
190 | for_each_online_cpu(j) | |
191 | seq_printf(p, "CPU%d ", j); | |
1da177e4 | 192 | seq_putc(p, '\n'); |
750ab112 | 193 | } else if (i == nr_irqs) { |
9c4cb825 | 194 | #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT) |
756e7104 SR |
195 | if (tau_initialized){ |
196 | seq_puts(p, "TAU: "); | |
394e3902 AM |
197 | for_each_online_cpu(j) |
198 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
756e7104 SR |
199 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); |
200 | } | |
9c4cb825 | 201 | #endif /* CONFIG_PPC32 && CONFIG_TAU_INT*/ |
1da177e4 | 202 | seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts); |
750ab112 ME |
203 | |
204 | return 0; | |
756e7104 | 205 | } |
750ab112 ME |
206 | |
207 | desc = irq_to_desc(i); | |
208 | if (!desc) | |
209 | return 0; | |
210 | ||
211 | spin_lock_irqsave(&desc->lock, flags); | |
212 | ||
213 | action = desc->action; | |
214 | if (!action || !action->handler) | |
215 | goto skip; | |
216 | ||
217 | seq_printf(p, "%3d: ", i); | |
218 | #ifdef CONFIG_SMP | |
219 | for_each_online_cpu(j) | |
220 | seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); | |
221 | #else | |
222 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
223 | #endif /* CONFIG_SMP */ | |
224 | ||
225 | if (desc->chip) | |
b27df672 | 226 | seq_printf(p, " %s ", desc->chip->name); |
750ab112 ME |
227 | else |
228 | seq_puts(p, " None "); | |
229 | ||
230 | seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); | |
231 | seq_printf(p, " %s", action->name); | |
232 | ||
233 | for (action = action->next; action; action = action->next) | |
234 | seq_printf(p, ", %s", action->name); | |
235 | seq_putc(p, '\n'); | |
236 | ||
237 | skip: | |
238 | spin_unlock_irqrestore(&desc->lock, flags); | |
239 | ||
1da177e4 LT |
240 | return 0; |
241 | } | |
242 | ||
243 | #ifdef CONFIG_HOTPLUG_CPU | |
244 | void fixup_irqs(cpumask_t map) | |
245 | { | |
6cff46f4 | 246 | struct irq_desc *desc; |
1da177e4 LT |
247 | unsigned int irq; |
248 | static int warned; | |
249 | ||
250 | for_each_irq(irq) { | |
251 | cpumask_t mask; | |
252 | ||
6cff46f4 ME |
253 | desc = irq_to_desc(irq); |
254 | if (desc && desc->status & IRQ_PER_CPU) | |
1da177e4 LT |
255 | continue; |
256 | ||
6cff46f4 | 257 | cpumask_and(&mask, desc->affinity, &map); |
1da177e4 LT |
258 | if (any_online_cpu(mask) == NR_CPUS) { |
259 | printk("Breaking affinity for irq %i\n", irq); | |
260 | mask = map; | |
261 | } | |
6cff46f4 ME |
262 | if (desc->chip->set_affinity) |
263 | desc->chip->set_affinity(irq, &mask); | |
264 | else if (desc->action && !(warned++)) | |
1da177e4 LT |
265 | printk("Cannot set affinity for irq %i\n", irq); |
266 | } | |
267 | ||
268 | local_irq_enable(); | |
269 | mdelay(1); | |
270 | local_irq_disable(); | |
271 | } | |
272 | #endif | |
273 | ||
f2694ba5 ME |
274 | #ifdef CONFIG_IRQSTACKS |
275 | static inline void handle_one_irq(unsigned int irq) | |
276 | { | |
277 | struct thread_info *curtp, *irqtp; | |
278 | unsigned long saved_sp_limit; | |
279 | struct irq_desc *desc; | |
f2694ba5 ME |
280 | |
281 | /* Switch to the irq stack to handle this */ | |
282 | curtp = current_thread_info(); | |
283 | irqtp = hardirq_ctx[smp_processor_id()]; | |
284 | ||
285 | if (curtp == irqtp) { | |
286 | /* We're already on the irq stack, just handle it */ | |
287 | generic_handle_irq(irq); | |
288 | return; | |
289 | } | |
290 | ||
6cff46f4 | 291 | desc = irq_to_desc(irq); |
f2694ba5 ME |
292 | saved_sp_limit = current->thread.ksp_limit; |
293 | ||
f2694ba5 ME |
294 | irqtp->task = curtp->task; |
295 | irqtp->flags = 0; | |
296 | ||
297 | /* Copy the softirq bits in preempt_count so that the | |
298 | * softirq checks work in the hardirq context. */ | |
299 | irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) | | |
300 | (curtp->preempt_count & SOFTIRQ_MASK); | |
301 | ||
302 | current->thread.ksp_limit = (unsigned long)irqtp + | |
303 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
304 | ||
835363e6 | 305 | call_handle_irq(irq, desc, irqtp, desc->handle_irq); |
f2694ba5 ME |
306 | current->thread.ksp_limit = saved_sp_limit; |
307 | irqtp->task = NULL; | |
308 | ||
309 | /* Set any flag that may have been set on the | |
310 | * alternate stack | |
311 | */ | |
312 | if (irqtp->flags) | |
313 | set_bits(irqtp->flags, &curtp->flags); | |
314 | } | |
315 | #else | |
316 | static inline void handle_one_irq(unsigned int irq) | |
317 | { | |
318 | generic_handle_irq(irq); | |
319 | } | |
320 | #endif | |
321 | ||
d7cb10d6 ME |
322 | static inline void check_stack_overflow(void) |
323 | { | |
324 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
325 | long sp; | |
326 | ||
327 | sp = __get_SP() & (THREAD_SIZE-1); | |
328 | ||
329 | /* check for stack overflow: is there less than 2KB free? */ | |
330 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
331 | printk("do_IRQ: stack overflow: %ld\n", | |
332 | sp - sizeof(struct thread_info)); | |
333 | dump_stack(); | |
334 | } | |
335 | #endif | |
336 | } | |
337 | ||
1da177e4 LT |
338 | void do_IRQ(struct pt_regs *regs) |
339 | { | |
7d12e780 | 340 | struct pt_regs *old_regs = set_irq_regs(regs); |
0ebfff14 | 341 | unsigned int irq; |
1da177e4 | 342 | |
4b218e9b | 343 | irq_enter(); |
1da177e4 | 344 | |
d7cb10d6 | 345 | check_stack_overflow(); |
1da177e4 | 346 | |
35a84c2f | 347 | irq = ppc_md.get_irq(); |
1da177e4 | 348 | |
f2694ba5 ME |
349 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) |
350 | handle_one_irq(irq); | |
351 | else if (irq != NO_IRQ_IGNORE) | |
e199500c SR |
352 | /* That's not SMP safe ... but who cares ? */ |
353 | ppc_spurious_interrupts++; | |
354 | ||
4b218e9b | 355 | irq_exit(); |
7d12e780 | 356 | set_irq_regs(old_regs); |
756e7104 | 357 | |
e199500c | 358 | #ifdef CONFIG_PPC_ISERIES |
b06a3183 SR |
359 | if (firmware_has_feature(FW_FEATURE_ISERIES) && |
360 | get_lppaca()->int_dword.fields.decr_int) { | |
3356bb9f DG |
361 | get_lppaca()->int_dword.fields.decr_int = 0; |
362 | /* Signal a fake decrementer interrupt */ | |
363 | timer_interrupt(regs); | |
e199500c SR |
364 | } |
365 | #endif | |
366 | } | |
1da177e4 LT |
367 | |
368 | void __init init_IRQ(void) | |
369 | { | |
70584578 SR |
370 | if (ppc_md.init_IRQ) |
371 | ppc_md.init_IRQ(); | |
bcf0b088 KG |
372 | |
373 | exc_lvl_ctx_init(); | |
374 | ||
1da177e4 LT |
375 | irq_ctx_init(); |
376 | } | |
377 | ||
bcf0b088 KG |
378 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
379 | struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; | |
380 | struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; | |
381 | struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | |
382 | ||
383 | void exc_lvl_ctx_init(void) | |
384 | { | |
385 | struct thread_info *tp; | |
386 | int i; | |
387 | ||
388 | for_each_possible_cpu(i) { | |
389 | memset((void *)critirq_ctx[i], 0, THREAD_SIZE); | |
390 | tp = critirq_ctx[i]; | |
391 | tp->cpu = i; | |
392 | tp->preempt_count = 0; | |
393 | ||
394 | #ifdef CONFIG_BOOKE | |
395 | memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE); | |
396 | tp = dbgirq_ctx[i]; | |
397 | tp->cpu = i; | |
398 | tp->preempt_count = 0; | |
399 | ||
400 | memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE); | |
401 | tp = mcheckirq_ctx[i]; | |
402 | tp->cpu = i; | |
403 | tp->preempt_count = HARDIRQ_OFFSET; | |
404 | #endif | |
405 | } | |
406 | } | |
407 | #endif | |
1da177e4 | 408 | |
1da177e4 | 409 | #ifdef CONFIG_IRQSTACKS |
22722051 AM |
410 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
411 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | |
1da177e4 LT |
412 | |
413 | void irq_ctx_init(void) | |
414 | { | |
415 | struct thread_info *tp; | |
416 | int i; | |
417 | ||
0e551954 | 418 | for_each_possible_cpu(i) { |
1da177e4 LT |
419 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
420 | tp = softirq_ctx[i]; | |
421 | tp->cpu = i; | |
e6768a4f | 422 | tp->preempt_count = 0; |
1da177e4 LT |
423 | |
424 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
425 | tp = hardirq_ctx[i]; | |
426 | tp->cpu = i; | |
427 | tp->preempt_count = HARDIRQ_OFFSET; | |
428 | } | |
429 | } | |
430 | ||
c6622f63 PM |
431 | static inline void do_softirq_onstack(void) |
432 | { | |
433 | struct thread_info *curtp, *irqtp; | |
85218827 | 434 | unsigned long saved_sp_limit = current->thread.ksp_limit; |
c6622f63 PM |
435 | |
436 | curtp = current_thread_info(); | |
437 | irqtp = softirq_ctx[smp_processor_id()]; | |
438 | irqtp->task = curtp->task; | |
85218827 KG |
439 | current->thread.ksp_limit = (unsigned long)irqtp + |
440 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
c6622f63 | 441 | call_do_softirq(irqtp); |
85218827 | 442 | current->thread.ksp_limit = saved_sp_limit; |
c6622f63 PM |
443 | irqtp->task = NULL; |
444 | } | |
1da177e4 | 445 | |
c6622f63 PM |
446 | #else |
447 | #define do_softirq_onstack() __do_softirq() | |
448 | #endif /* CONFIG_IRQSTACKS */ | |
449 | ||
1da177e4 LT |
450 | void do_softirq(void) |
451 | { | |
452 | unsigned long flags; | |
1da177e4 LT |
453 | |
454 | if (in_interrupt()) | |
1da177e4 LT |
455 | return; |
456 | ||
1da177e4 | 457 | local_irq_save(flags); |
1da177e4 | 458 | |
912b2539 | 459 | if (local_softirq_pending()) |
c6622f63 | 460 | do_softirq_onstack(); |
1da177e4 LT |
461 | |
462 | local_irq_restore(flags); | |
1da177e4 | 463 | } |
1da177e4 | 464 | |
1da177e4 | 465 | |
1da177e4 | 466 | /* |
0ebfff14 | 467 | * IRQ controller and virtual interrupts |
1da177e4 LT |
468 | */ |
469 | ||
0ebfff14 | 470 | static LIST_HEAD(irq_hosts); |
057b184a | 471 | static DEFINE_SPINLOCK(irq_big_lock); |
967e012e | 472 | static unsigned int revmap_trees_allocated; |
150c6c8f | 473 | static DEFINE_MUTEX(revmap_trees_mutex); |
0ebfff14 BH |
474 | struct irq_map_entry irq_map[NR_IRQS]; |
475 | static unsigned int irq_virq_count = NR_IRQS; | |
476 | static struct irq_host *irq_default_host; | |
1da177e4 | 477 | |
35923f12 OJ |
478 | irq_hw_number_t virq_to_hw(unsigned int virq) |
479 | { | |
480 | return irq_map[virq].hwirq; | |
481 | } | |
482 | EXPORT_SYMBOL_GPL(virq_to_hw); | |
483 | ||
68158006 ME |
484 | static int default_irq_host_match(struct irq_host *h, struct device_node *np) |
485 | { | |
486 | return h->of_node != NULL && h->of_node == np; | |
487 | } | |
488 | ||
5669c3cf | 489 | struct irq_host *irq_alloc_host(struct device_node *of_node, |
52964f87 ME |
490 | unsigned int revmap_type, |
491 | unsigned int revmap_arg, | |
492 | struct irq_host_ops *ops, | |
493 | irq_hw_number_t inval_irq) | |
1da177e4 | 494 | { |
0ebfff14 BH |
495 | struct irq_host *host; |
496 | unsigned int size = sizeof(struct irq_host); | |
497 | unsigned int i; | |
498 | unsigned int *rmap; | |
499 | unsigned long flags; | |
500 | ||
501 | /* Allocate structure and revmap table if using linear mapping */ | |
502 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | |
503 | size += revmap_arg * sizeof(unsigned int); | |
5669c3cf | 504 | host = zalloc_maybe_bootmem(size, GFP_KERNEL); |
0ebfff14 BH |
505 | if (host == NULL) |
506 | return NULL; | |
7d01c880 | 507 | |
0ebfff14 BH |
508 | /* Fill structure */ |
509 | host->revmap_type = revmap_type; | |
510 | host->inval_irq = inval_irq; | |
511 | host->ops = ops; | |
19fc65b5 | 512 | host->of_node = of_node_get(of_node); |
7d01c880 | 513 | |
68158006 ME |
514 | if (host->ops->match == NULL) |
515 | host->ops->match = default_irq_host_match; | |
7d01c880 | 516 | |
0ebfff14 BH |
517 | spin_lock_irqsave(&irq_big_lock, flags); |
518 | ||
519 | /* If it's a legacy controller, check for duplicates and | |
520 | * mark it as allocated (we use irq 0 host pointer for that | |
521 | */ | |
522 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | |
523 | if (irq_map[0].host != NULL) { | |
524 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
525 | /* If we are early boot, we can't free the structure, | |
526 | * too bad... | |
527 | * this will be fixed once slab is made available early | |
528 | * instead of the current cruft | |
529 | */ | |
530 | if (mem_init_done) | |
531 | kfree(host); | |
532 | return NULL; | |
533 | } | |
534 | irq_map[0].host = host; | |
535 | } | |
536 | ||
537 | list_add(&host->link, &irq_hosts); | |
538 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
539 | ||
540 | /* Additional setups per revmap type */ | |
541 | switch(revmap_type) { | |
542 | case IRQ_HOST_MAP_LEGACY: | |
543 | /* 0 is always the invalid number for legacy */ | |
544 | host->inval_irq = 0; | |
545 | /* setup us as the host for all legacy interrupts */ | |
546 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | |
7866291d | 547 | irq_map[i].hwirq = i; |
0ebfff14 BH |
548 | smp_wmb(); |
549 | irq_map[i].host = host; | |
550 | smp_wmb(); | |
551 | ||
6e99e458 | 552 | /* Clear norequest flags */ |
6cff46f4 | 553 | irq_to_desc(i)->status &= ~IRQ_NOREQUEST; |
0ebfff14 BH |
554 | |
555 | /* Legacy flags are left to default at this point, | |
556 | * one can then use irq_create_mapping() to | |
c03983ac | 557 | * explicitly change them |
0ebfff14 | 558 | */ |
6e99e458 | 559 | ops->map(host, i, i); |
0ebfff14 BH |
560 | } |
561 | break; | |
562 | case IRQ_HOST_MAP_LINEAR: | |
563 | rmap = (unsigned int *)(host + 1); | |
564 | for (i = 0; i < revmap_arg; i++) | |
f5921697 | 565 | rmap[i] = NO_IRQ; |
0ebfff14 BH |
566 | host->revmap_data.linear.size = revmap_arg; |
567 | smp_wmb(); | |
568 | host->revmap_data.linear.revmap = rmap; | |
569 | break; | |
570 | default: | |
571 | break; | |
572 | } | |
573 | ||
574 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | |
575 | ||
576 | return host; | |
1da177e4 LT |
577 | } |
578 | ||
0ebfff14 | 579 | struct irq_host *irq_find_host(struct device_node *node) |
1da177e4 | 580 | { |
0ebfff14 BH |
581 | struct irq_host *h, *found = NULL; |
582 | unsigned long flags; | |
583 | ||
584 | /* We might want to match the legacy controller last since | |
585 | * it might potentially be set to match all interrupts in | |
586 | * the absence of a device node. This isn't a problem so far | |
587 | * yet though... | |
588 | */ | |
589 | spin_lock_irqsave(&irq_big_lock, flags); | |
590 | list_for_each_entry(h, &irq_hosts, link) | |
68158006 | 591 | if (h->ops->match(h, node)) { |
0ebfff14 BH |
592 | found = h; |
593 | break; | |
594 | } | |
595 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
596 | return found; | |
597 | } | |
598 | EXPORT_SYMBOL_GPL(irq_find_host); | |
599 | ||
600 | void irq_set_default_host(struct irq_host *host) | |
601 | { | |
602 | pr_debug("irq: Default host set to @0x%p\n", host); | |
1da177e4 | 603 | |
0ebfff14 BH |
604 | irq_default_host = host; |
605 | } | |
1da177e4 | 606 | |
0ebfff14 BH |
607 | void irq_set_virq_count(unsigned int count) |
608 | { | |
609 | pr_debug("irq: Trying to set virq count to %d\n", count); | |
fef1c772 | 610 | |
0ebfff14 BH |
611 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
612 | if (count < NR_IRQS) | |
613 | irq_virq_count = count; | |
614 | } | |
615 | ||
6fde40f3 ME |
616 | static int irq_setup_virq(struct irq_host *host, unsigned int virq, |
617 | irq_hw_number_t hwirq) | |
618 | { | |
cd015707 ME |
619 | struct irq_desc *desc; |
620 | ||
621 | desc = irq_to_desc_alloc_node(virq, 0); | |
622 | if (!desc) { | |
623 | pr_debug("irq: -> allocating desc failed\n"); | |
624 | goto error; | |
625 | } | |
626 | ||
6fde40f3 | 627 | /* Clear IRQ_NOREQUEST flag */ |
cd015707 | 628 | desc->status &= ~IRQ_NOREQUEST; |
6fde40f3 ME |
629 | |
630 | /* map it */ | |
631 | smp_wmb(); | |
632 | irq_map[virq].hwirq = hwirq; | |
633 | smp_mb(); | |
634 | ||
635 | if (host->ops->map(host, virq, hwirq)) { | |
636 | pr_debug("irq: -> mapping failed, freeing\n"); | |
cd015707 | 637 | goto error; |
6fde40f3 ME |
638 | } |
639 | ||
640 | return 0; | |
cd015707 ME |
641 | |
642 | error: | |
643 | irq_free_virt(virq, 1); | |
644 | return -1; | |
6fde40f3 | 645 | } |
8ec8f2e8 | 646 | |
ee51de56 ME |
647 | unsigned int irq_create_direct_mapping(struct irq_host *host) |
648 | { | |
649 | unsigned int virq; | |
650 | ||
651 | if (host == NULL) | |
652 | host = irq_default_host; | |
653 | ||
654 | BUG_ON(host == NULL); | |
655 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP); | |
656 | ||
657 | virq = irq_alloc_virt(host, 1, 0); | |
658 | if (virq == NO_IRQ) { | |
659 | pr_debug("irq: create_direct virq allocation failed\n"); | |
660 | return NO_IRQ; | |
661 | } | |
662 | ||
663 | pr_debug("irq: create_direct obtained virq %d\n", virq); | |
664 | ||
665 | if (irq_setup_virq(host, virq, virq)) | |
666 | return NO_IRQ; | |
667 | ||
668 | return virq; | |
669 | } | |
670 | ||
0ebfff14 | 671 | unsigned int irq_create_mapping(struct irq_host *host, |
6e99e458 | 672 | irq_hw_number_t hwirq) |
0ebfff14 BH |
673 | { |
674 | unsigned int virq, hint; | |
675 | ||
6e99e458 | 676 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
0ebfff14 BH |
677 | |
678 | /* Look for default host if nececssary */ | |
679 | if (host == NULL) | |
680 | host = irq_default_host; | |
681 | if (host == NULL) { | |
682 | printk(KERN_WARNING "irq_create_mapping called for" | |
683 | " NULL host, hwirq=%lx\n", hwirq); | |
684 | WARN_ON(1); | |
685 | return NO_IRQ; | |
1da177e4 | 686 | } |
0ebfff14 | 687 | pr_debug("irq: -> using host @%p\n", host); |
1da177e4 | 688 | |
0ebfff14 BH |
689 | /* Check if mapping already exist, if it does, call |
690 | * host->ops->map() to update the flags | |
691 | */ | |
692 | virq = irq_find_mapping(host, hwirq); | |
f5921697 | 693 | if (virq != NO_IRQ) { |
acc900ef IK |
694 | if (host->ops->remap) |
695 | host->ops->remap(host, virq, hwirq); | |
0ebfff14 | 696 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
0ebfff14 | 697 | return virq; |
1da177e4 LT |
698 | } |
699 | ||
0ebfff14 BH |
700 | /* Get a virtual interrupt number */ |
701 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | |
702 | /* Handle legacy */ | |
703 | virq = (unsigned int)hwirq; | |
704 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | |
705 | return NO_IRQ; | |
706 | return virq; | |
707 | } else { | |
708 | /* Allocate a virtual interrupt number */ | |
709 | hint = hwirq % irq_virq_count; | |
710 | virq = irq_alloc_virt(host, 1, hint); | |
711 | if (virq == NO_IRQ) { | |
712 | pr_debug("irq: -> virq allocation failed\n"); | |
713 | return NO_IRQ; | |
714 | } | |
715 | } | |
0ebfff14 | 716 | |
6fde40f3 | 717 | if (irq_setup_virq(host, virq, hwirq)) |
0ebfff14 | 718 | return NO_IRQ; |
6fde40f3 | 719 | |
c7d07fdd ME |
720 | printk(KERN_DEBUG "irq: irq %lu on host %s mapped to virtual irq %u\n", |
721 | hwirq, host->of_node ? host->of_node->full_name : "null", virq); | |
722 | ||
1da177e4 | 723 | return virq; |
0ebfff14 BH |
724 | } |
725 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
726 | ||
f3d2ab41 AV |
727 | unsigned int irq_create_of_mapping(struct device_node *controller, |
728 | u32 *intspec, unsigned int intsize) | |
0ebfff14 BH |
729 | { |
730 | struct irq_host *host; | |
731 | irq_hw_number_t hwirq; | |
6e99e458 BH |
732 | unsigned int type = IRQ_TYPE_NONE; |
733 | unsigned int virq; | |
1da177e4 | 734 | |
0ebfff14 BH |
735 | if (controller == NULL) |
736 | host = irq_default_host; | |
737 | else | |
738 | host = irq_find_host(controller); | |
6e99e458 BH |
739 | if (host == NULL) { |
740 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | |
741 | controller->full_name); | |
0ebfff14 | 742 | return NO_IRQ; |
6e99e458 | 743 | } |
0ebfff14 BH |
744 | |
745 | /* If host has no translation, then we assume interrupt line */ | |
746 | if (host->ops->xlate == NULL) | |
747 | hwirq = intspec[0]; | |
748 | else { | |
749 | if (host->ops->xlate(host, controller, intspec, intsize, | |
6e99e458 | 750 | &hwirq, &type)) |
0ebfff14 | 751 | return NO_IRQ; |
1da177e4 | 752 | } |
0ebfff14 | 753 | |
6e99e458 BH |
754 | /* Create mapping */ |
755 | virq = irq_create_mapping(host, hwirq); | |
756 | if (virq == NO_IRQ) | |
757 | return virq; | |
758 | ||
759 | /* Set type if specified and different than the current one */ | |
760 | if (type != IRQ_TYPE_NONE && | |
6cff46f4 | 761 | type != (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK)) |
6e99e458 BH |
762 | set_irq_type(virq, type); |
763 | return virq; | |
1da177e4 | 764 | } |
0ebfff14 | 765 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
1da177e4 | 766 | |
0ebfff14 | 767 | unsigned int irq_of_parse_and_map(struct device_node *dev, int index) |
1da177e4 | 768 | { |
0ebfff14 | 769 | struct of_irq oirq; |
1da177e4 | 770 | |
0ebfff14 BH |
771 | if (of_irq_map_one(dev, index, &oirq)) |
772 | return NO_IRQ; | |
1da177e4 | 773 | |
0ebfff14 BH |
774 | return irq_create_of_mapping(oirq.controller, oirq.specifier, |
775 | oirq.size); | |
776 | } | |
777 | EXPORT_SYMBOL_GPL(irq_of_parse_and_map); | |
1da177e4 | 778 | |
0ebfff14 BH |
779 | void irq_dispose_mapping(unsigned int virq) |
780 | { | |
5414c6be | 781 | struct irq_host *host; |
0ebfff14 | 782 | irq_hw_number_t hwirq; |
1da177e4 | 783 | |
5414c6be ME |
784 | if (virq == NO_IRQ) |
785 | return; | |
786 | ||
787 | host = irq_map[virq].host; | |
0ebfff14 BH |
788 | WARN_ON (host == NULL); |
789 | if (host == NULL) | |
790 | return; | |
1da177e4 | 791 | |
0ebfff14 BH |
792 | /* Never unmap legacy interrupts */ |
793 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
794 | return; | |
1da177e4 | 795 | |
0ebfff14 BH |
796 | /* remove chip and handler */ |
797 | set_irq_chip_and_handler(virq, NULL, NULL); | |
798 | ||
799 | /* Make sure it's completed */ | |
800 | synchronize_irq(virq); | |
801 | ||
802 | /* Tell the PIC about it */ | |
803 | if (host->ops->unmap) | |
804 | host->ops->unmap(host, virq); | |
805 | smp_mb(); | |
806 | ||
807 | /* Clear reverse map */ | |
808 | hwirq = irq_map[virq].hwirq; | |
809 | switch(host->revmap_type) { | |
810 | case IRQ_HOST_MAP_LINEAR: | |
811 | if (hwirq < host->revmap_data.linear.size) | |
f5921697 | 812 | host->revmap_data.linear.revmap[hwirq] = NO_IRQ; |
0ebfff14 BH |
813 | break; |
814 | case IRQ_HOST_MAP_TREE: | |
967e012e SD |
815 | /* |
816 | * Check if radix tree allocated yet, if not then nothing to | |
817 | * remove. | |
818 | */ | |
819 | smp_rmb(); | |
820 | if (revmap_trees_allocated < 1) | |
0ebfff14 | 821 | break; |
150c6c8f | 822 | mutex_lock(&revmap_trees_mutex); |
0ebfff14 | 823 | radix_tree_delete(&host->revmap_data.tree, hwirq); |
150c6c8f | 824 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 BH |
825 | break; |
826 | } | |
1da177e4 | 827 | |
0ebfff14 BH |
828 | /* Destroy map */ |
829 | smp_mb(); | |
830 | irq_map[virq].hwirq = host->inval_irq; | |
1da177e4 | 831 | |
0ebfff14 | 832 | /* Set some flags */ |
6cff46f4 | 833 | irq_to_desc(virq)->status |= IRQ_NOREQUEST; |
1da177e4 | 834 | |
0ebfff14 BH |
835 | /* Free it */ |
836 | irq_free_virt(virq, 1); | |
1da177e4 | 837 | } |
0ebfff14 | 838 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
1da177e4 | 839 | |
0ebfff14 BH |
840 | unsigned int irq_find_mapping(struct irq_host *host, |
841 | irq_hw_number_t hwirq) | |
842 | { | |
843 | unsigned int i; | |
844 | unsigned int hint = hwirq % irq_virq_count; | |
845 | ||
846 | /* Look for default host if nececssary */ | |
847 | if (host == NULL) | |
848 | host = irq_default_host; | |
849 | if (host == NULL) | |
850 | return NO_IRQ; | |
851 | ||
852 | /* legacy -> bail early */ | |
853 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
854 | return hwirq; | |
855 | ||
856 | /* Slow path does a linear search of the map */ | |
857 | if (hint < NUM_ISA_INTERRUPTS) | |
858 | hint = NUM_ISA_INTERRUPTS; | |
859 | i = hint; | |
860 | do { | |
861 | if (irq_map[i].host == host && | |
862 | irq_map[i].hwirq == hwirq) | |
863 | return i; | |
864 | i++; | |
865 | if (i >= irq_virq_count) | |
866 | i = NUM_ISA_INTERRUPTS; | |
867 | } while(i != hint); | |
868 | return NO_IRQ; | |
869 | } | |
870 | EXPORT_SYMBOL_GPL(irq_find_mapping); | |
1da177e4 | 871 | |
0ebfff14 | 872 | |
967e012e SD |
873 | unsigned int irq_radix_revmap_lookup(struct irq_host *host, |
874 | irq_hw_number_t hwirq) | |
1da177e4 | 875 | { |
0ebfff14 BH |
876 | struct irq_map_entry *ptr; |
877 | unsigned int virq; | |
1da177e4 | 878 | |
0ebfff14 | 879 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); |
1da177e4 | 880 | |
967e012e SD |
881 | /* |
882 | * Check if the radix tree exists and has bee initialized. | |
883 | * If not, we fallback to slow mode | |
0ebfff14 | 884 | */ |
967e012e | 885 | if (revmap_trees_allocated < 2) |
0ebfff14 BH |
886 | return irq_find_mapping(host, hwirq); |
887 | ||
0ebfff14 | 888 | /* Now try to resolve */ |
150c6c8f SD |
889 | /* |
890 | * No rcu_read_lock(ing) needed, the ptr returned can't go under us | |
891 | * as it's referencing an entry in the static irq_map table. | |
892 | */ | |
967e012e | 893 | ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq); |
8ec8f2e8 | 894 | |
967e012e SD |
895 | /* |
896 | * If found in radix tree, then fine. | |
897 | * Else fallback to linear lookup - this should not happen in practice | |
898 | * as it means that we failed to insert the node in the radix tree. | |
899 | */ | |
900 | if (ptr) | |
0ebfff14 | 901 | virq = ptr - irq_map; |
967e012e SD |
902 | else |
903 | virq = irq_find_mapping(host, hwirq); | |
904 | ||
905 | return virq; | |
906 | } | |
907 | ||
908 | void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq, | |
909 | irq_hw_number_t hwirq) | |
910 | { | |
967e012e SD |
911 | |
912 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); | |
913 | ||
914 | /* | |
915 | * Check if the radix tree exists yet. | |
916 | * If not, then the irq will be inserted into the tree when it gets | |
917 | * initialized. | |
918 | */ | |
919 | smp_rmb(); | |
920 | if (revmap_trees_allocated < 1) | |
921 | return; | |
0ebfff14 | 922 | |
8ec8f2e8 | 923 | if (virq != NO_IRQ) { |
150c6c8f | 924 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
925 | radix_tree_insert(&host->revmap_data.tree, hwirq, |
926 | &irq_map[virq]); | |
150c6c8f | 927 | mutex_unlock(&revmap_trees_mutex); |
8ec8f2e8 | 928 | } |
1da177e4 LT |
929 | } |
930 | ||
0ebfff14 BH |
931 | unsigned int irq_linear_revmap(struct irq_host *host, |
932 | irq_hw_number_t hwirq) | |
c6622f63 | 933 | { |
0ebfff14 | 934 | unsigned int *revmap; |
c6622f63 | 935 | |
0ebfff14 BH |
936 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR); |
937 | ||
938 | /* Check revmap bounds */ | |
939 | if (unlikely(hwirq >= host->revmap_data.linear.size)) | |
940 | return irq_find_mapping(host, hwirq); | |
941 | ||
942 | /* Check if revmap was allocated */ | |
943 | revmap = host->revmap_data.linear.revmap; | |
944 | if (unlikely(revmap == NULL)) | |
945 | return irq_find_mapping(host, hwirq); | |
946 | ||
947 | /* Fill up revmap with slow path if no mapping found */ | |
948 | if (unlikely(revmap[hwirq] == NO_IRQ)) | |
949 | revmap[hwirq] = irq_find_mapping(host, hwirq); | |
950 | ||
951 | return revmap[hwirq]; | |
c6622f63 PM |
952 | } |
953 | ||
0ebfff14 BH |
954 | unsigned int irq_alloc_virt(struct irq_host *host, |
955 | unsigned int count, | |
956 | unsigned int hint) | |
957 | { | |
958 | unsigned long flags; | |
959 | unsigned int i, j, found = NO_IRQ; | |
c6622f63 | 960 | |
0ebfff14 BH |
961 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
962 | return NO_IRQ; | |
963 | ||
964 | spin_lock_irqsave(&irq_big_lock, flags); | |
965 | ||
966 | /* Use hint for 1 interrupt if any */ | |
967 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | |
968 | hint < irq_virq_count && irq_map[hint].host == NULL) { | |
969 | found = hint; | |
970 | goto hint_found; | |
971 | } | |
972 | ||
973 | /* Look for count consecutive numbers in the allocatable | |
974 | * (non-legacy) space | |
975 | */ | |
e1251465 ME |
976 | for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) { |
977 | if (irq_map[i].host != NULL) | |
978 | j = 0; | |
979 | else | |
980 | j++; | |
981 | ||
982 | if (j == count) { | |
983 | found = i - count + 1; | |
984 | break; | |
985 | } | |
0ebfff14 BH |
986 | } |
987 | if (found == NO_IRQ) { | |
988 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
989 | return NO_IRQ; | |
990 | } | |
991 | hint_found: | |
992 | for (i = found; i < (found + count); i++) { | |
993 | irq_map[i].hwirq = host->inval_irq; | |
994 | smp_wmb(); | |
995 | irq_map[i].host = host; | |
996 | } | |
997 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
998 | return found; | |
999 | } | |
1000 | ||
1001 | void irq_free_virt(unsigned int virq, unsigned int count) | |
1da177e4 LT |
1002 | { |
1003 | unsigned long flags; | |
0ebfff14 | 1004 | unsigned int i; |
1da177e4 | 1005 | |
0ebfff14 BH |
1006 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
1007 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | |
1da177e4 | 1008 | |
0ebfff14 BH |
1009 | spin_lock_irqsave(&irq_big_lock, flags); |
1010 | for (i = virq; i < (virq + count); i++) { | |
1011 | struct irq_host *host; | |
1da177e4 | 1012 | |
0ebfff14 BH |
1013 | if (i < NUM_ISA_INTERRUPTS || |
1014 | (virq + count) > irq_virq_count) | |
1015 | continue; | |
1da177e4 | 1016 | |
0ebfff14 BH |
1017 | host = irq_map[i].host; |
1018 | irq_map[i].hwirq = host->inval_irq; | |
1019 | smp_wmb(); | |
1020 | irq_map[i].host = NULL; | |
1021 | } | |
1022 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
1da177e4 | 1023 | } |
0ebfff14 | 1024 | |
cd015707 | 1025 | int arch_early_irq_init(void) |
0ebfff14 | 1026 | { |
cd015707 ME |
1027 | struct irq_desc *desc; |
1028 | int i; | |
0ebfff14 | 1029 | |
cd015707 ME |
1030 | for (i = 0; i < NR_IRQS; i++) { |
1031 | desc = irq_to_desc(i); | |
1032 | if (desc) | |
1033 | desc->status |= IRQ_NOREQUEST; | |
1034 | } | |
1035 | ||
1036 | return 0; | |
1037 | } | |
1038 | ||
1039 | int arch_init_chip_data(struct irq_desc *desc, int node) | |
1040 | { | |
1041 | desc->status |= IRQ_NOREQUEST; | |
1042 | return 0; | |
0ebfff14 BH |
1043 | } |
1044 | ||
1045 | /* We need to create the radix trees late */ | |
1046 | static int irq_late_init(void) | |
1047 | { | |
1048 | struct irq_host *h; | |
967e012e | 1049 | unsigned int i; |
0ebfff14 | 1050 | |
967e012e SD |
1051 | /* |
1052 | * No mutual exclusion with respect to accessors of the tree is needed | |
1053 | * here as the synchronization is done via the state variable | |
1054 | * revmap_trees_allocated. | |
1055 | */ | |
0ebfff14 BH |
1056 | list_for_each_entry(h, &irq_hosts, link) { |
1057 | if (h->revmap_type == IRQ_HOST_MAP_TREE) | |
967e012e SD |
1058 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_KERNEL); |
1059 | } | |
1060 | ||
1061 | /* | |
1062 | * Make sure the radix trees inits are visible before setting | |
1063 | * the flag | |
1064 | */ | |
1065 | smp_wmb(); | |
1066 | revmap_trees_allocated = 1; | |
1067 | ||
1068 | /* | |
1069 | * Insert the reverse mapping for those interrupts already present | |
1070 | * in irq_map[]. | |
1071 | */ | |
150c6c8f | 1072 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
1073 | for (i = 0; i < irq_virq_count; i++) { |
1074 | if (irq_map[i].host && | |
1075 | (irq_map[i].host->revmap_type == IRQ_HOST_MAP_TREE)) | |
1076 | radix_tree_insert(&irq_map[i].host->revmap_data.tree, | |
1077 | irq_map[i].hwirq, &irq_map[i]); | |
0ebfff14 | 1078 | } |
150c6c8f | 1079 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 | 1080 | |
967e012e SD |
1081 | /* |
1082 | * Make sure the radix trees insertions are visible before setting | |
1083 | * the flag | |
1084 | */ | |
1085 | smp_wmb(); | |
1086 | revmap_trees_allocated = 2; | |
1087 | ||
0ebfff14 BH |
1088 | return 0; |
1089 | } | |
1090 | arch_initcall(irq_late_init); | |
1091 | ||
60b332e7 ME |
1092 | #ifdef CONFIG_VIRQ_DEBUG |
1093 | static int virq_debug_show(struct seq_file *m, void *private) | |
1094 | { | |
1095 | unsigned long flags; | |
97f7d6bc | 1096 | struct irq_desc *desc; |
60b332e7 ME |
1097 | const char *p; |
1098 | char none[] = "none"; | |
1099 | int i; | |
1100 | ||
1101 | seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq", | |
1102 | "chip name", "host name"); | |
1103 | ||
76f1d94f | 1104 | for (i = 1; i < nr_irqs; i++) { |
6cff46f4 | 1105 | desc = irq_to_desc(i); |
76f1d94f ME |
1106 | if (!desc) |
1107 | continue; | |
1108 | ||
60b332e7 ME |
1109 | spin_lock_irqsave(&desc->lock, flags); |
1110 | ||
1111 | if (desc->action && desc->action->handler) { | |
1112 | seq_printf(m, "%5d ", i); | |
1113 | seq_printf(m, "0x%05lx ", virq_to_hw(i)); | |
1114 | ||
b27df672 TG |
1115 | if (desc->chip && desc->chip->name) |
1116 | p = desc->chip->name; | |
60b332e7 ME |
1117 | else |
1118 | p = none; | |
1119 | seq_printf(m, "%-15s ", p); | |
1120 | ||
1121 | if (irq_map[i].host && irq_map[i].host->of_node) | |
1122 | p = irq_map[i].host->of_node->full_name; | |
1123 | else | |
1124 | p = none; | |
1125 | seq_printf(m, "%s\n", p); | |
1126 | } | |
1127 | ||
1128 | spin_unlock_irqrestore(&desc->lock, flags); | |
1129 | } | |
1130 | ||
1131 | return 0; | |
1132 | } | |
1133 | ||
1134 | static int virq_debug_open(struct inode *inode, struct file *file) | |
1135 | { | |
1136 | return single_open(file, virq_debug_show, inode->i_private); | |
1137 | } | |
1138 | ||
1139 | static const struct file_operations virq_debug_fops = { | |
1140 | .open = virq_debug_open, | |
1141 | .read = seq_read, | |
1142 | .llseek = seq_lseek, | |
1143 | .release = single_release, | |
1144 | }; | |
1145 | ||
1146 | static int __init irq_debugfs_init(void) | |
1147 | { | |
1148 | if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root, | |
476ff8a0 | 1149 | NULL, &virq_debug_fops) == NULL) |
60b332e7 ME |
1150 | return -ENOMEM; |
1151 | ||
1152 | return 0; | |
1153 | } | |
1154 | __initcall(irq_debugfs_init); | |
1155 | #endif /* CONFIG_VIRQ_DEBUG */ | |
1156 | ||
c6622f63 | 1157 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
1158 | static int __init setup_noirqdistrib(char *str) |
1159 | { | |
1160 | distribute_irqs = 0; | |
1161 | return 1; | |
1162 | } | |
1163 | ||
1164 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 1165 | #endif /* CONFIG_PPC64 */ |