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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
10 | * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). | |
756e7104 | 11 | * |
1da177e4 LT |
12 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version | |
15 | * 2 of the License, or (at your option) any later version. | |
16 | * | |
17 | * This file contains the code used by various IRQ handling routines: | |
18 | * asking for different IRQ's should be done through these routines | |
19 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
20 | * shouldn't result in any weird surprises, and installing new handlers | |
21 | * should be easier. | |
756e7104 SR |
22 | * |
23 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
24 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
25 | * mask register (of which only 16 are defined), hence the weird shifting | |
26 | * and complement of the cached_irq_mask. I want to be able to stuff | |
27 | * this right into the SIU SMASK register. | |
28 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
29 | * to reduce code space and undefined function references. | |
1da177e4 LT |
30 | */ |
31 | ||
0ebfff14 BH |
32 | #undef DEBUG |
33 | ||
1da177e4 LT |
34 | #include <linux/module.h> |
35 | #include <linux/threads.h> | |
36 | #include <linux/kernel_stat.h> | |
37 | #include <linux/signal.h> | |
38 | #include <linux/sched.h> | |
756e7104 | 39 | #include <linux/ptrace.h> |
1da177e4 LT |
40 | #include <linux/ioport.h> |
41 | #include <linux/interrupt.h> | |
42 | #include <linux/timex.h> | |
1da177e4 LT |
43 | #include <linux/init.h> |
44 | #include <linux/slab.h> | |
1da177e4 LT |
45 | #include <linux/delay.h> |
46 | #include <linux/irq.h> | |
756e7104 SR |
47 | #include <linux/seq_file.h> |
48 | #include <linux/cpumask.h> | |
1da177e4 LT |
49 | #include <linux/profile.h> |
50 | #include <linux/bitops.h> | |
0ebfff14 BH |
51 | #include <linux/list.h> |
52 | #include <linux/radix-tree.h> | |
53 | #include <linux/mutex.h> | |
54 | #include <linux/bootmem.h> | |
45934c47 | 55 | #include <linux/pci.h> |
1da177e4 LT |
56 | |
57 | #include <asm/uaccess.h> | |
58 | #include <asm/system.h> | |
59 | #include <asm/io.h> | |
60 | #include <asm/pgtable.h> | |
61 | #include <asm/irq.h> | |
62 | #include <asm/cache.h> | |
63 | #include <asm/prom.h> | |
64 | #include <asm/ptrace.h> | |
1da177e4 | 65 | #include <asm/machdep.h> |
0ebfff14 | 66 | #include <asm/udbg.h> |
a50b56d2 | 67 | #ifdef CONFIG_PPC_ISERIES |
1da177e4 | 68 | #include <asm/paca.h> |
756e7104 | 69 | #endif |
1da177e4 | 70 | |
868accb7 | 71 | int __irq_offset_value; |
756e7104 SR |
72 | static int ppc_spurious_interrupts; |
73 | ||
756e7104 | 74 | #ifdef CONFIG_PPC32 |
b9e5b4e6 BH |
75 | EXPORT_SYMBOL(__irq_offset_value); |
76 | atomic_t ppc_n_lost_interrupts; | |
756e7104 | 77 | |
b9e5b4e6 BH |
78 | #ifndef CONFIG_PPC_MERGE |
79 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) | |
756e7104 | 80 | unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; |
b9e5b4e6 | 81 | #endif |
756e7104 SR |
82 | |
83 | #ifdef CONFIG_TAU_INT | |
84 | extern int tau_initialized; | |
85 | extern int tau_interrupts(int); | |
86 | #endif | |
b9e5b4e6 | 87 | #endif /* CONFIG_PPC32 */ |
756e7104 SR |
88 | |
89 | #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) | |
90 | extern atomic_t ipi_recv; | |
91 | extern atomic_t ipi_sent; | |
92 | #endif | |
756e7104 SR |
93 | |
94 | #ifdef CONFIG_PPC64 | |
1da177e4 LT |
95 | EXPORT_SYMBOL(irq_desc); |
96 | ||
97 | int distribute_irqs = 1; | |
756e7104 | 98 | #endif /* CONFIG_PPC64 */ |
1da177e4 LT |
99 | |
100 | int show_interrupts(struct seq_file *p, void *v) | |
101 | { | |
756e7104 SR |
102 | int i = *(loff_t *)v, j; |
103 | struct irqaction *action; | |
1da177e4 LT |
104 | irq_desc_t *desc; |
105 | unsigned long flags; | |
106 | ||
107 | if (i == 0) { | |
756e7104 SR |
108 | seq_puts(p, " "); |
109 | for_each_online_cpu(j) | |
110 | seq_printf(p, "CPU%d ", j); | |
1da177e4 LT |
111 | seq_putc(p, '\n'); |
112 | } | |
113 | ||
114 | if (i < NR_IRQS) { | |
115 | desc = get_irq_desc(i); | |
116 | spin_lock_irqsave(&desc->lock, flags); | |
117 | action = desc->action; | |
118 | if (!action || !action->handler) | |
119 | goto skip; | |
120 | seq_printf(p, "%3d: ", i); | |
121 | #ifdef CONFIG_SMP | |
756e7104 SR |
122 | for_each_online_cpu(j) |
123 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | |
1da177e4 LT |
124 | #else |
125 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
126 | #endif /* CONFIG_SMP */ | |
d1bef4ed IM |
127 | if (desc->chip) |
128 | seq_printf(p, " %s ", desc->chip->typename); | |
1da177e4 | 129 | else |
756e7104 | 130 | seq_puts(p, " None "); |
1da177e4 | 131 | seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); |
756e7104 SR |
132 | seq_printf(p, " %s", action->name); |
133 | for (action = action->next; action; action = action->next) | |
1da177e4 LT |
134 | seq_printf(p, ", %s", action->name); |
135 | seq_putc(p, '\n'); | |
136 | skip: | |
137 | spin_unlock_irqrestore(&desc->lock, flags); | |
756e7104 SR |
138 | } else if (i == NR_IRQS) { |
139 | #ifdef CONFIG_PPC32 | |
140 | #ifdef CONFIG_TAU_INT | |
141 | if (tau_initialized){ | |
142 | seq_puts(p, "TAU: "); | |
394e3902 AM |
143 | for_each_online_cpu(j) |
144 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
756e7104 SR |
145 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); |
146 | } | |
147 | #endif | |
148 | #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) | |
149 | /* should this be per processor send/receive? */ | |
150 | seq_printf(p, "IPI (recv/sent): %10u/%u\n", | |
151 | atomic_read(&ipi_recv), atomic_read(&ipi_sent)); | |
152 | #endif | |
153 | #endif /* CONFIG_PPC32 */ | |
1da177e4 | 154 | seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts); |
756e7104 | 155 | } |
1da177e4 LT |
156 | return 0; |
157 | } | |
158 | ||
159 | #ifdef CONFIG_HOTPLUG_CPU | |
160 | void fixup_irqs(cpumask_t map) | |
161 | { | |
162 | unsigned int irq; | |
163 | static int warned; | |
164 | ||
165 | for_each_irq(irq) { | |
166 | cpumask_t mask; | |
167 | ||
168 | if (irq_desc[irq].status & IRQ_PER_CPU) | |
169 | continue; | |
170 | ||
a53da52f | 171 | cpus_and(mask, irq_desc[irq].affinity, map); |
1da177e4 LT |
172 | if (any_online_cpu(mask) == NR_CPUS) { |
173 | printk("Breaking affinity for irq %i\n", irq); | |
174 | mask = map; | |
175 | } | |
d1bef4ed IM |
176 | if (irq_desc[irq].chip->set_affinity) |
177 | irq_desc[irq].chip->set_affinity(irq, mask); | |
1da177e4 LT |
178 | else if (irq_desc[irq].action && !(warned++)) |
179 | printk("Cannot set affinity for irq %i\n", irq); | |
180 | } | |
181 | ||
182 | local_irq_enable(); | |
183 | mdelay(1); | |
184 | local_irq_disable(); | |
185 | } | |
186 | #endif | |
187 | ||
1da177e4 LT |
188 | void do_IRQ(struct pt_regs *regs) |
189 | { | |
7d12e780 | 190 | struct pt_regs *old_regs = set_irq_regs(regs); |
0ebfff14 | 191 | unsigned int irq; |
b709c083 SR |
192 | #ifdef CONFIG_IRQSTACKS |
193 | struct thread_info *curtp, *irqtp; | |
194 | #endif | |
1da177e4 | 195 | |
756e7104 | 196 | irq_enter(); |
1da177e4 LT |
197 | |
198 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
199 | /* Debugging check for stack overflow: is there less than 2KB free? */ | |
200 | { | |
201 | long sp; | |
202 | ||
203 | sp = __get_SP() & (THREAD_SIZE-1); | |
204 | ||
205 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
206 | printk("do_IRQ: stack overflow: %ld\n", | |
207 | sp - sizeof(struct thread_info)); | |
208 | dump_stack(); | |
209 | } | |
210 | } | |
211 | #endif | |
212 | ||
756e7104 SR |
213 | /* |
214 | * Every platform is required to implement ppc_md.get_irq. | |
215 | * This function will either return an irq number or -1 to | |
216 | * indicate there are no more pending. | |
217 | * The value -2 is for buggy hardware and means that this IRQ | |
218 | * has already been handled. -- Tom | |
219 | */ | |
35a84c2f | 220 | irq = ppc_md.get_irq(); |
1da177e4 | 221 | |
0ebfff14 | 222 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) { |
b709c083 SR |
223 | #ifdef CONFIG_IRQSTACKS |
224 | /* Switch to the irq stack to handle this */ | |
225 | curtp = current_thread_info(); | |
226 | irqtp = hardirq_ctx[smp_processor_id()]; | |
227 | if (curtp != irqtp) { | |
b9e5b4e6 BH |
228 | struct irq_desc *desc = irq_desc + irq; |
229 | void *handler = desc->handle_irq; | |
230 | if (handler == NULL) | |
231 | handler = &__do_IRQ; | |
b709c083 SR |
232 | irqtp->task = curtp->task; |
233 | irqtp->flags = 0; | |
7d12e780 | 234 | call_handle_irq(irq, desc, irqtp, handler); |
b709c083 SR |
235 | irqtp->task = NULL; |
236 | if (irqtp->flags) | |
237 | set_bits(irqtp->flags, &curtp->flags); | |
238 | } else | |
239 | #endif | |
7d12e780 | 240 | generic_handle_irq(irq); |
0ebfff14 | 241 | } else if (irq != NO_IRQ_IGNORE) |
e199500c SR |
242 | /* That's not SMP safe ... but who cares ? */ |
243 | ppc_spurious_interrupts++; | |
244 | ||
756e7104 | 245 | irq_exit(); |
7d12e780 | 246 | set_irq_regs(old_regs); |
756e7104 | 247 | |
e199500c | 248 | #ifdef CONFIG_PPC_ISERIES |
3356bb9f DG |
249 | if (get_lppaca()->int_dword.fields.decr_int) { |
250 | get_lppaca()->int_dword.fields.decr_int = 0; | |
251 | /* Signal a fake decrementer interrupt */ | |
252 | timer_interrupt(regs); | |
e199500c SR |
253 | } |
254 | #endif | |
255 | } | |
1da177e4 LT |
256 | |
257 | void __init init_IRQ(void) | |
258 | { | |
1da177e4 | 259 | ppc_md.init_IRQ(); |
756e7104 | 260 | #ifdef CONFIG_PPC64 |
1da177e4 | 261 | irq_ctx_init(); |
756e7104 | 262 | #endif |
1da177e4 LT |
263 | } |
264 | ||
1da177e4 | 265 | |
1da177e4 | 266 | #ifdef CONFIG_IRQSTACKS |
22722051 AM |
267 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
268 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | |
1da177e4 LT |
269 | |
270 | void irq_ctx_init(void) | |
271 | { | |
272 | struct thread_info *tp; | |
273 | int i; | |
274 | ||
0e551954 | 275 | for_each_possible_cpu(i) { |
1da177e4 LT |
276 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
277 | tp = softirq_ctx[i]; | |
278 | tp->cpu = i; | |
279 | tp->preempt_count = SOFTIRQ_OFFSET; | |
280 | ||
281 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
282 | tp = hardirq_ctx[i]; | |
283 | tp->cpu = i; | |
284 | tp->preempt_count = HARDIRQ_OFFSET; | |
285 | } | |
286 | } | |
287 | ||
c6622f63 PM |
288 | static inline void do_softirq_onstack(void) |
289 | { | |
290 | struct thread_info *curtp, *irqtp; | |
291 | ||
292 | curtp = current_thread_info(); | |
293 | irqtp = softirq_ctx[smp_processor_id()]; | |
294 | irqtp->task = curtp->task; | |
295 | call_do_softirq(irqtp); | |
296 | irqtp->task = NULL; | |
297 | } | |
1da177e4 | 298 | |
c6622f63 PM |
299 | #else |
300 | #define do_softirq_onstack() __do_softirq() | |
301 | #endif /* CONFIG_IRQSTACKS */ | |
302 | ||
1da177e4 LT |
303 | void do_softirq(void) |
304 | { | |
305 | unsigned long flags; | |
1da177e4 LT |
306 | |
307 | if (in_interrupt()) | |
1da177e4 LT |
308 | return; |
309 | ||
1da177e4 | 310 | local_irq_save(flags); |
1da177e4 | 311 | |
912b2539 | 312 | if (local_softirq_pending()) |
c6622f63 | 313 | do_softirq_onstack(); |
1da177e4 LT |
314 | |
315 | local_irq_restore(flags); | |
1da177e4 | 316 | } |
1da177e4 LT |
317 | EXPORT_SYMBOL(do_softirq); |
318 | ||
1da177e4 | 319 | |
1da177e4 | 320 | /* |
0ebfff14 | 321 | * IRQ controller and virtual interrupts |
1da177e4 LT |
322 | */ |
323 | ||
0ebfff14 | 324 | #ifdef CONFIG_PPC_MERGE |
1da177e4 | 325 | |
0ebfff14 BH |
326 | static LIST_HEAD(irq_hosts); |
327 | static spinlock_t irq_big_lock = SPIN_LOCK_UNLOCKED; | |
8ec8f2e8 BH |
328 | static DEFINE_PER_CPU(unsigned int, irq_radix_reader); |
329 | static unsigned int irq_radix_writer; | |
0ebfff14 BH |
330 | struct irq_map_entry irq_map[NR_IRQS]; |
331 | static unsigned int irq_virq_count = NR_IRQS; | |
332 | static struct irq_host *irq_default_host; | |
1da177e4 | 333 | |
0ebfff14 BH |
334 | struct irq_host *irq_alloc_host(unsigned int revmap_type, |
335 | unsigned int revmap_arg, | |
336 | struct irq_host_ops *ops, | |
337 | irq_hw_number_t inval_irq) | |
1da177e4 | 338 | { |
0ebfff14 BH |
339 | struct irq_host *host; |
340 | unsigned int size = sizeof(struct irq_host); | |
341 | unsigned int i; | |
342 | unsigned int *rmap; | |
343 | unsigned long flags; | |
344 | ||
345 | /* Allocate structure and revmap table if using linear mapping */ | |
346 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | |
347 | size += revmap_arg * sizeof(unsigned int); | |
348 | if (mem_init_done) | |
349 | host = kzalloc(size, GFP_KERNEL); | |
350 | else { | |
351 | host = alloc_bootmem(size); | |
352 | if (host) | |
353 | memset(host, 0, size); | |
354 | } | |
355 | if (host == NULL) | |
356 | return NULL; | |
7d01c880 | 357 | |
0ebfff14 BH |
358 | /* Fill structure */ |
359 | host->revmap_type = revmap_type; | |
360 | host->inval_irq = inval_irq; | |
361 | host->ops = ops; | |
7d01c880 | 362 | |
0ebfff14 BH |
363 | spin_lock_irqsave(&irq_big_lock, flags); |
364 | ||
365 | /* If it's a legacy controller, check for duplicates and | |
366 | * mark it as allocated (we use irq 0 host pointer for that | |
367 | */ | |
368 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | |
369 | if (irq_map[0].host != NULL) { | |
370 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
371 | /* If we are early boot, we can't free the structure, | |
372 | * too bad... | |
373 | * this will be fixed once slab is made available early | |
374 | * instead of the current cruft | |
375 | */ | |
376 | if (mem_init_done) | |
377 | kfree(host); | |
378 | return NULL; | |
379 | } | |
380 | irq_map[0].host = host; | |
381 | } | |
382 | ||
383 | list_add(&host->link, &irq_hosts); | |
384 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
385 | ||
386 | /* Additional setups per revmap type */ | |
387 | switch(revmap_type) { | |
388 | case IRQ_HOST_MAP_LEGACY: | |
389 | /* 0 is always the invalid number for legacy */ | |
390 | host->inval_irq = 0; | |
391 | /* setup us as the host for all legacy interrupts */ | |
392 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | |
393 | irq_map[i].hwirq = 0; | |
394 | smp_wmb(); | |
395 | irq_map[i].host = host; | |
396 | smp_wmb(); | |
397 | ||
6e99e458 BH |
398 | /* Clear norequest flags */ |
399 | get_irq_desc(i)->status &= ~IRQ_NOREQUEST; | |
0ebfff14 BH |
400 | |
401 | /* Legacy flags are left to default at this point, | |
402 | * one can then use irq_create_mapping() to | |
403 | * explicitely change them | |
404 | */ | |
6e99e458 | 405 | ops->map(host, i, i); |
0ebfff14 BH |
406 | } |
407 | break; | |
408 | case IRQ_HOST_MAP_LINEAR: | |
409 | rmap = (unsigned int *)(host + 1); | |
410 | for (i = 0; i < revmap_arg; i++) | |
411 | rmap[i] = IRQ_NONE; | |
412 | host->revmap_data.linear.size = revmap_arg; | |
413 | smp_wmb(); | |
414 | host->revmap_data.linear.revmap = rmap; | |
415 | break; | |
416 | default: | |
417 | break; | |
418 | } | |
419 | ||
420 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | |
421 | ||
422 | return host; | |
1da177e4 LT |
423 | } |
424 | ||
0ebfff14 | 425 | struct irq_host *irq_find_host(struct device_node *node) |
1da177e4 | 426 | { |
0ebfff14 BH |
427 | struct irq_host *h, *found = NULL; |
428 | unsigned long flags; | |
429 | ||
430 | /* We might want to match the legacy controller last since | |
431 | * it might potentially be set to match all interrupts in | |
432 | * the absence of a device node. This isn't a problem so far | |
433 | * yet though... | |
434 | */ | |
435 | spin_lock_irqsave(&irq_big_lock, flags); | |
436 | list_for_each_entry(h, &irq_hosts, link) | |
437 | if (h->ops->match == NULL || h->ops->match(h, node)) { | |
438 | found = h; | |
439 | break; | |
440 | } | |
441 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
442 | return found; | |
443 | } | |
444 | EXPORT_SYMBOL_GPL(irq_find_host); | |
445 | ||
446 | void irq_set_default_host(struct irq_host *host) | |
447 | { | |
448 | pr_debug("irq: Default host set to @0x%p\n", host); | |
1da177e4 | 449 | |
0ebfff14 BH |
450 | irq_default_host = host; |
451 | } | |
1da177e4 | 452 | |
0ebfff14 BH |
453 | void irq_set_virq_count(unsigned int count) |
454 | { | |
455 | pr_debug("irq: Trying to set virq count to %d\n", count); | |
fef1c772 | 456 | |
0ebfff14 BH |
457 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
458 | if (count < NR_IRQS) | |
459 | irq_virq_count = count; | |
460 | } | |
461 | ||
8ec8f2e8 BH |
462 | /* radix tree not lockless safe ! we use a brlock-type mecanism |
463 | * for now, until we can use a lockless radix tree | |
464 | */ | |
465 | static void irq_radix_wrlock(unsigned long *flags) | |
466 | { | |
467 | unsigned int cpu, ok; | |
468 | ||
469 | spin_lock_irqsave(&irq_big_lock, *flags); | |
470 | irq_radix_writer = 1; | |
471 | smp_mb(); | |
472 | do { | |
473 | barrier(); | |
474 | ok = 1; | |
475 | for_each_possible_cpu(cpu) { | |
476 | if (per_cpu(irq_radix_reader, cpu)) { | |
477 | ok = 0; | |
478 | break; | |
479 | } | |
480 | } | |
481 | if (!ok) | |
482 | cpu_relax(); | |
483 | } while(!ok); | |
484 | } | |
485 | ||
486 | static void irq_radix_wrunlock(unsigned long flags) | |
487 | { | |
488 | smp_wmb(); | |
489 | irq_radix_writer = 0; | |
490 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
491 | } | |
492 | ||
493 | static void irq_radix_rdlock(unsigned long *flags) | |
494 | { | |
495 | local_irq_save(*flags); | |
496 | __get_cpu_var(irq_radix_reader) = 1; | |
497 | smp_mb(); | |
498 | if (likely(irq_radix_writer == 0)) | |
499 | return; | |
500 | __get_cpu_var(irq_radix_reader) = 0; | |
501 | smp_wmb(); | |
502 | spin_lock(&irq_big_lock); | |
503 | __get_cpu_var(irq_radix_reader) = 1; | |
504 | spin_unlock(&irq_big_lock); | |
505 | } | |
506 | ||
507 | static void irq_radix_rdunlock(unsigned long flags) | |
508 | { | |
509 | __get_cpu_var(irq_radix_reader) = 0; | |
510 | local_irq_restore(flags); | |
511 | } | |
512 | ||
513 | ||
0ebfff14 | 514 | unsigned int irq_create_mapping(struct irq_host *host, |
6e99e458 | 515 | irq_hw_number_t hwirq) |
0ebfff14 BH |
516 | { |
517 | unsigned int virq, hint; | |
518 | ||
6e99e458 | 519 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
0ebfff14 BH |
520 | |
521 | /* Look for default host if nececssary */ | |
522 | if (host == NULL) | |
523 | host = irq_default_host; | |
524 | if (host == NULL) { | |
525 | printk(KERN_WARNING "irq_create_mapping called for" | |
526 | " NULL host, hwirq=%lx\n", hwirq); | |
527 | WARN_ON(1); | |
528 | return NO_IRQ; | |
1da177e4 | 529 | } |
0ebfff14 | 530 | pr_debug("irq: -> using host @%p\n", host); |
1da177e4 | 531 | |
0ebfff14 BH |
532 | /* Check if mapping already exist, if it does, call |
533 | * host->ops->map() to update the flags | |
534 | */ | |
535 | virq = irq_find_mapping(host, hwirq); | |
536 | if (virq != IRQ_NONE) { | |
537 | pr_debug("irq: -> existing mapping on virq %d\n", virq); | |
0ebfff14 | 538 | return virq; |
1da177e4 LT |
539 | } |
540 | ||
0ebfff14 BH |
541 | /* Get a virtual interrupt number */ |
542 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | |
543 | /* Handle legacy */ | |
544 | virq = (unsigned int)hwirq; | |
545 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | |
546 | return NO_IRQ; | |
547 | return virq; | |
548 | } else { | |
549 | /* Allocate a virtual interrupt number */ | |
550 | hint = hwirq % irq_virq_count; | |
551 | virq = irq_alloc_virt(host, 1, hint); | |
552 | if (virq == NO_IRQ) { | |
553 | pr_debug("irq: -> virq allocation failed\n"); | |
554 | return NO_IRQ; | |
555 | } | |
556 | } | |
557 | pr_debug("irq: -> obtained virq %d\n", virq); | |
558 | ||
6e99e458 BH |
559 | /* Clear IRQ_NOREQUEST flag */ |
560 | get_irq_desc(virq)->status &= ~IRQ_NOREQUEST; | |
0ebfff14 BH |
561 | |
562 | /* map it */ | |
6e99e458 BH |
563 | smp_wmb(); |
564 | irq_map[virq].hwirq = hwirq; | |
565 | smp_mb(); | |
566 | if (host->ops->map(host, virq, hwirq)) { | |
0ebfff14 BH |
567 | pr_debug("irq: -> mapping failed, freeing\n"); |
568 | irq_free_virt(virq, 1); | |
569 | return NO_IRQ; | |
570 | } | |
1da177e4 | 571 | return virq; |
0ebfff14 BH |
572 | } |
573 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
574 | ||
575 | extern unsigned int irq_create_of_mapping(struct device_node *controller, | |
576 | u32 *intspec, unsigned int intsize) | |
577 | { | |
578 | struct irq_host *host; | |
579 | irq_hw_number_t hwirq; | |
6e99e458 BH |
580 | unsigned int type = IRQ_TYPE_NONE; |
581 | unsigned int virq; | |
1da177e4 | 582 | |
0ebfff14 BH |
583 | if (controller == NULL) |
584 | host = irq_default_host; | |
585 | else | |
586 | host = irq_find_host(controller); | |
6e99e458 BH |
587 | if (host == NULL) { |
588 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | |
589 | controller->full_name); | |
0ebfff14 | 590 | return NO_IRQ; |
6e99e458 | 591 | } |
0ebfff14 BH |
592 | |
593 | /* If host has no translation, then we assume interrupt line */ | |
594 | if (host->ops->xlate == NULL) | |
595 | hwirq = intspec[0]; | |
596 | else { | |
597 | if (host->ops->xlate(host, controller, intspec, intsize, | |
6e99e458 | 598 | &hwirq, &type)) |
0ebfff14 | 599 | return NO_IRQ; |
1da177e4 | 600 | } |
0ebfff14 | 601 | |
6e99e458 BH |
602 | /* Create mapping */ |
603 | virq = irq_create_mapping(host, hwirq); | |
604 | if (virq == NO_IRQ) | |
605 | return virq; | |
606 | ||
607 | /* Set type if specified and different than the current one */ | |
608 | if (type != IRQ_TYPE_NONE && | |
609 | type != (get_irq_desc(virq)->status & IRQF_TRIGGER_MASK)) | |
610 | set_irq_type(virq, type); | |
611 | return virq; | |
1da177e4 | 612 | } |
0ebfff14 | 613 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
1da177e4 | 614 | |
0ebfff14 | 615 | unsigned int irq_of_parse_and_map(struct device_node *dev, int index) |
1da177e4 | 616 | { |
0ebfff14 | 617 | struct of_irq oirq; |
1da177e4 | 618 | |
0ebfff14 BH |
619 | if (of_irq_map_one(dev, index, &oirq)) |
620 | return NO_IRQ; | |
1da177e4 | 621 | |
0ebfff14 BH |
622 | return irq_create_of_mapping(oirq.controller, oirq.specifier, |
623 | oirq.size); | |
624 | } | |
625 | EXPORT_SYMBOL_GPL(irq_of_parse_and_map); | |
1da177e4 | 626 | |
0ebfff14 BH |
627 | void irq_dispose_mapping(unsigned int virq) |
628 | { | |
629 | struct irq_host *host = irq_map[virq].host; | |
630 | irq_hw_number_t hwirq; | |
631 | unsigned long flags; | |
1da177e4 | 632 | |
0ebfff14 BH |
633 | WARN_ON (host == NULL); |
634 | if (host == NULL) | |
635 | return; | |
1da177e4 | 636 | |
0ebfff14 BH |
637 | /* Never unmap legacy interrupts */ |
638 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
639 | return; | |
1da177e4 | 640 | |
0ebfff14 BH |
641 | /* remove chip and handler */ |
642 | set_irq_chip_and_handler(virq, NULL, NULL); | |
643 | ||
644 | /* Make sure it's completed */ | |
645 | synchronize_irq(virq); | |
646 | ||
647 | /* Tell the PIC about it */ | |
648 | if (host->ops->unmap) | |
649 | host->ops->unmap(host, virq); | |
650 | smp_mb(); | |
651 | ||
652 | /* Clear reverse map */ | |
653 | hwirq = irq_map[virq].hwirq; | |
654 | switch(host->revmap_type) { | |
655 | case IRQ_HOST_MAP_LINEAR: | |
656 | if (hwirq < host->revmap_data.linear.size) | |
657 | host->revmap_data.linear.revmap[hwirq] = IRQ_NONE; | |
658 | break; | |
659 | case IRQ_HOST_MAP_TREE: | |
660 | /* Check if radix tree allocated yet */ | |
661 | if (host->revmap_data.tree.gfp_mask == 0) | |
662 | break; | |
8ec8f2e8 | 663 | irq_radix_wrlock(&flags); |
0ebfff14 | 664 | radix_tree_delete(&host->revmap_data.tree, hwirq); |
8ec8f2e8 | 665 | irq_radix_wrunlock(flags); |
0ebfff14 BH |
666 | break; |
667 | } | |
1da177e4 | 668 | |
0ebfff14 BH |
669 | /* Destroy map */ |
670 | smp_mb(); | |
671 | irq_map[virq].hwirq = host->inval_irq; | |
1da177e4 | 672 | |
0ebfff14 BH |
673 | /* Set some flags */ |
674 | get_irq_desc(virq)->status |= IRQ_NOREQUEST; | |
1da177e4 | 675 | |
0ebfff14 BH |
676 | /* Free it */ |
677 | irq_free_virt(virq, 1); | |
1da177e4 | 678 | } |
0ebfff14 | 679 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
1da177e4 | 680 | |
0ebfff14 BH |
681 | unsigned int irq_find_mapping(struct irq_host *host, |
682 | irq_hw_number_t hwirq) | |
683 | { | |
684 | unsigned int i; | |
685 | unsigned int hint = hwirq % irq_virq_count; | |
686 | ||
687 | /* Look for default host if nececssary */ | |
688 | if (host == NULL) | |
689 | host = irq_default_host; | |
690 | if (host == NULL) | |
691 | return NO_IRQ; | |
692 | ||
693 | /* legacy -> bail early */ | |
694 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
695 | return hwirq; | |
696 | ||
697 | /* Slow path does a linear search of the map */ | |
698 | if (hint < NUM_ISA_INTERRUPTS) | |
699 | hint = NUM_ISA_INTERRUPTS; | |
700 | i = hint; | |
701 | do { | |
702 | if (irq_map[i].host == host && | |
703 | irq_map[i].hwirq == hwirq) | |
704 | return i; | |
705 | i++; | |
706 | if (i >= irq_virq_count) | |
707 | i = NUM_ISA_INTERRUPTS; | |
708 | } while(i != hint); | |
709 | return NO_IRQ; | |
710 | } | |
711 | EXPORT_SYMBOL_GPL(irq_find_mapping); | |
1da177e4 | 712 | |
0ebfff14 BH |
713 | |
714 | unsigned int irq_radix_revmap(struct irq_host *host, | |
715 | irq_hw_number_t hwirq) | |
1da177e4 | 716 | { |
0ebfff14 BH |
717 | struct radix_tree_root *tree; |
718 | struct irq_map_entry *ptr; | |
719 | unsigned int virq; | |
720 | unsigned long flags; | |
1da177e4 | 721 | |
0ebfff14 | 722 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); |
1da177e4 | 723 | |
0ebfff14 BH |
724 | /* Check if the radix tree exist yet. We test the value of |
725 | * the gfp_mask for that. Sneaky but saves another int in the | |
726 | * structure. If not, we fallback to slow mode | |
727 | */ | |
728 | tree = &host->revmap_data.tree; | |
729 | if (tree->gfp_mask == 0) | |
730 | return irq_find_mapping(host, hwirq); | |
731 | ||
0ebfff14 | 732 | /* Now try to resolve */ |
8ec8f2e8 | 733 | irq_radix_rdlock(&flags); |
0ebfff14 | 734 | ptr = radix_tree_lookup(tree, hwirq); |
8ec8f2e8 BH |
735 | irq_radix_rdunlock(flags); |
736 | ||
0ebfff14 BH |
737 | /* Found it, return */ |
738 | if (ptr) { | |
739 | virq = ptr - irq_map; | |
8ec8f2e8 | 740 | return virq; |
1da177e4 | 741 | } |
0ebfff14 BH |
742 | |
743 | /* If not there, try to insert it */ | |
744 | virq = irq_find_mapping(host, hwirq); | |
8ec8f2e8 BH |
745 | if (virq != NO_IRQ) { |
746 | irq_radix_wrlock(&flags); | |
e5c14ce1 | 747 | radix_tree_insert(tree, hwirq, &irq_map[virq]); |
8ec8f2e8 BH |
748 | irq_radix_wrunlock(flags); |
749 | } | |
0ebfff14 | 750 | return virq; |
1da177e4 LT |
751 | } |
752 | ||
0ebfff14 BH |
753 | unsigned int irq_linear_revmap(struct irq_host *host, |
754 | irq_hw_number_t hwirq) | |
c6622f63 | 755 | { |
0ebfff14 | 756 | unsigned int *revmap; |
c6622f63 | 757 | |
0ebfff14 BH |
758 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR); |
759 | ||
760 | /* Check revmap bounds */ | |
761 | if (unlikely(hwirq >= host->revmap_data.linear.size)) | |
762 | return irq_find_mapping(host, hwirq); | |
763 | ||
764 | /* Check if revmap was allocated */ | |
765 | revmap = host->revmap_data.linear.revmap; | |
766 | if (unlikely(revmap == NULL)) | |
767 | return irq_find_mapping(host, hwirq); | |
768 | ||
769 | /* Fill up revmap with slow path if no mapping found */ | |
770 | if (unlikely(revmap[hwirq] == NO_IRQ)) | |
771 | revmap[hwirq] = irq_find_mapping(host, hwirq); | |
772 | ||
773 | return revmap[hwirq]; | |
c6622f63 PM |
774 | } |
775 | ||
0ebfff14 BH |
776 | unsigned int irq_alloc_virt(struct irq_host *host, |
777 | unsigned int count, | |
778 | unsigned int hint) | |
779 | { | |
780 | unsigned long flags; | |
781 | unsigned int i, j, found = NO_IRQ; | |
c6622f63 | 782 | |
0ebfff14 BH |
783 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
784 | return NO_IRQ; | |
785 | ||
786 | spin_lock_irqsave(&irq_big_lock, flags); | |
787 | ||
788 | /* Use hint for 1 interrupt if any */ | |
789 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | |
790 | hint < irq_virq_count && irq_map[hint].host == NULL) { | |
791 | found = hint; | |
792 | goto hint_found; | |
793 | } | |
794 | ||
795 | /* Look for count consecutive numbers in the allocatable | |
796 | * (non-legacy) space | |
797 | */ | |
e1251465 ME |
798 | for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) { |
799 | if (irq_map[i].host != NULL) | |
800 | j = 0; | |
801 | else | |
802 | j++; | |
803 | ||
804 | if (j == count) { | |
805 | found = i - count + 1; | |
806 | break; | |
807 | } | |
0ebfff14 BH |
808 | } |
809 | if (found == NO_IRQ) { | |
810 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
811 | return NO_IRQ; | |
812 | } | |
813 | hint_found: | |
814 | for (i = found; i < (found + count); i++) { | |
815 | irq_map[i].hwirq = host->inval_irq; | |
816 | smp_wmb(); | |
817 | irq_map[i].host = host; | |
818 | } | |
819 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
820 | return found; | |
821 | } | |
822 | ||
823 | void irq_free_virt(unsigned int virq, unsigned int count) | |
1da177e4 LT |
824 | { |
825 | unsigned long flags; | |
0ebfff14 | 826 | unsigned int i; |
1da177e4 | 827 | |
0ebfff14 BH |
828 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
829 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | |
1da177e4 | 830 | |
0ebfff14 BH |
831 | spin_lock_irqsave(&irq_big_lock, flags); |
832 | for (i = virq; i < (virq + count); i++) { | |
833 | struct irq_host *host; | |
1da177e4 | 834 | |
0ebfff14 BH |
835 | if (i < NUM_ISA_INTERRUPTS || |
836 | (virq + count) > irq_virq_count) | |
837 | continue; | |
1da177e4 | 838 | |
0ebfff14 BH |
839 | host = irq_map[i].host; |
840 | irq_map[i].hwirq = host->inval_irq; | |
841 | smp_wmb(); | |
842 | irq_map[i].host = NULL; | |
843 | } | |
844 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
1da177e4 | 845 | } |
0ebfff14 BH |
846 | |
847 | void irq_early_init(void) | |
848 | { | |
849 | unsigned int i; | |
850 | ||
851 | for (i = 0; i < NR_IRQS; i++) | |
852 | get_irq_desc(i)->status |= IRQ_NOREQUEST; | |
853 | } | |
854 | ||
855 | /* We need to create the radix trees late */ | |
856 | static int irq_late_init(void) | |
857 | { | |
858 | struct irq_host *h; | |
859 | unsigned long flags; | |
860 | ||
8ec8f2e8 | 861 | irq_radix_wrlock(&flags); |
0ebfff14 BH |
862 | list_for_each_entry(h, &irq_hosts, link) { |
863 | if (h->revmap_type == IRQ_HOST_MAP_TREE) | |
864 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC); | |
865 | } | |
8ec8f2e8 | 866 | irq_radix_wrunlock(flags); |
0ebfff14 BH |
867 | |
868 | return 0; | |
869 | } | |
870 | arch_initcall(irq_late_init); | |
871 | ||
872 | #endif /* CONFIG_PPC_MERGE */ | |
1da177e4 | 873 | |
204face4 JM |
874 | #ifdef CONFIG_PCI_MSI |
875 | int pci_enable_msi(struct pci_dev * pdev) | |
876 | { | |
877 | if (ppc_md.enable_msi) | |
878 | return ppc_md.enable_msi(pdev); | |
879 | else | |
880 | return -1; | |
881 | } | |
45934c47 | 882 | EXPORT_SYMBOL(pci_enable_msi); |
204face4 JM |
883 | |
884 | void pci_disable_msi(struct pci_dev * pdev) | |
885 | { | |
886 | if (ppc_md.disable_msi) | |
887 | ppc_md.disable_msi(pdev); | |
888 | } | |
45934c47 | 889 | EXPORT_SYMBOL(pci_disable_msi); |
204face4 JM |
890 | |
891 | void pci_scan_msi_device(struct pci_dev *dev) {} | |
892 | int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) {return -1;} | |
893 | void pci_disable_msix(struct pci_dev *dev) {} | |
894 | void msi_remove_pci_irq_vectors(struct pci_dev *dev) {} | |
895 | void disable_msi_mode(struct pci_dev *dev, int pos, int type) {} | |
896 | void pci_no_msi(void) {} | |
45934c47 JM |
897 | EXPORT_SYMBOL(pci_enable_msix); |
898 | EXPORT_SYMBOL(pci_disable_msix); | |
204face4 JM |
899 | |
900 | #endif | |
901 | ||
c6622f63 | 902 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
903 | static int __init setup_noirqdistrib(char *str) |
904 | { | |
905 | distribute_irqs = 0; | |
906 | return 1; | |
907 | } | |
908 | ||
909 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 910 | #endif /* CONFIG_PPC64 */ |