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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
756e7104 | 10 | * |
1da177e4 LT |
11 | * This program is free software; you can redistribute it and/or |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | * | |
16 | * This file contains the code used by various IRQ handling routines: | |
17 | * asking for different IRQ's should be done through these routines | |
18 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
19 | * shouldn't result in any weird surprises, and installing new handlers | |
20 | * should be easier. | |
756e7104 SR |
21 | * |
22 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
23 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
24 | * mask register (of which only 16 are defined), hence the weird shifting | |
25 | * and complement of the cached_irq_mask. I want to be able to stuff | |
26 | * this right into the SIU SMASK register. | |
27 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
28 | * to reduce code space and undefined function references. | |
1da177e4 LT |
29 | */ |
30 | ||
0ebfff14 BH |
31 | #undef DEBUG |
32 | ||
1da177e4 LT |
33 | #include <linux/module.h> |
34 | #include <linux/threads.h> | |
35 | #include <linux/kernel_stat.h> | |
36 | #include <linux/signal.h> | |
37 | #include <linux/sched.h> | |
756e7104 | 38 | #include <linux/ptrace.h> |
1da177e4 LT |
39 | #include <linux/ioport.h> |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/timex.h> | |
1da177e4 LT |
42 | #include <linux/init.h> |
43 | #include <linux/slab.h> | |
1da177e4 LT |
44 | #include <linux/delay.h> |
45 | #include <linux/irq.h> | |
756e7104 SR |
46 | #include <linux/seq_file.h> |
47 | #include <linux/cpumask.h> | |
1da177e4 LT |
48 | #include <linux/profile.h> |
49 | #include <linux/bitops.h> | |
0ebfff14 BH |
50 | #include <linux/list.h> |
51 | #include <linux/radix-tree.h> | |
52 | #include <linux/mutex.h> | |
53 | #include <linux/bootmem.h> | |
45934c47 | 54 | #include <linux/pci.h> |
60b332e7 | 55 | #include <linux/debugfs.h> |
1da177e4 LT |
56 | |
57 | #include <asm/uaccess.h> | |
58 | #include <asm/system.h> | |
59 | #include <asm/io.h> | |
60 | #include <asm/pgtable.h> | |
61 | #include <asm/irq.h> | |
62 | #include <asm/cache.h> | |
63 | #include <asm/prom.h> | |
64 | #include <asm/ptrace.h> | |
1da177e4 | 65 | #include <asm/machdep.h> |
0ebfff14 | 66 | #include <asm/udbg.h> |
d04c56f7 | 67 | #ifdef CONFIG_PPC64 |
1da177e4 | 68 | #include <asm/paca.h> |
d04c56f7 | 69 | #include <asm/firmware.h> |
0874dd40 | 70 | #include <asm/lv1call.h> |
756e7104 | 71 | #endif |
1da177e4 | 72 | |
868accb7 | 73 | int __irq_offset_value; |
756e7104 SR |
74 | static int ppc_spurious_interrupts; |
75 | ||
756e7104 | 76 | #ifdef CONFIG_PPC32 |
b9e5b4e6 BH |
77 | EXPORT_SYMBOL(__irq_offset_value); |
78 | atomic_t ppc_n_lost_interrupts; | |
756e7104 | 79 | |
756e7104 SR |
80 | #ifdef CONFIG_TAU_INT |
81 | extern int tau_initialized; | |
82 | extern int tau_interrupts(int); | |
83 | #endif | |
b9e5b4e6 | 84 | #endif /* CONFIG_PPC32 */ |
756e7104 | 85 | |
756e7104 | 86 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
87 | EXPORT_SYMBOL(irq_desc); |
88 | ||
89 | int distribute_irqs = 1; | |
d04c56f7 | 90 | |
4e491d14 | 91 | static inline notrace unsigned long get_hard_enabled(void) |
ef2b343e HD |
92 | { |
93 | unsigned long enabled; | |
94 | ||
95 | __asm__ __volatile__("lbz %0,%1(13)" | |
96 | : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled))); | |
97 | ||
98 | return enabled; | |
99 | } | |
100 | ||
4e491d14 | 101 | static inline notrace void set_soft_enabled(unsigned long enable) |
ef2b343e HD |
102 | { |
103 | __asm__ __volatile__("stb %0,%1(13)" | |
104 | : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled))); | |
105 | } | |
106 | ||
4e491d14 | 107 | notrace void raw_local_irq_restore(unsigned long en) |
d04c56f7 | 108 | { |
ef2b343e HD |
109 | /* |
110 | * get_paca()->soft_enabled = en; | |
111 | * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1? | |
112 | * That was allowed before, and in such a case we do need to take care | |
113 | * that gcc will set soft_enabled directly via r13, not choose to use | |
114 | * an intermediate register, lest we're preempted to a different cpu. | |
115 | */ | |
116 | set_soft_enabled(en); | |
d04c56f7 PM |
117 | if (!en) |
118 | return; | |
119 | ||
120 | if (firmware_has_feature(FW_FEATURE_ISERIES)) { | |
ef2b343e HD |
121 | /* |
122 | * Do we need to disable preemption here? Not really: in the | |
123 | * unlikely event that we're preempted to a different cpu in | |
124 | * between getting r13, loading its lppaca_ptr, and loading | |
125 | * its any_int, we might call iseries_handle_interrupts without | |
126 | * an interrupt pending on the new cpu, but that's no disaster, | |
127 | * is it? And the business of preempting us off the old cpu | |
128 | * would itself involve a local_irq_restore which handles the | |
129 | * interrupt to that cpu. | |
130 | * | |
131 | * But use "local_paca->lppaca_ptr" instead of "get_lppaca()" | |
132 | * to avoid any preemption checking added into get_paca(). | |
133 | */ | |
134 | if (local_paca->lppaca_ptr->int_dword.any_int) | |
d04c56f7 | 135 | iseries_handle_interrupts(); |
d04c56f7 PM |
136 | } |
137 | ||
ef2b343e HD |
138 | /* |
139 | * if (get_paca()->hard_enabled) return; | |
140 | * But again we need to take care that gcc gets hard_enabled directly | |
141 | * via r13, not choose to use an intermediate register, lest we're | |
142 | * preempted to a different cpu in between the two instructions. | |
143 | */ | |
144 | if (get_hard_enabled()) | |
d04c56f7 | 145 | return; |
ef2b343e HD |
146 | |
147 | /* | |
148 | * Need to hard-enable interrupts here. Since currently disabled, | |
149 | * no need to take further asm precautions against preemption; but | |
150 | * use local_paca instead of get_paca() to avoid preemption checking. | |
151 | */ | |
152 | local_paca->hard_enabled = en; | |
d04c56f7 PM |
153 | if ((int)mfspr(SPRN_DEC) < 0) |
154 | mtspr(SPRN_DEC, 1); | |
0874dd40 TS |
155 | |
156 | /* | |
157 | * Force the delivery of pending soft-disabled interrupts on PS3. | |
158 | * Any HV call will have this side effect. | |
159 | */ | |
160 | if (firmware_has_feature(FW_FEATURE_PS3_LV1)) { | |
161 | u64 tmp; | |
162 | lv1_get_version_info(&tmp); | |
163 | } | |
164 | ||
e1fa2e13 | 165 | __hard_irq_enable(); |
d04c56f7 | 166 | } |
945feb17 | 167 | EXPORT_SYMBOL(raw_local_irq_restore); |
756e7104 | 168 | #endif /* CONFIG_PPC64 */ |
1da177e4 LT |
169 | |
170 | int show_interrupts(struct seq_file *p, void *v) | |
171 | { | |
756e7104 SR |
172 | int i = *(loff_t *)v, j; |
173 | struct irqaction *action; | |
1da177e4 LT |
174 | irq_desc_t *desc; |
175 | unsigned long flags; | |
176 | ||
177 | if (i == 0) { | |
756e7104 SR |
178 | seq_puts(p, " "); |
179 | for_each_online_cpu(j) | |
180 | seq_printf(p, "CPU%d ", j); | |
1da177e4 LT |
181 | seq_putc(p, '\n'); |
182 | } | |
183 | ||
184 | if (i < NR_IRQS) { | |
185 | desc = get_irq_desc(i); | |
186 | spin_lock_irqsave(&desc->lock, flags); | |
187 | action = desc->action; | |
188 | if (!action || !action->handler) | |
189 | goto skip; | |
190 | seq_printf(p, "%3d: ", i); | |
191 | #ifdef CONFIG_SMP | |
756e7104 SR |
192 | for_each_online_cpu(j) |
193 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | |
1da177e4 LT |
194 | #else |
195 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
196 | #endif /* CONFIG_SMP */ | |
d1bef4ed IM |
197 | if (desc->chip) |
198 | seq_printf(p, " %s ", desc->chip->typename); | |
1da177e4 | 199 | else |
756e7104 | 200 | seq_puts(p, " None "); |
1da177e4 | 201 | seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); |
756e7104 SR |
202 | seq_printf(p, " %s", action->name); |
203 | for (action = action->next; action; action = action->next) | |
1da177e4 LT |
204 | seq_printf(p, ", %s", action->name); |
205 | seq_putc(p, '\n'); | |
206 | skip: | |
207 | spin_unlock_irqrestore(&desc->lock, flags); | |
756e7104 | 208 | } else if (i == NR_IRQS) { |
9c4cb825 | 209 | #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT) |
756e7104 SR |
210 | if (tau_initialized){ |
211 | seq_puts(p, "TAU: "); | |
394e3902 AM |
212 | for_each_online_cpu(j) |
213 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
756e7104 SR |
214 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); |
215 | } | |
9c4cb825 | 216 | #endif /* CONFIG_PPC32 && CONFIG_TAU_INT*/ |
1da177e4 | 217 | seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts); |
756e7104 | 218 | } |
1da177e4 LT |
219 | return 0; |
220 | } | |
221 | ||
222 | #ifdef CONFIG_HOTPLUG_CPU | |
223 | void fixup_irqs(cpumask_t map) | |
224 | { | |
225 | unsigned int irq; | |
226 | static int warned; | |
227 | ||
228 | for_each_irq(irq) { | |
229 | cpumask_t mask; | |
230 | ||
231 | if (irq_desc[irq].status & IRQ_PER_CPU) | |
232 | continue; | |
233 | ||
a53da52f | 234 | cpus_and(mask, irq_desc[irq].affinity, map); |
1da177e4 LT |
235 | if (any_online_cpu(mask) == NR_CPUS) { |
236 | printk("Breaking affinity for irq %i\n", irq); | |
237 | mask = map; | |
238 | } | |
d1bef4ed IM |
239 | if (irq_desc[irq].chip->set_affinity) |
240 | irq_desc[irq].chip->set_affinity(irq, mask); | |
1da177e4 LT |
241 | else if (irq_desc[irq].action && !(warned++)) |
242 | printk("Cannot set affinity for irq %i\n", irq); | |
243 | } | |
244 | ||
245 | local_irq_enable(); | |
246 | mdelay(1); | |
247 | local_irq_disable(); | |
248 | } | |
249 | #endif | |
250 | ||
1da177e4 LT |
251 | void do_IRQ(struct pt_regs *regs) |
252 | { | |
7d12e780 | 253 | struct pt_regs *old_regs = set_irq_regs(regs); |
0ebfff14 | 254 | unsigned int irq; |
b709c083 SR |
255 | #ifdef CONFIG_IRQSTACKS |
256 | struct thread_info *curtp, *irqtp; | |
257 | #endif | |
1da177e4 | 258 | |
4b218e9b | 259 | irq_enter(); |
1da177e4 LT |
260 | |
261 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
262 | /* Debugging check for stack overflow: is there less than 2KB free? */ | |
263 | { | |
264 | long sp; | |
265 | ||
266 | sp = __get_SP() & (THREAD_SIZE-1); | |
267 | ||
268 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
269 | printk("do_IRQ: stack overflow: %ld\n", | |
270 | sp - sizeof(struct thread_info)); | |
271 | dump_stack(); | |
272 | } | |
273 | } | |
274 | #endif | |
275 | ||
756e7104 SR |
276 | /* |
277 | * Every platform is required to implement ppc_md.get_irq. | |
92d4dda3 | 278 | * This function will either return an irq number or NO_IRQ to |
756e7104 | 279 | * indicate there are no more pending. |
92d4dda3 JB |
280 | * The value NO_IRQ_IGNORE is for buggy hardware and means that this |
281 | * IRQ has already been handled. -- Tom | |
756e7104 | 282 | */ |
35a84c2f | 283 | irq = ppc_md.get_irq(); |
1da177e4 | 284 | |
0ebfff14 | 285 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) { |
b709c083 SR |
286 | #ifdef CONFIG_IRQSTACKS |
287 | /* Switch to the irq stack to handle this */ | |
288 | curtp = current_thread_info(); | |
289 | irqtp = hardirq_ctx[smp_processor_id()]; | |
290 | if (curtp != irqtp) { | |
b9e5b4e6 BH |
291 | struct irq_desc *desc = irq_desc + irq; |
292 | void *handler = desc->handle_irq; | |
85218827 | 293 | unsigned long saved_sp_limit = current->thread.ksp_limit; |
b9e5b4e6 BH |
294 | if (handler == NULL) |
295 | handler = &__do_IRQ; | |
b709c083 SR |
296 | irqtp->task = curtp->task; |
297 | irqtp->flags = 0; | |
e6768a4f BH |
298 | |
299 | /* Copy the softirq bits in preempt_count so that the | |
300 | * softirq checks work in the hardirq context. | |
301 | */ | |
302 | irqtp->preempt_count = | |
303 | (irqtp->preempt_count & ~SOFTIRQ_MASK) | | |
304 | (curtp->preempt_count & SOFTIRQ_MASK); | |
305 | ||
85218827 KG |
306 | current->thread.ksp_limit = (unsigned long)irqtp + |
307 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
7d12e780 | 308 | call_handle_irq(irq, desc, irqtp, handler); |
85218827 | 309 | current->thread.ksp_limit = saved_sp_limit; |
b709c083 | 310 | irqtp->task = NULL; |
e6768a4f BH |
311 | |
312 | ||
313 | /* Set any flag that may have been set on the | |
314 | * alternate stack | |
315 | */ | |
b709c083 SR |
316 | if (irqtp->flags) |
317 | set_bits(irqtp->flags, &curtp->flags); | |
318 | } else | |
319 | #endif | |
7d12e780 | 320 | generic_handle_irq(irq); |
0ebfff14 | 321 | } else if (irq != NO_IRQ_IGNORE) |
e199500c SR |
322 | /* That's not SMP safe ... but who cares ? */ |
323 | ppc_spurious_interrupts++; | |
324 | ||
4b218e9b | 325 | irq_exit(); |
7d12e780 | 326 | set_irq_regs(old_regs); |
756e7104 | 327 | |
e199500c | 328 | #ifdef CONFIG_PPC_ISERIES |
b06a3183 SR |
329 | if (firmware_has_feature(FW_FEATURE_ISERIES) && |
330 | get_lppaca()->int_dword.fields.decr_int) { | |
3356bb9f DG |
331 | get_lppaca()->int_dword.fields.decr_int = 0; |
332 | /* Signal a fake decrementer interrupt */ | |
333 | timer_interrupt(regs); | |
e199500c SR |
334 | } |
335 | #endif | |
336 | } | |
1da177e4 LT |
337 | |
338 | void __init init_IRQ(void) | |
339 | { | |
70584578 SR |
340 | if (ppc_md.init_IRQ) |
341 | ppc_md.init_IRQ(); | |
bcf0b088 KG |
342 | |
343 | exc_lvl_ctx_init(); | |
344 | ||
1da177e4 LT |
345 | irq_ctx_init(); |
346 | } | |
347 | ||
bcf0b088 KG |
348 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
349 | struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; | |
350 | struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; | |
351 | struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | |
352 | ||
353 | void exc_lvl_ctx_init(void) | |
354 | { | |
355 | struct thread_info *tp; | |
356 | int i; | |
357 | ||
358 | for_each_possible_cpu(i) { | |
359 | memset((void *)critirq_ctx[i], 0, THREAD_SIZE); | |
360 | tp = critirq_ctx[i]; | |
361 | tp->cpu = i; | |
362 | tp->preempt_count = 0; | |
363 | ||
364 | #ifdef CONFIG_BOOKE | |
365 | memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE); | |
366 | tp = dbgirq_ctx[i]; | |
367 | tp->cpu = i; | |
368 | tp->preempt_count = 0; | |
369 | ||
370 | memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE); | |
371 | tp = mcheckirq_ctx[i]; | |
372 | tp->cpu = i; | |
373 | tp->preempt_count = HARDIRQ_OFFSET; | |
374 | #endif | |
375 | } | |
376 | } | |
377 | #endif | |
1da177e4 | 378 | |
1da177e4 | 379 | #ifdef CONFIG_IRQSTACKS |
22722051 AM |
380 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
381 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | |
1da177e4 LT |
382 | |
383 | void irq_ctx_init(void) | |
384 | { | |
385 | struct thread_info *tp; | |
386 | int i; | |
387 | ||
0e551954 | 388 | for_each_possible_cpu(i) { |
1da177e4 LT |
389 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
390 | tp = softirq_ctx[i]; | |
391 | tp->cpu = i; | |
e6768a4f | 392 | tp->preempt_count = 0; |
1da177e4 LT |
393 | |
394 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
395 | tp = hardirq_ctx[i]; | |
396 | tp->cpu = i; | |
397 | tp->preempt_count = HARDIRQ_OFFSET; | |
398 | } | |
399 | } | |
400 | ||
c6622f63 PM |
401 | static inline void do_softirq_onstack(void) |
402 | { | |
403 | struct thread_info *curtp, *irqtp; | |
85218827 | 404 | unsigned long saved_sp_limit = current->thread.ksp_limit; |
c6622f63 PM |
405 | |
406 | curtp = current_thread_info(); | |
407 | irqtp = softirq_ctx[smp_processor_id()]; | |
408 | irqtp->task = curtp->task; | |
85218827 KG |
409 | current->thread.ksp_limit = (unsigned long)irqtp + |
410 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
c6622f63 | 411 | call_do_softirq(irqtp); |
85218827 | 412 | current->thread.ksp_limit = saved_sp_limit; |
c6622f63 PM |
413 | irqtp->task = NULL; |
414 | } | |
1da177e4 | 415 | |
c6622f63 PM |
416 | #else |
417 | #define do_softirq_onstack() __do_softirq() | |
418 | #endif /* CONFIG_IRQSTACKS */ | |
419 | ||
1da177e4 LT |
420 | void do_softirq(void) |
421 | { | |
422 | unsigned long flags; | |
1da177e4 LT |
423 | |
424 | if (in_interrupt()) | |
1da177e4 LT |
425 | return; |
426 | ||
1da177e4 | 427 | local_irq_save(flags); |
1da177e4 | 428 | |
912b2539 | 429 | if (local_softirq_pending()) |
c6622f63 | 430 | do_softirq_onstack(); |
1da177e4 LT |
431 | |
432 | local_irq_restore(flags); | |
1da177e4 | 433 | } |
1da177e4 | 434 | |
1da177e4 | 435 | |
1da177e4 | 436 | /* |
0ebfff14 | 437 | * IRQ controller and virtual interrupts |
1da177e4 LT |
438 | */ |
439 | ||
0ebfff14 | 440 | static LIST_HEAD(irq_hosts); |
057b184a | 441 | static DEFINE_SPINLOCK(irq_big_lock); |
8ec8f2e8 BH |
442 | static DEFINE_PER_CPU(unsigned int, irq_radix_reader); |
443 | static unsigned int irq_radix_writer; | |
0ebfff14 BH |
444 | struct irq_map_entry irq_map[NR_IRQS]; |
445 | static unsigned int irq_virq_count = NR_IRQS; | |
446 | static struct irq_host *irq_default_host; | |
1da177e4 | 447 | |
35923f12 OJ |
448 | irq_hw_number_t virq_to_hw(unsigned int virq) |
449 | { | |
450 | return irq_map[virq].hwirq; | |
451 | } | |
452 | EXPORT_SYMBOL_GPL(virq_to_hw); | |
453 | ||
68158006 ME |
454 | static int default_irq_host_match(struct irq_host *h, struct device_node *np) |
455 | { | |
456 | return h->of_node != NULL && h->of_node == np; | |
457 | } | |
458 | ||
5669c3cf | 459 | struct irq_host *irq_alloc_host(struct device_node *of_node, |
52964f87 ME |
460 | unsigned int revmap_type, |
461 | unsigned int revmap_arg, | |
462 | struct irq_host_ops *ops, | |
463 | irq_hw_number_t inval_irq) | |
1da177e4 | 464 | { |
0ebfff14 BH |
465 | struct irq_host *host; |
466 | unsigned int size = sizeof(struct irq_host); | |
467 | unsigned int i; | |
468 | unsigned int *rmap; | |
469 | unsigned long flags; | |
470 | ||
471 | /* Allocate structure and revmap table if using linear mapping */ | |
472 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | |
473 | size += revmap_arg * sizeof(unsigned int); | |
5669c3cf | 474 | host = zalloc_maybe_bootmem(size, GFP_KERNEL); |
0ebfff14 BH |
475 | if (host == NULL) |
476 | return NULL; | |
7d01c880 | 477 | |
0ebfff14 BH |
478 | /* Fill structure */ |
479 | host->revmap_type = revmap_type; | |
480 | host->inval_irq = inval_irq; | |
481 | host->ops = ops; | |
19fc65b5 | 482 | host->of_node = of_node_get(of_node); |
7d01c880 | 483 | |
68158006 ME |
484 | if (host->ops->match == NULL) |
485 | host->ops->match = default_irq_host_match; | |
7d01c880 | 486 | |
0ebfff14 BH |
487 | spin_lock_irqsave(&irq_big_lock, flags); |
488 | ||
489 | /* If it's a legacy controller, check for duplicates and | |
490 | * mark it as allocated (we use irq 0 host pointer for that | |
491 | */ | |
492 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | |
493 | if (irq_map[0].host != NULL) { | |
494 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
495 | /* If we are early boot, we can't free the structure, | |
496 | * too bad... | |
497 | * this will be fixed once slab is made available early | |
498 | * instead of the current cruft | |
499 | */ | |
500 | if (mem_init_done) | |
501 | kfree(host); | |
502 | return NULL; | |
503 | } | |
504 | irq_map[0].host = host; | |
505 | } | |
506 | ||
507 | list_add(&host->link, &irq_hosts); | |
508 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
509 | ||
510 | /* Additional setups per revmap type */ | |
511 | switch(revmap_type) { | |
512 | case IRQ_HOST_MAP_LEGACY: | |
513 | /* 0 is always the invalid number for legacy */ | |
514 | host->inval_irq = 0; | |
515 | /* setup us as the host for all legacy interrupts */ | |
516 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | |
7866291d | 517 | irq_map[i].hwirq = i; |
0ebfff14 BH |
518 | smp_wmb(); |
519 | irq_map[i].host = host; | |
520 | smp_wmb(); | |
521 | ||
6e99e458 BH |
522 | /* Clear norequest flags */ |
523 | get_irq_desc(i)->status &= ~IRQ_NOREQUEST; | |
0ebfff14 BH |
524 | |
525 | /* Legacy flags are left to default at this point, | |
526 | * one can then use irq_create_mapping() to | |
c03983ac | 527 | * explicitly change them |
0ebfff14 | 528 | */ |
6e99e458 | 529 | ops->map(host, i, i); |
0ebfff14 BH |
530 | } |
531 | break; | |
532 | case IRQ_HOST_MAP_LINEAR: | |
533 | rmap = (unsigned int *)(host + 1); | |
534 | for (i = 0; i < revmap_arg; i++) | |
f5921697 | 535 | rmap[i] = NO_IRQ; |
0ebfff14 BH |
536 | host->revmap_data.linear.size = revmap_arg; |
537 | smp_wmb(); | |
538 | host->revmap_data.linear.revmap = rmap; | |
539 | break; | |
540 | default: | |
541 | break; | |
542 | } | |
543 | ||
544 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | |
545 | ||
546 | return host; | |
1da177e4 LT |
547 | } |
548 | ||
0ebfff14 | 549 | struct irq_host *irq_find_host(struct device_node *node) |
1da177e4 | 550 | { |
0ebfff14 BH |
551 | struct irq_host *h, *found = NULL; |
552 | unsigned long flags; | |
553 | ||
554 | /* We might want to match the legacy controller last since | |
555 | * it might potentially be set to match all interrupts in | |
556 | * the absence of a device node. This isn't a problem so far | |
557 | * yet though... | |
558 | */ | |
559 | spin_lock_irqsave(&irq_big_lock, flags); | |
560 | list_for_each_entry(h, &irq_hosts, link) | |
68158006 | 561 | if (h->ops->match(h, node)) { |
0ebfff14 BH |
562 | found = h; |
563 | break; | |
564 | } | |
565 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
566 | return found; | |
567 | } | |
568 | EXPORT_SYMBOL_GPL(irq_find_host); | |
569 | ||
570 | void irq_set_default_host(struct irq_host *host) | |
571 | { | |
572 | pr_debug("irq: Default host set to @0x%p\n", host); | |
1da177e4 | 573 | |
0ebfff14 BH |
574 | irq_default_host = host; |
575 | } | |
1da177e4 | 576 | |
0ebfff14 BH |
577 | void irq_set_virq_count(unsigned int count) |
578 | { | |
579 | pr_debug("irq: Trying to set virq count to %d\n", count); | |
fef1c772 | 580 | |
0ebfff14 BH |
581 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
582 | if (count < NR_IRQS) | |
583 | irq_virq_count = count; | |
584 | } | |
585 | ||
8ec8f2e8 BH |
586 | /* radix tree not lockless safe ! we use a brlock-type mecanism |
587 | * for now, until we can use a lockless radix tree | |
588 | */ | |
589 | static void irq_radix_wrlock(unsigned long *flags) | |
590 | { | |
591 | unsigned int cpu, ok; | |
592 | ||
593 | spin_lock_irqsave(&irq_big_lock, *flags); | |
594 | irq_radix_writer = 1; | |
595 | smp_mb(); | |
596 | do { | |
597 | barrier(); | |
598 | ok = 1; | |
599 | for_each_possible_cpu(cpu) { | |
600 | if (per_cpu(irq_radix_reader, cpu)) { | |
601 | ok = 0; | |
602 | break; | |
603 | } | |
604 | } | |
605 | if (!ok) | |
606 | cpu_relax(); | |
607 | } while(!ok); | |
608 | } | |
609 | ||
610 | static void irq_radix_wrunlock(unsigned long flags) | |
611 | { | |
612 | smp_wmb(); | |
613 | irq_radix_writer = 0; | |
614 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
615 | } | |
616 | ||
617 | static void irq_radix_rdlock(unsigned long *flags) | |
618 | { | |
619 | local_irq_save(*flags); | |
620 | __get_cpu_var(irq_radix_reader) = 1; | |
621 | smp_mb(); | |
622 | if (likely(irq_radix_writer == 0)) | |
623 | return; | |
624 | __get_cpu_var(irq_radix_reader) = 0; | |
625 | smp_wmb(); | |
626 | spin_lock(&irq_big_lock); | |
627 | __get_cpu_var(irq_radix_reader) = 1; | |
628 | spin_unlock(&irq_big_lock); | |
629 | } | |
630 | ||
631 | static void irq_radix_rdunlock(unsigned long flags) | |
632 | { | |
633 | __get_cpu_var(irq_radix_reader) = 0; | |
634 | local_irq_restore(flags); | |
635 | } | |
636 | ||
6fde40f3 ME |
637 | static int irq_setup_virq(struct irq_host *host, unsigned int virq, |
638 | irq_hw_number_t hwirq) | |
639 | { | |
640 | /* Clear IRQ_NOREQUEST flag */ | |
641 | get_irq_desc(virq)->status &= ~IRQ_NOREQUEST; | |
642 | ||
643 | /* map it */ | |
644 | smp_wmb(); | |
645 | irq_map[virq].hwirq = hwirq; | |
646 | smp_mb(); | |
647 | ||
648 | if (host->ops->map(host, virq, hwirq)) { | |
649 | pr_debug("irq: -> mapping failed, freeing\n"); | |
650 | irq_free_virt(virq, 1); | |
651 | return -1; | |
652 | } | |
653 | ||
654 | return 0; | |
655 | } | |
8ec8f2e8 | 656 | |
ee51de56 ME |
657 | unsigned int irq_create_direct_mapping(struct irq_host *host) |
658 | { | |
659 | unsigned int virq; | |
660 | ||
661 | if (host == NULL) | |
662 | host = irq_default_host; | |
663 | ||
664 | BUG_ON(host == NULL); | |
665 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP); | |
666 | ||
667 | virq = irq_alloc_virt(host, 1, 0); | |
668 | if (virq == NO_IRQ) { | |
669 | pr_debug("irq: create_direct virq allocation failed\n"); | |
670 | return NO_IRQ; | |
671 | } | |
672 | ||
673 | pr_debug("irq: create_direct obtained virq %d\n", virq); | |
674 | ||
675 | if (irq_setup_virq(host, virq, virq)) | |
676 | return NO_IRQ; | |
677 | ||
678 | return virq; | |
679 | } | |
680 | ||
0ebfff14 | 681 | unsigned int irq_create_mapping(struct irq_host *host, |
6e99e458 | 682 | irq_hw_number_t hwirq) |
0ebfff14 BH |
683 | { |
684 | unsigned int virq, hint; | |
685 | ||
6e99e458 | 686 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
0ebfff14 BH |
687 | |
688 | /* Look for default host if nececssary */ | |
689 | if (host == NULL) | |
690 | host = irq_default_host; | |
691 | if (host == NULL) { | |
692 | printk(KERN_WARNING "irq_create_mapping called for" | |
693 | " NULL host, hwirq=%lx\n", hwirq); | |
694 | WARN_ON(1); | |
695 | return NO_IRQ; | |
1da177e4 | 696 | } |
0ebfff14 | 697 | pr_debug("irq: -> using host @%p\n", host); |
1da177e4 | 698 | |
0ebfff14 BH |
699 | /* Check if mapping already exist, if it does, call |
700 | * host->ops->map() to update the flags | |
701 | */ | |
702 | virq = irq_find_mapping(host, hwirq); | |
f5921697 | 703 | if (virq != NO_IRQ) { |
acc900ef IK |
704 | if (host->ops->remap) |
705 | host->ops->remap(host, virq, hwirq); | |
0ebfff14 | 706 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
0ebfff14 | 707 | return virq; |
1da177e4 LT |
708 | } |
709 | ||
0ebfff14 BH |
710 | /* Get a virtual interrupt number */ |
711 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | |
712 | /* Handle legacy */ | |
713 | virq = (unsigned int)hwirq; | |
714 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | |
715 | return NO_IRQ; | |
716 | return virq; | |
717 | } else { | |
718 | /* Allocate a virtual interrupt number */ | |
719 | hint = hwirq % irq_virq_count; | |
720 | virq = irq_alloc_virt(host, 1, hint); | |
721 | if (virq == NO_IRQ) { | |
722 | pr_debug("irq: -> virq allocation failed\n"); | |
723 | return NO_IRQ; | |
724 | } | |
725 | } | |
726 | pr_debug("irq: -> obtained virq %d\n", virq); | |
727 | ||
6fde40f3 | 728 | if (irq_setup_virq(host, virq, hwirq)) |
0ebfff14 | 729 | return NO_IRQ; |
6fde40f3 | 730 | |
1da177e4 | 731 | return virq; |
0ebfff14 BH |
732 | } |
733 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
734 | ||
f3d2ab41 AV |
735 | unsigned int irq_create_of_mapping(struct device_node *controller, |
736 | u32 *intspec, unsigned int intsize) | |
0ebfff14 BH |
737 | { |
738 | struct irq_host *host; | |
739 | irq_hw_number_t hwirq; | |
6e99e458 BH |
740 | unsigned int type = IRQ_TYPE_NONE; |
741 | unsigned int virq; | |
1da177e4 | 742 | |
0ebfff14 BH |
743 | if (controller == NULL) |
744 | host = irq_default_host; | |
745 | else | |
746 | host = irq_find_host(controller); | |
6e99e458 BH |
747 | if (host == NULL) { |
748 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | |
749 | controller->full_name); | |
0ebfff14 | 750 | return NO_IRQ; |
6e99e458 | 751 | } |
0ebfff14 BH |
752 | |
753 | /* If host has no translation, then we assume interrupt line */ | |
754 | if (host->ops->xlate == NULL) | |
755 | hwirq = intspec[0]; | |
756 | else { | |
757 | if (host->ops->xlate(host, controller, intspec, intsize, | |
6e99e458 | 758 | &hwirq, &type)) |
0ebfff14 | 759 | return NO_IRQ; |
1da177e4 | 760 | } |
0ebfff14 | 761 | |
6e99e458 BH |
762 | /* Create mapping */ |
763 | virq = irq_create_mapping(host, hwirq); | |
764 | if (virq == NO_IRQ) | |
765 | return virq; | |
766 | ||
767 | /* Set type if specified and different than the current one */ | |
768 | if (type != IRQ_TYPE_NONE && | |
769 | type != (get_irq_desc(virq)->status & IRQF_TRIGGER_MASK)) | |
770 | set_irq_type(virq, type); | |
771 | return virq; | |
1da177e4 | 772 | } |
0ebfff14 | 773 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
1da177e4 | 774 | |
0ebfff14 | 775 | unsigned int irq_of_parse_and_map(struct device_node *dev, int index) |
1da177e4 | 776 | { |
0ebfff14 | 777 | struct of_irq oirq; |
1da177e4 | 778 | |
0ebfff14 BH |
779 | if (of_irq_map_one(dev, index, &oirq)) |
780 | return NO_IRQ; | |
1da177e4 | 781 | |
0ebfff14 BH |
782 | return irq_create_of_mapping(oirq.controller, oirq.specifier, |
783 | oirq.size); | |
784 | } | |
785 | EXPORT_SYMBOL_GPL(irq_of_parse_and_map); | |
1da177e4 | 786 | |
0ebfff14 BH |
787 | void irq_dispose_mapping(unsigned int virq) |
788 | { | |
5414c6be | 789 | struct irq_host *host; |
0ebfff14 BH |
790 | irq_hw_number_t hwirq; |
791 | unsigned long flags; | |
1da177e4 | 792 | |
5414c6be ME |
793 | if (virq == NO_IRQ) |
794 | return; | |
795 | ||
796 | host = irq_map[virq].host; | |
0ebfff14 BH |
797 | WARN_ON (host == NULL); |
798 | if (host == NULL) | |
799 | return; | |
1da177e4 | 800 | |
0ebfff14 BH |
801 | /* Never unmap legacy interrupts */ |
802 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
803 | return; | |
1da177e4 | 804 | |
0ebfff14 BH |
805 | /* remove chip and handler */ |
806 | set_irq_chip_and_handler(virq, NULL, NULL); | |
807 | ||
808 | /* Make sure it's completed */ | |
809 | synchronize_irq(virq); | |
810 | ||
811 | /* Tell the PIC about it */ | |
812 | if (host->ops->unmap) | |
813 | host->ops->unmap(host, virq); | |
814 | smp_mb(); | |
815 | ||
816 | /* Clear reverse map */ | |
817 | hwirq = irq_map[virq].hwirq; | |
818 | switch(host->revmap_type) { | |
819 | case IRQ_HOST_MAP_LINEAR: | |
820 | if (hwirq < host->revmap_data.linear.size) | |
f5921697 | 821 | host->revmap_data.linear.revmap[hwirq] = NO_IRQ; |
0ebfff14 BH |
822 | break; |
823 | case IRQ_HOST_MAP_TREE: | |
824 | /* Check if radix tree allocated yet */ | |
825 | if (host->revmap_data.tree.gfp_mask == 0) | |
826 | break; | |
8ec8f2e8 | 827 | irq_radix_wrlock(&flags); |
0ebfff14 | 828 | radix_tree_delete(&host->revmap_data.tree, hwirq); |
8ec8f2e8 | 829 | irq_radix_wrunlock(flags); |
0ebfff14 BH |
830 | break; |
831 | } | |
1da177e4 | 832 | |
0ebfff14 BH |
833 | /* Destroy map */ |
834 | smp_mb(); | |
835 | irq_map[virq].hwirq = host->inval_irq; | |
1da177e4 | 836 | |
0ebfff14 BH |
837 | /* Set some flags */ |
838 | get_irq_desc(virq)->status |= IRQ_NOREQUEST; | |
1da177e4 | 839 | |
0ebfff14 BH |
840 | /* Free it */ |
841 | irq_free_virt(virq, 1); | |
1da177e4 | 842 | } |
0ebfff14 | 843 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
1da177e4 | 844 | |
0ebfff14 BH |
845 | unsigned int irq_find_mapping(struct irq_host *host, |
846 | irq_hw_number_t hwirq) | |
847 | { | |
848 | unsigned int i; | |
849 | unsigned int hint = hwirq % irq_virq_count; | |
850 | ||
851 | /* Look for default host if nececssary */ | |
852 | if (host == NULL) | |
853 | host = irq_default_host; | |
854 | if (host == NULL) | |
855 | return NO_IRQ; | |
856 | ||
857 | /* legacy -> bail early */ | |
858 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
859 | return hwirq; | |
860 | ||
861 | /* Slow path does a linear search of the map */ | |
862 | if (hint < NUM_ISA_INTERRUPTS) | |
863 | hint = NUM_ISA_INTERRUPTS; | |
864 | i = hint; | |
865 | do { | |
866 | if (irq_map[i].host == host && | |
867 | irq_map[i].hwirq == hwirq) | |
868 | return i; | |
869 | i++; | |
870 | if (i >= irq_virq_count) | |
871 | i = NUM_ISA_INTERRUPTS; | |
872 | } while(i != hint); | |
873 | return NO_IRQ; | |
874 | } | |
875 | EXPORT_SYMBOL_GPL(irq_find_mapping); | |
1da177e4 | 876 | |
0ebfff14 BH |
877 | |
878 | unsigned int irq_radix_revmap(struct irq_host *host, | |
879 | irq_hw_number_t hwirq) | |
1da177e4 | 880 | { |
0ebfff14 BH |
881 | struct radix_tree_root *tree; |
882 | struct irq_map_entry *ptr; | |
883 | unsigned int virq; | |
884 | unsigned long flags; | |
1da177e4 | 885 | |
0ebfff14 | 886 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); |
1da177e4 | 887 | |
0ebfff14 BH |
888 | /* Check if the radix tree exist yet. We test the value of |
889 | * the gfp_mask for that. Sneaky but saves another int in the | |
890 | * structure. If not, we fallback to slow mode | |
891 | */ | |
892 | tree = &host->revmap_data.tree; | |
893 | if (tree->gfp_mask == 0) | |
894 | return irq_find_mapping(host, hwirq); | |
895 | ||
0ebfff14 | 896 | /* Now try to resolve */ |
8ec8f2e8 | 897 | irq_radix_rdlock(&flags); |
0ebfff14 | 898 | ptr = radix_tree_lookup(tree, hwirq); |
8ec8f2e8 BH |
899 | irq_radix_rdunlock(flags); |
900 | ||
0ebfff14 BH |
901 | /* Found it, return */ |
902 | if (ptr) { | |
903 | virq = ptr - irq_map; | |
8ec8f2e8 | 904 | return virq; |
1da177e4 | 905 | } |
0ebfff14 BH |
906 | |
907 | /* If not there, try to insert it */ | |
908 | virq = irq_find_mapping(host, hwirq); | |
8ec8f2e8 BH |
909 | if (virq != NO_IRQ) { |
910 | irq_radix_wrlock(&flags); | |
e5c14ce1 | 911 | radix_tree_insert(tree, hwirq, &irq_map[virq]); |
8ec8f2e8 BH |
912 | irq_radix_wrunlock(flags); |
913 | } | |
0ebfff14 | 914 | return virq; |
1da177e4 LT |
915 | } |
916 | ||
0ebfff14 BH |
917 | unsigned int irq_linear_revmap(struct irq_host *host, |
918 | irq_hw_number_t hwirq) | |
c6622f63 | 919 | { |
0ebfff14 | 920 | unsigned int *revmap; |
c6622f63 | 921 | |
0ebfff14 BH |
922 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR); |
923 | ||
924 | /* Check revmap bounds */ | |
925 | if (unlikely(hwirq >= host->revmap_data.linear.size)) | |
926 | return irq_find_mapping(host, hwirq); | |
927 | ||
928 | /* Check if revmap was allocated */ | |
929 | revmap = host->revmap_data.linear.revmap; | |
930 | if (unlikely(revmap == NULL)) | |
931 | return irq_find_mapping(host, hwirq); | |
932 | ||
933 | /* Fill up revmap with slow path if no mapping found */ | |
934 | if (unlikely(revmap[hwirq] == NO_IRQ)) | |
935 | revmap[hwirq] = irq_find_mapping(host, hwirq); | |
936 | ||
937 | return revmap[hwirq]; | |
c6622f63 PM |
938 | } |
939 | ||
0ebfff14 BH |
940 | unsigned int irq_alloc_virt(struct irq_host *host, |
941 | unsigned int count, | |
942 | unsigned int hint) | |
943 | { | |
944 | unsigned long flags; | |
945 | unsigned int i, j, found = NO_IRQ; | |
c6622f63 | 946 | |
0ebfff14 BH |
947 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
948 | return NO_IRQ; | |
949 | ||
950 | spin_lock_irqsave(&irq_big_lock, flags); | |
951 | ||
952 | /* Use hint for 1 interrupt if any */ | |
953 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | |
954 | hint < irq_virq_count && irq_map[hint].host == NULL) { | |
955 | found = hint; | |
956 | goto hint_found; | |
957 | } | |
958 | ||
959 | /* Look for count consecutive numbers in the allocatable | |
960 | * (non-legacy) space | |
961 | */ | |
e1251465 ME |
962 | for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) { |
963 | if (irq_map[i].host != NULL) | |
964 | j = 0; | |
965 | else | |
966 | j++; | |
967 | ||
968 | if (j == count) { | |
969 | found = i - count + 1; | |
970 | break; | |
971 | } | |
0ebfff14 BH |
972 | } |
973 | if (found == NO_IRQ) { | |
974 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
975 | return NO_IRQ; | |
976 | } | |
977 | hint_found: | |
978 | for (i = found; i < (found + count); i++) { | |
979 | irq_map[i].hwirq = host->inval_irq; | |
980 | smp_wmb(); | |
981 | irq_map[i].host = host; | |
982 | } | |
983 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
984 | return found; | |
985 | } | |
986 | ||
987 | void irq_free_virt(unsigned int virq, unsigned int count) | |
1da177e4 LT |
988 | { |
989 | unsigned long flags; | |
0ebfff14 | 990 | unsigned int i; |
1da177e4 | 991 | |
0ebfff14 BH |
992 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
993 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | |
1da177e4 | 994 | |
0ebfff14 BH |
995 | spin_lock_irqsave(&irq_big_lock, flags); |
996 | for (i = virq; i < (virq + count); i++) { | |
997 | struct irq_host *host; | |
1da177e4 | 998 | |
0ebfff14 BH |
999 | if (i < NUM_ISA_INTERRUPTS || |
1000 | (virq + count) > irq_virq_count) | |
1001 | continue; | |
1da177e4 | 1002 | |
0ebfff14 BH |
1003 | host = irq_map[i].host; |
1004 | irq_map[i].hwirq = host->inval_irq; | |
1005 | smp_wmb(); | |
1006 | irq_map[i].host = NULL; | |
1007 | } | |
1008 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
1da177e4 | 1009 | } |
0ebfff14 BH |
1010 | |
1011 | void irq_early_init(void) | |
1012 | { | |
1013 | unsigned int i; | |
1014 | ||
1015 | for (i = 0; i < NR_IRQS; i++) | |
1016 | get_irq_desc(i)->status |= IRQ_NOREQUEST; | |
1017 | } | |
1018 | ||
1019 | /* We need to create the radix trees late */ | |
1020 | static int irq_late_init(void) | |
1021 | { | |
1022 | struct irq_host *h; | |
1023 | unsigned long flags; | |
1024 | ||
8ec8f2e8 | 1025 | irq_radix_wrlock(&flags); |
0ebfff14 BH |
1026 | list_for_each_entry(h, &irq_hosts, link) { |
1027 | if (h->revmap_type == IRQ_HOST_MAP_TREE) | |
1028 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC); | |
1029 | } | |
8ec8f2e8 | 1030 | irq_radix_wrunlock(flags); |
0ebfff14 BH |
1031 | |
1032 | return 0; | |
1033 | } | |
1034 | arch_initcall(irq_late_init); | |
1035 | ||
60b332e7 ME |
1036 | #ifdef CONFIG_VIRQ_DEBUG |
1037 | static int virq_debug_show(struct seq_file *m, void *private) | |
1038 | { | |
1039 | unsigned long flags; | |
1040 | irq_desc_t *desc; | |
1041 | const char *p; | |
1042 | char none[] = "none"; | |
1043 | int i; | |
1044 | ||
1045 | seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq", | |
1046 | "chip name", "host name"); | |
1047 | ||
1048 | for (i = 1; i < NR_IRQS; i++) { | |
1049 | desc = get_irq_desc(i); | |
1050 | spin_lock_irqsave(&desc->lock, flags); | |
1051 | ||
1052 | if (desc->action && desc->action->handler) { | |
1053 | seq_printf(m, "%5d ", i); | |
1054 | seq_printf(m, "0x%05lx ", virq_to_hw(i)); | |
1055 | ||
1056 | if (desc->chip && desc->chip->typename) | |
1057 | p = desc->chip->typename; | |
1058 | else | |
1059 | p = none; | |
1060 | seq_printf(m, "%-15s ", p); | |
1061 | ||
1062 | if (irq_map[i].host && irq_map[i].host->of_node) | |
1063 | p = irq_map[i].host->of_node->full_name; | |
1064 | else | |
1065 | p = none; | |
1066 | seq_printf(m, "%s\n", p); | |
1067 | } | |
1068 | ||
1069 | spin_unlock_irqrestore(&desc->lock, flags); | |
1070 | } | |
1071 | ||
1072 | return 0; | |
1073 | } | |
1074 | ||
1075 | static int virq_debug_open(struct inode *inode, struct file *file) | |
1076 | { | |
1077 | return single_open(file, virq_debug_show, inode->i_private); | |
1078 | } | |
1079 | ||
1080 | static const struct file_operations virq_debug_fops = { | |
1081 | .open = virq_debug_open, | |
1082 | .read = seq_read, | |
1083 | .llseek = seq_lseek, | |
1084 | .release = single_release, | |
1085 | }; | |
1086 | ||
1087 | static int __init irq_debugfs_init(void) | |
1088 | { | |
1089 | if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root, | |
476ff8a0 | 1090 | NULL, &virq_debug_fops) == NULL) |
60b332e7 ME |
1091 | return -ENOMEM; |
1092 | ||
1093 | return 0; | |
1094 | } | |
1095 | __initcall(irq_debugfs_init); | |
1096 | #endif /* CONFIG_VIRQ_DEBUG */ | |
1097 | ||
c6622f63 | 1098 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
1099 | static int __init setup_noirqdistrib(char *str) |
1100 | { | |
1101 | distribute_irqs = 0; | |
1102 | return 1; | |
1103 | } | |
1104 | ||
1105 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 1106 | #endif /* CONFIG_PPC64 */ |