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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
756e7104 | 10 | * |
1da177e4 LT |
11 | * This program is free software; you can redistribute it and/or |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | * | |
16 | * This file contains the code used by various IRQ handling routines: | |
17 | * asking for different IRQ's should be done through these routines | |
18 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
19 | * shouldn't result in any weird surprises, and installing new handlers | |
20 | * should be easier. | |
756e7104 SR |
21 | * |
22 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
23 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
24 | * mask register (of which only 16 are defined), hence the weird shifting | |
25 | * and complement of the cached_irq_mask. I want to be able to stuff | |
26 | * this right into the SIU SMASK register. | |
27 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
28 | * to reduce code space and undefined function references. | |
1da177e4 LT |
29 | */ |
30 | ||
0ebfff14 BH |
31 | #undef DEBUG |
32 | ||
1da177e4 LT |
33 | #include <linux/module.h> |
34 | #include <linux/threads.h> | |
35 | #include <linux/kernel_stat.h> | |
36 | #include <linux/signal.h> | |
37 | #include <linux/sched.h> | |
756e7104 | 38 | #include <linux/ptrace.h> |
1da177e4 LT |
39 | #include <linux/ioport.h> |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/timex.h> | |
1da177e4 LT |
42 | #include <linux/init.h> |
43 | #include <linux/slab.h> | |
1da177e4 LT |
44 | #include <linux/delay.h> |
45 | #include <linux/irq.h> | |
756e7104 SR |
46 | #include <linux/seq_file.h> |
47 | #include <linux/cpumask.h> | |
1da177e4 LT |
48 | #include <linux/profile.h> |
49 | #include <linux/bitops.h> | |
0ebfff14 BH |
50 | #include <linux/list.h> |
51 | #include <linux/radix-tree.h> | |
52 | #include <linux/mutex.h> | |
53 | #include <linux/bootmem.h> | |
45934c47 | 54 | #include <linux/pci.h> |
60b332e7 | 55 | #include <linux/debugfs.h> |
e3873444 GL |
56 | #include <linux/of.h> |
57 | #include <linux/of_irq.h> | |
1da177e4 LT |
58 | |
59 | #include <asm/uaccess.h> | |
60 | #include <asm/system.h> | |
61 | #include <asm/io.h> | |
62 | #include <asm/pgtable.h> | |
63 | #include <asm/irq.h> | |
64 | #include <asm/cache.h> | |
65 | #include <asm/prom.h> | |
66 | #include <asm/ptrace.h> | |
1da177e4 | 67 | #include <asm/machdep.h> |
0ebfff14 | 68 | #include <asm/udbg.h> |
89c81797 | 69 | #include <asm/dbell.h> |
3e7f45ad | 70 | #include <asm/smp.h> |
89c81797 | 71 | |
d04c56f7 | 72 | #ifdef CONFIG_PPC64 |
1da177e4 | 73 | #include <asm/paca.h> |
d04c56f7 | 74 | #include <asm/firmware.h> |
0874dd40 | 75 | #include <asm/lv1call.h> |
756e7104 | 76 | #endif |
1bf4af16 AB |
77 | #define CREATE_TRACE_POINTS |
78 | #include <asm/trace.h> | |
1da177e4 | 79 | |
8c007bfd AB |
80 | DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat); |
81 | EXPORT_PER_CPU_SYMBOL(irq_stat); | |
82 | ||
868accb7 | 83 | int __irq_offset_value; |
756e7104 | 84 | |
756e7104 | 85 | #ifdef CONFIG_PPC32 |
b9e5b4e6 BH |
86 | EXPORT_SYMBOL(__irq_offset_value); |
87 | atomic_t ppc_n_lost_interrupts; | |
756e7104 | 88 | |
756e7104 SR |
89 | #ifdef CONFIG_TAU_INT |
90 | extern int tau_initialized; | |
91 | extern int tau_interrupts(int); | |
92 | #endif | |
b9e5b4e6 | 93 | #endif /* CONFIG_PPC32 */ |
756e7104 | 94 | |
756e7104 | 95 | #ifdef CONFIG_PPC64 |
cd015707 ME |
96 | |
97 | #ifndef CONFIG_SPARSE_IRQ | |
1da177e4 | 98 | EXPORT_SYMBOL(irq_desc); |
cd015707 | 99 | #endif |
1da177e4 LT |
100 | |
101 | int distribute_irqs = 1; | |
d04c56f7 | 102 | |
4e491d14 | 103 | static inline notrace unsigned long get_hard_enabled(void) |
ef2b343e HD |
104 | { |
105 | unsigned long enabled; | |
106 | ||
107 | __asm__ __volatile__("lbz %0,%1(13)" | |
108 | : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled))); | |
109 | ||
110 | return enabled; | |
111 | } | |
112 | ||
4e491d14 | 113 | static inline notrace void set_soft_enabled(unsigned long enable) |
ef2b343e HD |
114 | { |
115 | __asm__ __volatile__("stb %0,%1(13)" | |
116 | : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled))); | |
117 | } | |
118 | ||
df9ee292 | 119 | notrace void arch_local_irq_restore(unsigned long en) |
d04c56f7 | 120 | { |
ef2b343e HD |
121 | /* |
122 | * get_paca()->soft_enabled = en; | |
123 | * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1? | |
124 | * That was allowed before, and in such a case we do need to take care | |
125 | * that gcc will set soft_enabled directly via r13, not choose to use | |
126 | * an intermediate register, lest we're preempted to a different cpu. | |
127 | */ | |
128 | set_soft_enabled(en); | |
d04c56f7 PM |
129 | if (!en) |
130 | return; | |
131 | ||
94491685 | 132 | #ifdef CONFIG_PPC_STD_MMU_64 |
d04c56f7 | 133 | if (firmware_has_feature(FW_FEATURE_ISERIES)) { |
ef2b343e HD |
134 | /* |
135 | * Do we need to disable preemption here? Not really: in the | |
136 | * unlikely event that we're preempted to a different cpu in | |
137 | * between getting r13, loading its lppaca_ptr, and loading | |
138 | * its any_int, we might call iseries_handle_interrupts without | |
139 | * an interrupt pending on the new cpu, but that's no disaster, | |
140 | * is it? And the business of preempting us off the old cpu | |
141 | * would itself involve a local_irq_restore which handles the | |
142 | * interrupt to that cpu. | |
143 | * | |
144 | * But use "local_paca->lppaca_ptr" instead of "get_lppaca()" | |
145 | * to avoid any preemption checking added into get_paca(). | |
146 | */ | |
147 | if (local_paca->lppaca_ptr->int_dword.any_int) | |
d04c56f7 | 148 | iseries_handle_interrupts(); |
d04c56f7 | 149 | } |
94491685 | 150 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
d04c56f7 | 151 | |
ef2b343e HD |
152 | /* |
153 | * if (get_paca()->hard_enabled) return; | |
154 | * But again we need to take care that gcc gets hard_enabled directly | |
155 | * via r13, not choose to use an intermediate register, lest we're | |
156 | * preempted to a different cpu in between the two instructions. | |
157 | */ | |
158 | if (get_hard_enabled()) | |
d04c56f7 | 159 | return; |
ef2b343e | 160 | |
89c81797 | 161 | #if defined(CONFIG_BOOKE) && defined(CONFIG_SMP) |
850f22d5 ME |
162 | /* Check for pending doorbell interrupts and resend to ourself */ |
163 | doorbell_check_self(); | |
89c81797 BH |
164 | #endif |
165 | ||
ef2b343e HD |
166 | /* |
167 | * Need to hard-enable interrupts here. Since currently disabled, | |
168 | * no need to take further asm precautions against preemption; but | |
169 | * use local_paca instead of get_paca() to avoid preemption checking. | |
170 | */ | |
171 | local_paca->hard_enabled = en; | |
e8775d4a BH |
172 | |
173 | #ifndef CONFIG_BOOKE | |
174 | /* On server, re-trigger the decrementer if it went negative since | |
175 | * some processors only trigger on edge transitions of the sign bit. | |
176 | * | |
177 | * BookE has a level sensitive decrementer (latches in TSR) so we | |
178 | * don't need that | |
179 | */ | |
d04c56f7 PM |
180 | if ((int)mfspr(SPRN_DEC) < 0) |
181 | mtspr(SPRN_DEC, 1); | |
e8775d4a | 182 | #endif /* CONFIG_BOOKE */ |
0874dd40 TS |
183 | |
184 | /* | |
185 | * Force the delivery of pending soft-disabled interrupts on PS3. | |
186 | * Any HV call will have this side effect. | |
187 | */ | |
188 | if (firmware_has_feature(FW_FEATURE_PS3_LV1)) { | |
189 | u64 tmp; | |
190 | lv1_get_version_info(&tmp); | |
191 | } | |
192 | ||
e1fa2e13 | 193 | __hard_irq_enable(); |
d04c56f7 | 194 | } |
df9ee292 | 195 | EXPORT_SYMBOL(arch_local_irq_restore); |
756e7104 | 196 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 197 | |
433c9c67 | 198 | int arch_show_interrupts(struct seq_file *p, int prec) |
c86845ed AB |
199 | { |
200 | int j; | |
201 | ||
202 | #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT) | |
203 | if (tau_initialized) { | |
204 | seq_printf(p, "%*s: ", prec, "TAU"); | |
205 | for_each_online_cpu(j) | |
206 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
207 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); | |
208 | } | |
209 | #endif /* CONFIG_PPC32 && CONFIG_TAU_INT */ | |
210 | ||
89713ed1 AB |
211 | seq_printf(p, "%*s: ", prec, "LOC"); |
212 | for_each_online_cpu(j) | |
213 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs); | |
214 | seq_printf(p, " Local timer interrupts\n"); | |
215 | ||
17081102 AB |
216 | seq_printf(p, "%*s: ", prec, "SPU"); |
217 | for_each_online_cpu(j) | |
218 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs); | |
219 | seq_printf(p, " Spurious interrupts\n"); | |
220 | ||
89713ed1 AB |
221 | seq_printf(p, "%*s: ", prec, "CNT"); |
222 | for_each_online_cpu(j) | |
223 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs); | |
224 | seq_printf(p, " Performance monitoring interrupts\n"); | |
225 | ||
226 | seq_printf(p, "%*s: ", prec, "MCE"); | |
227 | for_each_online_cpu(j) | |
228 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions); | |
229 | seq_printf(p, " Machine check exceptions\n"); | |
230 | ||
c86845ed AB |
231 | return 0; |
232 | } | |
233 | ||
89713ed1 AB |
234 | /* |
235 | * /proc/stat helpers | |
236 | */ | |
237 | u64 arch_irq_stat_cpu(unsigned int cpu) | |
238 | { | |
239 | u64 sum = per_cpu(irq_stat, cpu).timer_irqs; | |
240 | ||
241 | sum += per_cpu(irq_stat, cpu).pmu_irqs; | |
242 | sum += per_cpu(irq_stat, cpu).mce_exceptions; | |
17081102 | 243 | sum += per_cpu(irq_stat, cpu).spurious_irqs; |
89713ed1 AB |
244 | |
245 | return sum; | |
246 | } | |
247 | ||
1da177e4 | 248 | #ifdef CONFIG_HOTPLUG_CPU |
b6decb70 | 249 | void fixup_irqs(const struct cpumask *map) |
1da177e4 | 250 | { |
6cff46f4 | 251 | struct irq_desc *desc; |
1da177e4 LT |
252 | unsigned int irq; |
253 | static int warned; | |
b6decb70 | 254 | cpumask_var_t mask; |
1da177e4 | 255 | |
b6decb70 | 256 | alloc_cpumask_var(&mask, GFP_KERNEL); |
1da177e4 | 257 | |
b6decb70 | 258 | for_each_irq(irq) { |
7bfbc1f2 | 259 | struct irq_data *data; |
e1180287 LB |
260 | struct irq_chip *chip; |
261 | ||
6cff46f4 | 262 | desc = irq_to_desc(irq); |
3cd85192 JB |
263 | if (!desc) |
264 | continue; | |
265 | ||
7bfbc1f2 TG |
266 | data = irq_desc_get_irq_data(desc); |
267 | if (irqd_is_per_cpu(data)) | |
1da177e4 LT |
268 | continue; |
269 | ||
7bfbc1f2 | 270 | chip = irq_data_get_irq_chip(data); |
e1180287 | 271 | |
7bfbc1f2 | 272 | cpumask_and(mask, data->affinity, map); |
b6decb70 | 273 | if (cpumask_any(mask) >= nr_cpu_ids) { |
1da177e4 | 274 | printk("Breaking affinity for irq %i\n", irq); |
b6decb70 | 275 | cpumask_copy(mask, map); |
1da177e4 | 276 | } |
e1180287 | 277 | if (chip->irq_set_affinity) |
7bfbc1f2 | 278 | chip->irq_set_affinity(data, mask, true); |
6cff46f4 | 279 | else if (desc->action && !(warned++)) |
1da177e4 LT |
280 | printk("Cannot set affinity for irq %i\n", irq); |
281 | } | |
282 | ||
b6decb70 AB |
283 | free_cpumask_var(mask); |
284 | ||
1da177e4 LT |
285 | local_irq_enable(); |
286 | mdelay(1); | |
287 | local_irq_disable(); | |
288 | } | |
289 | #endif | |
290 | ||
f2694ba5 ME |
291 | static inline void handle_one_irq(unsigned int irq) |
292 | { | |
293 | struct thread_info *curtp, *irqtp; | |
294 | unsigned long saved_sp_limit; | |
295 | struct irq_desc *desc; | |
f2694ba5 ME |
296 | |
297 | /* Switch to the irq stack to handle this */ | |
298 | curtp = current_thread_info(); | |
299 | irqtp = hardirq_ctx[smp_processor_id()]; | |
300 | ||
301 | if (curtp == irqtp) { | |
302 | /* We're already on the irq stack, just handle it */ | |
303 | generic_handle_irq(irq); | |
304 | return; | |
305 | } | |
306 | ||
6cff46f4 | 307 | desc = irq_to_desc(irq); |
f2694ba5 ME |
308 | saved_sp_limit = current->thread.ksp_limit; |
309 | ||
f2694ba5 ME |
310 | irqtp->task = curtp->task; |
311 | irqtp->flags = 0; | |
312 | ||
313 | /* Copy the softirq bits in preempt_count so that the | |
314 | * softirq checks work in the hardirq context. */ | |
315 | irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) | | |
316 | (curtp->preempt_count & SOFTIRQ_MASK); | |
317 | ||
318 | current->thread.ksp_limit = (unsigned long)irqtp + | |
319 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
320 | ||
835363e6 | 321 | call_handle_irq(irq, desc, irqtp, desc->handle_irq); |
f2694ba5 ME |
322 | current->thread.ksp_limit = saved_sp_limit; |
323 | irqtp->task = NULL; | |
324 | ||
325 | /* Set any flag that may have been set on the | |
326 | * alternate stack | |
327 | */ | |
328 | if (irqtp->flags) | |
329 | set_bits(irqtp->flags, &curtp->flags); | |
330 | } | |
f2694ba5 | 331 | |
d7cb10d6 ME |
332 | static inline void check_stack_overflow(void) |
333 | { | |
334 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
335 | long sp; | |
336 | ||
337 | sp = __get_SP() & (THREAD_SIZE-1); | |
338 | ||
339 | /* check for stack overflow: is there less than 2KB free? */ | |
340 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
341 | printk("do_IRQ: stack overflow: %ld\n", | |
342 | sp - sizeof(struct thread_info)); | |
343 | dump_stack(); | |
344 | } | |
345 | #endif | |
346 | } | |
347 | ||
1da177e4 LT |
348 | void do_IRQ(struct pt_regs *regs) |
349 | { | |
7d12e780 | 350 | struct pt_regs *old_regs = set_irq_regs(regs); |
0ebfff14 | 351 | unsigned int irq; |
1da177e4 | 352 | |
1bf4af16 AB |
353 | trace_irq_entry(regs); |
354 | ||
4b218e9b | 355 | irq_enter(); |
1da177e4 | 356 | |
d7cb10d6 | 357 | check_stack_overflow(); |
1da177e4 | 358 | |
35a84c2f | 359 | irq = ppc_md.get_irq(); |
1da177e4 | 360 | |
f2694ba5 ME |
361 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) |
362 | handle_one_irq(irq); | |
363 | else if (irq != NO_IRQ_IGNORE) | |
17081102 | 364 | __get_cpu_var(irq_stat).spurious_irqs++; |
e199500c | 365 | |
4b218e9b | 366 | irq_exit(); |
7d12e780 | 367 | set_irq_regs(old_regs); |
756e7104 | 368 | |
e199500c | 369 | #ifdef CONFIG_PPC_ISERIES |
b06a3183 SR |
370 | if (firmware_has_feature(FW_FEATURE_ISERIES) && |
371 | get_lppaca()->int_dword.fields.decr_int) { | |
3356bb9f DG |
372 | get_lppaca()->int_dword.fields.decr_int = 0; |
373 | /* Signal a fake decrementer interrupt */ | |
374 | timer_interrupt(regs); | |
e199500c SR |
375 | } |
376 | #endif | |
1bf4af16 AB |
377 | |
378 | trace_irq_exit(regs); | |
e199500c | 379 | } |
1da177e4 LT |
380 | |
381 | void __init init_IRQ(void) | |
382 | { | |
70584578 SR |
383 | if (ppc_md.init_IRQ) |
384 | ppc_md.init_IRQ(); | |
bcf0b088 KG |
385 | |
386 | exc_lvl_ctx_init(); | |
387 | ||
1da177e4 LT |
388 | irq_ctx_init(); |
389 | } | |
390 | ||
bcf0b088 KG |
391 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
392 | struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; | |
393 | struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; | |
394 | struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | |
395 | ||
396 | void exc_lvl_ctx_init(void) | |
397 | { | |
398 | struct thread_info *tp; | |
3e7f45ad | 399 | int i, hw_cpu; |
bcf0b088 KG |
400 | |
401 | for_each_possible_cpu(i) { | |
3e7f45ad DK |
402 | hw_cpu = get_hard_smp_processor_id(i); |
403 | memset((void *)critirq_ctx[hw_cpu], 0, THREAD_SIZE); | |
404 | tp = critirq_ctx[hw_cpu]; | |
bcf0b088 KG |
405 | tp->cpu = i; |
406 | tp->preempt_count = 0; | |
407 | ||
408 | #ifdef CONFIG_BOOKE | |
3e7f45ad DK |
409 | memset((void *)dbgirq_ctx[hw_cpu], 0, THREAD_SIZE); |
410 | tp = dbgirq_ctx[hw_cpu]; | |
bcf0b088 KG |
411 | tp->cpu = i; |
412 | tp->preempt_count = 0; | |
413 | ||
3e7f45ad DK |
414 | memset((void *)mcheckirq_ctx[hw_cpu], 0, THREAD_SIZE); |
415 | tp = mcheckirq_ctx[hw_cpu]; | |
bcf0b088 KG |
416 | tp->cpu = i; |
417 | tp->preempt_count = HARDIRQ_OFFSET; | |
418 | #endif | |
419 | } | |
420 | } | |
421 | #endif | |
1da177e4 | 422 | |
22722051 AM |
423 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
424 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | |
1da177e4 LT |
425 | |
426 | void irq_ctx_init(void) | |
427 | { | |
428 | struct thread_info *tp; | |
429 | int i; | |
430 | ||
0e551954 | 431 | for_each_possible_cpu(i) { |
1da177e4 LT |
432 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
433 | tp = softirq_ctx[i]; | |
434 | tp->cpu = i; | |
e6768a4f | 435 | tp->preempt_count = 0; |
1da177e4 LT |
436 | |
437 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
438 | tp = hardirq_ctx[i]; | |
439 | tp->cpu = i; | |
440 | tp->preempt_count = HARDIRQ_OFFSET; | |
441 | } | |
442 | } | |
443 | ||
c6622f63 PM |
444 | static inline void do_softirq_onstack(void) |
445 | { | |
446 | struct thread_info *curtp, *irqtp; | |
85218827 | 447 | unsigned long saved_sp_limit = current->thread.ksp_limit; |
c6622f63 PM |
448 | |
449 | curtp = current_thread_info(); | |
450 | irqtp = softirq_ctx[smp_processor_id()]; | |
451 | irqtp->task = curtp->task; | |
85218827 KG |
452 | current->thread.ksp_limit = (unsigned long)irqtp + |
453 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
c6622f63 | 454 | call_do_softirq(irqtp); |
85218827 | 455 | current->thread.ksp_limit = saved_sp_limit; |
c6622f63 PM |
456 | irqtp->task = NULL; |
457 | } | |
1da177e4 | 458 | |
1da177e4 LT |
459 | void do_softirq(void) |
460 | { | |
461 | unsigned long flags; | |
1da177e4 LT |
462 | |
463 | if (in_interrupt()) | |
1da177e4 LT |
464 | return; |
465 | ||
1da177e4 | 466 | local_irq_save(flags); |
1da177e4 | 467 | |
912b2539 | 468 | if (local_softirq_pending()) |
c6622f63 | 469 | do_softirq_onstack(); |
1da177e4 LT |
470 | |
471 | local_irq_restore(flags); | |
1da177e4 | 472 | } |
1da177e4 | 473 | |
1da177e4 | 474 | |
1da177e4 | 475 | /* |
0ebfff14 | 476 | * IRQ controller and virtual interrupts |
1da177e4 LT |
477 | */ |
478 | ||
0ebfff14 | 479 | static LIST_HEAD(irq_hosts); |
f95e085b | 480 | static DEFINE_RAW_SPINLOCK(irq_big_lock); |
967e012e | 481 | static unsigned int revmap_trees_allocated; |
150c6c8f | 482 | static DEFINE_MUTEX(revmap_trees_mutex); |
0ebfff14 BH |
483 | struct irq_map_entry irq_map[NR_IRQS]; |
484 | static unsigned int irq_virq_count = NR_IRQS; | |
485 | static struct irq_host *irq_default_host; | |
1da177e4 | 486 | |
35923f12 OJ |
487 | irq_hw_number_t virq_to_hw(unsigned int virq) |
488 | { | |
489 | return irq_map[virq].hwirq; | |
490 | } | |
491 | EXPORT_SYMBOL_GPL(virq_to_hw); | |
492 | ||
68158006 ME |
493 | static int default_irq_host_match(struct irq_host *h, struct device_node *np) |
494 | { | |
495 | return h->of_node != NULL && h->of_node == np; | |
496 | } | |
497 | ||
5669c3cf | 498 | struct irq_host *irq_alloc_host(struct device_node *of_node, |
52964f87 ME |
499 | unsigned int revmap_type, |
500 | unsigned int revmap_arg, | |
501 | struct irq_host_ops *ops, | |
502 | irq_hw_number_t inval_irq) | |
1da177e4 | 503 | { |
0ebfff14 BH |
504 | struct irq_host *host; |
505 | unsigned int size = sizeof(struct irq_host); | |
506 | unsigned int i; | |
507 | unsigned int *rmap; | |
508 | unsigned long flags; | |
509 | ||
510 | /* Allocate structure and revmap table if using linear mapping */ | |
511 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | |
512 | size += revmap_arg * sizeof(unsigned int); | |
5669c3cf | 513 | host = zalloc_maybe_bootmem(size, GFP_KERNEL); |
0ebfff14 BH |
514 | if (host == NULL) |
515 | return NULL; | |
7d01c880 | 516 | |
0ebfff14 BH |
517 | /* Fill structure */ |
518 | host->revmap_type = revmap_type; | |
519 | host->inval_irq = inval_irq; | |
520 | host->ops = ops; | |
19fc65b5 | 521 | host->of_node = of_node_get(of_node); |
7d01c880 | 522 | |
68158006 ME |
523 | if (host->ops->match == NULL) |
524 | host->ops->match = default_irq_host_match; | |
7d01c880 | 525 | |
f95e085b | 526 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
527 | |
528 | /* If it's a legacy controller, check for duplicates and | |
529 | * mark it as allocated (we use irq 0 host pointer for that | |
530 | */ | |
531 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | |
532 | if (irq_map[0].host != NULL) { | |
f95e085b | 533 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
534 | /* If we are early boot, we can't free the structure, |
535 | * too bad... | |
536 | * this will be fixed once slab is made available early | |
537 | * instead of the current cruft | |
538 | */ | |
a655237f JL |
539 | if (mem_init_done) { |
540 | of_node_put(host->of_node); | |
0ebfff14 | 541 | kfree(host); |
a655237f | 542 | } |
0ebfff14 BH |
543 | return NULL; |
544 | } | |
545 | irq_map[0].host = host; | |
546 | } | |
547 | ||
548 | list_add(&host->link, &irq_hosts); | |
f95e085b | 549 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
550 | |
551 | /* Additional setups per revmap type */ | |
552 | switch(revmap_type) { | |
553 | case IRQ_HOST_MAP_LEGACY: | |
554 | /* 0 is always the invalid number for legacy */ | |
555 | host->inval_irq = 0; | |
556 | /* setup us as the host for all legacy interrupts */ | |
557 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | |
7866291d | 558 | irq_map[i].hwirq = i; |
0ebfff14 BH |
559 | smp_wmb(); |
560 | irq_map[i].host = host; | |
561 | smp_wmb(); | |
562 | ||
6e99e458 | 563 | /* Clear norequest flags */ |
98488db9 | 564 | irq_clear_status_flags(i, IRQ_NOREQUEST); |
0ebfff14 BH |
565 | |
566 | /* Legacy flags are left to default at this point, | |
567 | * one can then use irq_create_mapping() to | |
c03983ac | 568 | * explicitly change them |
0ebfff14 | 569 | */ |
6e99e458 | 570 | ops->map(host, i, i); |
0ebfff14 BH |
571 | } |
572 | break; | |
573 | case IRQ_HOST_MAP_LINEAR: | |
574 | rmap = (unsigned int *)(host + 1); | |
575 | for (i = 0; i < revmap_arg; i++) | |
f5921697 | 576 | rmap[i] = NO_IRQ; |
0ebfff14 BH |
577 | host->revmap_data.linear.size = revmap_arg; |
578 | smp_wmb(); | |
579 | host->revmap_data.linear.revmap = rmap; | |
580 | break; | |
581 | default: | |
582 | break; | |
583 | } | |
584 | ||
585 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | |
586 | ||
587 | return host; | |
1da177e4 LT |
588 | } |
589 | ||
0ebfff14 | 590 | struct irq_host *irq_find_host(struct device_node *node) |
1da177e4 | 591 | { |
0ebfff14 BH |
592 | struct irq_host *h, *found = NULL; |
593 | unsigned long flags; | |
594 | ||
595 | /* We might want to match the legacy controller last since | |
596 | * it might potentially be set to match all interrupts in | |
597 | * the absence of a device node. This isn't a problem so far | |
598 | * yet though... | |
599 | */ | |
f95e085b | 600 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 | 601 | list_for_each_entry(h, &irq_hosts, link) |
68158006 | 602 | if (h->ops->match(h, node)) { |
0ebfff14 BH |
603 | found = h; |
604 | break; | |
605 | } | |
f95e085b | 606 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
607 | return found; |
608 | } | |
609 | EXPORT_SYMBOL_GPL(irq_find_host); | |
610 | ||
611 | void irq_set_default_host(struct irq_host *host) | |
612 | { | |
613 | pr_debug("irq: Default host set to @0x%p\n", host); | |
1da177e4 | 614 | |
0ebfff14 BH |
615 | irq_default_host = host; |
616 | } | |
1da177e4 | 617 | |
0ebfff14 BH |
618 | void irq_set_virq_count(unsigned int count) |
619 | { | |
620 | pr_debug("irq: Trying to set virq count to %d\n", count); | |
fef1c772 | 621 | |
0ebfff14 BH |
622 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
623 | if (count < NR_IRQS) | |
624 | irq_virq_count = count; | |
625 | } | |
626 | ||
6fde40f3 ME |
627 | static int irq_setup_virq(struct irq_host *host, unsigned int virq, |
628 | irq_hw_number_t hwirq) | |
629 | { | |
a9d8946b | 630 | int res; |
cd015707 | 631 | |
a9d8946b TG |
632 | res = irq_alloc_desc_at(virq, 0); |
633 | if (res != virq) { | |
cd015707 ME |
634 | pr_debug("irq: -> allocating desc failed\n"); |
635 | goto error; | |
636 | } | |
637 | ||
a9d8946b | 638 | irq_clear_status_flags(virq, IRQ_NOREQUEST); |
6fde40f3 ME |
639 | |
640 | /* map it */ | |
641 | smp_wmb(); | |
642 | irq_map[virq].hwirq = hwirq; | |
643 | smp_mb(); | |
644 | ||
645 | if (host->ops->map(host, virq, hwirq)) { | |
646 | pr_debug("irq: -> mapping failed, freeing\n"); | |
a9d8946b | 647 | goto errdesc; |
6fde40f3 ME |
648 | } |
649 | ||
650 | return 0; | |
cd015707 | 651 | |
a9d8946b TG |
652 | errdesc: |
653 | irq_free_descs(virq, 1); | |
cd015707 ME |
654 | error: |
655 | irq_free_virt(virq, 1); | |
656 | return -1; | |
6fde40f3 | 657 | } |
8ec8f2e8 | 658 | |
ee51de56 ME |
659 | unsigned int irq_create_direct_mapping(struct irq_host *host) |
660 | { | |
661 | unsigned int virq; | |
662 | ||
663 | if (host == NULL) | |
664 | host = irq_default_host; | |
665 | ||
666 | BUG_ON(host == NULL); | |
667 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP); | |
668 | ||
669 | virq = irq_alloc_virt(host, 1, 0); | |
670 | if (virq == NO_IRQ) { | |
671 | pr_debug("irq: create_direct virq allocation failed\n"); | |
672 | return NO_IRQ; | |
673 | } | |
674 | ||
675 | pr_debug("irq: create_direct obtained virq %d\n", virq); | |
676 | ||
677 | if (irq_setup_virq(host, virq, virq)) | |
678 | return NO_IRQ; | |
679 | ||
680 | return virq; | |
681 | } | |
682 | ||
0ebfff14 | 683 | unsigned int irq_create_mapping(struct irq_host *host, |
6e99e458 | 684 | irq_hw_number_t hwirq) |
0ebfff14 BH |
685 | { |
686 | unsigned int virq, hint; | |
687 | ||
6e99e458 | 688 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
0ebfff14 BH |
689 | |
690 | /* Look for default host if nececssary */ | |
691 | if (host == NULL) | |
692 | host = irq_default_host; | |
693 | if (host == NULL) { | |
694 | printk(KERN_WARNING "irq_create_mapping called for" | |
695 | " NULL host, hwirq=%lx\n", hwirq); | |
696 | WARN_ON(1); | |
697 | return NO_IRQ; | |
1da177e4 | 698 | } |
0ebfff14 | 699 | pr_debug("irq: -> using host @%p\n", host); |
1da177e4 | 700 | |
0ebfff14 BH |
701 | /* Check if mapping already exist, if it does, call |
702 | * host->ops->map() to update the flags | |
703 | */ | |
704 | virq = irq_find_mapping(host, hwirq); | |
f5921697 | 705 | if (virq != NO_IRQ) { |
acc900ef IK |
706 | if (host->ops->remap) |
707 | host->ops->remap(host, virq, hwirq); | |
0ebfff14 | 708 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
0ebfff14 | 709 | return virq; |
1da177e4 LT |
710 | } |
711 | ||
0ebfff14 BH |
712 | /* Get a virtual interrupt number */ |
713 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | |
714 | /* Handle legacy */ | |
715 | virq = (unsigned int)hwirq; | |
716 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | |
717 | return NO_IRQ; | |
718 | return virq; | |
719 | } else { | |
720 | /* Allocate a virtual interrupt number */ | |
721 | hint = hwirq % irq_virq_count; | |
722 | virq = irq_alloc_virt(host, 1, hint); | |
723 | if (virq == NO_IRQ) { | |
724 | pr_debug("irq: -> virq allocation failed\n"); | |
725 | return NO_IRQ; | |
726 | } | |
727 | } | |
0ebfff14 | 728 | |
6fde40f3 | 729 | if (irq_setup_virq(host, virq, hwirq)) |
0ebfff14 | 730 | return NO_IRQ; |
6fde40f3 | 731 | |
c7d07fdd ME |
732 | printk(KERN_DEBUG "irq: irq %lu on host %s mapped to virtual irq %u\n", |
733 | hwirq, host->of_node ? host->of_node->full_name : "null", virq); | |
734 | ||
1da177e4 | 735 | return virq; |
0ebfff14 BH |
736 | } |
737 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
738 | ||
f3d2ab41 | 739 | unsigned int irq_create_of_mapping(struct device_node *controller, |
40d50cf7 | 740 | const u32 *intspec, unsigned int intsize) |
0ebfff14 BH |
741 | { |
742 | struct irq_host *host; | |
743 | irq_hw_number_t hwirq; | |
6e99e458 BH |
744 | unsigned int type = IRQ_TYPE_NONE; |
745 | unsigned int virq; | |
1da177e4 | 746 | |
0ebfff14 BH |
747 | if (controller == NULL) |
748 | host = irq_default_host; | |
749 | else | |
750 | host = irq_find_host(controller); | |
6e99e458 BH |
751 | if (host == NULL) { |
752 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | |
753 | controller->full_name); | |
0ebfff14 | 754 | return NO_IRQ; |
6e99e458 | 755 | } |
0ebfff14 BH |
756 | |
757 | /* If host has no translation, then we assume interrupt line */ | |
758 | if (host->ops->xlate == NULL) | |
759 | hwirq = intspec[0]; | |
760 | else { | |
761 | if (host->ops->xlate(host, controller, intspec, intsize, | |
6e99e458 | 762 | &hwirq, &type)) |
0ebfff14 | 763 | return NO_IRQ; |
1da177e4 | 764 | } |
0ebfff14 | 765 | |
6e99e458 BH |
766 | /* Create mapping */ |
767 | virq = irq_create_mapping(host, hwirq); | |
768 | if (virq == NO_IRQ) | |
769 | return virq; | |
770 | ||
771 | /* Set type if specified and different than the current one */ | |
772 | if (type != IRQ_TYPE_NONE && | |
7bfbc1f2 | 773 | type != (irqd_get_trigger_type(irq_get_irq_data(virq)))) |
ec775d0e | 774 | irq_set_irq_type(virq, type); |
6e99e458 | 775 | return virq; |
1da177e4 | 776 | } |
0ebfff14 | 777 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
1da177e4 | 778 | |
0ebfff14 BH |
779 | void irq_dispose_mapping(unsigned int virq) |
780 | { | |
5414c6be | 781 | struct irq_host *host; |
0ebfff14 | 782 | irq_hw_number_t hwirq; |
1da177e4 | 783 | |
5414c6be ME |
784 | if (virq == NO_IRQ) |
785 | return; | |
786 | ||
787 | host = irq_map[virq].host; | |
0ebfff14 BH |
788 | WARN_ON (host == NULL); |
789 | if (host == NULL) | |
790 | return; | |
1da177e4 | 791 | |
0ebfff14 BH |
792 | /* Never unmap legacy interrupts */ |
793 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
794 | return; | |
1da177e4 | 795 | |
0ebfff14 | 796 | /* remove chip and handler */ |
ec775d0e | 797 | irq_set_chip_and_handler(virq, NULL, NULL); |
0ebfff14 BH |
798 | |
799 | /* Make sure it's completed */ | |
800 | synchronize_irq(virq); | |
801 | ||
802 | /* Tell the PIC about it */ | |
803 | if (host->ops->unmap) | |
804 | host->ops->unmap(host, virq); | |
805 | smp_mb(); | |
806 | ||
807 | /* Clear reverse map */ | |
808 | hwirq = irq_map[virq].hwirq; | |
809 | switch(host->revmap_type) { | |
810 | case IRQ_HOST_MAP_LINEAR: | |
811 | if (hwirq < host->revmap_data.linear.size) | |
f5921697 | 812 | host->revmap_data.linear.revmap[hwirq] = NO_IRQ; |
0ebfff14 BH |
813 | break; |
814 | case IRQ_HOST_MAP_TREE: | |
967e012e SD |
815 | /* |
816 | * Check if radix tree allocated yet, if not then nothing to | |
817 | * remove. | |
818 | */ | |
819 | smp_rmb(); | |
820 | if (revmap_trees_allocated < 1) | |
0ebfff14 | 821 | break; |
150c6c8f | 822 | mutex_lock(&revmap_trees_mutex); |
0ebfff14 | 823 | radix_tree_delete(&host->revmap_data.tree, hwirq); |
150c6c8f | 824 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 BH |
825 | break; |
826 | } | |
1da177e4 | 827 | |
0ebfff14 BH |
828 | /* Destroy map */ |
829 | smp_mb(); | |
830 | irq_map[virq].hwirq = host->inval_irq; | |
1da177e4 | 831 | |
a9d8946b | 832 | irq_set_status_flags(virq, IRQ_NOREQUEST); |
1da177e4 | 833 | |
a9d8946b | 834 | irq_free_descs(virq, 1); |
0ebfff14 BH |
835 | /* Free it */ |
836 | irq_free_virt(virq, 1); | |
1da177e4 | 837 | } |
0ebfff14 | 838 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
1da177e4 | 839 | |
0ebfff14 BH |
840 | unsigned int irq_find_mapping(struct irq_host *host, |
841 | irq_hw_number_t hwirq) | |
842 | { | |
843 | unsigned int i; | |
844 | unsigned int hint = hwirq % irq_virq_count; | |
845 | ||
846 | /* Look for default host if nececssary */ | |
847 | if (host == NULL) | |
848 | host = irq_default_host; | |
849 | if (host == NULL) | |
850 | return NO_IRQ; | |
851 | ||
852 | /* legacy -> bail early */ | |
853 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
854 | return hwirq; | |
855 | ||
856 | /* Slow path does a linear search of the map */ | |
857 | if (hint < NUM_ISA_INTERRUPTS) | |
858 | hint = NUM_ISA_INTERRUPTS; | |
859 | i = hint; | |
860 | do { | |
861 | if (irq_map[i].host == host && | |
862 | irq_map[i].hwirq == hwirq) | |
863 | return i; | |
864 | i++; | |
865 | if (i >= irq_virq_count) | |
866 | i = NUM_ISA_INTERRUPTS; | |
867 | } while(i != hint); | |
868 | return NO_IRQ; | |
869 | } | |
870 | EXPORT_SYMBOL_GPL(irq_find_mapping); | |
1da177e4 | 871 | |
0ebfff14 | 872 | |
967e012e SD |
873 | unsigned int irq_radix_revmap_lookup(struct irq_host *host, |
874 | irq_hw_number_t hwirq) | |
1da177e4 | 875 | { |
0ebfff14 BH |
876 | struct irq_map_entry *ptr; |
877 | unsigned int virq; | |
1da177e4 | 878 | |
0ebfff14 | 879 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); |
1da177e4 | 880 | |
967e012e SD |
881 | /* |
882 | * Check if the radix tree exists and has bee initialized. | |
883 | * If not, we fallback to slow mode | |
0ebfff14 | 884 | */ |
967e012e | 885 | if (revmap_trees_allocated < 2) |
0ebfff14 BH |
886 | return irq_find_mapping(host, hwirq); |
887 | ||
0ebfff14 | 888 | /* Now try to resolve */ |
150c6c8f SD |
889 | /* |
890 | * No rcu_read_lock(ing) needed, the ptr returned can't go under us | |
891 | * as it's referencing an entry in the static irq_map table. | |
892 | */ | |
967e012e | 893 | ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq); |
8ec8f2e8 | 894 | |
967e012e SD |
895 | /* |
896 | * If found in radix tree, then fine. | |
897 | * Else fallback to linear lookup - this should not happen in practice | |
898 | * as it means that we failed to insert the node in the radix tree. | |
899 | */ | |
900 | if (ptr) | |
0ebfff14 | 901 | virq = ptr - irq_map; |
967e012e SD |
902 | else |
903 | virq = irq_find_mapping(host, hwirq); | |
904 | ||
905 | return virq; | |
906 | } | |
907 | ||
908 | void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq, | |
909 | irq_hw_number_t hwirq) | |
910 | { | |
967e012e SD |
911 | |
912 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); | |
913 | ||
914 | /* | |
915 | * Check if the radix tree exists yet. | |
916 | * If not, then the irq will be inserted into the tree when it gets | |
917 | * initialized. | |
918 | */ | |
919 | smp_rmb(); | |
920 | if (revmap_trees_allocated < 1) | |
921 | return; | |
0ebfff14 | 922 | |
8ec8f2e8 | 923 | if (virq != NO_IRQ) { |
150c6c8f | 924 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
925 | radix_tree_insert(&host->revmap_data.tree, hwirq, |
926 | &irq_map[virq]); | |
150c6c8f | 927 | mutex_unlock(&revmap_trees_mutex); |
8ec8f2e8 | 928 | } |
1da177e4 LT |
929 | } |
930 | ||
0ebfff14 BH |
931 | unsigned int irq_linear_revmap(struct irq_host *host, |
932 | irq_hw_number_t hwirq) | |
c6622f63 | 933 | { |
0ebfff14 | 934 | unsigned int *revmap; |
c6622f63 | 935 | |
0ebfff14 BH |
936 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR); |
937 | ||
938 | /* Check revmap bounds */ | |
939 | if (unlikely(hwirq >= host->revmap_data.linear.size)) | |
940 | return irq_find_mapping(host, hwirq); | |
941 | ||
942 | /* Check if revmap was allocated */ | |
943 | revmap = host->revmap_data.linear.revmap; | |
944 | if (unlikely(revmap == NULL)) | |
945 | return irq_find_mapping(host, hwirq); | |
946 | ||
947 | /* Fill up revmap with slow path if no mapping found */ | |
948 | if (unlikely(revmap[hwirq] == NO_IRQ)) | |
949 | revmap[hwirq] = irq_find_mapping(host, hwirq); | |
950 | ||
951 | return revmap[hwirq]; | |
c6622f63 PM |
952 | } |
953 | ||
0ebfff14 BH |
954 | unsigned int irq_alloc_virt(struct irq_host *host, |
955 | unsigned int count, | |
956 | unsigned int hint) | |
957 | { | |
958 | unsigned long flags; | |
959 | unsigned int i, j, found = NO_IRQ; | |
c6622f63 | 960 | |
0ebfff14 BH |
961 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
962 | return NO_IRQ; | |
963 | ||
f95e085b | 964 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
965 | |
966 | /* Use hint for 1 interrupt if any */ | |
967 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | |
968 | hint < irq_virq_count && irq_map[hint].host == NULL) { | |
969 | found = hint; | |
970 | goto hint_found; | |
971 | } | |
972 | ||
973 | /* Look for count consecutive numbers in the allocatable | |
974 | * (non-legacy) space | |
975 | */ | |
e1251465 ME |
976 | for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) { |
977 | if (irq_map[i].host != NULL) | |
978 | j = 0; | |
979 | else | |
980 | j++; | |
981 | ||
982 | if (j == count) { | |
983 | found = i - count + 1; | |
984 | break; | |
985 | } | |
0ebfff14 BH |
986 | } |
987 | if (found == NO_IRQ) { | |
f95e085b | 988 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
989 | return NO_IRQ; |
990 | } | |
991 | hint_found: | |
992 | for (i = found; i < (found + count); i++) { | |
993 | irq_map[i].hwirq = host->inval_irq; | |
994 | smp_wmb(); | |
995 | irq_map[i].host = host; | |
996 | } | |
f95e085b | 997 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
998 | return found; |
999 | } | |
1000 | ||
1001 | void irq_free_virt(unsigned int virq, unsigned int count) | |
1da177e4 LT |
1002 | { |
1003 | unsigned long flags; | |
0ebfff14 | 1004 | unsigned int i; |
1da177e4 | 1005 | |
0ebfff14 BH |
1006 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
1007 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | |
1da177e4 | 1008 | |
f95e085b | 1009 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
1010 | for (i = virq; i < (virq + count); i++) { |
1011 | struct irq_host *host; | |
1da177e4 | 1012 | |
0ebfff14 BH |
1013 | if (i < NUM_ISA_INTERRUPTS || |
1014 | (virq + count) > irq_virq_count) | |
1015 | continue; | |
1da177e4 | 1016 | |
0ebfff14 BH |
1017 | host = irq_map[i].host; |
1018 | irq_map[i].hwirq = host->inval_irq; | |
1019 | smp_wmb(); | |
1020 | irq_map[i].host = NULL; | |
1021 | } | |
f95e085b | 1022 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
1da177e4 | 1023 | } |
0ebfff14 | 1024 | |
cd015707 | 1025 | int arch_early_irq_init(void) |
0ebfff14 | 1026 | { |
cd015707 | 1027 | return 0; |
0ebfff14 BH |
1028 | } |
1029 | ||
1030 | /* We need to create the radix trees late */ | |
1031 | static int irq_late_init(void) | |
1032 | { | |
1033 | struct irq_host *h; | |
967e012e | 1034 | unsigned int i; |
0ebfff14 | 1035 | |
967e012e SD |
1036 | /* |
1037 | * No mutual exclusion with respect to accessors of the tree is needed | |
1038 | * here as the synchronization is done via the state variable | |
1039 | * revmap_trees_allocated. | |
1040 | */ | |
0ebfff14 BH |
1041 | list_for_each_entry(h, &irq_hosts, link) { |
1042 | if (h->revmap_type == IRQ_HOST_MAP_TREE) | |
967e012e SD |
1043 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_KERNEL); |
1044 | } | |
1045 | ||
1046 | /* | |
1047 | * Make sure the radix trees inits are visible before setting | |
1048 | * the flag | |
1049 | */ | |
1050 | smp_wmb(); | |
1051 | revmap_trees_allocated = 1; | |
1052 | ||
1053 | /* | |
1054 | * Insert the reverse mapping for those interrupts already present | |
1055 | * in irq_map[]. | |
1056 | */ | |
150c6c8f | 1057 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
1058 | for (i = 0; i < irq_virq_count; i++) { |
1059 | if (irq_map[i].host && | |
1060 | (irq_map[i].host->revmap_type == IRQ_HOST_MAP_TREE)) | |
1061 | radix_tree_insert(&irq_map[i].host->revmap_data.tree, | |
1062 | irq_map[i].hwirq, &irq_map[i]); | |
0ebfff14 | 1063 | } |
150c6c8f | 1064 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 | 1065 | |
967e012e SD |
1066 | /* |
1067 | * Make sure the radix trees insertions are visible before setting | |
1068 | * the flag | |
1069 | */ | |
1070 | smp_wmb(); | |
1071 | revmap_trees_allocated = 2; | |
1072 | ||
0ebfff14 BH |
1073 | return 0; |
1074 | } | |
1075 | arch_initcall(irq_late_init); | |
1076 | ||
60b332e7 ME |
1077 | #ifdef CONFIG_VIRQ_DEBUG |
1078 | static int virq_debug_show(struct seq_file *m, void *private) | |
1079 | { | |
1080 | unsigned long flags; | |
97f7d6bc | 1081 | struct irq_desc *desc; |
60b332e7 | 1082 | const char *p; |
4e74fd7d | 1083 | static const char none[] = "none"; |
60b332e7 ME |
1084 | int i; |
1085 | ||
1086 | seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq", | |
1087 | "chip name", "host name"); | |
1088 | ||
76f1d94f | 1089 | for (i = 1; i < nr_irqs; i++) { |
6cff46f4 | 1090 | desc = irq_to_desc(i); |
76f1d94f ME |
1091 | if (!desc) |
1092 | continue; | |
1093 | ||
239007b8 | 1094 | raw_spin_lock_irqsave(&desc->lock, flags); |
60b332e7 ME |
1095 | |
1096 | if (desc->action && desc->action->handler) { | |
e1180287 LB |
1097 | struct irq_chip *chip; |
1098 | ||
60b332e7 ME |
1099 | seq_printf(m, "%5d ", i); |
1100 | seq_printf(m, "0x%05lx ", virq_to_hw(i)); | |
1101 | ||
ec775d0e | 1102 | chip = irq_desc_get_chip(desc); |
e1180287 LB |
1103 | if (chip && chip->name) |
1104 | p = chip->name; | |
60b332e7 ME |
1105 | else |
1106 | p = none; | |
1107 | seq_printf(m, "%-15s ", p); | |
1108 | ||
1109 | if (irq_map[i].host && irq_map[i].host->of_node) | |
1110 | p = irq_map[i].host->of_node->full_name; | |
1111 | else | |
1112 | p = none; | |
1113 | seq_printf(m, "%s\n", p); | |
1114 | } | |
1115 | ||
239007b8 | 1116 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
60b332e7 ME |
1117 | } |
1118 | ||
1119 | return 0; | |
1120 | } | |
1121 | ||
1122 | static int virq_debug_open(struct inode *inode, struct file *file) | |
1123 | { | |
1124 | return single_open(file, virq_debug_show, inode->i_private); | |
1125 | } | |
1126 | ||
1127 | static const struct file_operations virq_debug_fops = { | |
1128 | .open = virq_debug_open, | |
1129 | .read = seq_read, | |
1130 | .llseek = seq_lseek, | |
1131 | .release = single_release, | |
1132 | }; | |
1133 | ||
1134 | static int __init irq_debugfs_init(void) | |
1135 | { | |
1136 | if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root, | |
476ff8a0 | 1137 | NULL, &virq_debug_fops) == NULL) |
60b332e7 ME |
1138 | return -ENOMEM; |
1139 | ||
1140 | return 0; | |
1141 | } | |
1142 | __initcall(irq_debugfs_init); | |
1143 | #endif /* CONFIG_VIRQ_DEBUG */ | |
1144 | ||
c6622f63 | 1145 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
1146 | static int __init setup_noirqdistrib(char *str) |
1147 | { | |
1148 | distribute_irqs = 0; | |
1149 | return 1; | |
1150 | } | |
1151 | ||
1152 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 1153 | #endif /* CONFIG_PPC64 */ |