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1da177e4 LT |
1 | /* |
2 | * c 2001 PPC 64 Team, IBM Corp | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License | |
6 | * as published by the Free Software Foundation; either version | |
7 | * 2 of the License, or (at your option) any later version. | |
8 | */ | |
9 | ||
1da177e4 LT |
10 | #include <linux/threads.h> |
11 | #include <linux/module.h> | |
12 | ||
1da177e4 | 13 | #include <asm/lppaca.h> |
1da177e4 | 14 | #include <asm/paca.h> |
549e8152 | 15 | #include <asm/sections.h> |
dce6670a | 16 | #include <asm/pgtable.h> |
1da177e4 LT |
17 | |
18 | /* This symbol is provided by the linker - let it fill in the paca | |
19 | * field correctly */ | |
20 | extern unsigned long __toc_start; | |
21 | ||
91c60b5b BH |
22 | #ifdef CONFIG_PPC_BOOK3S |
23 | ||
3356bb9f | 24 | /* |
30ff2e87 | 25 | * The structure which the hypervisor knows about - this structure |
3356bb9f DG |
26 | * should not cross a page boundary. The vpa_init/register_vpa call |
27 | * is now known to fail if the lppaca structure crosses a page | |
30ff2e87 SR |
28 | * boundary. The lppaca is also used on legacy iSeries and POWER5 |
29 | * pSeries boxes. The lppaca is 640 bytes long, and cannot readily | |
30 | * change since the hypervisor knows its layout, so a 1kB alignment | |
31 | * will suffice to ensure that it doesn't cross a page boundary. | |
3356bb9f DG |
32 | */ |
33 | struct lppaca lppaca[] = { | |
34 | [0 ... (NR_CPUS-1)] = { | |
35 | .desc = 0xd397d781, /* "LpPa" */ | |
36 | .size = sizeof(struct lppaca), | |
37 | .dyn_proc_status = 2, | |
38 | .decr_val = 0x00ff0000, | |
39 | .fpregs_in_use = 1, | |
40 | .end_of_quantum = 0xfffffffffffffffful, | |
41 | .slb_count = 64, | |
42 | .vmxregs_in_use = 0, | |
40900194 | 43 | .page_ins = 0, |
3356bb9f DG |
44 | }, |
45 | }; | |
46 | ||
91c60b5b BH |
47 | #endif /* CONFIG_PPC_BOOK3S */ |
48 | ||
49 | #ifdef CONFIG_PPC_STD_MMU_64 | |
50 | ||
2f6093c8 MN |
51 | /* |
52 | * 3 persistent SLBs are registered here. The buffer will be zero | |
53 | * initially, hence will all be invaild until we actually write them. | |
54 | */ | |
55 | struct slb_shadow slb_shadow[] __cacheline_aligned = { | |
56 | [0 ... (NR_CPUS-1)] = { | |
57 | .persistent = SLB_NUM_BOLTED, | |
58 | .buffer_length = sizeof(struct slb_shadow), | |
59 | }, | |
60 | }; | |
61 | ||
91c60b5b BH |
62 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
63 | ||
8882a4da | 64 | /* The Paca is an array with one entry per processor. Each contains an |
1da177e4 | 65 | * lppaca, which contains the information shared between the |
1888e7b5 | 66 | * hypervisor and Linux. |
1da177e4 LT |
67 | * On systems with hardware multi-threading, there are two threads |
68 | * per processor. The Paca array must contain an entry for each thread. | |
69 | * The VPD Areas will give a max logical processors = 2 * max physical | |
70 | * processors. The processor VPD array needs one entry per physical | |
71 | * processor (not thread). | |
72 | */ | |
90035fe3 | 73 | struct paca_struct paca[NR_CPUS]; |
1da177e4 | 74 | EXPORT_SYMBOL(paca); |
90035fe3 TB |
75 | |
76 | void __init initialise_pacas(void) | |
77 | { | |
78 | int cpu; | |
79 | ||
80 | /* The TOC register (GPR2) points 32kB into the TOC, so that 64kB | |
81 | * of the TOC can be addressed using a single machine instruction. | |
82 | */ | |
83 | unsigned long kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL; | |
84 | ||
85 | /* Can't use for_each_*_cpu, as they aren't functional yet */ | |
86 | for (cpu = 0; cpu < NR_CPUS; cpu++) { | |
87 | struct paca_struct *new_paca = &paca[cpu]; | |
88 | ||
91c60b5b | 89 | #ifdef CONFIG_PPC_BOOK3S |
90035fe3 | 90 | new_paca->lppaca_ptr = &lppaca[cpu]; |
dce6670a BH |
91 | #else |
92 | new_paca->kernel_pgd = swapper_pg_dir; | |
91c60b5b | 93 | #endif |
90035fe3 TB |
94 | new_paca->lock_token = 0x8000; |
95 | new_paca->paca_index = cpu; | |
96 | new_paca->kernel_toc = kernel_toc; | |
549e8152 | 97 | new_paca->kernelbase = (unsigned long) _stext; |
1f6a93e4 | 98 | new_paca->kernel_msr = MSR_KERNEL; |
90035fe3 | 99 | new_paca->hw_cpu_id = 0xffff; |
90035fe3 | 100 | new_paca->__current = &init_task; |
91c60b5b BH |
101 | #ifdef CONFIG_PPC_STD_MMU_64 |
102 | new_paca->slb_shadow_ptr = &slb_shadow[cpu]; | |
103 | #endif /* CONFIG_PPC_STD_MMU_64 */ | |
90035fe3 TB |
104 | |
105 | } | |
106 | } |