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1/*
2 * Common pmac/prep/chrp pci routines. -- Cort
3 */
4
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5#include <linux/kernel.h>
6#include <linux/pci.h>
7#include <linux/delay.h>
8#include <linux/string.h>
9#include <linux/init.h>
10#include <linux/capability.h>
11#include <linux/sched.h>
12#include <linux/errno.h>
13#include <linux/bootmem.h>
6e99e458 14#include <linux/irq.h>
f90bb153 15#include <linux/list.h>
66524b22 16#include <linux/of.h>
5a0e3ad6 17#include <linux/slab.h>
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18
19#include <asm/processor.h>
20#include <asm/io.h>
21#include <asm/prom.h>
22#include <asm/sections.h>
23#include <asm/pci-bridge.h>
c3bd517d 24#include <asm/ppc-pci.h>
e05b3b4a 25#include <asm/byteorder.h>
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26#include <asm/uaccess.h>
27#include <asm/machdep.h>
28
29#undef DEBUG
30
e05b3b4a 31unsigned long isa_io_base = 0;
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32unsigned long pci_dram_offset = 0;
33int pcibios_assign_bus_offset = 1;
34
35void pcibios_make_OF_bus_map(void);
36
e05b3b4a 37static void fixup_cpc710_pci64(struct pci_dev* dev);
e05b3b4a 38static u8* pci_to_OF_bus_map;
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39
40/* By default, we don't re-assign bus numbers. We do this only on
41 * some pmacs
42 */
fc3fb71c 43static int pci_assign_all_buses;
e05b3b4a 44
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45static int pci_bus_count;
46
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47/* This will remain NULL for now, until isa-bridge.c is made common
48 * to both 32-bit and 64-bit.
49 */
50struct pci_dev *isa_bridge_pcidev;
51EXPORT_SYMBOL_GPL(isa_bridge_pcidev);
52
2052d6d2 53static void
4a015c37 54fixup_hide_host_resource_fsl(struct pci_dev *dev)
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55{
56 int i, class = dev->class >> 8;
57
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58 if ((class == PCI_CLASS_PROCESSOR_POWERPC ||
59 class == PCI_CLASS_BRIDGE_OTHER) &&
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60 (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
61 (dev->bus->parent == NULL)) {
62 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
63 dev->resource[i].start = 0;
64 dev->resource[i].end = 0;
65 dev->resource[i].flags = 0;
66 }
67 }
68}
69DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl);
70DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl);
71
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72static void
73fixup_cpc710_pci64(struct pci_dev* dev)
74{
75 /* Hide the PCI64 BARs from the kernel as their content doesn't
76 * fit well in the resource management
77 */
78 dev->resource[0].start = dev->resource[0].end = 0;
79 dev->resource[0].flags = 0;
80 dev->resource[1].start = dev->resource[1].end = 0;
81 dev->resource[1].flags = 0;
82}
83DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64);
84
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85/*
86 * Functions below are used on OpenFirmware machines.
87 */
88static void
89make_one_node_map(struct device_node* node, u8 pci_bus)
90{
a7f67bdf 91 const int *bus_range;
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92 int len;
93
94 if (pci_bus >= pci_bus_count)
95 return;
e2eb6392 96 bus_range = of_get_property(node, "bus-range", &len);
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97 if (bus_range == NULL || len < 2 * sizeof(int)) {
98 printk(KERN_WARNING "Can't get bus-range for %s, "
99 "assuming it starts at 0\n", node->full_name);
100 pci_to_OF_bus_map[pci_bus] = 0;
101 } else
102 pci_to_OF_bus_map[pci_bus] = bus_range[0];
103
66524b22 104 for_each_child_of_node(node, node) {
e05b3b4a 105 struct pci_dev* dev;
a7f67bdf 106 const unsigned int *class_code, *reg;
e05b3b4a 107
e2eb6392 108 class_code = of_get_property(node, "class-code", NULL);
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109 if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
110 (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
111 continue;
e2eb6392 112 reg = of_get_property(node, "reg", NULL);
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113 if (!reg)
114 continue;
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115 dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff));
116 if (!dev || !dev->subordinate) {
117 pci_dev_put(dev);
e05b3b4a 118 continue;
ab462768 119 }
e05b3b4a 120 make_one_node_map(node, dev->subordinate->number);
ab462768 121 pci_dev_put(dev);
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122 }
123}
124
125void
126pcibios_make_OF_bus_map(void)
127{
128 int i;
a4c9e328 129 struct pci_controller *hose, *tmp;
a7f67bdf 130 struct property *map_prop;
8c8dc322 131 struct device_node *dn;
e05b3b4a 132
5cbded58 133 pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL);
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134 if (!pci_to_OF_bus_map) {
135 printk(KERN_ERR "Can't allocate OF bus map !\n");
136 return;
137 }
138
139 /* We fill the bus map with invalid values, that helps
140 * debugging.
141 */
142 for (i=0; i<pci_bus_count; i++)
143 pci_to_OF_bus_map[i] = 0xff;
144
145 /* For each hose, we begin searching bridges */
a4c9e328 146 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
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147 struct device_node* node = hose->dn;
148
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149 if (!node)
150 continue;
151 make_one_node_map(node, hose->first_busno);
152 }
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153 dn = of_find_node_by_path("/");
154 map_prop = of_find_property(dn, "pci-OF-bus-map", NULL);
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155 if (map_prop) {
156 BUG_ON(pci_bus_count > map_prop->length);
157 memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count);
158 }
8c8dc322 159 of_node_put(dn);
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160#ifdef DEBUG
161 printk("PCI->OF bus map:\n");
162 for (i=0; i<pci_bus_count; i++) {
163 if (pci_to_OF_bus_map[i] == 0xff)
164 continue;
165 printk("%d -> %d\n", i, pci_to_OF_bus_map[i]);
166 }
167#endif
168}
169
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170
171/*
172 * Returns the PCI device matching a given OF node
173 */
98d9f30c 174int pci_device_from_OF_node(struct device_node *node, u8 *bus, u8 *devfn)
e05b3b4a 175{
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176 struct pci_dev *dev = NULL;
177 const __be32 *reg;
178 int size;
179
180 /* Check if it might have a chance to be a PCI device */
181 if (!pci_find_hose_for_OF_device(node))
e05b3b4a 182 return -ENODEV;
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183
184 reg = of_get_property(node, "reg", &size);
185 if (!reg || size < 5 * sizeof(u32))
e05b3b4a 186 return -ENODEV;
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187
188 *bus = (be32_to_cpup(&reg[0]) >> 16) & 0xff;
189 *devfn = (be32_to_cpup(&reg[0]) >> 8) & 0xff;
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190
191 /* Ok, here we need some tweak. If we have already renumbered
192 * all busses, we can't rely on the OF bus number any more.
193 * the pci_to_OF_bus_map is not enough as several PCI busses
194 * may match the same OF bus number.
195 */
196 if (!pci_to_OF_bus_map)
197 return 0;
198
199 for_each_pci_dev(dev)
200 if (pci_to_OF_bus_map[dev->bus->number] == *bus &&
201 dev->devfn == *devfn) {
202 *bus = dev->bus->number;
203 pci_dev_put(dev);
204 return 0;
205 }
206
207 return -ENODEV;
208}
209EXPORT_SYMBOL(pci_device_from_OF_node);
210
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211/* We create the "pci-OF-bus-map" property now so it appears in the
212 * /proc device tree
213 */
214void __init
215pci_create_OF_bus_map(void)
216{
217 struct property* of_prop;
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218 struct device_node *dn;
219
e05b3b4a 220 of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256);
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221 if (!of_prop)
222 return;
223 dn = of_find_node_by_path("/");
224 if (dn) {
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225 memset(of_prop, -1, sizeof(struct property) + 256);
226 of_prop->name = "pci-OF-bus-map";
227 of_prop->length = 256;
1a38147e 228 of_prop->value = &of_prop[1];
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229 prom_add_property(dn, of_prop);
230 of_node_put(dn);
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231 }
232}
233
0ed2c722 234void __devinit pcibios_setup_phb_io_space(struct pci_controller *hose)
53280323 235{
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236 unsigned long io_offset;
237 struct resource *res = &hose->io_resource;
238
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239 /* Fixup IO space offset */
240 io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
241 res->start = (res->start + io_offset) & 0xffffffffu;
242 res->end = (res->end + io_offset) & 0xffffffffu;
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243}
244
3fd94c6b 245static int __init pcibios_init(void)
e05b3b4a 246{
a4c9e328 247 struct pci_controller *hose, *tmp;
a4c9e328 248 int next_busno = 0;
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249
250 printk(KERN_INFO "PCI: Probing PCI hardware\n");
251
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252 if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
253 pci_assign_all_buses = 1;
254
e05b3b4a 255 /* Scan all of the recorded PCI controllers. */
a4c9e328 256 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
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257 if (pci_assign_all_buses)
258 hose->first_busno = next_busno;
259 hose->last_busno = 0xff;
b5d937de 260 pcibios_scan_phb(hose);
53280323 261 pci_bus_add_devices(hose->bus);
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262 if (pci_assign_all_buses || next_busno <= hose->last_busno)
263 next_busno = hose->last_busno + pcibios_assign_bus_offset;
264 }
265 pci_bus_count = next_busno;
266
267 /* OpenFirmware based machines need a map of OF bus
268 * numbers vs. kernel bus numbers since we may have to
269 * remap them.
270 */
6b82b3e4 271 if (pci_assign_all_buses)
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272 pcibios_make_OF_bus_map();
273
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274 /* Call common code to handle resource allocation */
275 pcibios_resource_survey();
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276
277 /* Call machine dependent post-init code */
278 if (ppc_md.pcibios_after_init)
279 ppc_md.pcibios_after_init();
280
281 return 0;
282}
283
284subsys_initcall(pcibios_init);
285
0b1d40c4 286static struct pci_controller*
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287pci_bus_to_hose(int bus)
288{
a4c9e328 289 struct pci_controller *hose, *tmp;
e05b3b4a 290
a4c9e328 291 list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
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292 if (bus >= hose->first_busno && bus <= hose->last_busno)
293 return hose;
294 return NULL;
295}
296
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297/* Provide information on locations of various I/O regions in physical
298 * memory. Do this on a per-card basis so that we choose the right
299 * root bridge.
300 * Note that the returned IO or memory base is a physical address
301 */
302
303long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
304{
305 struct pci_controller* hose;
306 long result = -EOPNOTSUPP;
307
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308 hose = pci_bus_to_hose(bus);
309 if (!hose)
310 return -ENODEV;
311
312 switch (which) {
313 case IOBASE_BRIDGE_NUMBER:
314 return (long)hose->first_busno;
315 case IOBASE_MEMORY:
316 return (long)hose->pci_mem_offset;
317 case IOBASE_IO:
318 return (long)hose->io_base_phys;
319 case IOBASE_ISA_IO:
320 return (long)isa_io_base;
321 case IOBASE_ISA_MEM:
322 return (long)isa_mem_base;
323 }
324
325 return result;
326}
327
e05b3b4a 328