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Commit | Line | Data |
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14cf11af | 1 | /* |
14cf11af PM |
2 | * Derived from "arch/i386/kernel/process.c" |
3 | * Copyright (C) 1995 Linus Torvalds | |
4 | * | |
5 | * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and | |
6 | * Paul Mackerras (paulus@cs.anu.edu.au) | |
7 | * | |
8 | * PowerPC version | |
9 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | */ | |
16 | ||
14cf11af PM |
17 | #include <linux/errno.h> |
18 | #include <linux/sched.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/mm.h> | |
21 | #include <linux/smp.h> | |
14cf11af PM |
22 | #include <linux/stddef.h> |
23 | #include <linux/unistd.h> | |
24 | #include <linux/ptrace.h> | |
25 | #include <linux/slab.h> | |
26 | #include <linux/user.h> | |
27 | #include <linux/elf.h> | |
28 | #include <linux/init.h> | |
29 | #include <linux/prctl.h> | |
30 | #include <linux/init_task.h> | |
31 | #include <linux/module.h> | |
32 | #include <linux/kallsyms.h> | |
33 | #include <linux/mqueue.h> | |
34 | #include <linux/hardirq.h> | |
06d67d54 | 35 | #include <linux/utsname.h> |
14cf11af PM |
36 | |
37 | #include <asm/pgtable.h> | |
38 | #include <asm/uaccess.h> | |
39 | #include <asm/system.h> | |
40 | #include <asm/io.h> | |
41 | #include <asm/processor.h> | |
42 | #include <asm/mmu.h> | |
43 | #include <asm/prom.h> | |
76032de8 | 44 | #include <asm/machdep.h> |
c6622f63 | 45 | #include <asm/time.h> |
a7f31841 | 46 | #include <asm/syscalls.h> |
06d67d54 PM |
47 | #ifdef CONFIG_PPC64 |
48 | #include <asm/firmware.h> | |
06d67d54 | 49 | #endif |
14cf11af PM |
50 | |
51 | extern unsigned long _get_SP(void); | |
52 | ||
53 | #ifndef CONFIG_SMP | |
54 | struct task_struct *last_task_used_math = NULL; | |
55 | struct task_struct *last_task_used_altivec = NULL; | |
ce48b210 | 56 | struct task_struct *last_task_used_vsx = NULL; |
14cf11af PM |
57 | struct task_struct *last_task_used_spe = NULL; |
58 | #endif | |
59 | ||
14cf11af PM |
60 | /* |
61 | * Make sure the floating-point register state in the | |
62 | * the thread_struct is up to date for task tsk. | |
63 | */ | |
64 | void flush_fp_to_thread(struct task_struct *tsk) | |
65 | { | |
66 | if (tsk->thread.regs) { | |
67 | /* | |
68 | * We need to disable preemption here because if we didn't, | |
69 | * another process could get scheduled after the regs->msr | |
70 | * test but before we have finished saving the FP registers | |
71 | * to the thread_struct. That process could take over the | |
72 | * FPU, and then when we get scheduled again we would store | |
73 | * bogus values for the remaining FP registers. | |
74 | */ | |
75 | preempt_disable(); | |
76 | if (tsk->thread.regs->msr & MSR_FP) { | |
77 | #ifdef CONFIG_SMP | |
78 | /* | |
79 | * This should only ever be called for current or | |
80 | * for a stopped child process. Since we save away | |
81 | * the FP register state on context switch on SMP, | |
82 | * there is something wrong if a stopped child appears | |
83 | * to still have its FP state in the CPU registers. | |
84 | */ | |
85 | BUG_ON(tsk != current); | |
86 | #endif | |
0ee6c15e | 87 | giveup_fpu(tsk); |
14cf11af PM |
88 | } |
89 | preempt_enable(); | |
90 | } | |
91 | } | |
92 | ||
93 | void enable_kernel_fp(void) | |
94 | { | |
95 | WARN_ON(preemptible()); | |
96 | ||
97 | #ifdef CONFIG_SMP | |
98 | if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) | |
99 | giveup_fpu(current); | |
100 | else | |
101 | giveup_fpu(NULL); /* just enables FP for kernel */ | |
102 | #else | |
103 | giveup_fpu(last_task_used_math); | |
104 | #endif /* CONFIG_SMP */ | |
105 | } | |
106 | EXPORT_SYMBOL(enable_kernel_fp); | |
107 | ||
14cf11af PM |
108 | #ifdef CONFIG_ALTIVEC |
109 | void enable_kernel_altivec(void) | |
110 | { | |
111 | WARN_ON(preemptible()); | |
112 | ||
113 | #ifdef CONFIG_SMP | |
114 | if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) | |
115 | giveup_altivec(current); | |
116 | else | |
117 | giveup_altivec(NULL); /* just enable AltiVec for kernel - force */ | |
118 | #else | |
119 | giveup_altivec(last_task_used_altivec); | |
120 | #endif /* CONFIG_SMP */ | |
121 | } | |
122 | EXPORT_SYMBOL(enable_kernel_altivec); | |
123 | ||
124 | /* | |
125 | * Make sure the VMX/Altivec register state in the | |
126 | * the thread_struct is up to date for task tsk. | |
127 | */ | |
128 | void flush_altivec_to_thread(struct task_struct *tsk) | |
129 | { | |
130 | if (tsk->thread.regs) { | |
131 | preempt_disable(); | |
132 | if (tsk->thread.regs->msr & MSR_VEC) { | |
133 | #ifdef CONFIG_SMP | |
134 | BUG_ON(tsk != current); | |
135 | #endif | |
0ee6c15e | 136 | giveup_altivec(tsk); |
14cf11af PM |
137 | } |
138 | preempt_enable(); | |
139 | } | |
140 | } | |
14cf11af PM |
141 | #endif /* CONFIG_ALTIVEC */ |
142 | ||
ce48b210 MN |
143 | #ifdef CONFIG_VSX |
144 | #if 0 | |
145 | /* not currently used, but some crazy RAID module might want to later */ | |
146 | void enable_kernel_vsx(void) | |
147 | { | |
148 | WARN_ON(preemptible()); | |
149 | ||
150 | #ifdef CONFIG_SMP | |
151 | if (current->thread.regs && (current->thread.regs->msr & MSR_VSX)) | |
152 | giveup_vsx(current); | |
153 | else | |
154 | giveup_vsx(NULL); /* just enable vsx for kernel - force */ | |
155 | #else | |
156 | giveup_vsx(last_task_used_vsx); | |
157 | #endif /* CONFIG_SMP */ | |
158 | } | |
159 | EXPORT_SYMBOL(enable_kernel_vsx); | |
160 | #endif | |
161 | ||
162 | void flush_vsx_to_thread(struct task_struct *tsk) | |
163 | { | |
164 | if (tsk->thread.regs) { | |
165 | preempt_disable(); | |
166 | if (tsk->thread.regs->msr & MSR_VSX) { | |
167 | #ifdef CONFIG_SMP | |
168 | BUG_ON(tsk != current); | |
169 | #endif | |
170 | giveup_vsx(tsk); | |
171 | } | |
172 | preempt_enable(); | |
173 | } | |
174 | } | |
ce48b210 MN |
175 | #endif /* CONFIG_VSX */ |
176 | ||
14cf11af PM |
177 | #ifdef CONFIG_SPE |
178 | ||
179 | void enable_kernel_spe(void) | |
180 | { | |
181 | WARN_ON(preemptible()); | |
182 | ||
183 | #ifdef CONFIG_SMP | |
184 | if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) | |
185 | giveup_spe(current); | |
186 | else | |
187 | giveup_spe(NULL); /* just enable SPE for kernel - force */ | |
188 | #else | |
189 | giveup_spe(last_task_used_spe); | |
190 | #endif /* __SMP __ */ | |
191 | } | |
192 | EXPORT_SYMBOL(enable_kernel_spe); | |
193 | ||
194 | void flush_spe_to_thread(struct task_struct *tsk) | |
195 | { | |
196 | if (tsk->thread.regs) { | |
197 | preempt_disable(); | |
198 | if (tsk->thread.regs->msr & MSR_SPE) { | |
199 | #ifdef CONFIG_SMP | |
200 | BUG_ON(tsk != current); | |
201 | #endif | |
0ee6c15e | 202 | giveup_spe(tsk); |
14cf11af PM |
203 | } |
204 | preempt_enable(); | |
205 | } | |
206 | } | |
14cf11af PM |
207 | #endif /* CONFIG_SPE */ |
208 | ||
5388fb10 | 209 | #ifndef CONFIG_SMP |
48abec07 PM |
210 | /* |
211 | * If we are doing lazy switching of CPU state (FP, altivec or SPE), | |
212 | * and the current task has some state, discard it. | |
213 | */ | |
5388fb10 | 214 | void discard_lazy_cpu_state(void) |
48abec07 | 215 | { |
48abec07 PM |
216 | preempt_disable(); |
217 | if (last_task_used_math == current) | |
218 | last_task_used_math = NULL; | |
219 | #ifdef CONFIG_ALTIVEC | |
220 | if (last_task_used_altivec == current) | |
221 | last_task_used_altivec = NULL; | |
222 | #endif /* CONFIG_ALTIVEC */ | |
ce48b210 MN |
223 | #ifdef CONFIG_VSX |
224 | if (last_task_used_vsx == current) | |
225 | last_task_used_vsx = NULL; | |
226 | #endif /* CONFIG_VSX */ | |
48abec07 PM |
227 | #ifdef CONFIG_SPE |
228 | if (last_task_used_spe == current) | |
229 | last_task_used_spe = NULL; | |
230 | #endif | |
231 | preempt_enable(); | |
48abec07 | 232 | } |
5388fb10 | 233 | #endif /* CONFIG_SMP */ |
48abec07 | 234 | |
a2ceff5e ME |
235 | static DEFINE_PER_CPU(unsigned long, current_dabr); |
236 | ||
14cf11af PM |
237 | int set_dabr(unsigned long dabr) |
238 | { | |
a2ceff5e ME |
239 | __get_cpu_var(current_dabr) = dabr; |
240 | ||
791cc501 | 241 | #ifdef CONFIG_PPC_MERGE /* XXX for now */ |
cab0af98 ME |
242 | if (ppc_md.set_dabr) |
243 | return ppc_md.set_dabr(dabr); | |
791cc501 | 244 | #endif |
14cf11af | 245 | |
791cc501 BH |
246 | /* XXX should we have a CPU_FTR_HAS_DABR ? */ |
247 | #if defined(CONFIG_PPC64) || defined(CONFIG_6xx) | |
cab0af98 | 248 | mtspr(SPRN_DABR, dabr); |
791cc501 | 249 | #endif |
cab0af98 | 250 | return 0; |
14cf11af PM |
251 | } |
252 | ||
06d67d54 PM |
253 | #ifdef CONFIG_PPC64 |
254 | DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array); | |
06d67d54 | 255 | #endif |
14cf11af PM |
256 | |
257 | struct task_struct *__switch_to(struct task_struct *prev, | |
258 | struct task_struct *new) | |
259 | { | |
260 | struct thread_struct *new_thread, *old_thread; | |
261 | unsigned long flags; | |
262 | struct task_struct *last; | |
263 | ||
264 | #ifdef CONFIG_SMP | |
265 | /* avoid complexity of lazy save/restore of fpu | |
266 | * by just saving it every time we switch out if | |
267 | * this task used the fpu during the last quantum. | |
268 | * | |
269 | * If it tries to use the fpu again, it'll trap and | |
270 | * reload its fp regs. So we don't have to do a restore | |
271 | * every switch, just a save. | |
272 | * -- Cort | |
273 | */ | |
274 | if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP)) | |
275 | giveup_fpu(prev); | |
276 | #ifdef CONFIG_ALTIVEC | |
277 | /* | |
278 | * If the previous thread used altivec in the last quantum | |
279 | * (thus changing altivec regs) then save them. | |
280 | * We used to check the VRSAVE register but not all apps | |
281 | * set it, so we don't rely on it now (and in fact we need | |
282 | * to save & restore VSCR even if VRSAVE == 0). -- paulus | |
283 | * | |
284 | * On SMP we always save/restore altivec regs just to avoid the | |
285 | * complexity of changing processors. | |
286 | * -- Cort | |
287 | */ | |
288 | if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC)) | |
289 | giveup_altivec(prev); | |
14cf11af | 290 | #endif /* CONFIG_ALTIVEC */ |
ce48b210 MN |
291 | #ifdef CONFIG_VSX |
292 | if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX)) | |
293 | giveup_vsx(prev); | |
294 | #endif /* CONFIG_VSX */ | |
14cf11af PM |
295 | #ifdef CONFIG_SPE |
296 | /* | |
297 | * If the previous thread used spe in the last quantum | |
298 | * (thus changing spe regs) then save them. | |
299 | * | |
300 | * On SMP we always save/restore spe regs just to avoid the | |
301 | * complexity of changing processors. | |
302 | */ | |
303 | if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE))) | |
304 | giveup_spe(prev); | |
c0c0d996 PM |
305 | #endif /* CONFIG_SPE */ |
306 | ||
307 | #else /* CONFIG_SMP */ | |
308 | #ifdef CONFIG_ALTIVEC | |
309 | /* Avoid the trap. On smp this this never happens since | |
310 | * we don't set last_task_used_altivec -- Cort | |
311 | */ | |
312 | if (new->thread.regs && last_task_used_altivec == new) | |
313 | new->thread.regs->msr |= MSR_VEC; | |
314 | #endif /* CONFIG_ALTIVEC */ | |
ce48b210 MN |
315 | #ifdef CONFIG_VSX |
316 | if (new->thread.regs && last_task_used_vsx == new) | |
317 | new->thread.regs->msr |= MSR_VSX; | |
318 | #endif /* CONFIG_VSX */ | |
c0c0d996 | 319 | #ifdef CONFIG_SPE |
14cf11af PM |
320 | /* Avoid the trap. On smp this this never happens since |
321 | * we don't set last_task_used_spe | |
322 | */ | |
323 | if (new->thread.regs && last_task_used_spe == new) | |
324 | new->thread.regs->msr |= MSR_SPE; | |
325 | #endif /* CONFIG_SPE */ | |
c0c0d996 | 326 | |
14cf11af PM |
327 | #endif /* CONFIG_SMP */ |
328 | ||
a2ceff5e | 329 | if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr)) |
14cf11af | 330 | set_dabr(new->thread.dabr); |
14cf11af PM |
331 | |
332 | new_thread = &new->thread; | |
333 | old_thread = ¤t->thread; | |
06d67d54 PM |
334 | |
335 | #ifdef CONFIG_PPC64 | |
336 | /* | |
337 | * Collect processor utilization data per process | |
338 | */ | |
339 | if (firmware_has_feature(FW_FEATURE_SPLPAR)) { | |
340 | struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array); | |
341 | long unsigned start_tb, current_tb; | |
342 | start_tb = old_thread->start_tb; | |
343 | cu->current_tb = current_tb = mfspr(SPRN_PURR); | |
344 | old_thread->accum_tb += (current_tb - start_tb); | |
345 | new_thread->start_tb = current_tb; | |
346 | } | |
347 | #endif | |
348 | ||
14cf11af | 349 | local_irq_save(flags); |
c6622f63 PM |
350 | |
351 | account_system_vtime(current); | |
81a3843f | 352 | account_process_vtime(current); |
c6622f63 PM |
353 | calculate_steal_time(); |
354 | ||
44387e9f AB |
355 | /* |
356 | * We can't take a PMU exception inside _switch() since there is a | |
357 | * window where the kernel stack SLB and the kernel stack are out | |
358 | * of sync. Hard disable here. | |
359 | */ | |
360 | hard_irq_disable(); | |
14cf11af PM |
361 | last = _switch(old_thread, new_thread); |
362 | ||
363 | local_irq_restore(flags); | |
364 | ||
365 | return last; | |
366 | } | |
367 | ||
06d67d54 PM |
368 | static int instructions_to_print = 16; |
369 | ||
06d67d54 PM |
370 | static void show_instructions(struct pt_regs *regs) |
371 | { | |
372 | int i; | |
373 | unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 * | |
374 | sizeof(int)); | |
375 | ||
376 | printk("Instruction dump:"); | |
377 | ||
378 | for (i = 0; i < instructions_to_print; i++) { | |
379 | int instr; | |
380 | ||
381 | if (!(i % 8)) | |
382 | printk("\n"); | |
383 | ||
0de2d820 SW |
384 | #if !defined(CONFIG_BOOKE) |
385 | /* If executing with the IMMU off, adjust pc rather | |
386 | * than print XXXXXXXX. | |
387 | */ | |
388 | if (!(regs->msr & MSR_IR)) | |
389 | pc = (unsigned long)phys_to_virt(pc); | |
390 | #endif | |
391 | ||
af308377 SR |
392 | /* We use __get_user here *only* to avoid an OOPS on a |
393 | * bad address because the pc *should* only be a | |
394 | * kernel address. | |
395 | */ | |
00ae36de AB |
396 | if (!__kernel_text_address(pc) || |
397 | __get_user(instr, (unsigned int __user *)pc)) { | |
06d67d54 PM |
398 | printk("XXXXXXXX "); |
399 | } else { | |
400 | if (regs->nip == pc) | |
401 | printk("<%08x> ", instr); | |
402 | else | |
403 | printk("%08x ", instr); | |
404 | } | |
405 | ||
406 | pc += sizeof(int); | |
407 | } | |
408 | ||
409 | printk("\n"); | |
410 | } | |
411 | ||
412 | static struct regbit { | |
413 | unsigned long bit; | |
414 | const char *name; | |
415 | } msr_bits[] = { | |
416 | {MSR_EE, "EE"}, | |
417 | {MSR_PR, "PR"}, | |
418 | {MSR_FP, "FP"}, | |
ce48b210 MN |
419 | {MSR_VEC, "VEC"}, |
420 | {MSR_VSX, "VSX"}, | |
06d67d54 PM |
421 | {MSR_ME, "ME"}, |
422 | {MSR_IR, "IR"}, | |
423 | {MSR_DR, "DR"}, | |
424 | {0, NULL} | |
425 | }; | |
426 | ||
427 | static void printbits(unsigned long val, struct regbit *bits) | |
428 | { | |
429 | const char *sep = ""; | |
430 | ||
431 | printk("<"); | |
432 | for (; bits->bit; ++bits) | |
433 | if (val & bits->bit) { | |
434 | printk("%s%s", sep, bits->name); | |
435 | sep = ","; | |
436 | } | |
437 | printk(">"); | |
438 | } | |
439 | ||
440 | #ifdef CONFIG_PPC64 | |
f6f7dde3 | 441 | #define REG "%016lx" |
06d67d54 PM |
442 | #define REGS_PER_LINE 4 |
443 | #define LAST_VOLATILE 13 | |
444 | #else | |
f6f7dde3 | 445 | #define REG "%08lx" |
06d67d54 PM |
446 | #define REGS_PER_LINE 8 |
447 | #define LAST_VOLATILE 12 | |
448 | #endif | |
449 | ||
14cf11af PM |
450 | void show_regs(struct pt_regs * regs) |
451 | { | |
452 | int i, trap; | |
453 | ||
06d67d54 PM |
454 | printk("NIP: "REG" LR: "REG" CTR: "REG"\n", |
455 | regs->nip, regs->link, regs->ctr); | |
456 | printk("REGS: %p TRAP: %04lx %s (%s)\n", | |
96b644bd | 457 | regs, regs->trap, print_tainted(), init_utsname()->release); |
06d67d54 PM |
458 | printk("MSR: "REG" ", regs->msr); |
459 | printbits(regs->msr, msr_bits); | |
f6f7dde3 | 460 | printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); |
14cf11af PM |
461 | trap = TRAP(regs); |
462 | if (trap == 0x300 || trap == 0x600) | |
14170789 KG |
463 | #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) |
464 | printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr); | |
465 | #else | |
06d67d54 | 466 | printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr); |
14170789 | 467 | #endif |
06d67d54 | 468 | printk("TASK = %p[%d] '%s' THREAD: %p", |
19c5870c | 469 | current, task_pid_nr(current), current->comm, task_thread_info(current)); |
14cf11af PM |
470 | |
471 | #ifdef CONFIG_SMP | |
79ccd1be | 472 | printk(" CPU: %d", raw_smp_processor_id()); |
14cf11af PM |
473 | #endif /* CONFIG_SMP */ |
474 | ||
475 | for (i = 0; i < 32; i++) { | |
06d67d54 | 476 | if ((i % REGS_PER_LINE) == 0) |
14cf11af | 477 | printk("\n" KERN_INFO "GPR%02d: ", i); |
06d67d54 PM |
478 | printk(REG " ", regs->gpr[i]); |
479 | if (i == LAST_VOLATILE && !FULL_REGS(regs)) | |
14cf11af PM |
480 | break; |
481 | } | |
482 | printk("\n"); | |
483 | #ifdef CONFIG_KALLSYMS | |
484 | /* | |
485 | * Lookup NIP late so we have the best change of getting the | |
486 | * above info out without failing | |
487 | */ | |
06d67d54 | 488 | printk("NIP ["REG"] ", regs->nip); |
14cf11af | 489 | print_symbol("%s\n", regs->nip); |
06d67d54 | 490 | printk("LR ["REG"] ", regs->link); |
14cf11af PM |
491 | print_symbol("%s\n", regs->link); |
492 | #endif | |
493 | show_stack(current, (unsigned long *) regs->gpr[1]); | |
06d67d54 PM |
494 | if (!user_mode(regs)) |
495 | show_instructions(regs); | |
14cf11af PM |
496 | } |
497 | ||
498 | void exit_thread(void) | |
499 | { | |
48abec07 | 500 | discard_lazy_cpu_state(); |
14cf11af PM |
501 | } |
502 | ||
503 | void flush_thread(void) | |
504 | { | |
06d67d54 PM |
505 | #ifdef CONFIG_PPC64 |
506 | struct thread_info *t = current_thread_info(); | |
507 | ||
f144e7c7 MD |
508 | if (test_ti_thread_flag(t, TIF_ABI_PENDING)) { |
509 | clear_ti_thread_flag(t, TIF_ABI_PENDING); | |
510 | if (test_ti_thread_flag(t, TIF_32BIT)) | |
511 | clear_ti_thread_flag(t, TIF_32BIT); | |
512 | else | |
513 | set_ti_thread_flag(t, TIF_32BIT); | |
514 | } | |
06d67d54 | 515 | #endif |
06d67d54 | 516 | |
48abec07 | 517 | discard_lazy_cpu_state(); |
14cf11af | 518 | |
14cf11af PM |
519 | if (current->thread.dabr) { |
520 | current->thread.dabr = 0; | |
521 | set_dabr(0); | |
522 | } | |
14cf11af PM |
523 | } |
524 | ||
525 | void | |
526 | release_thread(struct task_struct *t) | |
527 | { | |
528 | } | |
529 | ||
530 | /* | |
531 | * This gets called before we allocate a new thread and copy | |
532 | * the current task into it. | |
533 | */ | |
534 | void prepare_to_copy(struct task_struct *tsk) | |
535 | { | |
536 | flush_fp_to_thread(current); | |
537 | flush_altivec_to_thread(current); | |
ce48b210 | 538 | flush_vsx_to_thread(current); |
14cf11af PM |
539 | flush_spe_to_thread(current); |
540 | } | |
541 | ||
542 | /* | |
543 | * Copy a thread.. | |
544 | */ | |
06d67d54 PM |
545 | int copy_thread(int nr, unsigned long clone_flags, unsigned long usp, |
546 | unsigned long unused, struct task_struct *p, | |
547 | struct pt_regs *regs) | |
14cf11af PM |
548 | { |
549 | struct pt_regs *childregs, *kregs; | |
550 | extern void ret_from_fork(void); | |
0cec6fd1 | 551 | unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; |
14cf11af PM |
552 | |
553 | CHECK_FULL_REGS(regs); | |
554 | /* Copy registers */ | |
555 | sp -= sizeof(struct pt_regs); | |
556 | childregs = (struct pt_regs *) sp; | |
557 | *childregs = *regs; | |
558 | if ((childregs->msr & MSR_PR) == 0) { | |
559 | /* for kernel thread, set `current' and stackptr in new task */ | |
560 | childregs->gpr[1] = sp + sizeof(struct pt_regs); | |
06d67d54 | 561 | #ifdef CONFIG_PPC32 |
14cf11af | 562 | childregs->gpr[2] = (unsigned long) p; |
06d67d54 | 563 | #else |
b5e2fc1c | 564 | clear_tsk_thread_flag(p, TIF_32BIT); |
06d67d54 | 565 | #endif |
14cf11af PM |
566 | p->thread.regs = NULL; /* no user register state */ |
567 | } else { | |
568 | childregs->gpr[1] = usp; | |
569 | p->thread.regs = childregs; | |
06d67d54 PM |
570 | if (clone_flags & CLONE_SETTLS) { |
571 | #ifdef CONFIG_PPC64 | |
572 | if (!test_thread_flag(TIF_32BIT)) | |
573 | childregs->gpr[13] = childregs->gpr[6]; | |
574 | else | |
575 | #endif | |
576 | childregs->gpr[2] = childregs->gpr[6]; | |
577 | } | |
14cf11af PM |
578 | } |
579 | childregs->gpr[3] = 0; /* Result from fork() */ | |
580 | sp -= STACK_FRAME_OVERHEAD; | |
14cf11af PM |
581 | |
582 | /* | |
583 | * The way this works is that at some point in the future | |
584 | * some task will call _switch to switch to the new task. | |
585 | * That will pop off the stack frame created below and start | |
586 | * the new task running at ret_from_fork. The new task will | |
587 | * do some house keeping and then return from the fork or clone | |
588 | * system call, using the stack frame created above. | |
589 | */ | |
590 | sp -= sizeof(struct pt_regs); | |
591 | kregs = (struct pt_regs *) sp; | |
592 | sp -= STACK_FRAME_OVERHEAD; | |
593 | p->thread.ksp = sp; | |
85218827 KG |
594 | p->thread.ksp_limit = (unsigned long)task_stack_page(p) + |
595 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
14cf11af | 596 | |
06d67d54 PM |
597 | #ifdef CONFIG_PPC64 |
598 | if (cpu_has_feature(CPU_FTR_SLB)) { | |
1189be65 | 599 | unsigned long sp_vsid; |
3c726f8d | 600 | unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; |
06d67d54 | 601 | |
1189be65 PM |
602 | if (cpu_has_feature(CPU_FTR_1T_SEGMENT)) |
603 | sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T) | |
604 | << SLB_VSID_SHIFT_1T; | |
605 | else | |
606 | sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M) | |
607 | << SLB_VSID_SHIFT; | |
3c726f8d | 608 | sp_vsid |= SLB_VSID_KERNEL | llp; |
06d67d54 PM |
609 | p->thread.ksp_vsid = sp_vsid; |
610 | } | |
611 | ||
612 | /* | |
613 | * The PPC64 ABI makes use of a TOC to contain function | |
614 | * pointers. The function (ret_from_except) is actually a pointer | |
615 | * to the TOC entry. The first entry is a pointer to the actual | |
616 | * function. | |
617 | */ | |
618 | kregs->nip = *((unsigned long *)ret_from_fork); | |
619 | #else | |
620 | kregs->nip = (unsigned long)ret_from_fork; | |
06d67d54 | 621 | #endif |
14cf11af PM |
622 | |
623 | return 0; | |
624 | } | |
625 | ||
626 | /* | |
627 | * Set up a thread for executing a new program | |
628 | */ | |
06d67d54 | 629 | void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) |
14cf11af | 630 | { |
90eac727 ME |
631 | #ifdef CONFIG_PPC64 |
632 | unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */ | |
633 | #endif | |
634 | ||
14cf11af | 635 | set_fs(USER_DS); |
06d67d54 PM |
636 | |
637 | /* | |
638 | * If we exec out of a kernel thread then thread.regs will not be | |
639 | * set. Do it now. | |
640 | */ | |
641 | if (!current->thread.regs) { | |
0cec6fd1 AV |
642 | struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE; |
643 | current->thread.regs = regs - 1; | |
06d67d54 PM |
644 | } |
645 | ||
14cf11af PM |
646 | memset(regs->gpr, 0, sizeof(regs->gpr)); |
647 | regs->ctr = 0; | |
648 | regs->link = 0; | |
649 | regs->xer = 0; | |
650 | regs->ccr = 0; | |
14cf11af | 651 | regs->gpr[1] = sp; |
06d67d54 | 652 | |
474f8196 RM |
653 | /* |
654 | * We have just cleared all the nonvolatile GPRs, so make | |
655 | * FULL_REGS(regs) return true. This is necessary to allow | |
656 | * ptrace to examine the thread immediately after exec. | |
657 | */ | |
658 | regs->trap &= ~1UL; | |
659 | ||
06d67d54 PM |
660 | #ifdef CONFIG_PPC32 |
661 | regs->mq = 0; | |
662 | regs->nip = start; | |
14cf11af | 663 | regs->msr = MSR_USER; |
06d67d54 | 664 | #else |
d4bf9a78 | 665 | if (!test_thread_flag(TIF_32BIT)) { |
90eac727 | 666 | unsigned long entry, toc; |
06d67d54 PM |
667 | |
668 | /* start is a relocated pointer to the function descriptor for | |
669 | * the elf _start routine. The first entry in the function | |
670 | * descriptor is the entry address of _start and the second | |
671 | * entry is the TOC value we need to use. | |
672 | */ | |
673 | __get_user(entry, (unsigned long __user *)start); | |
674 | __get_user(toc, (unsigned long __user *)start+1); | |
675 | ||
676 | /* Check whether the e_entry function descriptor entries | |
677 | * need to be relocated before we can use them. | |
678 | */ | |
679 | if (load_addr != 0) { | |
680 | entry += load_addr; | |
681 | toc += load_addr; | |
682 | } | |
683 | regs->nip = entry; | |
684 | regs->gpr[2] = toc; | |
685 | regs->msr = MSR_USER64; | |
d4bf9a78 SR |
686 | } else { |
687 | regs->nip = start; | |
688 | regs->gpr[2] = 0; | |
689 | regs->msr = MSR_USER32; | |
06d67d54 PM |
690 | } |
691 | #endif | |
692 | ||
48abec07 | 693 | discard_lazy_cpu_state(); |
ce48b210 MN |
694 | #ifdef CONFIG_VSX |
695 | current->thread.used_vsr = 0; | |
696 | #endif | |
14cf11af | 697 | memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); |
25c8a78b | 698 | current->thread.fpscr.val = 0; |
14cf11af PM |
699 | #ifdef CONFIG_ALTIVEC |
700 | memset(current->thread.vr, 0, sizeof(current->thread.vr)); | |
701 | memset(¤t->thread.vscr, 0, sizeof(current->thread.vscr)); | |
06d67d54 | 702 | current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */ |
14cf11af PM |
703 | current->thread.vrsave = 0; |
704 | current->thread.used_vr = 0; | |
705 | #endif /* CONFIG_ALTIVEC */ | |
706 | #ifdef CONFIG_SPE | |
707 | memset(current->thread.evr, 0, sizeof(current->thread.evr)); | |
708 | current->thread.acc = 0; | |
709 | current->thread.spefscr = 0; | |
710 | current->thread.used_spe = 0; | |
711 | #endif /* CONFIG_SPE */ | |
712 | } | |
713 | ||
714 | #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ | |
715 | | PR_FP_EXC_RES | PR_FP_EXC_INV) | |
716 | ||
717 | int set_fpexc_mode(struct task_struct *tsk, unsigned int val) | |
718 | { | |
719 | struct pt_regs *regs = tsk->thread.regs; | |
720 | ||
721 | /* This is a bit hairy. If we are an SPE enabled processor | |
722 | * (have embedded fp) we store the IEEE exception enable flags in | |
723 | * fpexc_mode. fpexc_mode is also used for setting FP exception | |
724 | * mode (asyn, precise, disabled) for 'Classic' FP. */ | |
725 | if (val & PR_FP_EXC_SW_ENABLE) { | |
726 | #ifdef CONFIG_SPE | |
5e14d21e KG |
727 | if (cpu_has_feature(CPU_FTR_SPE)) { |
728 | tsk->thread.fpexc_mode = val & | |
729 | (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT); | |
730 | return 0; | |
731 | } else { | |
732 | return -EINVAL; | |
733 | } | |
14cf11af PM |
734 | #else |
735 | return -EINVAL; | |
736 | #endif | |
14cf11af | 737 | } |
06d67d54 PM |
738 | |
739 | /* on a CONFIG_SPE this does not hurt us. The bits that | |
740 | * __pack_fe01 use do not overlap with bits used for | |
741 | * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits | |
742 | * on CONFIG_SPE implementations are reserved so writing to | |
743 | * them does not change anything */ | |
744 | if (val > PR_FP_EXC_PRECISE) | |
745 | return -EINVAL; | |
746 | tsk->thread.fpexc_mode = __pack_fe01(val); | |
747 | if (regs != NULL && (regs->msr & MSR_FP) != 0) | |
748 | regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1)) | |
749 | | tsk->thread.fpexc_mode; | |
14cf11af PM |
750 | return 0; |
751 | } | |
752 | ||
753 | int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) | |
754 | { | |
755 | unsigned int val; | |
756 | ||
757 | if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE) | |
758 | #ifdef CONFIG_SPE | |
5e14d21e KG |
759 | if (cpu_has_feature(CPU_FTR_SPE)) |
760 | val = tsk->thread.fpexc_mode; | |
761 | else | |
762 | return -EINVAL; | |
14cf11af PM |
763 | #else |
764 | return -EINVAL; | |
765 | #endif | |
766 | else | |
767 | val = __unpack_fe01(tsk->thread.fpexc_mode); | |
768 | return put_user(val, (unsigned int __user *) adr); | |
769 | } | |
770 | ||
fab5db97 PM |
771 | int set_endian(struct task_struct *tsk, unsigned int val) |
772 | { | |
773 | struct pt_regs *regs = tsk->thread.regs; | |
774 | ||
775 | if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) || | |
776 | (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE))) | |
777 | return -EINVAL; | |
778 | ||
779 | if (regs == NULL) | |
780 | return -EINVAL; | |
781 | ||
782 | if (val == PR_ENDIAN_BIG) | |
783 | regs->msr &= ~MSR_LE; | |
784 | else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE) | |
785 | regs->msr |= MSR_LE; | |
786 | else | |
787 | return -EINVAL; | |
788 | ||
789 | return 0; | |
790 | } | |
791 | ||
792 | int get_endian(struct task_struct *tsk, unsigned long adr) | |
793 | { | |
794 | struct pt_regs *regs = tsk->thread.regs; | |
795 | unsigned int val; | |
796 | ||
797 | if (!cpu_has_feature(CPU_FTR_PPC_LE) && | |
798 | !cpu_has_feature(CPU_FTR_REAL_LE)) | |
799 | return -EINVAL; | |
800 | ||
801 | if (regs == NULL) | |
802 | return -EINVAL; | |
803 | ||
804 | if (regs->msr & MSR_LE) { | |
805 | if (cpu_has_feature(CPU_FTR_REAL_LE)) | |
806 | val = PR_ENDIAN_LITTLE; | |
807 | else | |
808 | val = PR_ENDIAN_PPC_LITTLE; | |
809 | } else | |
810 | val = PR_ENDIAN_BIG; | |
811 | ||
812 | return put_user(val, (unsigned int __user *)adr); | |
813 | } | |
814 | ||
e9370ae1 PM |
815 | int set_unalign_ctl(struct task_struct *tsk, unsigned int val) |
816 | { | |
817 | tsk->thread.align_ctl = val; | |
818 | return 0; | |
819 | } | |
820 | ||
821 | int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) | |
822 | { | |
823 | return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr); | |
824 | } | |
825 | ||
06d67d54 PM |
826 | #define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff)) |
827 | ||
14cf11af PM |
828 | int sys_clone(unsigned long clone_flags, unsigned long usp, |
829 | int __user *parent_tidp, void __user *child_threadptr, | |
830 | int __user *child_tidp, int p6, | |
831 | struct pt_regs *regs) | |
832 | { | |
833 | CHECK_FULL_REGS(regs); | |
834 | if (usp == 0) | |
835 | usp = regs->gpr[1]; /* stack pointer for child */ | |
06d67d54 PM |
836 | #ifdef CONFIG_PPC64 |
837 | if (test_thread_flag(TIF_32BIT)) { | |
838 | parent_tidp = TRUNC_PTR(parent_tidp); | |
839 | child_tidp = TRUNC_PTR(child_tidp); | |
840 | } | |
841 | #endif | |
14cf11af PM |
842 | return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp); |
843 | } | |
844 | ||
845 | int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3, | |
846 | unsigned long p4, unsigned long p5, unsigned long p6, | |
847 | struct pt_regs *regs) | |
848 | { | |
849 | CHECK_FULL_REGS(regs); | |
850 | return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL); | |
851 | } | |
852 | ||
853 | int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3, | |
854 | unsigned long p4, unsigned long p5, unsigned long p6, | |
855 | struct pt_regs *regs) | |
856 | { | |
857 | CHECK_FULL_REGS(regs); | |
858 | return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1], | |
859 | regs, 0, NULL, NULL); | |
860 | } | |
861 | ||
862 | int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2, | |
863 | unsigned long a3, unsigned long a4, unsigned long a5, | |
864 | struct pt_regs *regs) | |
865 | { | |
866 | int error; | |
06d67d54 | 867 | char *filename; |
14cf11af PM |
868 | |
869 | filename = getname((char __user *) a0); | |
870 | error = PTR_ERR(filename); | |
871 | if (IS_ERR(filename)) | |
872 | goto out; | |
873 | flush_fp_to_thread(current); | |
874 | flush_altivec_to_thread(current); | |
875 | flush_spe_to_thread(current); | |
20c8c210 PM |
876 | error = do_execve(filename, (char __user * __user *) a1, |
877 | (char __user * __user *) a2, regs); | |
14cf11af PM |
878 | putname(filename); |
879 | out: | |
880 | return error; | |
881 | } | |
882 | ||
bb72c481 PM |
883 | #ifdef CONFIG_IRQSTACKS |
884 | static inline int valid_irq_stack(unsigned long sp, struct task_struct *p, | |
885 | unsigned long nbytes) | |
886 | { | |
887 | unsigned long stack_page; | |
888 | unsigned long cpu = task_cpu(p); | |
889 | ||
890 | /* | |
891 | * Avoid crashing if the stack has overflowed and corrupted | |
892 | * task_cpu(p), which is in the thread_info struct. | |
893 | */ | |
894 | if (cpu < NR_CPUS && cpu_possible(cpu)) { | |
895 | stack_page = (unsigned long) hardirq_ctx[cpu]; | |
896 | if (sp >= stack_page + sizeof(struct thread_struct) | |
897 | && sp <= stack_page + THREAD_SIZE - nbytes) | |
898 | return 1; | |
899 | ||
900 | stack_page = (unsigned long) softirq_ctx[cpu]; | |
901 | if (sp >= stack_page + sizeof(struct thread_struct) | |
902 | && sp <= stack_page + THREAD_SIZE - nbytes) | |
903 | return 1; | |
904 | } | |
905 | return 0; | |
906 | } | |
907 | ||
908 | #else | |
909 | #define valid_irq_stack(sp, p, nb) 0 | |
910 | #endif /* CONFIG_IRQSTACKS */ | |
911 | ||
2f25194d | 912 | int validate_sp(unsigned long sp, struct task_struct *p, |
14cf11af PM |
913 | unsigned long nbytes) |
914 | { | |
0cec6fd1 | 915 | unsigned long stack_page = (unsigned long)task_stack_page(p); |
14cf11af PM |
916 | |
917 | if (sp >= stack_page + sizeof(struct thread_struct) | |
918 | && sp <= stack_page + THREAD_SIZE - nbytes) | |
919 | return 1; | |
920 | ||
bb72c481 | 921 | return valid_irq_stack(sp, p, nbytes); |
14cf11af PM |
922 | } |
923 | ||
2f25194d AB |
924 | EXPORT_SYMBOL(validate_sp); |
925 | ||
14cf11af PM |
926 | unsigned long get_wchan(struct task_struct *p) |
927 | { | |
928 | unsigned long ip, sp; | |
929 | int count = 0; | |
930 | ||
931 | if (!p || p == current || p->state == TASK_RUNNING) | |
932 | return 0; | |
933 | ||
934 | sp = p->thread.ksp; | |
ec2b36b9 | 935 | if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) |
14cf11af PM |
936 | return 0; |
937 | ||
938 | do { | |
939 | sp = *(unsigned long *)sp; | |
ec2b36b9 | 940 | if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) |
14cf11af PM |
941 | return 0; |
942 | if (count > 0) { | |
ec2b36b9 | 943 | ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE]; |
14cf11af PM |
944 | if (!in_sched_functions(ip)) |
945 | return ip; | |
946 | } | |
947 | } while (count++ < 16); | |
948 | return 0; | |
949 | } | |
06d67d54 PM |
950 | |
951 | static int kstack_depth_to_print = 64; | |
952 | ||
953 | void show_stack(struct task_struct *tsk, unsigned long *stack) | |
954 | { | |
955 | unsigned long sp, ip, lr, newsp; | |
956 | int count = 0; | |
957 | int firstframe = 1; | |
958 | ||
959 | sp = (unsigned long) stack; | |
960 | if (tsk == NULL) | |
961 | tsk = current; | |
962 | if (sp == 0) { | |
963 | if (tsk == current) | |
964 | asm("mr %0,1" : "=r" (sp)); | |
965 | else | |
966 | sp = tsk->thread.ksp; | |
967 | } | |
968 | ||
969 | lr = 0; | |
970 | printk("Call Trace:\n"); | |
971 | do { | |
ec2b36b9 | 972 | if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) |
06d67d54 PM |
973 | return; |
974 | ||
975 | stack = (unsigned long *) sp; | |
976 | newsp = stack[0]; | |
ec2b36b9 | 977 | ip = stack[STACK_FRAME_LR_SAVE]; |
06d67d54 PM |
978 | if (!firstframe || ip != lr) { |
979 | printk("["REG"] ["REG"] ", sp, ip); | |
980 | print_symbol("%s", ip); | |
981 | if (firstframe) | |
982 | printk(" (unreliable)"); | |
983 | printk("\n"); | |
984 | } | |
985 | firstframe = 0; | |
986 | ||
987 | /* | |
988 | * See if this is an exception frame. | |
989 | * We look for the "regshere" marker in the current frame. | |
990 | */ | |
ec2b36b9 BH |
991 | if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE) |
992 | && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { | |
06d67d54 PM |
993 | struct pt_regs *regs = (struct pt_regs *) |
994 | (sp + STACK_FRAME_OVERHEAD); | |
995 | printk("--- Exception: %lx", regs->trap); | |
996 | print_symbol(" at %s\n", regs->nip); | |
997 | lr = regs->link; | |
998 | print_symbol(" LR = %s\n", lr); | |
999 | firstframe = 1; | |
1000 | } | |
1001 | ||
1002 | sp = newsp; | |
1003 | } while (count++ < kstack_depth_to_print); | |
1004 | } | |
1005 | ||
1006 | void dump_stack(void) | |
1007 | { | |
1008 | show_stack(current, NULL); | |
1009 | } | |
1010 | EXPORT_SYMBOL(dump_stack); | |
cb2c9b27 AB |
1011 | |
1012 | #ifdef CONFIG_PPC64 | |
1013 | void ppc64_runlatch_on(void) | |
1014 | { | |
1015 | unsigned long ctrl; | |
1016 | ||
1017 | if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) { | |
1018 | HMT_medium(); | |
1019 | ||
1020 | ctrl = mfspr(SPRN_CTRLF); | |
1021 | ctrl |= CTRL_RUNLATCH; | |
1022 | mtspr(SPRN_CTRLT, ctrl); | |
1023 | ||
1024 | set_thread_flag(TIF_RUNLATCH); | |
1025 | } | |
1026 | } | |
1027 | ||
1028 | void ppc64_runlatch_off(void) | |
1029 | { | |
1030 | unsigned long ctrl; | |
1031 | ||
1032 | if (cpu_has_feature(CPU_FTR_CTRL) && test_thread_flag(TIF_RUNLATCH)) { | |
1033 | HMT_medium(); | |
1034 | ||
1035 | clear_thread_flag(TIF_RUNLATCH); | |
1036 | ||
1037 | ctrl = mfspr(SPRN_CTRLF); | |
1038 | ctrl &= ~CTRL_RUNLATCH; | |
1039 | mtspr(SPRN_CTRLT, ctrl); | |
1040 | } | |
1041 | } | |
1042 | #endif | |
f6a61680 BH |
1043 | |
1044 | #if THREAD_SHIFT < PAGE_SHIFT | |
1045 | ||
1046 | static struct kmem_cache *thread_info_cache; | |
1047 | ||
1048 | struct thread_info *alloc_thread_info(struct task_struct *tsk) | |
1049 | { | |
1050 | struct thread_info *ti; | |
1051 | ||
1052 | ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL); | |
1053 | if (unlikely(ti == NULL)) | |
1054 | return NULL; | |
1055 | #ifdef CONFIG_DEBUG_STACK_USAGE | |
1056 | memset(ti, 0, THREAD_SIZE); | |
1057 | #endif | |
1058 | return ti; | |
1059 | } | |
1060 | ||
1061 | void free_thread_info(struct thread_info *ti) | |
1062 | { | |
1063 | kmem_cache_free(thread_info_cache, ti); | |
1064 | } | |
1065 | ||
1066 | void thread_info_cache_init(void) | |
1067 | { | |
1068 | thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE, | |
1069 | THREAD_SIZE, 0, NULL); | |
1070 | BUG_ON(thread_info_cache == NULL); | |
1071 | } | |
1072 | ||
1073 | #endif /* THREAD_SHIFT < PAGE_SHIFT */ |