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14cf11af | 1 | /* |
14cf11af PM |
2 | * Derived from "arch/i386/kernel/process.c" |
3 | * Copyright (C) 1995 Linus Torvalds | |
4 | * | |
5 | * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and | |
6 | * Paul Mackerras (paulus@cs.anu.edu.au) | |
7 | * | |
8 | * PowerPC version | |
9 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | */ | |
16 | ||
14cf11af PM |
17 | #include <linux/errno.h> |
18 | #include <linux/sched.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/mm.h> | |
21 | #include <linux/smp.h> | |
14cf11af PM |
22 | #include <linux/stddef.h> |
23 | #include <linux/unistd.h> | |
24 | #include <linux/ptrace.h> | |
25 | #include <linux/slab.h> | |
26 | #include <linux/user.h> | |
27 | #include <linux/elf.h> | |
28 | #include <linux/init.h> | |
29 | #include <linux/prctl.h> | |
30 | #include <linux/init_task.h> | |
31 | #include <linux/module.h> | |
32 | #include <linux/kallsyms.h> | |
33 | #include <linux/mqueue.h> | |
34 | #include <linux/hardirq.h> | |
06d67d54 | 35 | #include <linux/utsname.h> |
14cf11af PM |
36 | |
37 | #include <asm/pgtable.h> | |
38 | #include <asm/uaccess.h> | |
39 | #include <asm/system.h> | |
40 | #include <asm/io.h> | |
41 | #include <asm/processor.h> | |
42 | #include <asm/mmu.h> | |
43 | #include <asm/prom.h> | |
76032de8 | 44 | #include <asm/machdep.h> |
c6622f63 | 45 | #include <asm/time.h> |
a7f31841 | 46 | #include <asm/syscalls.h> |
06d67d54 PM |
47 | #ifdef CONFIG_PPC64 |
48 | #include <asm/firmware.h> | |
06d67d54 | 49 | #endif |
14cf11af PM |
50 | |
51 | extern unsigned long _get_SP(void); | |
52 | ||
53 | #ifndef CONFIG_SMP | |
54 | struct task_struct *last_task_used_math = NULL; | |
55 | struct task_struct *last_task_used_altivec = NULL; | |
56 | struct task_struct *last_task_used_spe = NULL; | |
57 | #endif | |
58 | ||
14cf11af PM |
59 | /* |
60 | * Make sure the floating-point register state in the | |
61 | * the thread_struct is up to date for task tsk. | |
62 | */ | |
63 | void flush_fp_to_thread(struct task_struct *tsk) | |
64 | { | |
65 | if (tsk->thread.regs) { | |
66 | /* | |
67 | * We need to disable preemption here because if we didn't, | |
68 | * another process could get scheduled after the regs->msr | |
69 | * test but before we have finished saving the FP registers | |
70 | * to the thread_struct. That process could take over the | |
71 | * FPU, and then when we get scheduled again we would store | |
72 | * bogus values for the remaining FP registers. | |
73 | */ | |
74 | preempt_disable(); | |
75 | if (tsk->thread.regs->msr & MSR_FP) { | |
76 | #ifdef CONFIG_SMP | |
77 | /* | |
78 | * This should only ever be called for current or | |
79 | * for a stopped child process. Since we save away | |
80 | * the FP register state on context switch on SMP, | |
81 | * there is something wrong if a stopped child appears | |
82 | * to still have its FP state in the CPU registers. | |
83 | */ | |
84 | BUG_ON(tsk != current); | |
85 | #endif | |
0ee6c15e | 86 | giveup_fpu(tsk); |
14cf11af PM |
87 | } |
88 | preempt_enable(); | |
89 | } | |
90 | } | |
91 | ||
92 | void enable_kernel_fp(void) | |
93 | { | |
94 | WARN_ON(preemptible()); | |
95 | ||
96 | #ifdef CONFIG_SMP | |
97 | if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) | |
98 | giveup_fpu(current); | |
99 | else | |
100 | giveup_fpu(NULL); /* just enables FP for kernel */ | |
101 | #else | |
102 | giveup_fpu(last_task_used_math); | |
103 | #endif /* CONFIG_SMP */ | |
104 | } | |
105 | EXPORT_SYMBOL(enable_kernel_fp); | |
106 | ||
107 | int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs) | |
108 | { | |
109 | if (!tsk->thread.regs) | |
110 | return 0; | |
111 | flush_fp_to_thread(current); | |
112 | ||
113 | memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs)); | |
114 | ||
115 | return 1; | |
116 | } | |
117 | ||
118 | #ifdef CONFIG_ALTIVEC | |
119 | void enable_kernel_altivec(void) | |
120 | { | |
121 | WARN_ON(preemptible()); | |
122 | ||
123 | #ifdef CONFIG_SMP | |
124 | if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) | |
125 | giveup_altivec(current); | |
126 | else | |
127 | giveup_altivec(NULL); /* just enable AltiVec for kernel - force */ | |
128 | #else | |
129 | giveup_altivec(last_task_used_altivec); | |
130 | #endif /* CONFIG_SMP */ | |
131 | } | |
132 | EXPORT_SYMBOL(enable_kernel_altivec); | |
133 | ||
134 | /* | |
135 | * Make sure the VMX/Altivec register state in the | |
136 | * the thread_struct is up to date for task tsk. | |
137 | */ | |
138 | void flush_altivec_to_thread(struct task_struct *tsk) | |
139 | { | |
140 | if (tsk->thread.regs) { | |
141 | preempt_disable(); | |
142 | if (tsk->thread.regs->msr & MSR_VEC) { | |
143 | #ifdef CONFIG_SMP | |
144 | BUG_ON(tsk != current); | |
145 | #endif | |
0ee6c15e | 146 | giveup_altivec(tsk); |
14cf11af PM |
147 | } |
148 | preempt_enable(); | |
149 | } | |
150 | } | |
151 | ||
152 | int dump_task_altivec(struct pt_regs *regs, elf_vrregset_t *vrregs) | |
153 | { | |
154 | flush_altivec_to_thread(current); | |
155 | memcpy(vrregs, ¤t->thread.vr[0], sizeof(*vrregs)); | |
156 | return 1; | |
157 | } | |
158 | #endif /* CONFIG_ALTIVEC */ | |
159 | ||
160 | #ifdef CONFIG_SPE | |
161 | ||
162 | void enable_kernel_spe(void) | |
163 | { | |
164 | WARN_ON(preemptible()); | |
165 | ||
166 | #ifdef CONFIG_SMP | |
167 | if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) | |
168 | giveup_spe(current); | |
169 | else | |
170 | giveup_spe(NULL); /* just enable SPE for kernel - force */ | |
171 | #else | |
172 | giveup_spe(last_task_used_spe); | |
173 | #endif /* __SMP __ */ | |
174 | } | |
175 | EXPORT_SYMBOL(enable_kernel_spe); | |
176 | ||
177 | void flush_spe_to_thread(struct task_struct *tsk) | |
178 | { | |
179 | if (tsk->thread.regs) { | |
180 | preempt_disable(); | |
181 | if (tsk->thread.regs->msr & MSR_SPE) { | |
182 | #ifdef CONFIG_SMP | |
183 | BUG_ON(tsk != current); | |
184 | #endif | |
0ee6c15e | 185 | giveup_spe(tsk); |
14cf11af PM |
186 | } |
187 | preempt_enable(); | |
188 | } | |
189 | } | |
190 | ||
191 | int dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs) | |
192 | { | |
193 | flush_spe_to_thread(current); | |
194 | /* We copy u32 evr[32] + u64 acc + u32 spefscr -> 35 */ | |
195 | memcpy(evrregs, ¤t->thread.evr[0], sizeof(u32) * 35); | |
196 | return 1; | |
197 | } | |
198 | #endif /* CONFIG_SPE */ | |
199 | ||
5388fb10 | 200 | #ifndef CONFIG_SMP |
48abec07 PM |
201 | /* |
202 | * If we are doing lazy switching of CPU state (FP, altivec or SPE), | |
203 | * and the current task has some state, discard it. | |
204 | */ | |
5388fb10 | 205 | void discard_lazy_cpu_state(void) |
48abec07 | 206 | { |
48abec07 PM |
207 | preempt_disable(); |
208 | if (last_task_used_math == current) | |
209 | last_task_used_math = NULL; | |
210 | #ifdef CONFIG_ALTIVEC | |
211 | if (last_task_used_altivec == current) | |
212 | last_task_used_altivec = NULL; | |
213 | #endif /* CONFIG_ALTIVEC */ | |
214 | #ifdef CONFIG_SPE | |
215 | if (last_task_used_spe == current) | |
216 | last_task_used_spe = NULL; | |
217 | #endif | |
218 | preempt_enable(); | |
48abec07 | 219 | } |
5388fb10 | 220 | #endif /* CONFIG_SMP */ |
48abec07 | 221 | |
14cf11af PM |
222 | int set_dabr(unsigned long dabr) |
223 | { | |
791cc501 | 224 | #ifdef CONFIG_PPC_MERGE /* XXX for now */ |
cab0af98 ME |
225 | if (ppc_md.set_dabr) |
226 | return ppc_md.set_dabr(dabr); | |
791cc501 | 227 | #endif |
14cf11af | 228 | |
791cc501 BH |
229 | /* XXX should we have a CPU_FTR_HAS_DABR ? */ |
230 | #if defined(CONFIG_PPC64) || defined(CONFIG_6xx) | |
cab0af98 | 231 | mtspr(SPRN_DABR, dabr); |
791cc501 | 232 | #endif |
cab0af98 | 233 | return 0; |
14cf11af PM |
234 | } |
235 | ||
06d67d54 PM |
236 | #ifdef CONFIG_PPC64 |
237 | DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array); | |
06d67d54 | 238 | #endif |
14cf11af | 239 | |
791cc501 BH |
240 | static DEFINE_PER_CPU(unsigned long, current_dabr); |
241 | ||
14cf11af PM |
242 | struct task_struct *__switch_to(struct task_struct *prev, |
243 | struct task_struct *new) | |
244 | { | |
245 | struct thread_struct *new_thread, *old_thread; | |
246 | unsigned long flags; | |
247 | struct task_struct *last; | |
248 | ||
249 | #ifdef CONFIG_SMP | |
250 | /* avoid complexity of lazy save/restore of fpu | |
251 | * by just saving it every time we switch out if | |
252 | * this task used the fpu during the last quantum. | |
253 | * | |
254 | * If it tries to use the fpu again, it'll trap and | |
255 | * reload its fp regs. So we don't have to do a restore | |
256 | * every switch, just a save. | |
257 | * -- Cort | |
258 | */ | |
259 | if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP)) | |
260 | giveup_fpu(prev); | |
261 | #ifdef CONFIG_ALTIVEC | |
262 | /* | |
263 | * If the previous thread used altivec in the last quantum | |
264 | * (thus changing altivec regs) then save them. | |
265 | * We used to check the VRSAVE register but not all apps | |
266 | * set it, so we don't rely on it now (and in fact we need | |
267 | * to save & restore VSCR even if VRSAVE == 0). -- paulus | |
268 | * | |
269 | * On SMP we always save/restore altivec regs just to avoid the | |
270 | * complexity of changing processors. | |
271 | * -- Cort | |
272 | */ | |
273 | if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC)) | |
274 | giveup_altivec(prev); | |
14cf11af PM |
275 | #endif /* CONFIG_ALTIVEC */ |
276 | #ifdef CONFIG_SPE | |
277 | /* | |
278 | * If the previous thread used spe in the last quantum | |
279 | * (thus changing spe regs) then save them. | |
280 | * | |
281 | * On SMP we always save/restore spe regs just to avoid the | |
282 | * complexity of changing processors. | |
283 | */ | |
284 | if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE))) | |
285 | giveup_spe(prev); | |
c0c0d996 PM |
286 | #endif /* CONFIG_SPE */ |
287 | ||
288 | #else /* CONFIG_SMP */ | |
289 | #ifdef CONFIG_ALTIVEC | |
290 | /* Avoid the trap. On smp this this never happens since | |
291 | * we don't set last_task_used_altivec -- Cort | |
292 | */ | |
293 | if (new->thread.regs && last_task_used_altivec == new) | |
294 | new->thread.regs->msr |= MSR_VEC; | |
295 | #endif /* CONFIG_ALTIVEC */ | |
296 | #ifdef CONFIG_SPE | |
14cf11af PM |
297 | /* Avoid the trap. On smp this this never happens since |
298 | * we don't set last_task_used_spe | |
299 | */ | |
300 | if (new->thread.regs && last_task_used_spe == new) | |
301 | new->thread.regs->msr |= MSR_SPE; | |
302 | #endif /* CONFIG_SPE */ | |
c0c0d996 | 303 | |
14cf11af PM |
304 | #endif /* CONFIG_SMP */ |
305 | ||
14cf11af PM |
306 | if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr)) { |
307 | set_dabr(new->thread.dabr); | |
308 | __get_cpu_var(current_dabr) = new->thread.dabr; | |
309 | } | |
14cf11af PM |
310 | |
311 | new_thread = &new->thread; | |
312 | old_thread = ¤t->thread; | |
06d67d54 PM |
313 | |
314 | #ifdef CONFIG_PPC64 | |
315 | /* | |
316 | * Collect processor utilization data per process | |
317 | */ | |
318 | if (firmware_has_feature(FW_FEATURE_SPLPAR)) { | |
319 | struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array); | |
320 | long unsigned start_tb, current_tb; | |
321 | start_tb = old_thread->start_tb; | |
322 | cu->current_tb = current_tb = mfspr(SPRN_PURR); | |
323 | old_thread->accum_tb += (current_tb - start_tb); | |
324 | new_thread->start_tb = current_tb; | |
325 | } | |
326 | #endif | |
327 | ||
14cf11af | 328 | local_irq_save(flags); |
c6622f63 PM |
329 | |
330 | account_system_vtime(current); | |
331 | account_process_vtime(current); | |
332 | calculate_steal_time(); | |
333 | ||
14cf11af PM |
334 | last = _switch(old_thread, new_thread); |
335 | ||
336 | local_irq_restore(flags); | |
337 | ||
338 | return last; | |
339 | } | |
340 | ||
06d67d54 PM |
341 | static int instructions_to_print = 16; |
342 | ||
06d67d54 PM |
343 | static void show_instructions(struct pt_regs *regs) |
344 | { | |
345 | int i; | |
346 | unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 * | |
347 | sizeof(int)); | |
348 | ||
349 | printk("Instruction dump:"); | |
350 | ||
351 | for (i = 0; i < instructions_to_print; i++) { | |
352 | int instr; | |
353 | ||
354 | if (!(i % 8)) | |
355 | printk("\n"); | |
356 | ||
af308377 SR |
357 | /* We use __get_user here *only* to avoid an OOPS on a |
358 | * bad address because the pc *should* only be a | |
359 | * kernel address. | |
360 | */ | |
00ae36de AB |
361 | if (!__kernel_text_address(pc) || |
362 | __get_user(instr, (unsigned int __user *)pc)) { | |
06d67d54 PM |
363 | printk("XXXXXXXX "); |
364 | } else { | |
365 | if (regs->nip == pc) | |
366 | printk("<%08x> ", instr); | |
367 | else | |
368 | printk("%08x ", instr); | |
369 | } | |
370 | ||
371 | pc += sizeof(int); | |
372 | } | |
373 | ||
374 | printk("\n"); | |
375 | } | |
376 | ||
377 | static struct regbit { | |
378 | unsigned long bit; | |
379 | const char *name; | |
380 | } msr_bits[] = { | |
381 | {MSR_EE, "EE"}, | |
382 | {MSR_PR, "PR"}, | |
383 | {MSR_FP, "FP"}, | |
384 | {MSR_ME, "ME"}, | |
385 | {MSR_IR, "IR"}, | |
386 | {MSR_DR, "DR"}, | |
387 | {0, NULL} | |
388 | }; | |
389 | ||
390 | static void printbits(unsigned long val, struct regbit *bits) | |
391 | { | |
392 | const char *sep = ""; | |
393 | ||
394 | printk("<"); | |
395 | for (; bits->bit; ++bits) | |
396 | if (val & bits->bit) { | |
397 | printk("%s%s", sep, bits->name); | |
398 | sep = ","; | |
399 | } | |
400 | printk(">"); | |
401 | } | |
402 | ||
403 | #ifdef CONFIG_PPC64 | |
f6f7dde3 | 404 | #define REG "%016lx" |
06d67d54 PM |
405 | #define REGS_PER_LINE 4 |
406 | #define LAST_VOLATILE 13 | |
407 | #else | |
f6f7dde3 | 408 | #define REG "%08lx" |
06d67d54 PM |
409 | #define REGS_PER_LINE 8 |
410 | #define LAST_VOLATILE 12 | |
411 | #endif | |
412 | ||
14cf11af PM |
413 | void show_regs(struct pt_regs * regs) |
414 | { | |
415 | int i, trap; | |
416 | ||
06d67d54 PM |
417 | printk("NIP: "REG" LR: "REG" CTR: "REG"\n", |
418 | regs->nip, regs->link, regs->ctr); | |
419 | printk("REGS: %p TRAP: %04lx %s (%s)\n", | |
96b644bd | 420 | regs, regs->trap, print_tainted(), init_utsname()->release); |
06d67d54 PM |
421 | printk("MSR: "REG" ", regs->msr); |
422 | printbits(regs->msr, msr_bits); | |
f6f7dde3 | 423 | printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); |
14cf11af PM |
424 | trap = TRAP(regs); |
425 | if (trap == 0x300 || trap == 0x600) | |
14170789 KG |
426 | #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) |
427 | printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr); | |
428 | #else | |
06d67d54 | 429 | printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr); |
14170789 | 430 | #endif |
06d67d54 | 431 | printk("TASK = %p[%d] '%s' THREAD: %p", |
b5e2fc1c | 432 | current, current->pid, current->comm, task_thread_info(current)); |
14cf11af PM |
433 | |
434 | #ifdef CONFIG_SMP | |
435 | printk(" CPU: %d", smp_processor_id()); | |
436 | #endif /* CONFIG_SMP */ | |
437 | ||
438 | for (i = 0; i < 32; i++) { | |
06d67d54 | 439 | if ((i % REGS_PER_LINE) == 0) |
14cf11af | 440 | printk("\n" KERN_INFO "GPR%02d: ", i); |
06d67d54 PM |
441 | printk(REG " ", regs->gpr[i]); |
442 | if (i == LAST_VOLATILE && !FULL_REGS(regs)) | |
14cf11af PM |
443 | break; |
444 | } | |
445 | printk("\n"); | |
446 | #ifdef CONFIG_KALLSYMS | |
447 | /* | |
448 | * Lookup NIP late so we have the best change of getting the | |
449 | * above info out without failing | |
450 | */ | |
06d67d54 | 451 | printk("NIP ["REG"] ", regs->nip); |
14cf11af | 452 | print_symbol("%s\n", regs->nip); |
06d67d54 | 453 | printk("LR ["REG"] ", regs->link); |
14cf11af PM |
454 | print_symbol("%s\n", regs->link); |
455 | #endif | |
456 | show_stack(current, (unsigned long *) regs->gpr[1]); | |
06d67d54 PM |
457 | if (!user_mode(regs)) |
458 | show_instructions(regs); | |
14cf11af PM |
459 | } |
460 | ||
461 | void exit_thread(void) | |
462 | { | |
48abec07 | 463 | discard_lazy_cpu_state(); |
14cf11af PM |
464 | } |
465 | ||
466 | void flush_thread(void) | |
467 | { | |
06d67d54 PM |
468 | #ifdef CONFIG_PPC64 |
469 | struct thread_info *t = current_thread_info(); | |
470 | ||
f144e7c7 MD |
471 | if (test_ti_thread_flag(t, TIF_ABI_PENDING)) { |
472 | clear_ti_thread_flag(t, TIF_ABI_PENDING); | |
473 | if (test_ti_thread_flag(t, TIF_32BIT)) | |
474 | clear_ti_thread_flag(t, TIF_32BIT); | |
475 | else | |
476 | set_ti_thread_flag(t, TIF_32BIT); | |
477 | } | |
06d67d54 | 478 | #endif |
06d67d54 | 479 | |
48abec07 | 480 | discard_lazy_cpu_state(); |
14cf11af | 481 | |
14cf11af PM |
482 | if (current->thread.dabr) { |
483 | current->thread.dabr = 0; | |
484 | set_dabr(0); | |
485 | } | |
14cf11af PM |
486 | } |
487 | ||
488 | void | |
489 | release_thread(struct task_struct *t) | |
490 | { | |
491 | } | |
492 | ||
493 | /* | |
494 | * This gets called before we allocate a new thread and copy | |
495 | * the current task into it. | |
496 | */ | |
497 | void prepare_to_copy(struct task_struct *tsk) | |
498 | { | |
499 | flush_fp_to_thread(current); | |
500 | flush_altivec_to_thread(current); | |
501 | flush_spe_to_thread(current); | |
502 | } | |
503 | ||
504 | /* | |
505 | * Copy a thread.. | |
506 | */ | |
06d67d54 PM |
507 | int copy_thread(int nr, unsigned long clone_flags, unsigned long usp, |
508 | unsigned long unused, struct task_struct *p, | |
509 | struct pt_regs *regs) | |
14cf11af PM |
510 | { |
511 | struct pt_regs *childregs, *kregs; | |
512 | extern void ret_from_fork(void); | |
0cec6fd1 | 513 | unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; |
14cf11af PM |
514 | |
515 | CHECK_FULL_REGS(regs); | |
516 | /* Copy registers */ | |
517 | sp -= sizeof(struct pt_regs); | |
518 | childregs = (struct pt_regs *) sp; | |
519 | *childregs = *regs; | |
520 | if ((childregs->msr & MSR_PR) == 0) { | |
521 | /* for kernel thread, set `current' and stackptr in new task */ | |
522 | childregs->gpr[1] = sp + sizeof(struct pt_regs); | |
06d67d54 | 523 | #ifdef CONFIG_PPC32 |
14cf11af | 524 | childregs->gpr[2] = (unsigned long) p; |
06d67d54 | 525 | #else |
b5e2fc1c | 526 | clear_tsk_thread_flag(p, TIF_32BIT); |
06d67d54 | 527 | #endif |
14cf11af PM |
528 | p->thread.regs = NULL; /* no user register state */ |
529 | } else { | |
530 | childregs->gpr[1] = usp; | |
531 | p->thread.regs = childregs; | |
06d67d54 PM |
532 | if (clone_flags & CLONE_SETTLS) { |
533 | #ifdef CONFIG_PPC64 | |
534 | if (!test_thread_flag(TIF_32BIT)) | |
535 | childregs->gpr[13] = childregs->gpr[6]; | |
536 | else | |
537 | #endif | |
538 | childregs->gpr[2] = childregs->gpr[6]; | |
539 | } | |
14cf11af PM |
540 | } |
541 | childregs->gpr[3] = 0; /* Result from fork() */ | |
542 | sp -= STACK_FRAME_OVERHEAD; | |
14cf11af PM |
543 | |
544 | /* | |
545 | * The way this works is that at some point in the future | |
546 | * some task will call _switch to switch to the new task. | |
547 | * That will pop off the stack frame created below and start | |
548 | * the new task running at ret_from_fork. The new task will | |
549 | * do some house keeping and then return from the fork or clone | |
550 | * system call, using the stack frame created above. | |
551 | */ | |
552 | sp -= sizeof(struct pt_regs); | |
553 | kregs = (struct pt_regs *) sp; | |
554 | sp -= STACK_FRAME_OVERHEAD; | |
555 | p->thread.ksp = sp; | |
14cf11af | 556 | |
06d67d54 PM |
557 | #ifdef CONFIG_PPC64 |
558 | if (cpu_has_feature(CPU_FTR_SLB)) { | |
559 | unsigned long sp_vsid = get_kernel_vsid(sp); | |
3c726f8d | 560 | unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; |
06d67d54 PM |
561 | |
562 | sp_vsid <<= SLB_VSID_SHIFT; | |
3c726f8d | 563 | sp_vsid |= SLB_VSID_KERNEL | llp; |
06d67d54 PM |
564 | p->thread.ksp_vsid = sp_vsid; |
565 | } | |
566 | ||
567 | /* | |
568 | * The PPC64 ABI makes use of a TOC to contain function | |
569 | * pointers. The function (ret_from_except) is actually a pointer | |
570 | * to the TOC entry. The first entry is a pointer to the actual | |
571 | * function. | |
572 | */ | |
573 | kregs->nip = *((unsigned long *)ret_from_fork); | |
574 | #else | |
575 | kregs->nip = (unsigned long)ret_from_fork; | |
06d67d54 | 576 | #endif |
14cf11af PM |
577 | |
578 | return 0; | |
579 | } | |
580 | ||
581 | /* | |
582 | * Set up a thread for executing a new program | |
583 | */ | |
06d67d54 | 584 | void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) |
14cf11af | 585 | { |
90eac727 ME |
586 | #ifdef CONFIG_PPC64 |
587 | unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */ | |
588 | #endif | |
589 | ||
14cf11af | 590 | set_fs(USER_DS); |
06d67d54 PM |
591 | |
592 | /* | |
593 | * If we exec out of a kernel thread then thread.regs will not be | |
594 | * set. Do it now. | |
595 | */ | |
596 | if (!current->thread.regs) { | |
0cec6fd1 AV |
597 | struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE; |
598 | current->thread.regs = regs - 1; | |
06d67d54 PM |
599 | } |
600 | ||
14cf11af PM |
601 | memset(regs->gpr, 0, sizeof(regs->gpr)); |
602 | regs->ctr = 0; | |
603 | regs->link = 0; | |
604 | regs->xer = 0; | |
605 | regs->ccr = 0; | |
14cf11af | 606 | regs->gpr[1] = sp; |
06d67d54 | 607 | |
474f8196 RM |
608 | /* |
609 | * We have just cleared all the nonvolatile GPRs, so make | |
610 | * FULL_REGS(regs) return true. This is necessary to allow | |
611 | * ptrace to examine the thread immediately after exec. | |
612 | */ | |
613 | regs->trap &= ~1UL; | |
614 | ||
06d67d54 PM |
615 | #ifdef CONFIG_PPC32 |
616 | regs->mq = 0; | |
617 | regs->nip = start; | |
14cf11af | 618 | regs->msr = MSR_USER; |
06d67d54 | 619 | #else |
d4bf9a78 | 620 | if (!test_thread_flag(TIF_32BIT)) { |
90eac727 | 621 | unsigned long entry, toc; |
06d67d54 PM |
622 | |
623 | /* start is a relocated pointer to the function descriptor for | |
624 | * the elf _start routine. The first entry in the function | |
625 | * descriptor is the entry address of _start and the second | |
626 | * entry is the TOC value we need to use. | |
627 | */ | |
628 | __get_user(entry, (unsigned long __user *)start); | |
629 | __get_user(toc, (unsigned long __user *)start+1); | |
630 | ||
631 | /* Check whether the e_entry function descriptor entries | |
632 | * need to be relocated before we can use them. | |
633 | */ | |
634 | if (load_addr != 0) { | |
635 | entry += load_addr; | |
636 | toc += load_addr; | |
637 | } | |
638 | regs->nip = entry; | |
639 | regs->gpr[2] = toc; | |
640 | regs->msr = MSR_USER64; | |
d4bf9a78 SR |
641 | } else { |
642 | regs->nip = start; | |
643 | regs->gpr[2] = 0; | |
644 | regs->msr = MSR_USER32; | |
06d67d54 PM |
645 | } |
646 | #endif | |
647 | ||
48abec07 | 648 | discard_lazy_cpu_state(); |
14cf11af | 649 | memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); |
25c8a78b | 650 | current->thread.fpscr.val = 0; |
14cf11af PM |
651 | #ifdef CONFIG_ALTIVEC |
652 | memset(current->thread.vr, 0, sizeof(current->thread.vr)); | |
653 | memset(¤t->thread.vscr, 0, sizeof(current->thread.vscr)); | |
06d67d54 | 654 | current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */ |
14cf11af PM |
655 | current->thread.vrsave = 0; |
656 | current->thread.used_vr = 0; | |
657 | #endif /* CONFIG_ALTIVEC */ | |
658 | #ifdef CONFIG_SPE | |
659 | memset(current->thread.evr, 0, sizeof(current->thread.evr)); | |
660 | current->thread.acc = 0; | |
661 | current->thread.spefscr = 0; | |
662 | current->thread.used_spe = 0; | |
663 | #endif /* CONFIG_SPE */ | |
664 | } | |
665 | ||
666 | #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ | |
667 | | PR_FP_EXC_RES | PR_FP_EXC_INV) | |
668 | ||
669 | int set_fpexc_mode(struct task_struct *tsk, unsigned int val) | |
670 | { | |
671 | struct pt_regs *regs = tsk->thread.regs; | |
672 | ||
673 | /* This is a bit hairy. If we are an SPE enabled processor | |
674 | * (have embedded fp) we store the IEEE exception enable flags in | |
675 | * fpexc_mode. fpexc_mode is also used for setting FP exception | |
676 | * mode (asyn, precise, disabled) for 'Classic' FP. */ | |
677 | if (val & PR_FP_EXC_SW_ENABLE) { | |
678 | #ifdef CONFIG_SPE | |
679 | tsk->thread.fpexc_mode = val & | |
680 | (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT); | |
06d67d54 | 681 | return 0; |
14cf11af PM |
682 | #else |
683 | return -EINVAL; | |
684 | #endif | |
14cf11af | 685 | } |
06d67d54 PM |
686 | |
687 | /* on a CONFIG_SPE this does not hurt us. The bits that | |
688 | * __pack_fe01 use do not overlap with bits used for | |
689 | * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits | |
690 | * on CONFIG_SPE implementations are reserved so writing to | |
691 | * them does not change anything */ | |
692 | if (val > PR_FP_EXC_PRECISE) | |
693 | return -EINVAL; | |
694 | tsk->thread.fpexc_mode = __pack_fe01(val); | |
695 | if (regs != NULL && (regs->msr & MSR_FP) != 0) | |
696 | regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1)) | |
697 | | tsk->thread.fpexc_mode; | |
14cf11af PM |
698 | return 0; |
699 | } | |
700 | ||
701 | int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) | |
702 | { | |
703 | unsigned int val; | |
704 | ||
705 | if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE) | |
706 | #ifdef CONFIG_SPE | |
707 | val = tsk->thread.fpexc_mode; | |
708 | #else | |
709 | return -EINVAL; | |
710 | #endif | |
711 | else | |
712 | val = __unpack_fe01(tsk->thread.fpexc_mode); | |
713 | return put_user(val, (unsigned int __user *) adr); | |
714 | } | |
715 | ||
fab5db97 PM |
716 | int set_endian(struct task_struct *tsk, unsigned int val) |
717 | { | |
718 | struct pt_regs *regs = tsk->thread.regs; | |
719 | ||
720 | if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) || | |
721 | (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE))) | |
722 | return -EINVAL; | |
723 | ||
724 | if (regs == NULL) | |
725 | return -EINVAL; | |
726 | ||
727 | if (val == PR_ENDIAN_BIG) | |
728 | regs->msr &= ~MSR_LE; | |
729 | else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE) | |
730 | regs->msr |= MSR_LE; | |
731 | else | |
732 | return -EINVAL; | |
733 | ||
734 | return 0; | |
735 | } | |
736 | ||
737 | int get_endian(struct task_struct *tsk, unsigned long adr) | |
738 | { | |
739 | struct pt_regs *regs = tsk->thread.regs; | |
740 | unsigned int val; | |
741 | ||
742 | if (!cpu_has_feature(CPU_FTR_PPC_LE) && | |
743 | !cpu_has_feature(CPU_FTR_REAL_LE)) | |
744 | return -EINVAL; | |
745 | ||
746 | if (regs == NULL) | |
747 | return -EINVAL; | |
748 | ||
749 | if (regs->msr & MSR_LE) { | |
750 | if (cpu_has_feature(CPU_FTR_REAL_LE)) | |
751 | val = PR_ENDIAN_LITTLE; | |
752 | else | |
753 | val = PR_ENDIAN_PPC_LITTLE; | |
754 | } else | |
755 | val = PR_ENDIAN_BIG; | |
756 | ||
757 | return put_user(val, (unsigned int __user *)adr); | |
758 | } | |
759 | ||
e9370ae1 PM |
760 | int set_unalign_ctl(struct task_struct *tsk, unsigned int val) |
761 | { | |
762 | tsk->thread.align_ctl = val; | |
763 | return 0; | |
764 | } | |
765 | ||
766 | int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) | |
767 | { | |
768 | return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr); | |
769 | } | |
770 | ||
06d67d54 PM |
771 | #define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff)) |
772 | ||
14cf11af PM |
773 | int sys_clone(unsigned long clone_flags, unsigned long usp, |
774 | int __user *parent_tidp, void __user *child_threadptr, | |
775 | int __user *child_tidp, int p6, | |
776 | struct pt_regs *regs) | |
777 | { | |
778 | CHECK_FULL_REGS(regs); | |
779 | if (usp == 0) | |
780 | usp = regs->gpr[1]; /* stack pointer for child */ | |
06d67d54 PM |
781 | #ifdef CONFIG_PPC64 |
782 | if (test_thread_flag(TIF_32BIT)) { | |
783 | parent_tidp = TRUNC_PTR(parent_tidp); | |
784 | child_tidp = TRUNC_PTR(child_tidp); | |
785 | } | |
786 | #endif | |
14cf11af PM |
787 | return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp); |
788 | } | |
789 | ||
790 | int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3, | |
791 | unsigned long p4, unsigned long p5, unsigned long p6, | |
792 | struct pt_regs *regs) | |
793 | { | |
794 | CHECK_FULL_REGS(regs); | |
795 | return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL); | |
796 | } | |
797 | ||
798 | int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3, | |
799 | unsigned long p4, unsigned long p5, unsigned long p6, | |
800 | struct pt_regs *regs) | |
801 | { | |
802 | CHECK_FULL_REGS(regs); | |
803 | return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1], | |
804 | regs, 0, NULL, NULL); | |
805 | } | |
806 | ||
807 | int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2, | |
808 | unsigned long a3, unsigned long a4, unsigned long a5, | |
809 | struct pt_regs *regs) | |
810 | { | |
811 | int error; | |
06d67d54 | 812 | char *filename; |
14cf11af PM |
813 | |
814 | filename = getname((char __user *) a0); | |
815 | error = PTR_ERR(filename); | |
816 | if (IS_ERR(filename)) | |
817 | goto out; | |
818 | flush_fp_to_thread(current); | |
819 | flush_altivec_to_thread(current); | |
820 | flush_spe_to_thread(current); | |
20c8c210 PM |
821 | error = do_execve(filename, (char __user * __user *) a1, |
822 | (char __user * __user *) a2, regs); | |
14cf11af PM |
823 | if (error == 0) { |
824 | task_lock(current); | |
825 | current->ptrace &= ~PT_DTRACE; | |
826 | task_unlock(current); | |
827 | } | |
828 | putname(filename); | |
829 | out: | |
830 | return error; | |
831 | } | |
832 | ||
bb72c481 PM |
833 | #ifdef CONFIG_IRQSTACKS |
834 | static inline int valid_irq_stack(unsigned long sp, struct task_struct *p, | |
835 | unsigned long nbytes) | |
836 | { | |
837 | unsigned long stack_page; | |
838 | unsigned long cpu = task_cpu(p); | |
839 | ||
840 | /* | |
841 | * Avoid crashing if the stack has overflowed and corrupted | |
842 | * task_cpu(p), which is in the thread_info struct. | |
843 | */ | |
844 | if (cpu < NR_CPUS && cpu_possible(cpu)) { | |
845 | stack_page = (unsigned long) hardirq_ctx[cpu]; | |
846 | if (sp >= stack_page + sizeof(struct thread_struct) | |
847 | && sp <= stack_page + THREAD_SIZE - nbytes) | |
848 | return 1; | |
849 | ||
850 | stack_page = (unsigned long) softirq_ctx[cpu]; | |
851 | if (sp >= stack_page + sizeof(struct thread_struct) | |
852 | && sp <= stack_page + THREAD_SIZE - nbytes) | |
853 | return 1; | |
854 | } | |
855 | return 0; | |
856 | } | |
857 | ||
858 | #else | |
859 | #define valid_irq_stack(sp, p, nb) 0 | |
860 | #endif /* CONFIG_IRQSTACKS */ | |
861 | ||
2f25194d | 862 | int validate_sp(unsigned long sp, struct task_struct *p, |
14cf11af PM |
863 | unsigned long nbytes) |
864 | { | |
0cec6fd1 | 865 | unsigned long stack_page = (unsigned long)task_stack_page(p); |
14cf11af PM |
866 | |
867 | if (sp >= stack_page + sizeof(struct thread_struct) | |
868 | && sp <= stack_page + THREAD_SIZE - nbytes) | |
869 | return 1; | |
870 | ||
bb72c481 | 871 | return valid_irq_stack(sp, p, nbytes); |
14cf11af PM |
872 | } |
873 | ||
06d67d54 PM |
874 | #ifdef CONFIG_PPC64 |
875 | #define MIN_STACK_FRAME 112 /* same as STACK_FRAME_OVERHEAD, in fact */ | |
876 | #define FRAME_LR_SAVE 2 | |
877 | #define INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD + 288) | |
878 | #define REGS_MARKER 0x7265677368657265ul | |
879 | #define FRAME_MARKER 12 | |
880 | #else | |
881 | #define MIN_STACK_FRAME 16 | |
882 | #define FRAME_LR_SAVE 1 | |
883 | #define INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD) | |
884 | #define REGS_MARKER 0x72656773ul | |
885 | #define FRAME_MARKER 2 | |
14cf11af | 886 | #endif |
14cf11af | 887 | |
2f25194d AB |
888 | EXPORT_SYMBOL(validate_sp); |
889 | ||
14cf11af PM |
890 | unsigned long get_wchan(struct task_struct *p) |
891 | { | |
892 | unsigned long ip, sp; | |
893 | int count = 0; | |
894 | ||
895 | if (!p || p == current || p->state == TASK_RUNNING) | |
896 | return 0; | |
897 | ||
898 | sp = p->thread.ksp; | |
06d67d54 | 899 | if (!validate_sp(sp, p, MIN_STACK_FRAME)) |
14cf11af PM |
900 | return 0; |
901 | ||
902 | do { | |
903 | sp = *(unsigned long *)sp; | |
06d67d54 | 904 | if (!validate_sp(sp, p, MIN_STACK_FRAME)) |
14cf11af PM |
905 | return 0; |
906 | if (count > 0) { | |
06d67d54 | 907 | ip = ((unsigned long *)sp)[FRAME_LR_SAVE]; |
14cf11af PM |
908 | if (!in_sched_functions(ip)) |
909 | return ip; | |
910 | } | |
911 | } while (count++ < 16); | |
912 | return 0; | |
913 | } | |
06d67d54 PM |
914 | |
915 | static int kstack_depth_to_print = 64; | |
916 | ||
917 | void show_stack(struct task_struct *tsk, unsigned long *stack) | |
918 | { | |
919 | unsigned long sp, ip, lr, newsp; | |
920 | int count = 0; | |
921 | int firstframe = 1; | |
922 | ||
923 | sp = (unsigned long) stack; | |
924 | if (tsk == NULL) | |
925 | tsk = current; | |
926 | if (sp == 0) { | |
927 | if (tsk == current) | |
928 | asm("mr %0,1" : "=r" (sp)); | |
929 | else | |
930 | sp = tsk->thread.ksp; | |
931 | } | |
932 | ||
933 | lr = 0; | |
934 | printk("Call Trace:\n"); | |
935 | do { | |
936 | if (!validate_sp(sp, tsk, MIN_STACK_FRAME)) | |
937 | return; | |
938 | ||
939 | stack = (unsigned long *) sp; | |
940 | newsp = stack[0]; | |
941 | ip = stack[FRAME_LR_SAVE]; | |
942 | if (!firstframe || ip != lr) { | |
943 | printk("["REG"] ["REG"] ", sp, ip); | |
944 | print_symbol("%s", ip); | |
945 | if (firstframe) | |
946 | printk(" (unreliable)"); | |
947 | printk("\n"); | |
948 | } | |
949 | firstframe = 0; | |
950 | ||
951 | /* | |
952 | * See if this is an exception frame. | |
953 | * We look for the "regshere" marker in the current frame. | |
954 | */ | |
955 | if (validate_sp(sp, tsk, INT_FRAME_SIZE) | |
956 | && stack[FRAME_MARKER] == REGS_MARKER) { | |
957 | struct pt_regs *regs = (struct pt_regs *) | |
958 | (sp + STACK_FRAME_OVERHEAD); | |
959 | printk("--- Exception: %lx", regs->trap); | |
960 | print_symbol(" at %s\n", regs->nip); | |
961 | lr = regs->link; | |
962 | print_symbol(" LR = %s\n", lr); | |
963 | firstframe = 1; | |
964 | } | |
965 | ||
966 | sp = newsp; | |
967 | } while (count++ < kstack_depth_to_print); | |
968 | } | |
969 | ||
970 | void dump_stack(void) | |
971 | { | |
972 | show_stack(current, NULL); | |
973 | } | |
974 | EXPORT_SYMBOL(dump_stack); | |
cb2c9b27 AB |
975 | |
976 | #ifdef CONFIG_PPC64 | |
977 | void ppc64_runlatch_on(void) | |
978 | { | |
979 | unsigned long ctrl; | |
980 | ||
981 | if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) { | |
982 | HMT_medium(); | |
983 | ||
984 | ctrl = mfspr(SPRN_CTRLF); | |
985 | ctrl |= CTRL_RUNLATCH; | |
986 | mtspr(SPRN_CTRLT, ctrl); | |
987 | ||
988 | set_thread_flag(TIF_RUNLATCH); | |
989 | } | |
990 | } | |
991 | ||
992 | void ppc64_runlatch_off(void) | |
993 | { | |
994 | unsigned long ctrl; | |
995 | ||
996 | if (cpu_has_feature(CPU_FTR_CTRL) && test_thread_flag(TIF_RUNLATCH)) { | |
997 | HMT_medium(); | |
998 | ||
999 | clear_thread_flag(TIF_RUNLATCH); | |
1000 | ||
1001 | ctrl = mfspr(SPRN_CTRLF); | |
1002 | ctrl &= ~CTRL_RUNLATCH; | |
1003 | mtspr(SPRN_CTRLT, ctrl); | |
1004 | } | |
1005 | } | |
1006 | #endif |