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1da177e4 1/*
1da177e4
LT
2 * PowerPC version
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Derived from "arch/m68k/kernel/ptrace.c"
6 * Copyright (C) 1994 by Hamish Macdonald
7 * Taken from linux/kernel/ptrace.c and modified for M680x0.
8 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
9 *
10 * Modified by Cort Dougan (cort@hq.fsmlabs.com)
b123923d 11 * and Paul Mackerras (paulus@samba.org).
1da177e4
LT
12 *
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file README.legal in the main directory of
15 * this archive for more details.
16 */
17
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
1da177e4
LT
22#include <linux/errno.h>
23#include <linux/ptrace.h>
f65255e8 24#include <linux/regset.h>
3caf06c6 25#include <linux/elf.h>
1da177e4
LT
26#include <linux/user.h>
27#include <linux/security.h>
7ed20e1a 28#include <linux/signal.h>
ea9c102c
DW
29#include <linux/seccomp.h>
30#include <linux/audit.h>
e8a30302 31#ifdef CONFIG_PPC32
ea9c102c 32#include <linux/module.h>
e8a30302 33#endif
1da177e4
LT
34
35#include <asm/uaccess.h>
36#include <asm/page.h>
37#include <asm/pgtable.h>
38#include <asm/system.h>
21a62902 39
abd06505
BH
40/*
41 * does not yet catch signals sent when the child dies.
42 * in exit.c or in signal.c.
43 */
44
45/*
46 * Set of msr bits that gdb can change on behalf of a process.
47 */
48#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
49#define MSR_DEBUGCHANGE 0
1da177e4 50#else
abd06505 51#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
1da177e4 52#endif
acd89828 53
1da177e4 54/*
abd06505 55 * Max register writeable via put_reg
1da177e4 56 */
abd06505
BH
57#ifdef CONFIG_PPC32
58#define PT_MAX_PUT_REG PT_MQ
59#else
60#define PT_MAX_PUT_REG PT_CCR
61#endif
1da177e4 62
26f77130
RM
63static unsigned long get_user_msr(struct task_struct *task)
64{
65 return task->thread.regs->msr | task->thread.fpexc_mode;
66}
67
68static int set_user_msr(struct task_struct *task, unsigned long msr)
69{
70 task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
71 task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
72 return 0;
73}
74
75/*
76 * We prevent mucking around with the reserved area of trap
77 * which are used internally by the kernel.
78 */
79static int set_user_trap(struct task_struct *task, unsigned long trap)
80{
81 task->thread.regs->trap = trap & 0xfff0;
82 return 0;
83}
84
865418d8
BH
85/*
86 * Get contents of register REGNO in task TASK.
87 */
88unsigned long ptrace_get_reg(struct task_struct *task, int regno)
89{
865418d8
BH
90 if (task->thread.regs == NULL)
91 return -EIO;
92
26f77130
RM
93 if (regno == PT_MSR)
94 return get_user_msr(task);
865418d8
BH
95
96 if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
97 return ((unsigned long *)task->thread.regs)[regno];
98
99 return -EIO;
100}
101
102/*
103 * Write contents of register REGNO in task TASK.
104 */
105int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
106{
107 if (task->thread.regs == NULL)
108 return -EIO;
109
26f77130
RM
110 if (regno == PT_MSR)
111 return set_user_msr(task, data);
112 if (regno == PT_TRAP)
113 return set_user_trap(task, data);
114
115 if (regno <= PT_MAX_PUT_REG) {
865418d8
BH
116 ((unsigned long *)task->thread.regs)[regno] = data;
117 return 0;
118 }
119 return -EIO;
120}
121
44dd3f50
RM
122static int gpr_get(struct task_struct *target, const struct user_regset *regset,
123 unsigned int pos, unsigned int count,
124 void *kbuf, void __user *ubuf)
125{
126 int ret;
127
128 if (target->thread.regs == NULL)
129 return -EIO;
130
131 CHECK_FULL_REGS(target->thread.regs);
132
133 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
134 target->thread.regs,
135 0, offsetof(struct pt_regs, msr));
136 if (!ret) {
137 unsigned long msr = get_user_msr(target);
138 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
139 offsetof(struct pt_regs, msr),
140 offsetof(struct pt_regs, msr) +
141 sizeof(msr));
142 }
143
144 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
145 offsetof(struct pt_regs, msr) + sizeof(long));
146
147 if (!ret)
148 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
149 &target->thread.regs->orig_gpr3,
150 offsetof(struct pt_regs, orig_gpr3),
151 sizeof(struct pt_regs));
152 if (!ret)
153 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
154 sizeof(struct pt_regs), -1);
155
156 return ret;
157}
158
159static int gpr_set(struct task_struct *target, const struct user_regset *regset,
160 unsigned int pos, unsigned int count,
161 const void *kbuf, const void __user *ubuf)
162{
163 unsigned long reg;
164 int ret;
165
166 if (target->thread.regs == NULL)
167 return -EIO;
168
169 CHECK_FULL_REGS(target->thread.regs);
170
171 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
172 target->thread.regs,
173 0, PT_MSR * sizeof(reg));
174
175 if (!ret && count > 0) {
176 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
177 PT_MSR * sizeof(reg),
178 (PT_MSR + 1) * sizeof(reg));
179 if (!ret)
180 ret = set_user_msr(target, reg);
181 }
182
183 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
184 offsetof(struct pt_regs, msr) + sizeof(long));
185
186 if (!ret)
187 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
188 &target->thread.regs->orig_gpr3,
189 PT_ORIG_R3 * sizeof(reg),
190 (PT_MAX_PUT_REG + 1) * sizeof(reg));
191
192 if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
193 ret = user_regset_copyin_ignore(
194 &pos, &count, &kbuf, &ubuf,
195 (PT_MAX_PUT_REG + 1) * sizeof(reg),
196 PT_TRAP * sizeof(reg));
197
198 if (!ret && count > 0) {
199 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
200 PT_TRAP * sizeof(reg),
201 (PT_TRAP + 1) * sizeof(reg));
202 if (!ret)
203 ret = set_user_trap(target, reg);
204 }
205
206 if (!ret)
207 ret = user_regset_copyin_ignore(
208 &pos, &count, &kbuf, &ubuf,
209 (PT_TRAP + 1) * sizeof(reg), -1);
210
211 return ret;
212}
865418d8 213
f65255e8
RM
214static int fpr_get(struct task_struct *target, const struct user_regset *regset,
215 unsigned int pos, unsigned int count,
216 void *kbuf, void __user *ubuf)
217{
218 flush_fp_to_thread(target);
219
220 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
221 offsetof(struct thread_struct, fpr[32]));
222
223 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
224 &target->thread.fpr, 0, -1);
225}
226
227static int fpr_set(struct task_struct *target, const struct user_regset *regset,
228 unsigned int pos, unsigned int count,
229 const void *kbuf, const void __user *ubuf)
230{
231 flush_fp_to_thread(target);
232
233 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
234 offsetof(struct thread_struct, fpr[32]));
235
236 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
237 &target->thread.fpr, 0, -1);
238}
239
865418d8
BH
240
241#ifdef CONFIG_ALTIVEC
242/*
243 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
244 * The transfer totals 34 quadword. Quadwords 0-31 contain the
245 * corresponding vector registers. Quadword 32 contains the vscr as the
246 * last word (offset 12) within that quadword. Quadword 33 contains the
247 * vrsave as the first word (offset 0) within the quadword.
248 *
249 * This definition of the VMX state is compatible with the current PPC32
250 * ptrace interface. This allows signal handling and ptrace to use the
251 * same structures. This also simplifies the implementation of a bi-arch
252 * (combined (32- and 64-bit) gdb.
253 */
254
3caf06c6
RM
255static int vr_active(struct task_struct *target,
256 const struct user_regset *regset)
257{
258 flush_altivec_to_thread(target);
259 return target->thread.used_vr ? regset->n : 0;
260}
261
262static int vr_get(struct task_struct *target, const struct user_regset *regset,
263 unsigned int pos, unsigned int count,
264 void *kbuf, void __user *ubuf)
265{
266 int ret;
267
268 flush_altivec_to_thread(target);
269
270 BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
271 offsetof(struct thread_struct, vr[32]));
272
273 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
274 &target->thread.vr, 0,
275 33 * sizeof(vector128));
276 if (!ret) {
277 /*
278 * Copy out only the low-order word of vrsave.
279 */
280 union {
281 elf_vrreg_t reg;
282 u32 word;
283 } vrsave;
284 memset(&vrsave, 0, sizeof(vrsave));
285 vrsave.word = target->thread.vrsave;
286 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
287 33 * sizeof(vector128), -1);
288 }
289
290 return ret;
291}
292
293static int vr_set(struct task_struct *target, const struct user_regset *regset,
294 unsigned int pos, unsigned int count,
295 const void *kbuf, const void __user *ubuf)
296{
297 int ret;
298
299 flush_altivec_to_thread(target);
300
301 BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
302 offsetof(struct thread_struct, vr[32]));
303
304 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
305 &target->thread.vr, 0, 33 * sizeof(vector128));
306 if (!ret && count > 0) {
307 /*
308 * We use only the first word of vrsave.
309 */
310 union {
311 elf_vrreg_t reg;
312 u32 word;
313 } vrsave;
314 memset(&vrsave, 0, sizeof(vrsave));
315 vrsave.word = target->thread.vrsave;
316 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
317 33 * sizeof(vector128), -1);
318 if (!ret)
319 target->thread.vrsave = vrsave.word;
320 }
321
322 return ret;
323}
865418d8
BH
324#endif /* CONFIG_ALTIVEC */
325
326#ifdef CONFIG_SPE
327
328/*
329 * For get_evrregs/set_evrregs functions 'data' has the following layout:
330 *
331 * struct {
332 * u32 evr[32];
333 * u64 acc;
334 * u32 spefscr;
335 * }
336 */
337
a4e4b175
RM
338static int evr_active(struct task_struct *target,
339 const struct user_regset *regset)
865418d8 340{
a4e4b175
RM
341 flush_spe_to_thread(target);
342 return target->thread.used_spe ? regset->n : 0;
343}
865418d8 344
a4e4b175
RM
345static int evr_get(struct task_struct *target, const struct user_regset *regset,
346 unsigned int pos, unsigned int count,
347 void *kbuf, void __user *ubuf)
348{
349 int ret;
865418d8 350
a4e4b175 351 flush_spe_to_thread(target);
865418d8 352
a4e4b175
RM
353 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
354 &target->thread.evr,
355 0, sizeof(target->thread.evr));
865418d8 356
a4e4b175
RM
357 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
358 offsetof(struct thread_struct, spefscr));
359
360 if (!ret)
361 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
362 &target->thread.acc,
363 sizeof(target->thread.evr), -1);
364
365 return ret;
366}
367
368static int evr_set(struct task_struct *target, const struct user_regset *regset,
369 unsigned int pos, unsigned int count,
370 const void *kbuf, const void __user *ubuf)
371{
372 int ret;
373
374 flush_spe_to_thread(target);
375
376 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
377 &target->thread.evr,
378 0, sizeof(target->thread.evr));
865418d8 379
a4e4b175
RM
380 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
381 offsetof(struct thread_struct, spefscr));
382
383 if (!ret)
384 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
385 &target->thread.acc,
386 sizeof(target->thread.evr), -1);
387
388 return ret;
865418d8 389}
865418d8
BH
390#endif /* CONFIG_SPE */
391
392
80fdf470
RM
393/*
394 * These are our native regset flavors.
395 */
396enum powerpc_regset {
397 REGSET_GPR,
398 REGSET_FPR,
399#ifdef CONFIG_ALTIVEC
400 REGSET_VMX,
401#endif
402#ifdef CONFIG_SPE
403 REGSET_SPE,
404#endif
405};
406
407static const struct user_regset native_regsets[] = {
408 [REGSET_GPR] = {
409 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
410 .size = sizeof(long), .align = sizeof(long),
411 .get = gpr_get, .set = gpr_set
412 },
413 [REGSET_FPR] = {
414 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
415 .size = sizeof(double), .align = sizeof(double),
416 .get = fpr_get, .set = fpr_set
417 },
418#ifdef CONFIG_ALTIVEC
419 [REGSET_VMX] = {
420 .core_note_type = NT_PPC_VMX, .n = 34,
421 .size = sizeof(vector128), .align = sizeof(vector128),
422 .active = vr_active, .get = vr_get, .set = vr_set
423 },
424#endif
425#ifdef CONFIG_SPE
426 [REGSET_SPE] = {
427 .n = 35,
428 .size = sizeof(u32), .align = sizeof(u32),
429 .active = evr_active, .get = evr_get, .set = evr_set
430 },
431#endif
432};
433
434static const struct user_regset_view user_ppc_native_view = {
435 .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
436 .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
437};
438
fa8f5cb0
RM
439#ifdef CONFIG_PPC64
440#include <linux/compat.h>
441
442static int gpr32_get(struct task_struct *target,
443 const struct user_regset *regset,
444 unsigned int pos, unsigned int count,
445 void *kbuf, void __user *ubuf)
446{
447 const unsigned long *regs = &target->thread.regs->gpr[0];
448 compat_ulong_t *k = kbuf;
449 compat_ulong_t __user *u = ubuf;
450 compat_ulong_t reg;
451
452 if (target->thread.regs == NULL)
453 return -EIO;
454
455 CHECK_FULL_REGS(target->thread.regs);
456
457 pos /= sizeof(reg);
458 count /= sizeof(reg);
459
460 if (kbuf)
461 for (; count > 0 && pos < PT_MSR; --count)
462 *k++ = regs[pos++];
463 else
464 for (; count > 0 && pos < PT_MSR; --count)
465 if (__put_user((compat_ulong_t) regs[pos++], u++))
466 return -EFAULT;
467
468 if (count > 0 && pos == PT_MSR) {
469 reg = get_user_msr(target);
470 if (kbuf)
471 *k++ = reg;
472 else if (__put_user(reg, u++))
473 return -EFAULT;
474 ++pos;
475 --count;
476 }
477
478 if (kbuf)
479 for (; count > 0 && pos < PT_REGS_COUNT; --count)
480 *k++ = regs[pos++];
481 else
482 for (; count > 0 && pos < PT_REGS_COUNT; --count)
483 if (__put_user((compat_ulong_t) regs[pos++], u++))
484 return -EFAULT;
485
486 kbuf = k;
487 ubuf = u;
488 pos *= sizeof(reg);
489 count *= sizeof(reg);
490 return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
491 PT_REGS_COUNT * sizeof(reg), -1);
492}
493
494static int gpr32_set(struct task_struct *target,
495 const struct user_regset *regset,
496 unsigned int pos, unsigned int count,
497 const void *kbuf, const void __user *ubuf)
498{
499 unsigned long *regs = &target->thread.regs->gpr[0];
500 const compat_ulong_t *k = kbuf;
501 const compat_ulong_t __user *u = ubuf;
502 compat_ulong_t reg;
503
504 if (target->thread.regs == NULL)
505 return -EIO;
506
507 CHECK_FULL_REGS(target->thread.regs);
508
509 pos /= sizeof(reg);
510 count /= sizeof(reg);
511
512 if (kbuf)
513 for (; count > 0 && pos < PT_MSR; --count)
514 regs[pos++] = *k++;
515 else
516 for (; count > 0 && pos < PT_MSR; --count) {
517 if (__get_user(reg, u++))
518 return -EFAULT;
519 regs[pos++] = reg;
520 }
521
522
523 if (count > 0 && pos == PT_MSR) {
524 if (kbuf)
525 reg = *k++;
526 else if (__get_user(reg, u++))
527 return -EFAULT;
528 set_user_msr(target, reg);
529 ++pos;
530 --count;
531 }
532
533 if (kbuf)
534 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
535 regs[pos++] = *k++;
536 else
537 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
538 if (__get_user(reg, u++))
539 return -EFAULT;
540 regs[pos++] = reg;
541 }
542
543 if (count > 0 && pos == PT_TRAP) {
544 if (kbuf)
545 reg = *k++;
546 else if (__get_user(reg, u++))
547 return -EFAULT;
548 set_user_trap(target, reg);
549 ++pos;
550 --count;
551 }
552
553 kbuf = k;
554 ubuf = u;
555 pos *= sizeof(reg);
556 count *= sizeof(reg);
557 return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
558 (PT_TRAP + 1) * sizeof(reg), -1);
559}
560
561/*
562 * These are the regset flavors matching the CONFIG_PPC32 native set.
563 */
564static const struct user_regset compat_regsets[] = {
565 [REGSET_GPR] = {
566 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
567 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
568 .get = gpr32_get, .set = gpr32_set
569 },
570 [REGSET_FPR] = {
571 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
572 .size = sizeof(double), .align = sizeof(double),
573 .get = fpr_get, .set = fpr_set
574 },
575#ifdef CONFIG_ALTIVEC
576 [REGSET_VMX] = {
577 .core_note_type = NT_PPC_VMX, .n = 34,
578 .size = sizeof(vector128), .align = sizeof(vector128),
579 .active = vr_active, .get = vr_get, .set = vr_set
580 },
581#endif
582#ifdef CONFIG_SPE
583 [REGSET_SPE] = {
24f1a849 584 .core_note_type = NT_PPC_SPE, .n = 35,
fa8f5cb0
RM
585 .size = sizeof(u32), .align = sizeof(u32),
586 .active = evr_active, .get = evr_get, .set = evr_set
587 },
588#endif
589};
590
591static const struct user_regset_view user_ppc_compat_view = {
592 .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
593 .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
594};
595#endif /* CONFIG_PPC64 */
596
80fdf470
RM
597const struct user_regset_view *task_user_regset_view(struct task_struct *task)
598{
fa8f5cb0
RM
599#ifdef CONFIG_PPC64
600 if (test_tsk_thread_flag(task, TIF_32BIT))
601 return &user_ppc_compat_view;
602#endif
80fdf470
RM
603 return &user_ppc_native_view;
604}
605
606
2a84b0d7 607void user_enable_single_step(struct task_struct *task)
865418d8
BH
608{
609 struct pt_regs *regs = task->thread.regs;
610
611 if (regs != NULL) {
612#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
613 task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC;
614 regs->msr |= MSR_DE;
615#else
616 regs->msr |= MSR_SE;
617#endif
618 }
619 set_tsk_thread_flag(task, TIF_SINGLESTEP);
620}
621
2a84b0d7 622void user_disable_single_step(struct task_struct *task)
865418d8
BH
623{
624 struct pt_regs *regs = task->thread.regs;
625
626 if (regs != NULL) {
627#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
628 task->thread.dbcr0 = 0;
629 regs->msr &= ~MSR_DE;
630#else
631 regs->msr &= ~MSR_SE;
632#endif
633 }
634 clear_tsk_thread_flag(task, TIF_SINGLESTEP);
635}
636
abd06505
BH
637static int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
638 unsigned long data)
639{
640 /* We only support one DABR and no IABRS at the moment */
641 if (addr > 0)
642 return -EINVAL;
643
644 /* The bottom 3 bits are flags */
645 if ((data & ~0x7UL) >= TASK_SIZE)
646 return -EIO;
647
648 /* Ensure translation is on */
649 if (data && !(data & DABR_TRANSLATION))
650 return -EIO;
651
652 task->thread.dabr = data;
653 return 0;
654}
abd06505 655
1da177e4
LT
656/*
657 * Called by kernel/ptrace.c when detaching..
658 *
659 * Make sure single step bits etc are not set.
660 */
661void ptrace_disable(struct task_struct *child)
662{
663 /* make sure the single step bit is not set. */
2a84b0d7 664 user_disable_single_step(child);
1da177e4
LT
665}
666
e17666ba
BH
667/*
668 * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
669 * we mark them as obsolete now, they will be removed in a future version
670 */
671static long arch_ptrace_old(struct task_struct *child, long request, long addr,
672 long data)
673{
c391cd00
RM
674 switch (request) {
675 case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
676 return copy_regset_to_user(child, &user_ppc_native_view,
677 REGSET_GPR, 0, 32 * sizeof(long),
678 (void __user *) data);
679
680 case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
681 return copy_regset_from_user(child, &user_ppc_native_view,
682 REGSET_GPR, 0, 32 * sizeof(long),
683 (const void __user *) data);
684
685 case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
686 return copy_regset_to_user(child, &user_ppc_native_view,
687 REGSET_FPR, 0, 32 * sizeof(double),
688 (void __user *) data);
689
690 case PPC_PTRACE_SETFPREGS: /* Set FPRs 0 - 31. */
691 return copy_regset_from_user(child, &user_ppc_native_view,
692 REGSET_FPR, 0, 32 * sizeof(double),
693 (const void __user *) data);
e17666ba
BH
694 }
695
c391cd00 696 return -EPERM;
e17666ba
BH
697}
698
481bed45 699long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1da177e4 700{
1da177e4
LT
701 int ret = -EPERM;
702
1da177e4 703 switch (request) {
1da177e4 704 /* read the word at location addr in the USER area. */
1da177e4
LT
705 case PTRACE_PEEKUSR: {
706 unsigned long index, tmp;
707
708 ret = -EIO;
709 /* convert to index and check */
e8a30302 710#ifdef CONFIG_PPC32
1da177e4 711 index = (unsigned long) addr >> 2;
e8a30302
SR
712 if ((addr & 3) || (index > PT_FPSCR)
713 || (child->thread.regs == NULL))
714#else
715 index = (unsigned long) addr >> 3;
716 if ((addr & 7) || (index > PT_FPSCR))
717#endif
1da177e4
LT
718 break;
719
720 CHECK_FULL_REGS(child->thread.regs);
721 if (index < PT_FPR0) {
865418d8 722 tmp = ptrace_get_reg(child, (int) index);
1da177e4 723 } else {
e8a30302 724 flush_fp_to_thread(child);
1da177e4
LT
725 tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0];
726 }
727 ret = put_user(tmp,(unsigned long __user *) data);
728 break;
729 }
730
1da177e4
LT
731 /* write the word at location addr in the USER area */
732 case PTRACE_POKEUSR: {
733 unsigned long index;
734
735 ret = -EIO;
736 /* convert to index and check */
e8a30302 737#ifdef CONFIG_PPC32
1da177e4 738 index = (unsigned long) addr >> 2;
e8a30302
SR
739 if ((addr & 3) || (index > PT_FPSCR)
740 || (child->thread.regs == NULL))
741#else
742 index = (unsigned long) addr >> 3;
743 if ((addr & 7) || (index > PT_FPSCR))
744#endif
1da177e4
LT
745 break;
746
747 CHECK_FULL_REGS(child->thread.regs);
1da177e4 748 if (index < PT_FPR0) {
865418d8 749 ret = ptrace_put_reg(child, index, data);
1da177e4 750 } else {
e8a30302 751 flush_fp_to_thread(child);
1da177e4
LT
752 ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data;
753 ret = 0;
754 }
755 break;
756 }
757
e8a30302
SR
758 case PTRACE_GET_DEBUGREG: {
759 ret = -EINVAL;
760 /* We only support one DABR and no IABRS at the moment */
761 if (addr > 0)
762 break;
763 ret = put_user(child->thread.dabr,
764 (unsigned long __user *)data);
765 break;
766 }
767
768 case PTRACE_SET_DEBUGREG:
769 ret = ptrace_set_debugreg(child, addr, data);
770 break;
e8a30302 771
e17666ba
BH
772#ifdef CONFIG_PPC64
773 case PTRACE_GETREGS64:
774#endif
c391cd00
RM
775 case PTRACE_GETREGS: /* Get all pt_regs from the child. */
776 return copy_regset_to_user(child, &user_ppc_native_view,
777 REGSET_GPR,
778 0, sizeof(struct pt_regs),
779 (void __user *) data);
e8a30302 780
e17666ba
BH
781#ifdef CONFIG_PPC64
782 case PTRACE_SETREGS64:
783#endif
c391cd00
RM
784 case PTRACE_SETREGS: /* Set all gp regs in the child. */
785 return copy_regset_from_user(child, &user_ppc_native_view,
786 REGSET_GPR,
787 0, sizeof(struct pt_regs),
788 (const void __user *) data);
789
790 case PTRACE_GETFPREGS: /* Get the child FPU state (FPR0...31 + FPSCR) */
791 return copy_regset_to_user(child, &user_ppc_native_view,
792 REGSET_FPR,
793 0, sizeof(elf_fpregset_t),
794 (void __user *) data);
795
796 case PTRACE_SETFPREGS: /* Set the child FPU state (FPR0...31 + FPSCR) */
797 return copy_regset_from_user(child, &user_ppc_native_view,
798 REGSET_FPR,
799 0, sizeof(elf_fpregset_t),
800 (const void __user *) data);
e8a30302 801
1da177e4
LT
802#ifdef CONFIG_ALTIVEC
803 case PTRACE_GETVRREGS:
c391cd00
RM
804 return copy_regset_to_user(child, &user_ppc_native_view,
805 REGSET_VMX,
806 0, (33 * sizeof(vector128) +
807 sizeof(u32)),
808 (void __user *) data);
1da177e4
LT
809
810 case PTRACE_SETVRREGS:
c391cd00
RM
811 return copy_regset_from_user(child, &user_ppc_native_view,
812 REGSET_VMX,
813 0, (33 * sizeof(vector128) +
814 sizeof(u32)),
815 (const void __user *) data);
1da177e4
LT
816#endif
817#ifdef CONFIG_SPE
818 case PTRACE_GETEVRREGS:
819 /* Get the child spe register state. */
c391cd00
RM
820 return copy_regset_to_user(child, &user_ppc_native_view,
821 REGSET_SPE, 0, 35 * sizeof(u32),
822 (void __user *) data);
1da177e4
LT
823
824 case PTRACE_SETEVRREGS:
825 /* Set the child spe register state. */
c391cd00
RM
826 return copy_regset_from_user(child, &user_ppc_native_view,
827 REGSET_SPE, 0, 35 * sizeof(u32),
828 (const void __user *) data);
1da177e4
LT
829#endif
830
e17666ba
BH
831 /* Old reverse args ptrace callss */
832 case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
833 case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
834 case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
835 case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */
836 ret = arch_ptrace_old(child, request, addr, data);
837 break;
838
1da177e4
LT
839 default:
840 ret = ptrace_request(child, request, addr, data);
841 break;
842 }
1da177e4
LT
843 return ret;
844}
845
ea9c102c 846static void do_syscall_trace(void)
1da177e4 847{
ea9c102c
DW
848 /* the 0x80 provides a way for the tracing parent to distinguish
849 between a syscall stop and SIGTRAP delivery */
1da177e4
LT
850 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
851 ? 0x80 : 0));
852
853 /*
854 * this isn't the same as continuing with a signal, but it will do
855 * for normal use. strace only continues with a signal if the
856 * stopping signal is not SIGTRAP. -brl
857 */
858 if (current->exit_code) {
859 send_sig(current->exit_code, current, 1);
860 current->exit_code = 0;
861 }
862}
ea9c102c
DW
863
864void do_syscall_trace_enter(struct pt_regs *regs)
865{
e8a30302 866 secure_computing(regs->gpr[0]);
e8a30302 867
ea9c102c
DW
868 if (test_thread_flag(TIF_SYSCALL_TRACE)
869 && (current->ptrace & PT_PTRACED))
870 do_syscall_trace();
871
cfcd1705
DW
872 if (unlikely(current->audit_context)) {
873#ifdef CONFIG_PPC64
874 if (!test_thread_flag(TIF_32BIT))
875 audit_syscall_entry(AUDIT_ARCH_PPC64,
876 regs->gpr[0],
877 regs->gpr[3], regs->gpr[4],
878 regs->gpr[5], regs->gpr[6]);
879 else
e8a30302 880#endif
cfcd1705
DW
881 audit_syscall_entry(AUDIT_ARCH_PPC,
882 regs->gpr[0],
883 regs->gpr[3] & 0xffffffff,
884 regs->gpr[4] & 0xffffffff,
885 regs->gpr[5] & 0xffffffff,
886 regs->gpr[6] & 0xffffffff);
887 }
ea9c102c
DW
888}
889
890void do_syscall_trace_leave(struct pt_regs *regs)
891{
ea9c102c 892 if (unlikely(current->audit_context))
4b9c876a 893 audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
ea9c102c
DW
894 regs->result);
895
e8a30302 896 if ((test_thread_flag(TIF_SYSCALL_TRACE)
1bd79336 897 || test_thread_flag(TIF_SINGLESTEP))
ea9c102c
DW
898 && (current->ptrace & PT_PTRACED))
899 do_syscall_trace();
900}