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powerpc: Fix compile error for CONFIG_VSX
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1da177e4 1/*
1da177e4
LT
2 * PowerPC version
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Derived from "arch/m68k/kernel/ptrace.c"
6 * Copyright (C) 1994 by Hamish Macdonald
7 * Taken from linux/kernel/ptrace.c and modified for M680x0.
8 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
9 *
10 * Modified by Cort Dougan (cort@hq.fsmlabs.com)
b123923d 11 * and Paul Mackerras (paulus@samba.org).
1da177e4
LT
12 *
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file README.legal in the main directory of
15 * this archive for more details.
16 */
17
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
1da177e4
LT
22#include <linux/errno.h>
23#include <linux/ptrace.h>
f65255e8 24#include <linux/regset.h>
3caf06c6 25#include <linux/elf.h>
1da177e4
LT
26#include <linux/user.h>
27#include <linux/security.h>
7ed20e1a 28#include <linux/signal.h>
ea9c102c
DW
29#include <linux/seccomp.h>
30#include <linux/audit.h>
e8a30302 31#ifdef CONFIG_PPC32
ea9c102c 32#include <linux/module.h>
e8a30302 33#endif
1da177e4
LT
34
35#include <asm/uaccess.h>
36#include <asm/page.h>
37#include <asm/pgtable.h>
38#include <asm/system.h>
21a62902 39
abd06505
BH
40/*
41 * does not yet catch signals sent when the child dies.
42 * in exit.c or in signal.c.
43 */
44
45/*
46 * Set of msr bits that gdb can change on behalf of a process.
47 */
48#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
49#define MSR_DEBUGCHANGE 0
1da177e4 50#else
abd06505 51#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
1da177e4 52#endif
acd89828 53
1da177e4 54/*
abd06505 55 * Max register writeable via put_reg
1da177e4 56 */
abd06505
BH
57#ifdef CONFIG_PPC32
58#define PT_MAX_PUT_REG PT_MQ
59#else
60#define PT_MAX_PUT_REG PT_CCR
61#endif
1da177e4 62
26f77130
RM
63static unsigned long get_user_msr(struct task_struct *task)
64{
65 return task->thread.regs->msr | task->thread.fpexc_mode;
66}
67
68static int set_user_msr(struct task_struct *task, unsigned long msr)
69{
70 task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
71 task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
72 return 0;
73}
74
75/*
76 * We prevent mucking around with the reserved area of trap
77 * which are used internally by the kernel.
78 */
79static int set_user_trap(struct task_struct *task, unsigned long trap)
80{
81 task->thread.regs->trap = trap & 0xfff0;
82 return 0;
83}
84
865418d8
BH
85/*
86 * Get contents of register REGNO in task TASK.
87 */
88unsigned long ptrace_get_reg(struct task_struct *task, int regno)
89{
865418d8
BH
90 if (task->thread.regs == NULL)
91 return -EIO;
92
26f77130
RM
93 if (regno == PT_MSR)
94 return get_user_msr(task);
865418d8
BH
95
96 if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
97 return ((unsigned long *)task->thread.regs)[regno];
98
99 return -EIO;
100}
101
102/*
103 * Write contents of register REGNO in task TASK.
104 */
105int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
106{
107 if (task->thread.regs == NULL)
108 return -EIO;
109
26f77130
RM
110 if (regno == PT_MSR)
111 return set_user_msr(task, data);
112 if (regno == PT_TRAP)
113 return set_user_trap(task, data);
114
115 if (regno <= PT_MAX_PUT_REG) {
865418d8
BH
116 ((unsigned long *)task->thread.regs)[regno] = data;
117 return 0;
118 }
119 return -EIO;
120}
121
44dd3f50
RM
122static int gpr_get(struct task_struct *target, const struct user_regset *regset,
123 unsigned int pos, unsigned int count,
124 void *kbuf, void __user *ubuf)
125{
126 int ret;
127
128 if (target->thread.regs == NULL)
129 return -EIO;
130
131 CHECK_FULL_REGS(target->thread.regs);
132
133 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
134 target->thread.regs,
135 0, offsetof(struct pt_regs, msr));
136 if (!ret) {
137 unsigned long msr = get_user_msr(target);
138 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
139 offsetof(struct pt_regs, msr),
140 offsetof(struct pt_regs, msr) +
141 sizeof(msr));
142 }
143
144 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
145 offsetof(struct pt_regs, msr) + sizeof(long));
146
147 if (!ret)
148 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
149 &target->thread.regs->orig_gpr3,
150 offsetof(struct pt_regs, orig_gpr3),
151 sizeof(struct pt_regs));
152 if (!ret)
153 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
154 sizeof(struct pt_regs), -1);
155
156 return ret;
157}
158
159static int gpr_set(struct task_struct *target, const struct user_regset *regset,
160 unsigned int pos, unsigned int count,
161 const void *kbuf, const void __user *ubuf)
162{
163 unsigned long reg;
164 int ret;
165
166 if (target->thread.regs == NULL)
167 return -EIO;
168
169 CHECK_FULL_REGS(target->thread.regs);
170
171 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
172 target->thread.regs,
173 0, PT_MSR * sizeof(reg));
174
175 if (!ret && count > 0) {
176 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
177 PT_MSR * sizeof(reg),
178 (PT_MSR + 1) * sizeof(reg));
179 if (!ret)
180 ret = set_user_msr(target, reg);
181 }
182
183 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
184 offsetof(struct pt_regs, msr) + sizeof(long));
185
186 if (!ret)
187 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
188 &target->thread.regs->orig_gpr3,
189 PT_ORIG_R3 * sizeof(reg),
190 (PT_MAX_PUT_REG + 1) * sizeof(reg));
191
192 if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
193 ret = user_regset_copyin_ignore(
194 &pos, &count, &kbuf, &ubuf,
195 (PT_MAX_PUT_REG + 1) * sizeof(reg),
196 PT_TRAP * sizeof(reg));
197
198 if (!ret && count > 0) {
199 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
200 PT_TRAP * sizeof(reg),
201 (PT_TRAP + 1) * sizeof(reg));
202 if (!ret)
203 ret = set_user_trap(target, reg);
204 }
205
206 if (!ret)
207 ret = user_regset_copyin_ignore(
208 &pos, &count, &kbuf, &ubuf,
209 (PT_TRAP + 1) * sizeof(reg), -1);
210
211 return ret;
212}
865418d8 213
f65255e8
RM
214static int fpr_get(struct task_struct *target, const struct user_regset *regset,
215 unsigned int pos, unsigned int count,
216 void *kbuf, void __user *ubuf)
217{
c6e6771b
MN
218#ifdef CONFIG_VSX
219 double buf[33];
220 int i;
221#endif
f65255e8
RM
222 flush_fp_to_thread(target);
223
c6e6771b
MN
224#ifdef CONFIG_VSX
225 /* copy to local buffer then write that out */
226 for (i = 0; i < 32 ; i++)
227 buf[i] = target->thread.TS_FPR(i);
228 memcpy(&buf[32], &target->thread.fpscr, sizeof(double));
229 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
230
231#else
f65255e8 232 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
9c75a31c 233 offsetof(struct thread_struct, TS_FPR(32)));
f65255e8
RM
234
235 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
236 &target->thread.fpr, 0, -1);
c6e6771b 237#endif
f65255e8
RM
238}
239
240static int fpr_set(struct task_struct *target, const struct user_regset *regset,
241 unsigned int pos, unsigned int count,
242 const void *kbuf, const void __user *ubuf)
243{
c6e6771b
MN
244#ifdef CONFIG_VSX
245 double buf[33];
246 int i;
247#endif
f65255e8
RM
248 flush_fp_to_thread(target);
249
c6e6771b
MN
250#ifdef CONFIG_VSX
251 /* copy to local buffer then write that out */
252 i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
253 if (i)
254 return i;
255 for (i = 0; i < 32 ; i++)
256 target->thread.TS_FPR(i) = buf[i];
257 memcpy(&target->thread.fpscr, &buf[32], sizeof(double));
258 return 0;
259#else
f65255e8 260 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
9c75a31c 261 offsetof(struct thread_struct, TS_FPR(32)));
f65255e8
RM
262
263 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
264 &target->thread.fpr, 0, -1);
c6e6771b 265#endif
f65255e8
RM
266}
267
865418d8
BH
268#ifdef CONFIG_ALTIVEC
269/*
270 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
271 * The transfer totals 34 quadword. Quadwords 0-31 contain the
272 * corresponding vector registers. Quadword 32 contains the vscr as the
273 * last word (offset 12) within that quadword. Quadword 33 contains the
274 * vrsave as the first word (offset 0) within the quadword.
275 *
276 * This definition of the VMX state is compatible with the current PPC32
277 * ptrace interface. This allows signal handling and ptrace to use the
278 * same structures. This also simplifies the implementation of a bi-arch
279 * (combined (32- and 64-bit) gdb.
280 */
281
3caf06c6
RM
282static int vr_active(struct task_struct *target,
283 const struct user_regset *regset)
284{
285 flush_altivec_to_thread(target);
286 return target->thread.used_vr ? regset->n : 0;
287}
288
289static int vr_get(struct task_struct *target, const struct user_regset *regset,
290 unsigned int pos, unsigned int count,
291 void *kbuf, void __user *ubuf)
292{
293 int ret;
294
295 flush_altivec_to_thread(target);
296
297 BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
298 offsetof(struct thread_struct, vr[32]));
299
300 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
301 &target->thread.vr, 0,
302 33 * sizeof(vector128));
303 if (!ret) {
304 /*
305 * Copy out only the low-order word of vrsave.
306 */
307 union {
308 elf_vrreg_t reg;
309 u32 word;
310 } vrsave;
311 memset(&vrsave, 0, sizeof(vrsave));
312 vrsave.word = target->thread.vrsave;
313 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
314 33 * sizeof(vector128), -1);
315 }
316
317 return ret;
318}
319
320static int vr_set(struct task_struct *target, const struct user_regset *regset,
321 unsigned int pos, unsigned int count,
322 const void *kbuf, const void __user *ubuf)
323{
324 int ret;
325
326 flush_altivec_to_thread(target);
327
328 BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
329 offsetof(struct thread_struct, vr[32]));
330
331 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
332 &target->thread.vr, 0, 33 * sizeof(vector128));
333 if (!ret && count > 0) {
334 /*
335 * We use only the first word of vrsave.
336 */
337 union {
338 elf_vrreg_t reg;
339 u32 word;
340 } vrsave;
341 memset(&vrsave, 0, sizeof(vrsave));
342 vrsave.word = target->thread.vrsave;
343 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
344 33 * sizeof(vector128), -1);
345 if (!ret)
346 target->thread.vrsave = vrsave.word;
347 }
348
349 return ret;
350}
865418d8
BH
351#endif /* CONFIG_ALTIVEC */
352
ce48b210
MN
353#ifdef CONFIG_VSX
354/*
355 * Currently to set and and get all the vsx state, you need to call
356 * the fp and VMX calls aswell. This only get/sets the lower 32
357 * 128bit VSX registers.
358 */
359
360static int vsr_active(struct task_struct *target,
361 const struct user_regset *regset)
362{
363 flush_vsx_to_thread(target);
364 return target->thread.used_vsr ? regset->n : 0;
365}
366
367static int vsr_get(struct task_struct *target, const struct user_regset *regset,
368 unsigned int pos, unsigned int count,
369 void *kbuf, void __user *ubuf)
370{
371 int ret;
372
373 flush_vsx_to_thread(target);
374
375 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
376 target->thread.fpr, 0,
377 32 * sizeof(vector128));
378
379 return ret;
380}
381
382static int vsr_set(struct task_struct *target, const struct user_regset *regset,
383 unsigned int pos, unsigned int count,
384 const void *kbuf, const void __user *ubuf)
385{
386 int ret;
387
388 flush_vsx_to_thread(target);
389
390 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
391 target->thread.fpr, 0,
392 32 * sizeof(vector128));
393
394 return ret;
395}
396#endif /* CONFIG_VSX */
397
865418d8
BH
398#ifdef CONFIG_SPE
399
400/*
401 * For get_evrregs/set_evrregs functions 'data' has the following layout:
402 *
403 * struct {
404 * u32 evr[32];
405 * u64 acc;
406 * u32 spefscr;
407 * }
408 */
409
a4e4b175
RM
410static int evr_active(struct task_struct *target,
411 const struct user_regset *regset)
865418d8 412{
a4e4b175
RM
413 flush_spe_to_thread(target);
414 return target->thread.used_spe ? regset->n : 0;
415}
865418d8 416
a4e4b175
RM
417static int evr_get(struct task_struct *target, const struct user_regset *regset,
418 unsigned int pos, unsigned int count,
419 void *kbuf, void __user *ubuf)
420{
421 int ret;
865418d8 422
a4e4b175 423 flush_spe_to_thread(target);
865418d8 424
a4e4b175
RM
425 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
426 &target->thread.evr,
427 0, sizeof(target->thread.evr));
865418d8 428
a4e4b175
RM
429 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
430 offsetof(struct thread_struct, spefscr));
431
432 if (!ret)
433 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
434 &target->thread.acc,
435 sizeof(target->thread.evr), -1);
436
437 return ret;
438}
439
440static int evr_set(struct task_struct *target, const struct user_regset *regset,
441 unsigned int pos, unsigned int count,
442 const void *kbuf, const void __user *ubuf)
443{
444 int ret;
445
446 flush_spe_to_thread(target);
447
448 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
449 &target->thread.evr,
450 0, sizeof(target->thread.evr));
865418d8 451
a4e4b175
RM
452 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
453 offsetof(struct thread_struct, spefscr));
454
455 if (!ret)
456 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
457 &target->thread.acc,
458 sizeof(target->thread.evr), -1);
459
460 return ret;
865418d8 461}
865418d8
BH
462#endif /* CONFIG_SPE */
463
464
80fdf470
RM
465/*
466 * These are our native regset flavors.
467 */
468enum powerpc_regset {
469 REGSET_GPR,
470 REGSET_FPR,
471#ifdef CONFIG_ALTIVEC
472 REGSET_VMX,
473#endif
ce48b210
MN
474#ifdef CONFIG_VSX
475 REGSET_VSX,
476#endif
80fdf470
RM
477#ifdef CONFIG_SPE
478 REGSET_SPE,
479#endif
480};
481
482static const struct user_regset native_regsets[] = {
483 [REGSET_GPR] = {
484 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
485 .size = sizeof(long), .align = sizeof(long),
486 .get = gpr_get, .set = gpr_set
487 },
488 [REGSET_FPR] = {
489 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
490 .size = sizeof(double), .align = sizeof(double),
491 .get = fpr_get, .set = fpr_set
492 },
493#ifdef CONFIG_ALTIVEC
494 [REGSET_VMX] = {
495 .core_note_type = NT_PPC_VMX, .n = 34,
496 .size = sizeof(vector128), .align = sizeof(vector128),
497 .active = vr_active, .get = vr_get, .set = vr_set
498 },
499#endif
ce48b210
MN
500#ifdef CONFIG_VSX
501 [REGSET_VSX] = {
502 .n = 32,
503 .size = sizeof(vector128), .align = sizeof(vector128),
504 .active = vsr_active, .get = vsr_get, .set = vsr_set
505 },
506#endif
80fdf470
RM
507#ifdef CONFIG_SPE
508 [REGSET_SPE] = {
509 .n = 35,
510 .size = sizeof(u32), .align = sizeof(u32),
511 .active = evr_active, .get = evr_get, .set = evr_set
512 },
513#endif
514};
515
516static const struct user_regset_view user_ppc_native_view = {
517 .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
518 .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
519};
520
fa8f5cb0
RM
521#ifdef CONFIG_PPC64
522#include <linux/compat.h>
523
524static int gpr32_get(struct task_struct *target,
525 const struct user_regset *regset,
526 unsigned int pos, unsigned int count,
527 void *kbuf, void __user *ubuf)
528{
529 const unsigned long *regs = &target->thread.regs->gpr[0];
530 compat_ulong_t *k = kbuf;
531 compat_ulong_t __user *u = ubuf;
532 compat_ulong_t reg;
533
534 if (target->thread.regs == NULL)
535 return -EIO;
536
537 CHECK_FULL_REGS(target->thread.regs);
538
539 pos /= sizeof(reg);
540 count /= sizeof(reg);
541
542 if (kbuf)
543 for (; count > 0 && pos < PT_MSR; --count)
544 *k++ = regs[pos++];
545 else
546 for (; count > 0 && pos < PT_MSR; --count)
547 if (__put_user((compat_ulong_t) regs[pos++], u++))
548 return -EFAULT;
549
550 if (count > 0 && pos == PT_MSR) {
551 reg = get_user_msr(target);
552 if (kbuf)
553 *k++ = reg;
554 else if (__put_user(reg, u++))
555 return -EFAULT;
556 ++pos;
557 --count;
558 }
559
560 if (kbuf)
561 for (; count > 0 && pos < PT_REGS_COUNT; --count)
562 *k++ = regs[pos++];
563 else
564 for (; count > 0 && pos < PT_REGS_COUNT; --count)
565 if (__put_user((compat_ulong_t) regs[pos++], u++))
566 return -EFAULT;
567
568 kbuf = k;
569 ubuf = u;
570 pos *= sizeof(reg);
571 count *= sizeof(reg);
572 return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
573 PT_REGS_COUNT * sizeof(reg), -1);
574}
575
576static int gpr32_set(struct task_struct *target,
577 const struct user_regset *regset,
578 unsigned int pos, unsigned int count,
579 const void *kbuf, const void __user *ubuf)
580{
581 unsigned long *regs = &target->thread.regs->gpr[0];
582 const compat_ulong_t *k = kbuf;
583 const compat_ulong_t __user *u = ubuf;
584 compat_ulong_t reg;
585
586 if (target->thread.regs == NULL)
587 return -EIO;
588
589 CHECK_FULL_REGS(target->thread.regs);
590
591 pos /= sizeof(reg);
592 count /= sizeof(reg);
593
594 if (kbuf)
595 for (; count > 0 && pos < PT_MSR; --count)
596 regs[pos++] = *k++;
597 else
598 for (; count > 0 && pos < PT_MSR; --count) {
599 if (__get_user(reg, u++))
600 return -EFAULT;
601 regs[pos++] = reg;
602 }
603
604
605 if (count > 0 && pos == PT_MSR) {
606 if (kbuf)
607 reg = *k++;
608 else if (__get_user(reg, u++))
609 return -EFAULT;
610 set_user_msr(target, reg);
611 ++pos;
612 --count;
613 }
614
c2372eb9 615 if (kbuf) {
fa8f5cb0
RM
616 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
617 regs[pos++] = *k++;
c2372eb9
RM
618 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
619 ++k;
620 } else {
fa8f5cb0
RM
621 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
622 if (__get_user(reg, u++))
623 return -EFAULT;
624 regs[pos++] = reg;
625 }
c2372eb9
RM
626 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
627 if (__get_user(reg, u++))
628 return -EFAULT;
629 }
fa8f5cb0
RM
630
631 if (count > 0 && pos == PT_TRAP) {
632 if (kbuf)
633 reg = *k++;
634 else if (__get_user(reg, u++))
635 return -EFAULT;
636 set_user_trap(target, reg);
637 ++pos;
638 --count;
639 }
640
641 kbuf = k;
642 ubuf = u;
643 pos *= sizeof(reg);
644 count *= sizeof(reg);
645 return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
646 (PT_TRAP + 1) * sizeof(reg), -1);
647}
648
649/*
650 * These are the regset flavors matching the CONFIG_PPC32 native set.
651 */
652static const struct user_regset compat_regsets[] = {
653 [REGSET_GPR] = {
654 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
655 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
656 .get = gpr32_get, .set = gpr32_set
657 },
658 [REGSET_FPR] = {
659 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
660 .size = sizeof(double), .align = sizeof(double),
661 .get = fpr_get, .set = fpr_set
662 },
663#ifdef CONFIG_ALTIVEC
664 [REGSET_VMX] = {
665 .core_note_type = NT_PPC_VMX, .n = 34,
666 .size = sizeof(vector128), .align = sizeof(vector128),
667 .active = vr_active, .get = vr_get, .set = vr_set
668 },
669#endif
670#ifdef CONFIG_SPE
671 [REGSET_SPE] = {
24f1a849 672 .core_note_type = NT_PPC_SPE, .n = 35,
fa8f5cb0
RM
673 .size = sizeof(u32), .align = sizeof(u32),
674 .active = evr_active, .get = evr_get, .set = evr_set
675 },
676#endif
677};
678
679static const struct user_regset_view user_ppc_compat_view = {
680 .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
681 .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
682};
683#endif /* CONFIG_PPC64 */
684
80fdf470
RM
685const struct user_regset_view *task_user_regset_view(struct task_struct *task)
686{
fa8f5cb0
RM
687#ifdef CONFIG_PPC64
688 if (test_tsk_thread_flag(task, TIF_32BIT))
689 return &user_ppc_compat_view;
690#endif
80fdf470
RM
691 return &user_ppc_native_view;
692}
693
694
2a84b0d7 695void user_enable_single_step(struct task_struct *task)
865418d8
BH
696{
697 struct pt_regs *regs = task->thread.regs;
698
699 if (regs != NULL) {
700#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
701 task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC;
702 regs->msr |= MSR_DE;
703#else
704 regs->msr |= MSR_SE;
705#endif
706 }
707 set_tsk_thread_flag(task, TIF_SINGLESTEP);
708}
709
2a84b0d7 710void user_disable_single_step(struct task_struct *task)
865418d8
BH
711{
712 struct pt_regs *regs = task->thread.regs;
713
714 if (regs != NULL) {
715#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
716 task->thread.dbcr0 = 0;
717 regs->msr &= ~MSR_DE;
718#else
719 regs->msr &= ~MSR_SE;
720#endif
721 }
722 clear_tsk_thread_flag(task, TIF_SINGLESTEP);
723}
724
abd06505
BH
725static int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
726 unsigned long data)
727{
728 /* We only support one DABR and no IABRS at the moment */
729 if (addr > 0)
730 return -EINVAL;
731
732 /* The bottom 3 bits are flags */
733 if ((data & ~0x7UL) >= TASK_SIZE)
734 return -EIO;
735
736 /* Ensure translation is on */
737 if (data && !(data & DABR_TRANSLATION))
738 return -EIO;
739
740 task->thread.dabr = data;
741 return 0;
742}
abd06505 743
1da177e4
LT
744/*
745 * Called by kernel/ptrace.c when detaching..
746 *
747 * Make sure single step bits etc are not set.
748 */
749void ptrace_disable(struct task_struct *child)
750{
751 /* make sure the single step bit is not set. */
2a84b0d7 752 user_disable_single_step(child);
1da177e4
LT
753}
754
e17666ba
BH
755/*
756 * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
757 * we mark them as obsolete now, they will be removed in a future version
758 */
759static long arch_ptrace_old(struct task_struct *child, long request, long addr,
760 long data)
761{
c391cd00
RM
762 switch (request) {
763 case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
764 return copy_regset_to_user(child, &user_ppc_native_view,
765 REGSET_GPR, 0, 32 * sizeof(long),
766 (void __user *) data);
767
768 case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
769 return copy_regset_from_user(child, &user_ppc_native_view,
770 REGSET_GPR, 0, 32 * sizeof(long),
771 (const void __user *) data);
772
773 case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
774 return copy_regset_to_user(child, &user_ppc_native_view,
775 REGSET_FPR, 0, 32 * sizeof(double),
776 (void __user *) data);
777
778 case PPC_PTRACE_SETFPREGS: /* Set FPRs 0 - 31. */
779 return copy_regset_from_user(child, &user_ppc_native_view,
780 REGSET_FPR, 0, 32 * sizeof(double),
781 (const void __user *) data);
e17666ba
BH
782 }
783
c391cd00 784 return -EPERM;
e17666ba
BH
785}
786
481bed45 787long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1da177e4 788{
1da177e4
LT
789 int ret = -EPERM;
790
1da177e4 791 switch (request) {
1da177e4 792 /* read the word at location addr in the USER area. */
1da177e4
LT
793 case PTRACE_PEEKUSR: {
794 unsigned long index, tmp;
795
796 ret = -EIO;
797 /* convert to index and check */
e8a30302 798#ifdef CONFIG_PPC32
1da177e4 799 index = (unsigned long) addr >> 2;
e8a30302
SR
800 if ((addr & 3) || (index > PT_FPSCR)
801 || (child->thread.regs == NULL))
802#else
803 index = (unsigned long) addr >> 3;
804 if ((addr & 7) || (index > PT_FPSCR))
805#endif
1da177e4
LT
806 break;
807
808 CHECK_FULL_REGS(child->thread.regs);
809 if (index < PT_FPR0) {
865418d8 810 tmp = ptrace_get_reg(child, (int) index);
1da177e4 811 } else {
e8a30302 812 flush_fp_to_thread(child);
9c75a31c
MN
813 tmp = ((unsigned long *)child->thread.fpr)
814 [TS_FPRWIDTH * (index - PT_FPR0)];
1da177e4
LT
815 }
816 ret = put_user(tmp,(unsigned long __user *) data);
817 break;
818 }
819
1da177e4
LT
820 /* write the word at location addr in the USER area */
821 case PTRACE_POKEUSR: {
822 unsigned long index;
823
824 ret = -EIO;
825 /* convert to index and check */
e8a30302 826#ifdef CONFIG_PPC32
1da177e4 827 index = (unsigned long) addr >> 2;
e8a30302
SR
828 if ((addr & 3) || (index > PT_FPSCR)
829 || (child->thread.regs == NULL))
830#else
831 index = (unsigned long) addr >> 3;
832 if ((addr & 7) || (index > PT_FPSCR))
833#endif
1da177e4
LT
834 break;
835
836 CHECK_FULL_REGS(child->thread.regs);
1da177e4 837 if (index < PT_FPR0) {
865418d8 838 ret = ptrace_put_reg(child, index, data);
1da177e4 839 } else {
e8a30302 840 flush_fp_to_thread(child);
9c75a31c
MN
841 ((unsigned long *)child->thread.fpr)
842 [TS_FPRWIDTH * (index - PT_FPR0)] = data;
1da177e4
LT
843 ret = 0;
844 }
845 break;
846 }
847
e8a30302
SR
848 case PTRACE_GET_DEBUGREG: {
849 ret = -EINVAL;
850 /* We only support one DABR and no IABRS at the moment */
851 if (addr > 0)
852 break;
853 ret = put_user(child->thread.dabr,
854 (unsigned long __user *)data);
855 break;
856 }
857
858 case PTRACE_SET_DEBUGREG:
859 ret = ptrace_set_debugreg(child, addr, data);
860 break;
e8a30302 861
e17666ba
BH
862#ifdef CONFIG_PPC64
863 case PTRACE_GETREGS64:
864#endif
c391cd00
RM
865 case PTRACE_GETREGS: /* Get all pt_regs from the child. */
866 return copy_regset_to_user(child, &user_ppc_native_view,
867 REGSET_GPR,
868 0, sizeof(struct pt_regs),
869 (void __user *) data);
e8a30302 870
e17666ba
BH
871#ifdef CONFIG_PPC64
872 case PTRACE_SETREGS64:
873#endif
c391cd00
RM
874 case PTRACE_SETREGS: /* Set all gp regs in the child. */
875 return copy_regset_from_user(child, &user_ppc_native_view,
876 REGSET_GPR,
877 0, sizeof(struct pt_regs),
878 (const void __user *) data);
879
880 case PTRACE_GETFPREGS: /* Get the child FPU state (FPR0...31 + FPSCR) */
881 return copy_regset_to_user(child, &user_ppc_native_view,
882 REGSET_FPR,
883 0, sizeof(elf_fpregset_t),
884 (void __user *) data);
885
886 case PTRACE_SETFPREGS: /* Set the child FPU state (FPR0...31 + FPSCR) */
887 return copy_regset_from_user(child, &user_ppc_native_view,
888 REGSET_FPR,
889 0, sizeof(elf_fpregset_t),
890 (const void __user *) data);
e8a30302 891
1da177e4
LT
892#ifdef CONFIG_ALTIVEC
893 case PTRACE_GETVRREGS:
c391cd00
RM
894 return copy_regset_to_user(child, &user_ppc_native_view,
895 REGSET_VMX,
896 0, (33 * sizeof(vector128) +
897 sizeof(u32)),
898 (void __user *) data);
1da177e4
LT
899
900 case PTRACE_SETVRREGS:
c391cd00
RM
901 return copy_regset_from_user(child, &user_ppc_native_view,
902 REGSET_VMX,
903 0, (33 * sizeof(vector128) +
904 sizeof(u32)),
905 (const void __user *) data);
1da177e4 906#endif
ce48b210
MN
907#ifdef CONFIG_VSX
908 case PTRACE_GETVSRREGS:
909 return copy_regset_to_user(child, &user_ppc_native_view,
910 REGSET_VSX,
911 0, (32 * sizeof(vector128) +
912 sizeof(u32)),
913 (void __user *) data);
914
915 case PTRACE_SETVSRREGS:
916 return copy_regset_from_user(child, &user_ppc_native_view,
917 REGSET_VSX,
918 0, (32 * sizeof(vector128) +
919 sizeof(u32)),
920 (const void __user *) data);
921#endif
1da177e4
LT
922#ifdef CONFIG_SPE
923 case PTRACE_GETEVRREGS:
924 /* Get the child spe register state. */
c391cd00
RM
925 return copy_regset_to_user(child, &user_ppc_native_view,
926 REGSET_SPE, 0, 35 * sizeof(u32),
927 (void __user *) data);
1da177e4
LT
928
929 case PTRACE_SETEVRREGS:
930 /* Set the child spe register state. */
c391cd00
RM
931 return copy_regset_from_user(child, &user_ppc_native_view,
932 REGSET_SPE, 0, 35 * sizeof(u32),
933 (const void __user *) data);
1da177e4
LT
934#endif
935
e17666ba
BH
936 /* Old reverse args ptrace callss */
937 case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
938 case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
939 case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
940 case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */
941 ret = arch_ptrace_old(child, request, addr, data);
942 break;
943
1da177e4
LT
944 default:
945 ret = ptrace_request(child, request, addr, data);
946 break;
947 }
1da177e4
LT
948 return ret;
949}
950
ea9c102c 951static void do_syscall_trace(void)
1da177e4 952{
ea9c102c
DW
953 /* the 0x80 provides a way for the tracing parent to distinguish
954 between a syscall stop and SIGTRAP delivery */
1da177e4
LT
955 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
956 ? 0x80 : 0));
957
958 /*
959 * this isn't the same as continuing with a signal, but it will do
960 * for normal use. strace only continues with a signal if the
961 * stopping signal is not SIGTRAP. -brl
962 */
963 if (current->exit_code) {
964 send_sig(current->exit_code, current, 1);
965 current->exit_code = 0;
966 }
967}
ea9c102c
DW
968
969void do_syscall_trace_enter(struct pt_regs *regs)
970{
e8a30302 971 secure_computing(regs->gpr[0]);
e8a30302 972
ea9c102c
DW
973 if (test_thread_flag(TIF_SYSCALL_TRACE)
974 && (current->ptrace & PT_PTRACED))
975 do_syscall_trace();
976
cfcd1705
DW
977 if (unlikely(current->audit_context)) {
978#ifdef CONFIG_PPC64
979 if (!test_thread_flag(TIF_32BIT))
980 audit_syscall_entry(AUDIT_ARCH_PPC64,
981 regs->gpr[0],
982 regs->gpr[3], regs->gpr[4],
983 regs->gpr[5], regs->gpr[6]);
984 else
e8a30302 985#endif
cfcd1705
DW
986 audit_syscall_entry(AUDIT_ARCH_PPC,
987 regs->gpr[0],
988 regs->gpr[3] & 0xffffffff,
989 regs->gpr[4] & 0xffffffff,
990 regs->gpr[5] & 0xffffffff,
991 regs->gpr[6] & 0xffffffff);
992 }
ea9c102c
DW
993}
994
995void do_syscall_trace_leave(struct pt_regs *regs)
996{
ea9c102c 997 if (unlikely(current->audit_context))
4b9c876a 998 audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
ea9c102c
DW
999 regs->result);
1000
e8a30302 1001 if ((test_thread_flag(TIF_SYSCALL_TRACE)
1bd79336 1002 || test_thread_flag(TIF_SINGLESTEP))
ea9c102c
DW
1003 && (current->ptrace & PT_PTRACED))
1004 do_syscall_trace();
1005}