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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * PowerPC version |
3 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
4 | * | |
5 | * Derived from "arch/m68k/kernel/ptrace.c" | |
6 | * Copyright (C) 1994 by Hamish Macdonald | |
7 | * Taken from linux/kernel/ptrace.c and modified for M680x0. | |
8 | * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds | |
9 | * | |
10 | * Modified by Cort Dougan (cort@hq.fsmlabs.com) | |
b123923d | 11 | * and Paul Mackerras (paulus@samba.org). |
1da177e4 LT |
12 | * |
13 | * This file is subject to the terms and conditions of the GNU General | |
14 | * Public License. See the file README.legal in the main directory of | |
15 | * this archive for more details. | |
16 | */ | |
17 | ||
18 | #include <linux/kernel.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/mm.h> | |
21 | #include <linux/smp.h> | |
1da177e4 LT |
22 | #include <linux/errno.h> |
23 | #include <linux/ptrace.h> | |
f65255e8 | 24 | #include <linux/regset.h> |
3caf06c6 | 25 | #include <linux/elf.h> |
1da177e4 LT |
26 | #include <linux/user.h> |
27 | #include <linux/security.h> | |
7ed20e1a | 28 | #include <linux/signal.h> |
ea9c102c DW |
29 | #include <linux/seccomp.h> |
30 | #include <linux/audit.h> | |
e8a30302 | 31 | #ifdef CONFIG_PPC32 |
ea9c102c | 32 | #include <linux/module.h> |
e8a30302 | 33 | #endif |
1da177e4 LT |
34 | |
35 | #include <asm/uaccess.h> | |
36 | #include <asm/page.h> | |
37 | #include <asm/pgtable.h> | |
38 | #include <asm/system.h> | |
21a62902 | 39 | |
abd06505 BH |
40 | /* |
41 | * does not yet catch signals sent when the child dies. | |
42 | * in exit.c or in signal.c. | |
43 | */ | |
44 | ||
45 | /* | |
46 | * Set of msr bits that gdb can change on behalf of a process. | |
47 | */ | |
48 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | |
49 | #define MSR_DEBUGCHANGE 0 | |
1da177e4 | 50 | #else |
abd06505 | 51 | #define MSR_DEBUGCHANGE (MSR_SE | MSR_BE) |
1da177e4 | 52 | #endif |
acd89828 | 53 | |
1da177e4 | 54 | /* |
abd06505 | 55 | * Max register writeable via put_reg |
1da177e4 | 56 | */ |
abd06505 BH |
57 | #ifdef CONFIG_PPC32 |
58 | #define PT_MAX_PUT_REG PT_MQ | |
59 | #else | |
60 | #define PT_MAX_PUT_REG PT_CCR | |
61 | #endif | |
1da177e4 | 62 | |
26f77130 RM |
63 | static unsigned long get_user_msr(struct task_struct *task) |
64 | { | |
65 | return task->thread.regs->msr | task->thread.fpexc_mode; | |
66 | } | |
67 | ||
68 | static int set_user_msr(struct task_struct *task, unsigned long msr) | |
69 | { | |
70 | task->thread.regs->msr &= ~MSR_DEBUGCHANGE; | |
71 | task->thread.regs->msr |= msr & MSR_DEBUGCHANGE; | |
72 | return 0; | |
73 | } | |
74 | ||
75 | /* | |
76 | * We prevent mucking around with the reserved area of trap | |
77 | * which are used internally by the kernel. | |
78 | */ | |
79 | static int set_user_trap(struct task_struct *task, unsigned long trap) | |
80 | { | |
81 | task->thread.regs->trap = trap & 0xfff0; | |
82 | return 0; | |
83 | } | |
84 | ||
865418d8 BH |
85 | /* |
86 | * Get contents of register REGNO in task TASK. | |
87 | */ | |
88 | unsigned long ptrace_get_reg(struct task_struct *task, int regno) | |
89 | { | |
865418d8 BH |
90 | if (task->thread.regs == NULL) |
91 | return -EIO; | |
92 | ||
26f77130 RM |
93 | if (regno == PT_MSR) |
94 | return get_user_msr(task); | |
865418d8 BH |
95 | |
96 | if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) | |
97 | return ((unsigned long *)task->thread.regs)[regno]; | |
98 | ||
99 | return -EIO; | |
100 | } | |
101 | ||
102 | /* | |
103 | * Write contents of register REGNO in task TASK. | |
104 | */ | |
105 | int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data) | |
106 | { | |
107 | if (task->thread.regs == NULL) | |
108 | return -EIO; | |
109 | ||
26f77130 RM |
110 | if (regno == PT_MSR) |
111 | return set_user_msr(task, data); | |
112 | if (regno == PT_TRAP) | |
113 | return set_user_trap(task, data); | |
114 | ||
115 | if (regno <= PT_MAX_PUT_REG) { | |
865418d8 BH |
116 | ((unsigned long *)task->thread.regs)[regno] = data; |
117 | return 0; | |
118 | } | |
119 | return -EIO; | |
120 | } | |
121 | ||
44dd3f50 RM |
122 | static int gpr_get(struct task_struct *target, const struct user_regset *regset, |
123 | unsigned int pos, unsigned int count, | |
124 | void *kbuf, void __user *ubuf) | |
125 | { | |
126 | int ret; | |
127 | ||
128 | if (target->thread.regs == NULL) | |
129 | return -EIO; | |
130 | ||
131 | CHECK_FULL_REGS(target->thread.regs); | |
132 | ||
133 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, | |
134 | target->thread.regs, | |
135 | 0, offsetof(struct pt_regs, msr)); | |
136 | if (!ret) { | |
137 | unsigned long msr = get_user_msr(target); | |
138 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr, | |
139 | offsetof(struct pt_regs, msr), | |
140 | offsetof(struct pt_regs, msr) + | |
141 | sizeof(msr)); | |
142 | } | |
143 | ||
144 | BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) != | |
145 | offsetof(struct pt_regs, msr) + sizeof(long)); | |
146 | ||
147 | if (!ret) | |
148 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, | |
149 | &target->thread.regs->orig_gpr3, | |
150 | offsetof(struct pt_regs, orig_gpr3), | |
151 | sizeof(struct pt_regs)); | |
152 | if (!ret) | |
153 | ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, | |
154 | sizeof(struct pt_regs), -1); | |
155 | ||
156 | return ret; | |
157 | } | |
158 | ||
159 | static int gpr_set(struct task_struct *target, const struct user_regset *regset, | |
160 | unsigned int pos, unsigned int count, | |
161 | const void *kbuf, const void __user *ubuf) | |
162 | { | |
163 | unsigned long reg; | |
164 | int ret; | |
165 | ||
166 | if (target->thread.regs == NULL) | |
167 | return -EIO; | |
168 | ||
169 | CHECK_FULL_REGS(target->thread.regs); | |
170 | ||
171 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
172 | target->thread.regs, | |
173 | 0, PT_MSR * sizeof(reg)); | |
174 | ||
175 | if (!ret && count > 0) { | |
176 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®, | |
177 | PT_MSR * sizeof(reg), | |
178 | (PT_MSR + 1) * sizeof(reg)); | |
179 | if (!ret) | |
180 | ret = set_user_msr(target, reg); | |
181 | } | |
182 | ||
183 | BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) != | |
184 | offsetof(struct pt_regs, msr) + sizeof(long)); | |
185 | ||
186 | if (!ret) | |
187 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
188 | &target->thread.regs->orig_gpr3, | |
189 | PT_ORIG_R3 * sizeof(reg), | |
190 | (PT_MAX_PUT_REG + 1) * sizeof(reg)); | |
191 | ||
192 | if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret) | |
193 | ret = user_regset_copyin_ignore( | |
194 | &pos, &count, &kbuf, &ubuf, | |
195 | (PT_MAX_PUT_REG + 1) * sizeof(reg), | |
196 | PT_TRAP * sizeof(reg)); | |
197 | ||
198 | if (!ret && count > 0) { | |
199 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®, | |
200 | PT_TRAP * sizeof(reg), | |
201 | (PT_TRAP + 1) * sizeof(reg)); | |
202 | if (!ret) | |
203 | ret = set_user_trap(target, reg); | |
204 | } | |
205 | ||
206 | if (!ret) | |
207 | ret = user_regset_copyin_ignore( | |
208 | &pos, &count, &kbuf, &ubuf, | |
209 | (PT_TRAP + 1) * sizeof(reg), -1); | |
210 | ||
211 | return ret; | |
212 | } | |
865418d8 | 213 | |
f65255e8 RM |
214 | static int fpr_get(struct task_struct *target, const struct user_regset *regset, |
215 | unsigned int pos, unsigned int count, | |
216 | void *kbuf, void __user *ubuf) | |
217 | { | |
218 | flush_fp_to_thread(target); | |
219 | ||
220 | BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != | |
221 | offsetof(struct thread_struct, fpr[32])); | |
222 | ||
223 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, | |
224 | &target->thread.fpr, 0, -1); | |
225 | } | |
226 | ||
227 | static int fpr_set(struct task_struct *target, const struct user_regset *regset, | |
228 | unsigned int pos, unsigned int count, | |
229 | const void *kbuf, const void __user *ubuf) | |
230 | { | |
231 | flush_fp_to_thread(target); | |
232 | ||
233 | BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != | |
234 | offsetof(struct thread_struct, fpr[32])); | |
235 | ||
236 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
237 | &target->thread.fpr, 0, -1); | |
238 | } | |
239 | ||
865418d8 BH |
240 | static int get_fpregs(void __user *data, struct task_struct *task, |
241 | int has_fpscr) | |
242 | { | |
243 | unsigned int count = has_fpscr ? 33 : 32; | |
f65255e8 | 244 | if (!access_ok(VERIFY_WRITE, data, count * sizeof(double))) |
865418d8 | 245 | return -EFAULT; |
f65255e8 | 246 | return fpr_get(task, NULL, 0, count * sizeof(double), NULL, data); |
865418d8 BH |
247 | } |
248 | ||
249 | static int set_fpregs(void __user *data, struct task_struct *task, | |
250 | int has_fpscr) | |
251 | { | |
252 | unsigned int count = has_fpscr ? 33 : 32; | |
f65255e8 | 253 | if (!access_ok(VERIFY_READ, data, count * sizeof(double))) |
865418d8 | 254 | return -EFAULT; |
f65255e8 | 255 | return fpr_set(task, NULL, 0, count * sizeof(double), NULL, data); |
865418d8 BH |
256 | } |
257 | ||
258 | ||
259 | #ifdef CONFIG_ALTIVEC | |
260 | /* | |
261 | * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. | |
262 | * The transfer totals 34 quadword. Quadwords 0-31 contain the | |
263 | * corresponding vector registers. Quadword 32 contains the vscr as the | |
264 | * last word (offset 12) within that quadword. Quadword 33 contains the | |
265 | * vrsave as the first word (offset 0) within the quadword. | |
266 | * | |
267 | * This definition of the VMX state is compatible with the current PPC32 | |
268 | * ptrace interface. This allows signal handling and ptrace to use the | |
269 | * same structures. This also simplifies the implementation of a bi-arch | |
270 | * (combined (32- and 64-bit) gdb. | |
271 | */ | |
272 | ||
3caf06c6 RM |
273 | static int vr_active(struct task_struct *target, |
274 | const struct user_regset *regset) | |
275 | { | |
276 | flush_altivec_to_thread(target); | |
277 | return target->thread.used_vr ? regset->n : 0; | |
278 | } | |
279 | ||
280 | static int vr_get(struct task_struct *target, const struct user_regset *regset, | |
281 | unsigned int pos, unsigned int count, | |
282 | void *kbuf, void __user *ubuf) | |
283 | { | |
284 | int ret; | |
285 | ||
286 | flush_altivec_to_thread(target); | |
287 | ||
288 | BUILD_BUG_ON(offsetof(struct thread_struct, vscr) != | |
289 | offsetof(struct thread_struct, vr[32])); | |
290 | ||
291 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, | |
292 | &target->thread.vr, 0, | |
293 | 33 * sizeof(vector128)); | |
294 | if (!ret) { | |
295 | /* | |
296 | * Copy out only the low-order word of vrsave. | |
297 | */ | |
298 | union { | |
299 | elf_vrreg_t reg; | |
300 | u32 word; | |
301 | } vrsave; | |
302 | memset(&vrsave, 0, sizeof(vrsave)); | |
303 | vrsave.word = target->thread.vrsave; | |
304 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave, | |
305 | 33 * sizeof(vector128), -1); | |
306 | } | |
307 | ||
308 | return ret; | |
309 | } | |
310 | ||
311 | static int vr_set(struct task_struct *target, const struct user_regset *regset, | |
312 | unsigned int pos, unsigned int count, | |
313 | const void *kbuf, const void __user *ubuf) | |
314 | { | |
315 | int ret; | |
316 | ||
317 | flush_altivec_to_thread(target); | |
318 | ||
319 | BUILD_BUG_ON(offsetof(struct thread_struct, vscr) != | |
320 | offsetof(struct thread_struct, vr[32])); | |
321 | ||
322 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
323 | &target->thread.vr, 0, 33 * sizeof(vector128)); | |
324 | if (!ret && count > 0) { | |
325 | /* | |
326 | * We use only the first word of vrsave. | |
327 | */ | |
328 | union { | |
329 | elf_vrreg_t reg; | |
330 | u32 word; | |
331 | } vrsave; | |
332 | memset(&vrsave, 0, sizeof(vrsave)); | |
333 | vrsave.word = target->thread.vrsave; | |
334 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave, | |
335 | 33 * sizeof(vector128), -1); | |
336 | if (!ret) | |
337 | target->thread.vrsave = vrsave.word; | |
338 | } | |
339 | ||
340 | return ret; | |
341 | } | |
342 | ||
865418d8 BH |
343 | /* |
344 | * Get contents of AltiVec register state in task TASK | |
345 | */ | |
346 | static int get_vrregs(unsigned long __user *data, struct task_struct *task) | |
347 | { | |
3caf06c6 RM |
348 | if (!access_ok(VERIFY_WRITE, data, |
349 | 33 * sizeof(vector128) + sizeof(u32))) | |
865418d8 BH |
350 | return -EFAULT; |
351 | ||
3caf06c6 RM |
352 | return vr_get(task, NULL, 0, 33 * sizeof(vector128) + sizeof(u32), |
353 | NULL, data); | |
865418d8 BH |
354 | } |
355 | ||
356 | /* | |
357 | * Write contents of AltiVec register state into task TASK. | |
358 | */ | |
359 | static int set_vrregs(struct task_struct *task, unsigned long __user *data) | |
360 | { | |
3caf06c6 | 361 | if (!access_ok(VERIFY_READ, data, 33 * sizeof(vector128) + sizeof(u32))) |
865418d8 BH |
362 | return -EFAULT; |
363 | ||
3caf06c6 RM |
364 | return vr_set(task, NULL, 0, 33 * sizeof(vector128) + sizeof(u32), |
365 | NULL, data); | |
865418d8 BH |
366 | } |
367 | #endif /* CONFIG_ALTIVEC */ | |
368 | ||
369 | #ifdef CONFIG_SPE | |
370 | ||
371 | /* | |
372 | * For get_evrregs/set_evrregs functions 'data' has the following layout: | |
373 | * | |
374 | * struct { | |
375 | * u32 evr[32]; | |
376 | * u64 acc; | |
377 | * u32 spefscr; | |
378 | * } | |
379 | */ | |
380 | ||
a4e4b175 RM |
381 | static int evr_active(struct task_struct *target, |
382 | const struct user_regset *regset) | |
865418d8 | 383 | { |
a4e4b175 RM |
384 | flush_spe_to_thread(target); |
385 | return target->thread.used_spe ? regset->n : 0; | |
386 | } | |
865418d8 | 387 | |
a4e4b175 RM |
388 | static int evr_get(struct task_struct *target, const struct user_regset *regset, |
389 | unsigned int pos, unsigned int count, | |
390 | void *kbuf, void __user *ubuf) | |
391 | { | |
392 | int ret; | |
865418d8 | 393 | |
a4e4b175 | 394 | flush_spe_to_thread(target); |
865418d8 | 395 | |
a4e4b175 RM |
396 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
397 | &target->thread.evr, | |
398 | 0, sizeof(target->thread.evr)); | |
865418d8 | 399 | |
a4e4b175 RM |
400 | BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) != |
401 | offsetof(struct thread_struct, spefscr)); | |
402 | ||
403 | if (!ret) | |
404 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, | |
405 | &target->thread.acc, | |
406 | sizeof(target->thread.evr), -1); | |
407 | ||
408 | return ret; | |
409 | } | |
410 | ||
411 | static int evr_set(struct task_struct *target, const struct user_regset *regset, | |
412 | unsigned int pos, unsigned int count, | |
413 | const void *kbuf, const void __user *ubuf) | |
414 | { | |
415 | int ret; | |
416 | ||
417 | flush_spe_to_thread(target); | |
418 | ||
419 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
420 | &target->thread.evr, | |
421 | 0, sizeof(target->thread.evr)); | |
865418d8 | 422 | |
a4e4b175 RM |
423 | BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) != |
424 | offsetof(struct thread_struct, spefscr)); | |
425 | ||
426 | if (!ret) | |
427 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
428 | &target->thread.acc, | |
429 | sizeof(target->thread.evr), -1); | |
430 | ||
431 | return ret; | |
865418d8 BH |
432 | } |
433 | ||
434 | /* | |
a4e4b175 | 435 | * Get contents of SPE register state in task TASK. |
865418d8 | 436 | */ |
a4e4b175 | 437 | static int get_evrregs(unsigned long __user *data, struct task_struct *task) |
865418d8 | 438 | { |
a4e4b175 | 439 | if (!access_ok(VERIFY_WRITE, data, 35 * sizeof(u32))) |
865418d8 BH |
440 | return -EFAULT; |
441 | ||
a4e4b175 RM |
442 | return evr_get(task, NULL, 0, 35 * sizeof(u32), NULL, data); |
443 | } | |
865418d8 | 444 | |
a4e4b175 RM |
445 | /* |
446 | * Write contents of SPE register state into task TASK. | |
447 | */ | |
448 | static int set_evrregs(struct task_struct *task, unsigned long *data) | |
449 | { | |
450 | if (!access_ok(VERIFY_READ, data, 35 * sizeof(u32))) | |
865418d8 BH |
451 | return -EFAULT; |
452 | ||
a4e4b175 | 453 | return evr_set(task, NULL, 0, 35 * sizeof(u32), NULL, data); |
865418d8 BH |
454 | } |
455 | #endif /* CONFIG_SPE */ | |
456 | ||
457 | ||
80fdf470 RM |
458 | /* |
459 | * These are our native regset flavors. | |
460 | */ | |
461 | enum powerpc_regset { | |
462 | REGSET_GPR, | |
463 | REGSET_FPR, | |
464 | #ifdef CONFIG_ALTIVEC | |
465 | REGSET_VMX, | |
466 | #endif | |
467 | #ifdef CONFIG_SPE | |
468 | REGSET_SPE, | |
469 | #endif | |
470 | }; | |
471 | ||
472 | static const struct user_regset native_regsets[] = { | |
473 | [REGSET_GPR] = { | |
474 | .core_note_type = NT_PRSTATUS, .n = ELF_NGREG, | |
475 | .size = sizeof(long), .align = sizeof(long), | |
476 | .get = gpr_get, .set = gpr_set | |
477 | }, | |
478 | [REGSET_FPR] = { | |
479 | .core_note_type = NT_PRFPREG, .n = ELF_NFPREG, | |
480 | .size = sizeof(double), .align = sizeof(double), | |
481 | .get = fpr_get, .set = fpr_set | |
482 | }, | |
483 | #ifdef CONFIG_ALTIVEC | |
484 | [REGSET_VMX] = { | |
485 | .core_note_type = NT_PPC_VMX, .n = 34, | |
486 | .size = sizeof(vector128), .align = sizeof(vector128), | |
487 | .active = vr_active, .get = vr_get, .set = vr_set | |
488 | }, | |
489 | #endif | |
490 | #ifdef CONFIG_SPE | |
491 | [REGSET_SPE] = { | |
492 | .n = 35, | |
493 | .size = sizeof(u32), .align = sizeof(u32), | |
494 | .active = evr_active, .get = evr_get, .set = evr_set | |
495 | }, | |
496 | #endif | |
497 | }; | |
498 | ||
499 | static const struct user_regset_view user_ppc_native_view = { | |
500 | .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI, | |
501 | .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets) | |
502 | }; | |
503 | ||
504 | const struct user_regset_view *task_user_regset_view(struct task_struct *task) | |
505 | { | |
506 | return &user_ppc_native_view; | |
507 | } | |
508 | ||
509 | ||
2a84b0d7 | 510 | void user_enable_single_step(struct task_struct *task) |
865418d8 BH |
511 | { |
512 | struct pt_regs *regs = task->thread.regs; | |
513 | ||
514 | if (regs != NULL) { | |
515 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | |
516 | task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC; | |
517 | regs->msr |= MSR_DE; | |
518 | #else | |
519 | regs->msr |= MSR_SE; | |
520 | #endif | |
521 | } | |
522 | set_tsk_thread_flag(task, TIF_SINGLESTEP); | |
523 | } | |
524 | ||
2a84b0d7 | 525 | void user_disable_single_step(struct task_struct *task) |
865418d8 BH |
526 | { |
527 | struct pt_regs *regs = task->thread.regs; | |
528 | ||
529 | if (regs != NULL) { | |
530 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | |
531 | task->thread.dbcr0 = 0; | |
532 | regs->msr &= ~MSR_DE; | |
533 | #else | |
534 | regs->msr &= ~MSR_SE; | |
535 | #endif | |
536 | } | |
537 | clear_tsk_thread_flag(task, TIF_SINGLESTEP); | |
538 | } | |
539 | ||
abd06505 BH |
540 | static int ptrace_set_debugreg(struct task_struct *task, unsigned long addr, |
541 | unsigned long data) | |
542 | { | |
543 | /* We only support one DABR and no IABRS at the moment */ | |
544 | if (addr > 0) | |
545 | return -EINVAL; | |
546 | ||
547 | /* The bottom 3 bits are flags */ | |
548 | if ((data & ~0x7UL) >= TASK_SIZE) | |
549 | return -EIO; | |
550 | ||
551 | /* Ensure translation is on */ | |
552 | if (data && !(data & DABR_TRANSLATION)) | |
553 | return -EIO; | |
554 | ||
555 | task->thread.dabr = data; | |
556 | return 0; | |
557 | } | |
abd06505 | 558 | |
1da177e4 LT |
559 | /* |
560 | * Called by kernel/ptrace.c when detaching.. | |
561 | * | |
562 | * Make sure single step bits etc are not set. | |
563 | */ | |
564 | void ptrace_disable(struct task_struct *child) | |
565 | { | |
566 | /* make sure the single step bit is not set. */ | |
2a84b0d7 | 567 | user_disable_single_step(child); |
1da177e4 LT |
568 | } |
569 | ||
e17666ba BH |
570 | /* |
571 | * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls, | |
572 | * we mark them as obsolete now, they will be removed in a future version | |
573 | */ | |
574 | static long arch_ptrace_old(struct task_struct *child, long request, long addr, | |
575 | long data) | |
576 | { | |
577 | int ret = -EPERM; | |
578 | ||
579 | switch(request) { | |
580 | case PPC_PTRACE_GETREGS: { /* Get GPRs 0 - 31. */ | |
581 | int i; | |
582 | unsigned long *reg = &((unsigned long *)child->thread.regs)[0]; | |
583 | unsigned long __user *tmp = (unsigned long __user *)addr; | |
584 | ||
fabca2c0 | 585 | CHECK_FULL_REGS(child->thread.regs); |
e17666ba BH |
586 | for (i = 0; i < 32; i++) { |
587 | ret = put_user(*reg, tmp); | |
588 | if (ret) | |
589 | break; | |
590 | reg++; | |
591 | tmp++; | |
592 | } | |
593 | break; | |
594 | } | |
595 | ||
596 | case PPC_PTRACE_SETREGS: { /* Set GPRs 0 - 31. */ | |
597 | int i; | |
598 | unsigned long *reg = &((unsigned long *)child->thread.regs)[0]; | |
599 | unsigned long __user *tmp = (unsigned long __user *)addr; | |
600 | ||
fabca2c0 | 601 | CHECK_FULL_REGS(child->thread.regs); |
e17666ba BH |
602 | for (i = 0; i < 32; i++) { |
603 | ret = get_user(*reg, tmp); | |
604 | if (ret) | |
605 | break; | |
606 | reg++; | |
607 | tmp++; | |
608 | } | |
609 | break; | |
610 | } | |
611 | ||
612 | case PPC_PTRACE_GETFPREGS: { /* Get FPRs 0 - 31. */ | |
613 | flush_fp_to_thread(child); | |
614 | ret = get_fpregs((void __user *)addr, child, 0); | |
615 | break; | |
616 | } | |
617 | ||
618 | case PPC_PTRACE_SETFPREGS: { /* Get FPRs 0 - 31. */ | |
619 | flush_fp_to_thread(child); | |
620 | ret = set_fpregs((void __user *)addr, child, 0); | |
621 | break; | |
622 | } | |
623 | ||
624 | } | |
625 | return ret; | |
626 | } | |
627 | ||
481bed45 | 628 | long arch_ptrace(struct task_struct *child, long request, long addr, long data) |
1da177e4 | 629 | { |
1da177e4 LT |
630 | int ret = -EPERM; |
631 | ||
1da177e4 LT |
632 | switch (request) { |
633 | /* when I and D space are separate, these will need to be fixed. */ | |
634 | case PTRACE_PEEKTEXT: /* read word at location addr. */ | |
76647323 AD |
635 | case PTRACE_PEEKDATA: |
636 | ret = generic_ptrace_peekdata(child, addr, data); | |
1da177e4 | 637 | break; |
1da177e4 LT |
638 | |
639 | /* read the word at location addr in the USER area. */ | |
1da177e4 LT |
640 | case PTRACE_PEEKUSR: { |
641 | unsigned long index, tmp; | |
642 | ||
643 | ret = -EIO; | |
644 | /* convert to index and check */ | |
e8a30302 | 645 | #ifdef CONFIG_PPC32 |
1da177e4 | 646 | index = (unsigned long) addr >> 2; |
e8a30302 SR |
647 | if ((addr & 3) || (index > PT_FPSCR) |
648 | || (child->thread.regs == NULL)) | |
649 | #else | |
650 | index = (unsigned long) addr >> 3; | |
651 | if ((addr & 7) || (index > PT_FPSCR)) | |
652 | #endif | |
1da177e4 LT |
653 | break; |
654 | ||
655 | CHECK_FULL_REGS(child->thread.regs); | |
656 | if (index < PT_FPR0) { | |
865418d8 | 657 | tmp = ptrace_get_reg(child, (int) index); |
1da177e4 | 658 | } else { |
e8a30302 | 659 | flush_fp_to_thread(child); |
1da177e4 LT |
660 | tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0]; |
661 | } | |
662 | ret = put_user(tmp,(unsigned long __user *) data); | |
663 | break; | |
664 | } | |
665 | ||
666 | /* If I and D space are separate, this will have to be fixed. */ | |
667 | case PTRACE_POKETEXT: /* write the word at location addr. */ | |
668 | case PTRACE_POKEDATA: | |
f284ce72 | 669 | ret = generic_ptrace_pokedata(child, addr, data); |
1da177e4 LT |
670 | break; |
671 | ||
672 | /* write the word at location addr in the USER area */ | |
673 | case PTRACE_POKEUSR: { | |
674 | unsigned long index; | |
675 | ||
676 | ret = -EIO; | |
677 | /* convert to index and check */ | |
e8a30302 | 678 | #ifdef CONFIG_PPC32 |
1da177e4 | 679 | index = (unsigned long) addr >> 2; |
e8a30302 SR |
680 | if ((addr & 3) || (index > PT_FPSCR) |
681 | || (child->thread.regs == NULL)) | |
682 | #else | |
683 | index = (unsigned long) addr >> 3; | |
684 | if ((addr & 7) || (index > PT_FPSCR)) | |
685 | #endif | |
1da177e4 LT |
686 | break; |
687 | ||
688 | CHECK_FULL_REGS(child->thread.regs); | |
1da177e4 | 689 | if (index < PT_FPR0) { |
865418d8 | 690 | ret = ptrace_put_reg(child, index, data); |
1da177e4 | 691 | } else { |
e8a30302 | 692 | flush_fp_to_thread(child); |
1da177e4 LT |
693 | ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data; |
694 | ret = 0; | |
695 | } | |
696 | break; | |
697 | } | |
698 | ||
e8a30302 SR |
699 | case PTRACE_GET_DEBUGREG: { |
700 | ret = -EINVAL; | |
701 | /* We only support one DABR and no IABRS at the moment */ | |
702 | if (addr > 0) | |
703 | break; | |
704 | ret = put_user(child->thread.dabr, | |
705 | (unsigned long __user *)data); | |
706 | break; | |
707 | } | |
708 | ||
709 | case PTRACE_SET_DEBUGREG: | |
710 | ret = ptrace_set_debugreg(child, addr, data); | |
711 | break; | |
e8a30302 | 712 | |
e17666ba BH |
713 | #ifdef CONFIG_PPC64 |
714 | case PTRACE_GETREGS64: | |
715 | #endif | |
716 | case PTRACE_GETREGS: { /* Get all pt_regs from the child. */ | |
717 | int ui; | |
718 | if (!access_ok(VERIFY_WRITE, (void __user *)data, | |
719 | sizeof(struct pt_regs))) { | |
720 | ret = -EIO; | |
721 | break; | |
722 | } | |
fabca2c0 | 723 | CHECK_FULL_REGS(child->thread.regs); |
e17666ba BH |
724 | ret = 0; |
725 | for (ui = 0; ui < PT_REGS_COUNT; ui ++) { | |
865418d8 | 726 | ret |= __put_user(ptrace_get_reg(child, ui), |
e17666ba BH |
727 | (unsigned long __user *) data); |
728 | data += sizeof(long); | |
e8a30302 SR |
729 | } |
730 | break; | |
731 | } | |
732 | ||
e17666ba BH |
733 | #ifdef CONFIG_PPC64 |
734 | case PTRACE_SETREGS64: | |
735 | #endif | |
736 | case PTRACE_SETREGS: { /* Set all gp regs in the child. */ | |
737 | unsigned long tmp; | |
738 | int ui; | |
739 | if (!access_ok(VERIFY_READ, (void __user *)data, | |
740 | sizeof(struct pt_regs))) { | |
741 | ret = -EIO; | |
742 | break; | |
743 | } | |
fabca2c0 | 744 | CHECK_FULL_REGS(child->thread.regs); |
e17666ba BH |
745 | ret = 0; |
746 | for (ui = 0; ui < PT_REGS_COUNT; ui ++) { | |
747 | ret = __get_user(tmp, (unsigned long __user *) data); | |
e8a30302 SR |
748 | if (ret) |
749 | break; | |
865418d8 | 750 | ptrace_put_reg(child, ui, tmp); |
e17666ba | 751 | data += sizeof(long); |
e8a30302 SR |
752 | } |
753 | break; | |
754 | } | |
755 | ||
e17666ba | 756 | case PTRACE_GETFPREGS: { /* Get the child FPU state (FPR0...31 + FPSCR) */ |
e8a30302 | 757 | flush_fp_to_thread(child); |
e17666ba | 758 | ret = get_fpregs((void __user *)data, child, 1); |
e8a30302 SR |
759 | break; |
760 | } | |
761 | ||
e17666ba | 762 | case PTRACE_SETFPREGS: { /* Set the child FPU state (FPR0...31 + FPSCR) */ |
e8a30302 | 763 | flush_fp_to_thread(child); |
e17666ba | 764 | ret = set_fpregs((void __user *)data, child, 1); |
e8a30302 SR |
765 | break; |
766 | } | |
e8a30302 | 767 | |
1da177e4 LT |
768 | #ifdef CONFIG_ALTIVEC |
769 | case PTRACE_GETVRREGS: | |
770 | /* Get the child altivec register state. */ | |
e8a30302 | 771 | flush_altivec_to_thread(child); |
1da177e4 LT |
772 | ret = get_vrregs((unsigned long __user *)data, child); |
773 | break; | |
774 | ||
775 | case PTRACE_SETVRREGS: | |
776 | /* Set the child altivec register state. */ | |
e8a30302 | 777 | flush_altivec_to_thread(child); |
1da177e4 LT |
778 | ret = set_vrregs(child, (unsigned long __user *)data); |
779 | break; | |
780 | #endif | |
781 | #ifdef CONFIG_SPE | |
782 | case PTRACE_GETEVRREGS: | |
783 | /* Get the child spe register state. */ | |
5e14d21e | 784 | flush_spe_to_thread(child); |
1da177e4 LT |
785 | ret = get_evrregs((unsigned long __user *)data, child); |
786 | break; | |
787 | ||
788 | case PTRACE_SETEVRREGS: | |
789 | /* Set the child spe register state. */ | |
790 | /* this is to clear the MSR_SPE bit to force a reload | |
791 | * of register state from memory */ | |
5e14d21e | 792 | flush_spe_to_thread(child); |
1da177e4 LT |
793 | ret = set_evrregs(child, (unsigned long __user *)data); |
794 | break; | |
795 | #endif | |
796 | ||
e17666ba BH |
797 | /* Old reverse args ptrace callss */ |
798 | case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */ | |
799 | case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */ | |
800 | case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */ | |
801 | case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */ | |
802 | ret = arch_ptrace_old(child, request, addr, data); | |
803 | break; | |
804 | ||
1da177e4 LT |
805 | default: |
806 | ret = ptrace_request(child, request, addr, data); | |
807 | break; | |
808 | } | |
1da177e4 LT |
809 | return ret; |
810 | } | |
811 | ||
ea9c102c | 812 | static void do_syscall_trace(void) |
1da177e4 | 813 | { |
ea9c102c DW |
814 | /* the 0x80 provides a way for the tracing parent to distinguish |
815 | between a syscall stop and SIGTRAP delivery */ | |
1da177e4 LT |
816 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) |
817 | ? 0x80 : 0)); | |
818 | ||
819 | /* | |
820 | * this isn't the same as continuing with a signal, but it will do | |
821 | * for normal use. strace only continues with a signal if the | |
822 | * stopping signal is not SIGTRAP. -brl | |
823 | */ | |
824 | if (current->exit_code) { | |
825 | send_sig(current->exit_code, current, 1); | |
826 | current->exit_code = 0; | |
827 | } | |
828 | } | |
ea9c102c DW |
829 | |
830 | void do_syscall_trace_enter(struct pt_regs *regs) | |
831 | { | |
e8a30302 | 832 | secure_computing(regs->gpr[0]); |
e8a30302 | 833 | |
ea9c102c DW |
834 | if (test_thread_flag(TIF_SYSCALL_TRACE) |
835 | && (current->ptrace & PT_PTRACED)) | |
836 | do_syscall_trace(); | |
837 | ||
cfcd1705 DW |
838 | if (unlikely(current->audit_context)) { |
839 | #ifdef CONFIG_PPC64 | |
840 | if (!test_thread_flag(TIF_32BIT)) | |
841 | audit_syscall_entry(AUDIT_ARCH_PPC64, | |
842 | regs->gpr[0], | |
843 | regs->gpr[3], regs->gpr[4], | |
844 | regs->gpr[5], regs->gpr[6]); | |
845 | else | |
e8a30302 | 846 | #endif |
cfcd1705 DW |
847 | audit_syscall_entry(AUDIT_ARCH_PPC, |
848 | regs->gpr[0], | |
849 | regs->gpr[3] & 0xffffffff, | |
850 | regs->gpr[4] & 0xffffffff, | |
851 | regs->gpr[5] & 0xffffffff, | |
852 | regs->gpr[6] & 0xffffffff); | |
853 | } | |
ea9c102c DW |
854 | } |
855 | ||
856 | void do_syscall_trace_leave(struct pt_regs *regs) | |
857 | { | |
ea9c102c | 858 | if (unlikely(current->audit_context)) |
4b9c876a | 859 | audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS, |
ea9c102c DW |
860 | regs->result); |
861 | ||
e8a30302 | 862 | if ((test_thread_flag(TIF_SYSCALL_TRACE) |
1bd79336 | 863 | || test_thread_flag(TIF_SINGLESTEP)) |
ea9c102c DW |
864 | && (current->ptrace & PT_PTRACED)) |
865 | do_syscall_trace(); | |
866 | } |