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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * PowerPC version |
3 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
4 | * | |
5 | * Derived from "arch/m68k/kernel/ptrace.c" | |
6 | * Copyright (C) 1994 by Hamish Macdonald | |
7 | * Taken from linux/kernel/ptrace.c and modified for M680x0. | |
8 | * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds | |
9 | * | |
10 | * Modified by Cort Dougan (cort@hq.fsmlabs.com) | |
11 | * and Paul Mackerras (paulus@linuxcare.com.au). | |
12 | * | |
13 | * This file is subject to the terms and conditions of the GNU General | |
14 | * Public License. See the file README.legal in the main directory of | |
15 | * this archive for more details. | |
16 | */ | |
17 | ||
e8a30302 | 18 | #include <linux/config.h> |
1da177e4 LT |
19 | #include <linux/kernel.h> |
20 | #include <linux/sched.h> | |
21 | #include <linux/mm.h> | |
22 | #include <linux/smp.h> | |
23 | #include <linux/smp_lock.h> | |
24 | #include <linux/errno.h> | |
25 | #include <linux/ptrace.h> | |
26 | #include <linux/user.h> | |
27 | #include <linux/security.h> | |
7ed20e1a | 28 | #include <linux/signal.h> |
ea9c102c DW |
29 | #include <linux/seccomp.h> |
30 | #include <linux/audit.h> | |
e8a30302 | 31 | #ifdef CONFIG_PPC32 |
ea9c102c | 32 | #include <linux/module.h> |
e8a30302 | 33 | #endif |
1da177e4 LT |
34 | |
35 | #include <asm/uaccess.h> | |
36 | #include <asm/page.h> | |
37 | #include <asm/pgtable.h> | |
38 | #include <asm/system.h> | |
e8a30302 SR |
39 | #ifdef CONFIG_PPC64 |
40 | #include <asm/ptrace-common.h> | |
41 | #endif | |
1da177e4 | 42 | |
e8a30302 | 43 | #ifdef CONFIG_PPC32 |
1da177e4 LT |
44 | /* |
45 | * Set of msr bits that gdb can change on behalf of a process. | |
46 | */ | |
47 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | |
48 | #define MSR_DEBUGCHANGE 0 | |
49 | #else | |
50 | #define MSR_DEBUGCHANGE (MSR_SE | MSR_BE) | |
51 | #endif | |
e8a30302 | 52 | #endif /* CONFIG_PPC32 */ |
1da177e4 LT |
53 | |
54 | /* | |
55 | * does not yet catch signals sent when the child dies. | |
56 | * in exit.c or in signal.c. | |
57 | */ | |
58 | ||
e8a30302 | 59 | #ifdef CONFIG_PPC32 |
1da177e4 LT |
60 | /* |
61 | * Get contents of register REGNO in task TASK. | |
62 | */ | |
63 | static inline unsigned long get_reg(struct task_struct *task, int regno) | |
64 | { | |
65 | if (regno < sizeof(struct pt_regs) / sizeof(unsigned long) | |
66 | && task->thread.regs != NULL) | |
67 | return ((unsigned long *)task->thread.regs)[regno]; | |
68 | return (0); | |
69 | } | |
70 | ||
71 | /* | |
72 | * Write contents of register REGNO in task TASK. | |
73 | */ | |
74 | static inline int put_reg(struct task_struct *task, int regno, | |
75 | unsigned long data) | |
76 | { | |
77 | if (regno <= PT_MQ && task->thread.regs != NULL) { | |
78 | if (regno == PT_MSR) | |
79 | data = (data & MSR_DEBUGCHANGE) | |
80 | | (task->thread.regs->msr & ~MSR_DEBUGCHANGE); | |
81 | ((unsigned long *)task->thread.regs)[regno] = data; | |
82 | return 0; | |
83 | } | |
84 | return -EIO; | |
85 | } | |
86 | ||
87 | #ifdef CONFIG_ALTIVEC | |
88 | /* | |
89 | * Get contents of AltiVec register state in task TASK | |
90 | */ | |
91 | static inline int get_vrregs(unsigned long __user *data, struct task_struct *task) | |
92 | { | |
93 | int i, j; | |
94 | ||
95 | if (!access_ok(VERIFY_WRITE, data, 133 * sizeof(unsigned long))) | |
96 | return -EFAULT; | |
97 | ||
98 | /* copy AltiVec registers VR[0] .. VR[31] */ | |
99 | for (i = 0; i < 32; i++) | |
100 | for (j = 0; j < 4; j++, data++) | |
101 | if (__put_user(task->thread.vr[i].u[j], data)) | |
102 | return -EFAULT; | |
103 | ||
104 | /* copy VSCR */ | |
105 | for (i = 0; i < 4; i++, data++) | |
106 | if (__put_user(task->thread.vscr.u[i], data)) | |
107 | return -EFAULT; | |
108 | ||
109 | /* copy VRSAVE */ | |
110 | if (__put_user(task->thread.vrsave, data)) | |
111 | return -EFAULT; | |
112 | ||
113 | return 0; | |
114 | } | |
115 | ||
116 | /* | |
117 | * Write contents of AltiVec register state into task TASK. | |
118 | */ | |
119 | static inline int set_vrregs(struct task_struct *task, unsigned long __user *data) | |
120 | { | |
121 | int i, j; | |
122 | ||
123 | if (!access_ok(VERIFY_READ, data, 133 * sizeof(unsigned long))) | |
124 | return -EFAULT; | |
125 | ||
126 | /* copy AltiVec registers VR[0] .. VR[31] */ | |
127 | for (i = 0; i < 32; i++) | |
128 | for (j = 0; j < 4; j++, data++) | |
129 | if (__get_user(task->thread.vr[i].u[j], data)) | |
130 | return -EFAULT; | |
131 | ||
132 | /* copy VSCR */ | |
133 | for (i = 0; i < 4; i++, data++) | |
134 | if (__get_user(task->thread.vscr.u[i], data)) | |
135 | return -EFAULT; | |
136 | ||
137 | /* copy VRSAVE */ | |
138 | if (__get_user(task->thread.vrsave, data)) | |
139 | return -EFAULT; | |
140 | ||
141 | return 0; | |
142 | } | |
143 | #endif | |
144 | ||
145 | #ifdef CONFIG_SPE | |
146 | ||
147 | /* | |
148 | * For get_evrregs/set_evrregs functions 'data' has the following layout: | |
149 | * | |
150 | * struct { | |
151 | * u32 evr[32]; | |
152 | * u64 acc; | |
153 | * u32 spefscr; | |
154 | * } | |
155 | */ | |
156 | ||
157 | /* | |
158 | * Get contents of SPE register state in task TASK. | |
159 | */ | |
160 | static inline int get_evrregs(unsigned long *data, struct task_struct *task) | |
161 | { | |
162 | int i; | |
163 | ||
164 | if (!access_ok(VERIFY_WRITE, data, 35 * sizeof(unsigned long))) | |
165 | return -EFAULT; | |
166 | ||
167 | /* copy SPEFSCR */ | |
168 | if (__put_user(task->thread.spefscr, &data[34])) | |
169 | return -EFAULT; | |
170 | ||
171 | /* copy SPE registers EVR[0] .. EVR[31] */ | |
172 | for (i = 0; i < 32; i++, data++) | |
173 | if (__put_user(task->thread.evr[i], data)) | |
174 | return -EFAULT; | |
175 | ||
176 | /* copy ACC */ | |
177 | if (__put_user64(task->thread.acc, (unsigned long long *)data)) | |
178 | return -EFAULT; | |
179 | ||
180 | return 0; | |
181 | } | |
182 | ||
183 | /* | |
184 | * Write contents of SPE register state into task TASK. | |
185 | */ | |
186 | static inline int set_evrregs(struct task_struct *task, unsigned long *data) | |
187 | { | |
188 | int i; | |
189 | ||
190 | if (!access_ok(VERIFY_READ, data, 35 * sizeof(unsigned long))) | |
191 | return -EFAULT; | |
192 | ||
193 | /* copy SPEFSCR */ | |
194 | if (__get_user(task->thread.spefscr, &data[34])) | |
195 | return -EFAULT; | |
196 | ||
197 | /* copy SPE registers EVR[0] .. EVR[31] */ | |
198 | for (i = 0; i < 32; i++, data++) | |
199 | if (__get_user(task->thread.evr[i], data)) | |
200 | return -EFAULT; | |
201 | /* copy ACC */ | |
202 | if (__get_user64(task->thread.acc, (unsigned long long*)data)) | |
203 | return -EFAULT; | |
204 | ||
205 | return 0; | |
206 | } | |
207 | #endif /* CONFIG_SPE */ | |
208 | ||
209 | static inline void | |
210 | set_single_step(struct task_struct *task) | |
211 | { | |
212 | struct pt_regs *regs = task->thread.regs; | |
213 | ||
214 | if (regs != NULL) { | |
215 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | |
216 | task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC; | |
217 | regs->msr |= MSR_DE; | |
218 | #else | |
219 | regs->msr |= MSR_SE; | |
220 | #endif | |
221 | } | |
222 | } | |
223 | ||
224 | static inline void | |
225 | clear_single_step(struct task_struct *task) | |
226 | { | |
227 | struct pt_regs *regs = task->thread.regs; | |
228 | ||
229 | if (regs != NULL) { | |
230 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | |
231 | task->thread.dbcr0 = 0; | |
232 | regs->msr &= ~MSR_DE; | |
233 | #else | |
234 | regs->msr &= ~MSR_SE; | |
235 | #endif | |
236 | } | |
237 | } | |
e8a30302 | 238 | #endif /* CONFIG_PPC32 */ |
1da177e4 LT |
239 | |
240 | /* | |
241 | * Called by kernel/ptrace.c when detaching.. | |
242 | * | |
243 | * Make sure single step bits etc are not set. | |
244 | */ | |
245 | void ptrace_disable(struct task_struct *child) | |
246 | { | |
247 | /* make sure the single step bit is not set. */ | |
248 | clear_single_step(child); | |
249 | } | |
250 | ||
251 | int sys_ptrace(long request, long pid, long addr, long data) | |
252 | { | |
253 | struct task_struct *child; | |
254 | int ret = -EPERM; | |
255 | ||
256 | lock_kernel(); | |
257 | if (request == PTRACE_TRACEME) { | |
258 | /* are we already being traced? */ | |
259 | if (current->ptrace & PT_PTRACED) | |
260 | goto out; | |
261 | ret = security_ptrace(current->parent, current); | |
262 | if (ret) | |
263 | goto out; | |
264 | /* set the ptrace bit in the process flags. */ | |
265 | current->ptrace |= PT_PTRACED; | |
266 | ret = 0; | |
267 | goto out; | |
268 | } | |
269 | ret = -ESRCH; | |
270 | read_lock(&tasklist_lock); | |
271 | child = find_task_by_pid(pid); | |
272 | if (child) | |
273 | get_task_struct(child); | |
274 | read_unlock(&tasklist_lock); | |
275 | if (!child) | |
276 | goto out; | |
277 | ||
278 | ret = -EPERM; | |
279 | if (pid == 1) /* you may not mess with init */ | |
280 | goto out_tsk; | |
281 | ||
282 | if (request == PTRACE_ATTACH) { | |
283 | ret = ptrace_attach(child); | |
284 | goto out_tsk; | |
285 | } | |
286 | ||
287 | ret = ptrace_check_attach(child, request == PTRACE_KILL); | |
288 | if (ret < 0) | |
289 | goto out_tsk; | |
290 | ||
291 | switch (request) { | |
292 | /* when I and D space are separate, these will need to be fixed. */ | |
293 | case PTRACE_PEEKTEXT: /* read word at location addr. */ | |
294 | case PTRACE_PEEKDATA: { | |
295 | unsigned long tmp; | |
296 | int copied; | |
297 | ||
298 | copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); | |
299 | ret = -EIO; | |
300 | if (copied != sizeof(tmp)) | |
301 | break; | |
302 | ret = put_user(tmp,(unsigned long __user *) data); | |
303 | break; | |
304 | } | |
305 | ||
306 | /* read the word at location addr in the USER area. */ | |
1da177e4 LT |
307 | case PTRACE_PEEKUSR: { |
308 | unsigned long index, tmp; | |
309 | ||
310 | ret = -EIO; | |
311 | /* convert to index and check */ | |
e8a30302 | 312 | #ifdef CONFIG_PPC32 |
1da177e4 | 313 | index = (unsigned long) addr >> 2; |
e8a30302 SR |
314 | if ((addr & 3) || (index > PT_FPSCR) |
315 | || (child->thread.regs == NULL)) | |
316 | #else | |
317 | index = (unsigned long) addr >> 3; | |
318 | if ((addr & 7) || (index > PT_FPSCR)) | |
319 | #endif | |
1da177e4 LT |
320 | break; |
321 | ||
e8a30302 | 322 | #ifdef CONFIG_PPC32 |
1da177e4 | 323 | CHECK_FULL_REGS(child->thread.regs); |
e8a30302 | 324 | #endif |
1da177e4 LT |
325 | if (index < PT_FPR0) { |
326 | tmp = get_reg(child, (int) index); | |
327 | } else { | |
e8a30302 | 328 | flush_fp_to_thread(child); |
1da177e4 LT |
329 | tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0]; |
330 | } | |
331 | ret = put_user(tmp,(unsigned long __user *) data); | |
332 | break; | |
333 | } | |
334 | ||
335 | /* If I and D space are separate, this will have to be fixed. */ | |
336 | case PTRACE_POKETEXT: /* write the word at location addr. */ | |
337 | case PTRACE_POKEDATA: | |
338 | ret = 0; | |
e8a30302 SR |
339 | if (access_process_vm(child, addr, &data, sizeof(data), 1) |
340 | == sizeof(data)) | |
1da177e4 LT |
341 | break; |
342 | ret = -EIO; | |
343 | break; | |
344 | ||
345 | /* write the word at location addr in the USER area */ | |
346 | case PTRACE_POKEUSR: { | |
347 | unsigned long index; | |
348 | ||
349 | ret = -EIO; | |
350 | /* convert to index and check */ | |
e8a30302 | 351 | #ifdef CONFIG_PPC32 |
1da177e4 | 352 | index = (unsigned long) addr >> 2; |
e8a30302 SR |
353 | if ((addr & 3) || (index > PT_FPSCR) |
354 | || (child->thread.regs == NULL)) | |
355 | #else | |
356 | index = (unsigned long) addr >> 3; | |
357 | if ((addr & 7) || (index > PT_FPSCR)) | |
358 | #endif | |
1da177e4 LT |
359 | break; |
360 | ||
e8a30302 | 361 | #ifdef CONFIG_PPC32 |
1da177e4 | 362 | CHECK_FULL_REGS(child->thread.regs); |
e8a30302 | 363 | #endif |
1da177e4 LT |
364 | if (index == PT_ORIG_R3) |
365 | break; | |
366 | if (index < PT_FPR0) { | |
367 | ret = put_reg(child, index, data); | |
368 | } else { | |
e8a30302 | 369 | flush_fp_to_thread(child); |
1da177e4 LT |
370 | ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data; |
371 | ret = 0; | |
372 | } | |
373 | break; | |
374 | } | |
375 | ||
376 | case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ | |
377 | case PTRACE_CONT: { /* restart after signal. */ | |
378 | ret = -EIO; | |
7ed20e1a | 379 | if (!valid_signal(data)) |
1da177e4 | 380 | break; |
e8a30302 | 381 | if (request == PTRACE_SYSCALL) |
1da177e4 | 382 | set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); |
e8a30302 | 383 | else |
1da177e4 | 384 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); |
1da177e4 LT |
385 | child->exit_code = data; |
386 | /* make sure the single step bit is not set. */ | |
387 | clear_single_step(child); | |
388 | wake_up_process(child); | |
389 | ret = 0; | |
390 | break; | |
391 | } | |
392 | ||
393 | /* | |
394 | * make the child exit. Best I can do is send it a sigkill. | |
395 | * perhaps it should be put in the status that it wants to | |
396 | * exit. | |
397 | */ | |
398 | case PTRACE_KILL: { | |
399 | ret = 0; | |
400 | if (child->exit_state == EXIT_ZOMBIE) /* already dead */ | |
401 | break; | |
402 | child->exit_code = SIGKILL; | |
403 | /* make sure the single step bit is not set. */ | |
404 | clear_single_step(child); | |
405 | wake_up_process(child); | |
406 | break; | |
407 | } | |
408 | ||
409 | case PTRACE_SINGLESTEP: { /* set the trap flag. */ | |
410 | ret = -EIO; | |
7ed20e1a | 411 | if (!valid_signal(data)) |
1da177e4 LT |
412 | break; |
413 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
414 | set_single_step(child); | |
415 | child->exit_code = data; | |
416 | /* give it a chance to run. */ | |
417 | wake_up_process(child); | |
418 | ret = 0; | |
419 | break; | |
420 | } | |
421 | ||
e8a30302 SR |
422 | #ifdef CONFIG_PPC64 |
423 | case PTRACE_GET_DEBUGREG: { | |
424 | ret = -EINVAL; | |
425 | /* We only support one DABR and no IABRS at the moment */ | |
426 | if (addr > 0) | |
427 | break; | |
428 | ret = put_user(child->thread.dabr, | |
429 | (unsigned long __user *)data); | |
430 | break; | |
431 | } | |
432 | ||
433 | case PTRACE_SET_DEBUGREG: | |
434 | ret = ptrace_set_debugreg(child, addr, data); | |
435 | break; | |
436 | #endif | |
437 | ||
1da177e4 LT |
438 | case PTRACE_DETACH: |
439 | ret = ptrace_detach(child, data); | |
440 | break; | |
441 | ||
e8a30302 SR |
442 | #ifdef CONFIG_PPC64 |
443 | case PPC_PTRACE_GETREGS: { /* Get GPRs 0 - 31. */ | |
444 | int i; | |
445 | unsigned long *reg = &((unsigned long *)child->thread.regs)[0]; | |
446 | unsigned long __user *tmp = (unsigned long __user *)addr; | |
447 | ||
448 | for (i = 0; i < 32; i++) { | |
449 | ret = put_user(*reg, tmp); | |
450 | if (ret) | |
451 | break; | |
452 | reg++; | |
453 | tmp++; | |
454 | } | |
455 | break; | |
456 | } | |
457 | ||
458 | case PPC_PTRACE_SETREGS: { /* Set GPRs 0 - 31. */ | |
459 | int i; | |
460 | unsigned long *reg = &((unsigned long *)child->thread.regs)[0]; | |
461 | unsigned long __user *tmp = (unsigned long __user *)addr; | |
462 | ||
463 | for (i = 0; i < 32; i++) { | |
464 | ret = get_user(*reg, tmp); | |
465 | if (ret) | |
466 | break; | |
467 | reg++; | |
468 | tmp++; | |
469 | } | |
470 | break; | |
471 | } | |
472 | ||
473 | case PPC_PTRACE_GETFPREGS: { /* Get FPRs 0 - 31. */ | |
474 | int i; | |
475 | unsigned long *reg = &((unsigned long *)child->thread.fpr)[0]; | |
476 | unsigned long __user *tmp = (unsigned long __user *)addr; | |
477 | ||
478 | flush_fp_to_thread(child); | |
479 | ||
480 | for (i = 0; i < 32; i++) { | |
481 | ret = put_user(*reg, tmp); | |
482 | if (ret) | |
483 | break; | |
484 | reg++; | |
485 | tmp++; | |
486 | } | |
487 | break; | |
488 | } | |
489 | ||
490 | case PPC_PTRACE_SETFPREGS: { /* Get FPRs 0 - 31. */ | |
491 | int i; | |
492 | unsigned long *reg = &((unsigned long *)child->thread.fpr)[0]; | |
493 | unsigned long __user *tmp = (unsigned long __user *)addr; | |
494 | ||
495 | flush_fp_to_thread(child); | |
496 | ||
497 | for (i = 0; i < 32; i++) { | |
498 | ret = get_user(*reg, tmp); | |
499 | if (ret) | |
500 | break; | |
501 | reg++; | |
502 | tmp++; | |
503 | } | |
504 | break; | |
505 | } | |
506 | #endif /* CONFIG_PPC64 */ | |
507 | ||
1da177e4 LT |
508 | #ifdef CONFIG_ALTIVEC |
509 | case PTRACE_GETVRREGS: | |
510 | /* Get the child altivec register state. */ | |
e8a30302 | 511 | flush_altivec_to_thread(child); |
1da177e4 LT |
512 | ret = get_vrregs((unsigned long __user *)data, child); |
513 | break; | |
514 | ||
515 | case PTRACE_SETVRREGS: | |
516 | /* Set the child altivec register state. */ | |
e8a30302 | 517 | flush_altivec_to_thread(child); |
1da177e4 LT |
518 | ret = set_vrregs(child, (unsigned long __user *)data); |
519 | break; | |
520 | #endif | |
521 | #ifdef CONFIG_SPE | |
522 | case PTRACE_GETEVRREGS: | |
523 | /* Get the child spe register state. */ | |
524 | if (child->thread.regs->msr & MSR_SPE) | |
525 | giveup_spe(child); | |
526 | ret = get_evrregs((unsigned long __user *)data, child); | |
527 | break; | |
528 | ||
529 | case PTRACE_SETEVRREGS: | |
530 | /* Set the child spe register state. */ | |
531 | /* this is to clear the MSR_SPE bit to force a reload | |
532 | * of register state from memory */ | |
533 | if (child->thread.regs->msr & MSR_SPE) | |
534 | giveup_spe(child); | |
535 | ret = set_evrregs(child, (unsigned long __user *)data); | |
536 | break; | |
537 | #endif | |
538 | ||
539 | default: | |
540 | ret = ptrace_request(child, request, addr, data); | |
541 | break; | |
542 | } | |
543 | out_tsk: | |
544 | put_task_struct(child); | |
545 | out: | |
546 | unlock_kernel(); | |
547 | return ret; | |
548 | } | |
549 | ||
ea9c102c | 550 | static void do_syscall_trace(void) |
1da177e4 | 551 | { |
ea9c102c DW |
552 | /* the 0x80 provides a way for the tracing parent to distinguish |
553 | between a syscall stop and SIGTRAP delivery */ | |
1da177e4 LT |
554 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) |
555 | ? 0x80 : 0)); | |
556 | ||
557 | /* | |
558 | * this isn't the same as continuing with a signal, but it will do | |
559 | * for normal use. strace only continues with a signal if the | |
560 | * stopping signal is not SIGTRAP. -brl | |
561 | */ | |
562 | if (current->exit_code) { | |
563 | send_sig(current->exit_code, current, 1); | |
564 | current->exit_code = 0; | |
565 | } | |
566 | } | |
ea9c102c DW |
567 | |
568 | void do_syscall_trace_enter(struct pt_regs *regs) | |
569 | { | |
e8a30302 SR |
570 | #ifdef CONFIG_PPC64 |
571 | secure_computing(regs->gpr[0]); | |
572 | #endif | |
573 | ||
ea9c102c DW |
574 | if (test_thread_flag(TIF_SYSCALL_TRACE) |
575 | && (current->ptrace & PT_PTRACED)) | |
576 | do_syscall_trace(); | |
577 | ||
578 | if (unlikely(current->audit_context)) | |
e8a30302 SR |
579 | audit_syscall_entry(current, |
580 | #ifdef CONFIG_PPC32 | |
581 | AUDIT_ARCH_PPC, | |
582 | #else | |
583 | test_thread_flag(TIF_32BIT)?AUDIT_ARCH_PPC:AUDIT_ARCH_PPC64, | |
584 | #endif | |
ea9c102c DW |
585 | regs->gpr[0], |
586 | regs->gpr[3], regs->gpr[4], | |
587 | regs->gpr[5], regs->gpr[6]); | |
588 | } | |
589 | ||
590 | void do_syscall_trace_leave(struct pt_regs *regs) | |
591 | { | |
e8a30302 | 592 | #ifdef CONFIG_PPC32 |
ea9c102c | 593 | secure_computing(regs->gpr[0]); |
e8a30302 | 594 | #endif |
ea9c102c DW |
595 | |
596 | if (unlikely(current->audit_context)) | |
597 | audit_syscall_exit(current, | |
598 | (regs->ccr&0x1000)?AUDITSC_FAILURE:AUDITSC_SUCCESS, | |
599 | regs->result); | |
600 | ||
e8a30302 SR |
601 | if ((test_thread_flag(TIF_SYSCALL_TRACE) |
602 | #ifdef CONFIG_PPC64 | |
603 | || test_thread_flag(TIF_SINGLESTEP) | |
604 | #endif | |
605 | ) | |
ea9c102c DW |
606 | && (current->ptrace & PT_PTRACED)) |
607 | do_syscall_trace(); | |
608 | } | |
609 | ||
e8a30302 | 610 | #ifdef CONFIG_PPC32 |
ea9c102c DW |
611 | EXPORT_SYMBOL(do_syscall_trace_enter); |
612 | EXPORT_SYMBOL(do_syscall_trace_leave); | |
e8a30302 | 613 | #endif |