[mirror_ubuntu-jammy-kernel.git] / arch / powerpc / kernel / rtas_pci.c

/*
 * arch/ppc64/kernel/rtas_pci.c
 *
 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
 *
 * RTAS specific routines for PCI.
 *
 * Based on code from pci.c, chrp_pci.c and pSeries_pci.c
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */

#include <linux/kernel.h>
#include <linux/threads.h>
#include <linux/pci.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/bootmem.h>

#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/irq.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <asm/iommu.h>
#include <asm/rtas.h>
#include <asm/mpic.h>
#include <asm/ppc-pci.h>

/* RTAS tokens */
static int read_pci_config;
static int write_pci_config;
static int ibm_read_pci_config;
static int ibm_write_pci_config;

static inline int config_access_valid(struct pci_dn *dn, int where)
{
	if (where < 256)
		return 1;
	if (where < 4096 && dn->pci_ext_config_space)
		return 1;

	return 0;
}

static int of_device_available(struct device_node * dn)
{
        char * status;

        status = get_property(dn, "status", NULL);

        if (!status)
                return 1;

        if (!strcmp(status, "okay"))
                return 1;

        return 0;
}

static int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
{
	int returnval = -1;
	unsigned long buid, addr;
	int ret;

	if (!pdn)
		return PCIBIOS_DEVICE_NOT_FOUND;
	if (!config_access_valid(pdn, where))
		return PCIBIOS_BAD_REGISTER_NUMBER;

	addr = ((where & 0xf00) << 20) | (pdn->busno << 16) |
		(pdn->devfn << 8) | (where & 0xff);
	buid = pdn->phb->buid;
	if (buid) {
		ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
				addr, BUID_HI(buid), BUID_LO(buid), size);
	} else {
		ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
	}
	*val = returnval;

	if (ret)
		return PCIBIOS_DEVICE_NOT_FOUND;

	if (returnval == EEH_IO_ERROR_VALUE(size) &&
	    eeh_dn_check_failure (pdn->node, NULL))
		return PCIBIOS_DEVICE_NOT_FOUND;

	return PCIBIOS_SUCCESSFUL;
}

static int rtas_pci_read_config(struct pci_bus *bus,
				unsigned int devfn,
				int where, int size, u32 *val)
{
	struct device_node *busdn, *dn;

	if (bus->self)
		busdn = pci_device_to_OF_node(bus->self);
	else
		busdn = bus->sysdata;	/* must be a phb */

	/* Search only direct children of the bus */
	for (dn = busdn->child; dn; dn = dn->sibling) {
		struct pci_dn *pdn = PCI_DN(dn);
		if (pdn && pdn->devfn == devfn
		    && of_device_available(dn))
			return rtas_read_config(pdn, where, size, val);
	}

	return PCIBIOS_DEVICE_NOT_FOUND;
}

int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
{
	unsigned long buid, addr;
	int ret;

	if (!pdn)
		return PCIBIOS_DEVICE_NOT_FOUND;
	if (!config_access_valid(pdn, where))
		return PCIBIOS_BAD_REGISTER_NUMBER;

	addr = ((where & 0xf00) << 20) | (pdn->busno << 16) |
		(pdn->devfn << 8) | (where & 0xff);
	buid = pdn->phb->buid;
	if (buid) {
		ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr,
			BUID_HI(buid), BUID_LO(buid), size, (ulong) val);
	} else {
		ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
	}

	if (ret)
		return PCIBIOS_DEVICE_NOT_FOUND;

	return PCIBIOS_SUCCESSFUL;
}

static int rtas_pci_write_config(struct pci_bus *bus,
				 unsigned int devfn,
				 int where, int size, u32 val)
{
	struct device_node *busdn, *dn;

	if (bus->self)
		busdn = pci_device_to_OF_node(bus->self);
	else
		busdn = bus->sysdata;	/* must be a phb */

	/* Search only direct children of the bus */
	for (dn = busdn->child; dn; dn = dn->sibling) {
		struct pci_dn *pdn = PCI_DN(dn);
		if (pdn && pdn->devfn == devfn
		    && of_device_available(dn))
			return rtas_write_config(pdn, where, size, val);
	}
	return PCIBIOS_DEVICE_NOT_FOUND;
}

struct pci_ops rtas_pci_ops = {
	rtas_pci_read_config,
	rtas_pci_write_config
};

int is_python(struct device_node *dev)
{
	char *model = (char *)get_property(dev, "model", NULL);

	if (model && strstr(model, "Python"))
		return 1;

	return 0;
}

static void python_countermeasures(struct device_node *dev)
{
	struct resource registers;
	void __iomem *chip_regs;
	volatile u32 val;

	if (of_address_to_resource(dev, 0, &registers)) {
		printk(KERN_ERR "Can't get address for Python workarounds !\n");
		return;
	}

	/* Python's register file is 1 MB in size. */
	chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000);

	/*
	 * Firmware doesn't always clear this bit which is critical
	 * for good performance - Anton
	 */

#define PRG_CL_RESET_VALID 0x00010000

	val = in_be32(chip_regs + 0xf6030);
	if (val & PRG_CL_RESET_VALID) {
		printk(KERN_INFO "Python workaround: ");
		val &= ~PRG_CL_RESET_VALID;
		out_be32(chip_regs + 0xf6030, val);
		/*
		 * We must read it back for changes to
		 * take effect
		 */
		val = in_be32(chip_regs + 0xf6030);
		printk("reg0: %x\n", val);
	}

	iounmap(chip_regs);
}

void __init init_pci_config_tokens (void)
{
	read_pci_config = rtas_token("read-pci-config");
	write_pci_config = rtas_token("write-pci-config");
	ibm_read_pci_config = rtas_token("ibm,read-pci-config");
	ibm_write_pci_config = rtas_token("ibm,write-pci-config");
}

unsigned long __devinit get_phb_buid (struct device_node *phb)
{
	int addr_cells;
	unsigned int *buid_vals;
	unsigned int len;
	unsigned long buid;

	if (ibm_read_pci_config == -1) return 0;

	/* PHB's will always be children of the root node,
	 * or so it is promised by the current firmware. */
	if (phb->parent == NULL)
		return 0;
	if (phb->parent->parent)
		return 0;

	buid_vals = (unsigned int *) get_property(phb, "reg", &len);
	if (buid_vals == NULL)
		return 0;

	addr_cells = prom_n_addr_cells(phb);
	if (addr_cells == 1) {
		buid = (unsigned long) buid_vals[0];
	} else {
		buid = (((unsigned long)buid_vals[0]) << 32UL) |
			(((unsigned long)buid_vals[1]) & 0xffffffff);
	}
	return buid;
}

static int phb_set_bus_ranges(struct device_node *dev,
			      struct pci_controller *phb)
{
	int *bus_range;
	unsigned int len;

	bus_range = (int *) get_property(dev, "bus-range", &len);
	if (bus_range == NULL || len < 2 * sizeof(int)) {
		return 1;
 	}

	phb->first_busno =  bus_range[0];
	phb->last_busno  =  bus_range[1];

	return 0;
}

static int __devinit setup_phb(struct device_node *dev,
			       struct pci_controller *phb)
{
	if (is_python(dev))
		python_countermeasures(dev);

	if (phb_set_bus_ranges(dev, phb))
		return 1;

	phb->ops = &rtas_pci_ops;
	phb->buid = get_phb_buid(dev);

	return 0;
}

unsigned long __init find_and_init_phbs(void)
{
	struct device_node *node;
	struct pci_controller *phb;
	unsigned int index;
	unsigned int root_size_cells = 0;
	unsigned int *opprop = NULL;
	struct device_node *root = of_find_node_by_path("/");

	if (ppc64_interrupt_controller == IC_OPEN_PIC) {
		opprop = (unsigned int *)get_property(root,
				"platform-open-pic", NULL);
	}

	root_size_cells = prom_n_size_cells(root);

	index = 0;

	for (node = of_get_next_child(root, NULL);
	     node != NULL;
	     node = of_get_next_child(root, node)) {
		if (node->type == NULL || strcmp(node->type, "pci") != 0)
			continue;

		phb = pcibios_alloc_controller(node);
		if (!phb)
			continue;
		setup_phb(node, phb);
		pci_process_bridge_OF_ranges(phb, node, 0);
		pci_setup_phb_io(phb, index == 0);
#ifdef CONFIG_PPC_PSERIES
		/* XXX This code need serious fixing ... --BenH */
		if (ppc64_interrupt_controller == IC_OPEN_PIC && pSeries_mpic) {
			int addr = root_size_cells * (index + 2) - 1;
			mpic_assign_isu(pSeries_mpic, index, opprop[addr]);
		}
#endif
		index++;
	}

	of_node_put(root);
	pci_devs_phb_init();

	/*
	 * pci_probe_only and pci_assign_all_buses can be set via properties
	 * in chosen.
	 */
	if (of_chosen) {
		int *prop;

		prop = (int *)get_property(of_chosen, "linux,pci-probe-only",
					   NULL);
		if (prop)
			pci_probe_only = *prop;

		prop = (int *)get_property(of_chosen,
					   "linux,pci-assign-all-buses", NULL);
		if (prop)
			pci_assign_all_buses = *prop;
	}

	return 0;
}

struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
{
	struct pci_controller *phb;
	int primary;

	primary = list_empty(&hose_list);
	phb = pcibios_alloc_controller(dn);
	if (!phb)
		return NULL;
	setup_phb(dn, phb);
	pci_process_bridge_OF_ranges(phb, dn, primary);

	pci_setup_phb_io_dynamic(phb, primary);

	pci_devs_phb_init_dynamic(phb);
	scan_phb(phb);

	return phb;
}
EXPORT_SYMBOL(init_phb_dynamic);

/* RPA-specific bits for removing PHBs */
int pcibios_remove_root_bus(struct pci_controller *phb)
{
	struct pci_bus *b = phb->bus;
	struct resource *res;
	int rc, i;

	res = b->resource[0];
	if (!res->flags) {
		printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__,
				b->name);
		return 1;
	}

	rc = unmap_bus_range(b);
	if (rc) {
		printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
			__FUNCTION__, b->name);
		return 1;
	}

	if (release_resource(res)) {
		printk(KERN_ERR "%s: failed to release IO on bus %s\n",
				__FUNCTION__, b->name);
		return 1;
	}

	for (i = 1; i < 3; ++i) {
		res = b->resource[i];
		if (!res->flags && i == 0) {
			printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
				__FUNCTION__, b->name);
			return 1;
		}
		if (res->flags && release_resource(res)) {
			printk(KERN_ERR
			       "%s: failed to release IO %d on bus %s\n",
				__FUNCTION__, i, b->name);
			return 1;
		}
	}

	list_del(&phb->list_node);
	pcibios_free_controller(phb);

	return 0;
}
EXPORT_SYMBOL(pcibios_remove_root_bus);
Commit	Line	Data
c5a3c2e5 AB	1	/*
	2	* arch/ppc64/kernel/rtas_pci.c
	3	*
	4	* Copyright (C) 2001 Dave Engebretsen, IBM Corporation
	5	* Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
	6	*
	7	* RTAS specific routines for PCI.
ae65a391	8	*
c5a3c2e5 AB	9	* Based on code from pci.c, chrp_pci.c and pSeries_pci.c
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License as published by
	13	* the Free Software Foundation; either version 2 of the License, or
	14	* (at your option) any later version.
ae65a391	15	*
c5a3c2e5 AB	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
ae65a391	20	*
c5a3c2e5 AB	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	24	*/
	25
	26	#include <linux/kernel.h>
	27	#include <linux/threads.h>
	28	#include <linux/pci.h>
	29	#include <linux/string.h>
	30	#include <linux/init.h>
	31	#include <linux/bootmem.h>
	32
	33	#include <asm/io.h>
	34	#include <asm/pgtable.h>
	35	#include <asm/irq.h>
	36	#include <asm/prom.h>
	37	#include <asm/machdep.h>
	38	#include <asm/pci-bridge.h>
	39	#include <asm/iommu.h>
	40	#include <asm/rtas.h>
bbeb3f4c	41	#include <asm/mpic.h>
d387899f	42	#include <asm/ppc-pci.h>
c5a3c2e5 AB	43
	44	/* RTAS tokens */
	45	static int read_pci_config;
	46	static int write_pci_config;
	47	static int ibm_read_pci_config;
	48	static int ibm_write_pci_config;
	49
ae65a391	50	static inline int config_access_valid(struct pci_dn *dn, int where)
c5a3c2e5 AB	51	{
	52	if (where < 256)
	53	return 1;
	54	if (where < 4096 && dn->pci_ext_config_space)
	55	return 1;
	56
	57	return 0;
	58	}
	59
293da76b JM	60	static int of_device_available(struct device_node * dn)
	61	{
	62	char * status;
	63
	64	status = get_property(dn, "status", NULL);
	65
	66	if (!status)
	67	return 1;
	68
	69	if (!strcmp(status, "okay"))
	70	return 1;
	71
	72	return 0;
	73	}
	74
ae65a391	75	static int rtas_read_config(struct pci_dn pdn, int where, int size, u32 val)
c5a3c2e5 AB	76	{
	77	int returnval = -1;
	78	unsigned long buid, addr;
	79	int ret;
	80
ae65a391	81	if (!pdn)
c5a3c2e5	82	return PCIBIOS_DEVICE_NOT_FOUND;
1635317f	83	if (!config_access_valid(pdn, where))
c5a3c2e5 AB	84	return PCIBIOS_BAD_REGISTER_NUMBER;
c5a3c2e5 AB	85
1635317f PM	86	addr = ((where & 0xf00) << 20) \| (pdn->busno << 16) \|
	87	(pdn->devfn << 8) \| (where & 0xff);
	88	buid = pdn->phb->buid;
c5a3c2e5 AB	89	if (buid) {
c5a3c2e5 AB	90	ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
ae65a391	91	addr, BUID_HI(buid), BUID_LO(buid), size);
c5a3c2e5 AB	92	} else {
	93	ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
	94	}
	95	*val = returnval;
	96
	97	if (ret)
	98	return PCIBIOS_DEVICE_NOT_FOUND;
	99
1635317f	100	if (returnval == EEH_IO_ERROR_VALUE(size) &&
ae65a391	101	eeh_dn_check_failure (pdn->node, NULL))
c5a3c2e5 AB	102	return PCIBIOS_DEVICE_NOT_FOUND;
	103
	104	return PCIBIOS_SUCCESSFUL;
	105	}
	106
	107	static int rtas_pci_read_config(struct pci_bus *bus,
	108	unsigned int devfn,
	109	int where, int size, u32 *val)
	110	{
	111	struct device_node busdn, dn;
	112
	113	if (bus->self)
	114	busdn = pci_device_to_OF_node(bus->self);
	115	else
	116	busdn = bus->sysdata; /* must be a phb */
	117
	118	/* Search only direct children of the bus */
ae65a391 LV	119	for (dn = busdn->child; dn; dn = dn->sibling) {
	120	struct pci_dn *pdn = PCI_DN(dn);
	121	if (pdn && pdn->devfn == devfn
1635317f	122	&& of_device_available(dn))
ae65a391 LV	123	return rtas_read_config(pdn, where, size, val);
ae65a391 LV	124	}
1635317f	125
c5a3c2e5 AB	126	return PCIBIOS_DEVICE_NOT_FOUND;
	127	}
	128
ae65a391	129	int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
c5a3c2e5 AB	130	{
	131	unsigned long buid, addr;
	132	int ret;
	133
ae65a391	134	if (!pdn)
c5a3c2e5	135	return PCIBIOS_DEVICE_NOT_FOUND;
1635317f	136	if (!config_access_valid(pdn, where))
c5a3c2e5 AB	137	return PCIBIOS_BAD_REGISTER_NUMBER;
c5a3c2e5 AB	138
1635317f PM	139	addr = ((where & 0xf00) << 20) \| (pdn->busno << 16) \|
	140	(pdn->devfn << 8) \| (where & 0xff);
	141	buid = pdn->phb->buid;
c5a3c2e5	142	if (buid) {
ae65a391 LV	143	ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr,
ae65a391 LV	144	BUID_HI(buid), BUID_LO(buid), size, (ulong) val);
c5a3c2e5 AB	145	} else {
	146	ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
	147	}
	148
	149	if (ret)
	150	return PCIBIOS_DEVICE_NOT_FOUND;
	151
	152	return PCIBIOS_SUCCESSFUL;
	153	}
	154
	155	static int rtas_pci_write_config(struct pci_bus *bus,
	156	unsigned int devfn,
	157	int where, int size, u32 val)
	158	{
	159	struct device_node busdn, dn;
	160
	161	if (bus->self)
	162	busdn = pci_device_to_OF_node(bus->self);
	163	else
	164	busdn = bus->sysdata; /* must be a phb */
	165
	166	/* Search only direct children of the bus */
ae65a391 LV	167	for (dn = busdn->child; dn; dn = dn->sibling) {
	168	struct pci_dn *pdn = PCI_DN(dn);
	169	if (pdn && pdn->devfn == devfn
1635317f	170	&& of_device_available(dn))
ae65a391 LV	171	return rtas_write_config(pdn, where, size, val);
ae65a391 LV	172	}
c5a3c2e5 AB	173	return PCIBIOS_DEVICE_NOT_FOUND;
	174	}
	175
	176	struct pci_ops rtas_pci_ops = {
	177	rtas_pci_read_config,
	178	rtas_pci_write_config
	179	};
	180
	181	int is_python(struct device_node *dev)
	182	{
	183	char model = (char )get_property(dev, "model", NULL);
	184
	185	if (model && strstr(model, "Python"))
	186	return 1;
	187
	188	return 0;
	189	}
	190
cc5d0189	191	static void python_countermeasures(struct device_node *dev)
c5a3c2e5	192	{
cc5d0189	193	struct resource registers;
c5a3c2e5 AB	194	void __iomem *chip_regs;
	195	volatile u32 val;
	196
cc5d0189 BH	197	if (of_address_to_resource(dev, 0, &registers)) {
cc5d0189 BH	198	printk(KERN_ERR "Can't get address for Python workarounds !\n");
c5a3c2e5	199	return;
cc5d0189	200	}
c5a3c2e5 AB	201
c5a3c2e5 AB	202	/* Python's register file is 1 MB in size. */
cc5d0189	203	chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000);
c5a3c2e5	204
ae65a391	205	/*
c5a3c2e5 AB	206	* Firmware doesn't always clear this bit which is critical
	207	* for good performance - Anton
	208	*/
	209
	210	#define PRG_CL_RESET_VALID 0x00010000
	211
	212	val = in_be32(chip_regs + 0xf6030);
	213	if (val & PRG_CL_RESET_VALID) {
	214	printk(KERN_INFO "Python workaround: ");
	215	val &= ~PRG_CL_RESET_VALID;
	216	out_be32(chip_regs + 0xf6030, val);
	217	/*
	218	* We must read it back for changes to
	219	* take effect
	220	*/
	221	val = in_be32(chip_regs + 0xf6030);
	222	printk("reg0: %x\n", val);
	223	}
	224
	225	iounmap(chip_regs);
	226	}
	227
	228	void __init init_pci_config_tokens (void)
	229	{
	230	read_pci_config = rtas_token("read-pci-config");
	231	write_pci_config = rtas_token("write-pci-config");
	232	ibm_read_pci_config = rtas_token("ibm,read-pci-config");
	233	ibm_write_pci_config = rtas_token("ibm,write-pci-config");
	234	}
	235
	236	unsigned long __devinit get_phb_buid (struct device_node *phb)
	237	{
	238	int addr_cells;
	239	unsigned int *buid_vals;
	240	unsigned int len;
	241	unsigned long buid;
	242
	243	if (ibm_read_pci_config == -1) return 0;
	244
	245	/* PHB's will always be children of the root node,
	246	* or so it is promised by the current firmware. */
	247	if (phb->parent == NULL)
	248	return 0;
	249	if (phb->parent->parent)
	250	return 0;
	251
	252	buid_vals = (unsigned int *) get_property(phb, "reg", &len);
	253	if (buid_vals == NULL)
	254	return 0;
	255
	256	addr_cells = prom_n_addr_cells(phb);
	257	if (addr_cells == 1) {
	258	buid = (unsigned long) buid_vals[0];
	259	} else {
	260	buid = (((unsigned long)buid_vals[0]) << 32UL) \|
	261	(((unsigned long)buid_vals[1]) & 0xffffffff);
	262	}
	263	return buid;
	264	}
	265
	266	static int phb_set_bus_ranges(struct device_node *dev,
	267	struct pci_controller *phb)
	268	{
	269	int *bus_range;
270	unsigned int len;
271
272	bus_range = (int *) get_property(dev, "bus-range", &len);
273	if (bus_range == NULL \|\| len < 2 * sizeof(int)) {
274	return 1;
275	}
ae65a391	276
c5a3c2e5 AB	277	phb->first_busno = bus_range[0];
	278	phb->last_busno = bus_range[1];
	279
	280	return 0;
	281	}
	282
	283	static int __devinit setup_phb(struct device_node *dev,
cc5d0189	284	struct pci_controller *phb)
c5a3c2e5	285	{
c5a3c2e5	286	if (is_python(dev))
cc5d0189	287	python_countermeasures(dev);
c5a3c2e5 AB	288
	289	if (phb_set_bus_ranges(dev, phb))
	290	return 1;
	291
c5a3c2e5 AB	292	phb->ops = &rtas_pci_ops;
	293	phb->buid = get_phb_buid(dev);
	294
	295	return 0;
	296	}
	297
c5a3c2e5 AB	298	unsigned long __init find_and_init_phbs(void)
	299	{
	300	struct device_node *node;
	301	struct pci_controller *phb;
c5a3c2e5	302	unsigned int index;
cc5d0189	303	unsigned int root_size_cells = 0;
c5a3c2e5 AB	304	unsigned int *opprop = NULL;
	305	struct device_node *root = of_find_node_by_path("/");
	306
	307	if (ppc64_interrupt_controller == IC_OPEN_PIC) {
	308	opprop = (unsigned int *)get_property(root,
	309	"platform-open-pic", NULL);
	310	}
	311
	312	root_size_cells = prom_n_size_cells(root);
	313
	314	index = 0;
	315
	316	for (node = of_get_next_child(root, NULL);
	317	node != NULL;
	318	node = of_get_next_child(root, node)) {
	319	if (node->type == NULL \|\| strcmp(node->type, "pci") != 0)
	320	continue;
	321
b5166cc2	322	phb = pcibios_alloc_controller(node);
c5a3c2e5 AB	323	if (!phb)
c5a3c2e5 AB	324	continue;
cc5d0189	325	setup_phb(node, phb);
f7abbc19	326	pci_process_bridge_OF_ranges(phb, node, 0);
c5a3c2e5 AB	327	pci_setup_phb_io(phb, index == 0);
c5a3c2e5 AB	328	#ifdef CONFIG_PPC_PSERIES
cc5d0189	329	/* XXX This code need serious fixing ... --BenH */
c5a3c2e5 AB	330	if (ppc64_interrupt_controller == IC_OPEN_PIC && pSeries_mpic) {
	331	int addr = root_size_cells * (index + 2) - 1;
	332	mpic_assign_isu(pSeries_mpic, index, opprop[addr]);
	333	}
	334	#endif
	335	index++;
	336	}
	337
	338	of_node_put(root);
	339	pci_devs_phb_init();
	340
	341	/*
	342	* pci_probe_only and pci_assign_all_buses can be set via properties
	343	* in chosen.
	344	*/
	345	if (of_chosen) {
	346	int *prop;
	347
	348	prop = (int *)get_property(of_chosen, "linux,pci-probe-only",
	349	NULL);
	350	if (prop)
	351	pci_probe_only = *prop;
	352
	353	prop = (int *)get_property(of_chosen,
	354	"linux,pci-assign-all-buses", NULL);
	355	if (prop)
	356	pci_assign_all_buses = *prop;
	357	}
	358
	359	return 0;
	360	}
	361
	362	struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
	363	{
c5a3c2e5	364	struct pci_controller *phb;
c5a3c2e5 AB	365	int primary;
c5a3c2e5 AB	366
c5a3c2e5	367	primary = list_empty(&hose_list);
b5166cc2	368	phb = pcibios_alloc_controller(dn);
c5a3c2e5 AB	369	if (!phb)
c5a3c2e5 AB	370	return NULL;
cc5d0189	371	setup_phb(dn, phb);
f7abbc19	372	pci_process_bridge_OF_ranges(phb, dn, primary);
c5a3c2e5 AB	373
c5a3c2e5 AB	374	pci_setup_phb_io_dynamic(phb, primary);
c5a3c2e5 AB	375
c5a3c2e5 AB	376	pci_devs_phb_init_dynamic(phb);
ead83717	377	scan_phb(phb);
c5a3c2e5 AB	378
	379	return phb;
	380	}
	381	EXPORT_SYMBOL(init_phb_dynamic);
	382
	383	/* RPA-specific bits for removing PHBs */
	384	int pcibios_remove_root_bus(struct pci_controller *phb)
	385	{
	386	struct pci_bus *b = phb->bus;
	387	struct resource *res;
	388	int rc, i;
	389
	390	res = b->resource[0];
	391	if (!res->flags) {
	392	printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__,
	393	b->name);
	394	return 1;
	395	}
	396
	397	rc = unmap_bus_range(b);
	398	if (rc) {
	399	printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
	400	__FUNCTION__, b->name);
	401	return 1;
	402	}
	403
	404	if (release_resource(res)) {
	405	printk(KERN_ERR "%s: failed to release IO on bus %s\n",
	406	__FUNCTION__, b->name);
	407	return 1;
	408	}
	409
	410	for (i = 1; i < 3; ++i) {
	411	res = b->resource[i];
	412	if (!res->flags && i == 0) {
	413	printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
	414	__FUNCTION__, b->name);
	415	return 1;
	416	}
	417	if (res->flags && release_resource(res)) {
	418	printk(KERN_ERR
	419	"%s: failed to release IO %d on bus %s\n",
	420	__FUNCTION__, i, b->name);
	421	return 1;
	422	}
	423	}
	424
	425	list_del(&phb->list_node);
b5166cc2	426	pcibios_free_controller(phb);
c5a3c2e5 AB	427
	428	return 0;
	429	}
	430	EXPORT_SYMBOL(pcibios_remove_root_bus);