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Commit | Line | Data |
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03501dab PM |
1 | /* |
2 | * Common boot and setup code for both 32-bit and 64-bit. | |
3 | * Extracted from arch/powerpc/kernel/setup_64.c. | |
4 | * | |
5 | * Copyright (C) 2001 PPC64 Team, IBM Corp | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
e8222502 BH |
12 | |
13 | #undef DEBUG | |
14 | ||
4b16f8e2 | 15 | #include <linux/export.h> |
03501dab PM |
16 | #include <linux/string.h> |
17 | #include <linux/sched.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/reboot.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/initrd.h> | |
e5c6c8e4 | 23 | #include <linux/platform_device.h> |
03501dab PM |
24 | #include <linux/seq_file.h> |
25 | #include <linux/ioport.h> | |
26 | #include <linux/console.h> | |
894673ee | 27 | #include <linux/screen_info.h> |
03501dab PM |
28 | #include <linux/root_dev.h> |
29 | #include <linux/notifier.h> | |
30 | #include <linux/cpu.h> | |
31 | #include <linux/unistd.h> | |
32 | #include <linux/serial.h> | |
33 | #include <linux/serial_8250.h> | |
8d089085 | 34 | #include <linux/percpu.h> |
95f72d1e | 35 | #include <linux/memblock.h> |
d746286c | 36 | #include <linux/of_platform.h> |
b1923caa | 37 | #include <linux/hugetlb.h> |
7644d581 | 38 | #include <asm/debugfs.h> |
03501dab | 39 | #include <asm/io.h> |
1426d5a3 | 40 | #include <asm/paca.h> |
03501dab PM |
41 | #include <asm/prom.h> |
42 | #include <asm/processor.h> | |
a7f290da | 43 | #include <asm/vdso_datapage.h> |
03501dab | 44 | #include <asm/pgtable.h> |
03501dab PM |
45 | #include <asm/smp.h> |
46 | #include <asm/elf.h> | |
47 | #include <asm/machdep.h> | |
48 | #include <asm/time.h> | |
49 | #include <asm/cputable.h> | |
50 | #include <asm/sections.h> | |
e8222502 | 51 | #include <asm/firmware.h> |
03501dab PM |
52 | #include <asm/btext.h> |
53 | #include <asm/nvram.h> | |
54 | #include <asm/setup.h> | |
03501dab PM |
55 | #include <asm/rtas.h> |
56 | #include <asm/iommu.h> | |
57 | #include <asm/serial.h> | |
58 | #include <asm/cache.h> | |
59 | #include <asm/page.h> | |
60 | #include <asm/mmu.h> | |
fca5dcd4 | 61 | #include <asm/xmon.h> |
8d089085 | 62 | #include <asm/cputhreads.h> |
f465df81 | 63 | #include <mm/mmu_decl.h> |
ebaeb5ae | 64 | #include <asm/fadump.h> |
b1923caa BH |
65 | #include <asm/udbg.h> |
66 | #include <asm/hugetlb.h> | |
67 | #include <asm/livepatch.h> | |
68 | #include <asm/mmu_context.h> | |
b92a226e | 69 | #include <asm/cpu_has_feature.h> |
b1923caa BH |
70 | |
71 | #include "setup.h" | |
03501dab | 72 | |
03501dab | 73 | #ifdef DEBUG |
f9e4ec57 | 74 | #include <asm/udbg.h> |
03501dab PM |
75 | #define DBG(fmt...) udbg_printf(fmt) |
76 | #else | |
77 | #define DBG(fmt...) | |
78 | #endif | |
79 | ||
e8222502 BH |
80 | /* The main machine-dep calls structure |
81 | */ | |
82 | struct machdep_calls ppc_md; | |
83 | EXPORT_SYMBOL(ppc_md); | |
84 | struct machdep_calls *machine_id; | |
85 | EXPORT_SYMBOL(machine_id); | |
799d6046 | 86 | |
36ae37e3 BH |
87 | int boot_cpuid = -1; |
88 | EXPORT_SYMBOL_GPL(boot_cpuid); | |
89 | ||
33ec723c BH |
90 | /* |
91 | * These are used in binfmt_elf.c to put aux entries on the stack | |
92 | * for each elf executable being started. | |
93 | */ | |
94 | int dcache_bsize; | |
95 | int icache_bsize; | |
96 | int ucache_bsize; | |
97 | ||
98 | ||
49b09853 PM |
99 | unsigned long klimit = (unsigned long) _end; |
100 | ||
03501dab PM |
101 | /* |
102 | * This still seems to be needed... -- paulus | |
103 | */ | |
104 | struct screen_info screen_info = { | |
105 | .orig_x = 0, | |
106 | .orig_y = 25, | |
107 | .orig_video_cols = 80, | |
108 | .orig_video_lines = 25, | |
109 | .orig_video_isVGA = 1, | |
110 | .orig_video_points = 16 | |
111 | }; | |
e1802b06 AB |
112 | #if defined(CONFIG_FB_VGA16_MODULE) |
113 | EXPORT_SYMBOL(screen_info); | |
114 | #endif | |
03501dab | 115 | |
540c6c39 MW |
116 | /* Variables required to store legacy IO irq routing */ |
117 | int of_i8042_kbd_irq; | |
ee110066 | 118 | EXPORT_SYMBOL_GPL(of_i8042_kbd_irq); |
540c6c39 | 119 | int of_i8042_aux_irq; |
ee110066 | 120 | EXPORT_SYMBOL_GPL(of_i8042_aux_irq); |
540c6c39 | 121 | |
03501dab PM |
122 | #ifdef __DO_IRQ_CANON |
123 | /* XXX should go elsewhere eventually */ | |
124 | int ppc_do_canonicalize_irqs; | |
125 | EXPORT_SYMBOL(ppc_do_canonicalize_irqs); | |
126 | #endif | |
127 | ||
22bd0177 HB |
128 | #ifdef CONFIG_CRASH_CORE |
129 | /* This keeps a track of which one is the crashing cpu. */ | |
130 | int crashing_cpu = -1; | |
131 | #endif | |
132 | ||
03501dab PM |
133 | /* also used by kexec */ |
134 | void machine_shutdown(void) | |
135 | { | |
67b43b9d MS |
136 | #ifdef CONFIG_FA_DUMP |
137 | /* | |
138 | * if fadump is active, cleanup the fadump registration before we | |
139 | * shutdown. | |
140 | */ | |
141 | fadump_cleanup(); | |
142 | #endif | |
143 | ||
3d1229d6 ME |
144 | if (ppc_md.machine_shutdown) |
145 | ppc_md.machine_shutdown(); | |
03501dab PM |
146 | } |
147 | ||
d0d738a4 AS |
148 | static void machine_hang(void) |
149 | { | |
150 | pr_emerg("System Halted, OK to turn off power\n"); | |
151 | local_irq_disable(); | |
152 | while (1) | |
153 | ; | |
154 | } | |
155 | ||
03501dab PM |
156 | void machine_restart(char *cmd) |
157 | { | |
158 | machine_shutdown(); | |
b8e383d5 KG |
159 | if (ppc_md.restart) |
160 | ppc_md.restart(cmd); | |
d0d738a4 | 161 | |
03501dab | 162 | smp_send_stop(); |
ad247473 AS |
163 | |
164 | do_kernel_restart(cmd); | |
165 | mdelay(1000); | |
166 | ||
d0d738a4 | 167 | machine_hang(); |
03501dab PM |
168 | } |
169 | ||
170 | void machine_power_off(void) | |
171 | { | |
172 | machine_shutdown(); | |
9178ba29 AG |
173 | if (pm_power_off) |
174 | pm_power_off(); | |
d0d738a4 | 175 | |
03501dab | 176 | smp_send_stop(); |
d0d738a4 | 177 | machine_hang(); |
03501dab PM |
178 | } |
179 | /* Used by the G5 thermal driver */ | |
180 | EXPORT_SYMBOL_GPL(machine_power_off); | |
181 | ||
9178ba29 | 182 | void (*pm_power_off)(void); |
03501dab PM |
183 | EXPORT_SYMBOL_GPL(pm_power_off); |
184 | ||
185 | void machine_halt(void) | |
186 | { | |
187 | machine_shutdown(); | |
b8e383d5 KG |
188 | if (ppc_md.halt) |
189 | ppc_md.halt(); | |
d0d738a4 | 190 | |
03501dab | 191 | smp_send_stop(); |
d0d738a4 | 192 | machine_hang(); |
03501dab PM |
193 | } |
194 | ||
03501dab | 195 | #ifdef CONFIG_SMP |
6b7487fc | 196 | DEFINE_PER_CPU(unsigned int, cpu_pvr); |
03501dab PM |
197 | #endif |
198 | ||
2c2df038 AB |
199 | static void show_cpuinfo_summary(struct seq_file *m) |
200 | { | |
201 | struct device_node *root; | |
202 | const char *model = NULL; | |
203 | #if defined(CONFIG_SMP) && defined(CONFIG_PPC32) | |
204 | unsigned long bogosum = 0; | |
205 | int i; | |
206 | for_each_online_cpu(i) | |
207 | bogosum += loops_per_jiffy; | |
208 | seq_printf(m, "total bogomips\t: %lu.%02lu\n", | |
209 | bogosum/(500000/HZ), bogosum/(5000/HZ) % 100); | |
210 | #endif /* CONFIG_SMP && CONFIG_PPC32 */ | |
211 | seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq); | |
212 | if (ppc_md.name) | |
213 | seq_printf(m, "platform\t: %s\n", ppc_md.name); | |
214 | root = of_find_node_by_path("/"); | |
215 | if (root) | |
216 | model = of_get_property(root, "model", NULL); | |
217 | if (model) | |
218 | seq_printf(m, "model\t\t: %s\n", model); | |
219 | of_node_put(root); | |
220 | ||
221 | if (ppc_md.show_cpuinfo != NULL) | |
222 | ppc_md.show_cpuinfo(m); | |
223 | ||
224 | #ifdef CONFIG_PPC32 | |
225 | /* Display the amount of memory */ | |
226 | seq_printf(m, "Memory\t\t: %d MB\n", | |
227 | (unsigned int)(total_memory / (1024 * 1024))); | |
228 | #endif | |
229 | } | |
230 | ||
03501dab PM |
231 | static int show_cpuinfo(struct seq_file *m, void *v) |
232 | { | |
233 | unsigned long cpu_id = (unsigned long)v - 1; | |
234 | unsigned int pvr; | |
2299d03a | 235 | unsigned long proc_freq; |
03501dab PM |
236 | unsigned short maj; |
237 | unsigned short min; | |
238 | ||
03501dab | 239 | #ifdef CONFIG_SMP |
6b7487fc | 240 | pvr = per_cpu(cpu_pvr, cpu_id); |
03501dab PM |
241 | #else |
242 | pvr = mfspr(SPRN_PVR); | |
243 | #endif | |
244 | maj = (pvr >> 8) & 0xFF; | |
245 | min = pvr & 0xFF; | |
246 | ||
247 | seq_printf(m, "processor\t: %lu\n", cpu_id); | |
248 | seq_printf(m, "cpu\t\t: "); | |
249 | ||
75bda950 | 250 | if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name) |
03501dab PM |
251 | seq_printf(m, "%s", cur_cpu_spec->cpu_name); |
252 | else | |
253 | seq_printf(m, "unknown (%08x)", pvr); | |
254 | ||
255 | #ifdef CONFIG_ALTIVEC | |
256 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) | |
257 | seq_printf(m, ", altivec supported"); | |
258 | #endif /* CONFIG_ALTIVEC */ | |
259 | ||
260 | seq_printf(m, "\n"); | |
261 | ||
262 | #ifdef CONFIG_TAU | |
263 | if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) { | |
264 | #ifdef CONFIG_TAU_AVERAGE | |
265 | /* more straightforward, but potentially misleading */ | |
266 | seq_printf(m, "temperature \t: %u C (uncalibrated)\n", | |
bccfd588 | 267 | cpu_temp(cpu_id)); |
03501dab PM |
268 | #else |
269 | /* show the actual temp sensor range */ | |
270 | u32 temp; | |
bccfd588 | 271 | temp = cpu_temp_both(cpu_id); |
03501dab PM |
272 | seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n", |
273 | temp & 0xff, temp >> 16); | |
274 | #endif | |
275 | } | |
276 | #endif /* CONFIG_TAU */ | |
277 | ||
278 | /* | |
2299d03a GS |
279 | * Platforms that have variable clock rates, should implement |
280 | * the method ppc_md.get_proc_freq() that reports the clock | |
281 | * rate of a given cpu. The rest can use ppc_proc_freq to | |
282 | * report the clock rate that is same across all cpus. | |
03501dab | 283 | */ |
2299d03a GS |
284 | if (ppc_md.get_proc_freq) |
285 | proc_freq = ppc_md.get_proc_freq(cpu_id); | |
286 | else | |
287 | proc_freq = ppc_proc_freq; | |
288 | ||
289 | if (proc_freq) | |
03501dab | 290 | seq_printf(m, "clock\t\t: %lu.%06luMHz\n", |
2299d03a | 291 | proc_freq / 1000000, proc_freq % 1000000); |
03501dab PM |
292 | |
293 | if (ppc_md.show_percpuinfo != NULL) | |
294 | ppc_md.show_percpuinfo(m, cpu_id); | |
295 | ||
296 | /* If we are a Freescale core do a simple check so | |
297 | * we dont have to keep adding cases in the future */ | |
298 | if (PVR_VER(pvr) & 0x8000) { | |
a501d8f3 ML |
299 | switch (PVR_VER(pvr)) { |
300 | case 0x8000: /* 7441/7450/7451, Voyager */ | |
301 | case 0x8001: /* 7445/7455, Apollo 6 */ | |
302 | case 0x8002: /* 7447/7457, Apollo 7 */ | |
303 | case 0x8003: /* 7447A, Apollo 7 PM */ | |
304 | case 0x8004: /* 7448, Apollo 8 */ | |
305 | case 0x800c: /* 7410, Nitro */ | |
306 | maj = ((pvr >> 8) & 0xF); | |
307 | min = PVR_MIN(pvr); | |
308 | break; | |
309 | default: /* e500/book-e */ | |
310 | maj = PVR_MAJ(pvr); | |
311 | min = PVR_MIN(pvr); | |
312 | break; | |
313 | } | |
03501dab PM |
314 | } else { |
315 | switch (PVR_VER(pvr)) { | |
316 | case 0x0020: /* 403 family */ | |
317 | maj = PVR_MAJ(pvr) + 1; | |
318 | min = PVR_MIN(pvr); | |
319 | break; | |
320 | case 0x1008: /* 740P/750P ?? */ | |
321 | maj = ((pvr >> 8) & 0xFF) - 1; | |
322 | min = pvr & 0xFF; | |
323 | break; | |
64ebb9a2 MN |
324 | case 0x004e: /* POWER9 bits 12-15 give chip type */ |
325 | maj = (pvr >> 8) & 0x0F; | |
326 | min = pvr & 0xFF; | |
327 | break; | |
03501dab PM |
328 | default: |
329 | maj = (pvr >> 8) & 0xFF; | |
330 | min = pvr & 0xFF; | |
331 | break; | |
332 | } | |
333 | } | |
334 | ||
335 | seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n", | |
336 | maj, min, PVR_VER(pvr), PVR_REV(pvr)); | |
337 | ||
338 | #ifdef CONFIG_PPC32 | |
339 | seq_printf(m, "bogomips\t: %lu.%02lu\n", | |
340 | loops_per_jiffy / (500000/HZ), | |
341 | (loops_per_jiffy / (5000/HZ)) % 100); | |
342 | #endif | |
03501dab | 343 | seq_printf(m, "\n"); |
03501dab | 344 | |
e6532c63 AB |
345 | /* If this is the last cpu, print the summary */ |
346 | if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids) | |
347 | show_cpuinfo_summary(m); | |
348 | ||
03501dab PM |
349 | return 0; |
350 | } | |
351 | ||
352 | static void *c_start(struct seq_file *m, loff_t *pos) | |
353 | { | |
e6532c63 AB |
354 | if (*pos == 0) /* just in case, cpu 0 is not the first */ |
355 | *pos = cpumask_first(cpu_online_mask); | |
356 | else | |
357 | *pos = cpumask_next(*pos - 1, cpu_online_mask); | |
358 | if ((*pos) < nr_cpu_ids) | |
359 | return (void *)(unsigned long)(*pos + 1); | |
360 | return NULL; | |
03501dab PM |
361 | } |
362 | ||
363 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
364 | { | |
e6532c63 | 365 | (*pos)++; |
03501dab PM |
366 | return c_start(m, pos); |
367 | } | |
368 | ||
369 | static void c_stop(struct seq_file *m, void *v) | |
370 | { | |
371 | } | |
372 | ||
88e9d34c | 373 | const struct seq_operations cpuinfo_op = { |
fbadeb6b BH |
374 | .start = c_start, |
375 | .next = c_next, | |
376 | .stop = c_stop, | |
377 | .show = show_cpuinfo, | |
03501dab PM |
378 | }; |
379 | ||
a82765b6 DW |
380 | void __init check_for_initrd(void) |
381 | { | |
382 | #ifdef CONFIG_BLK_DEV_INITRD | |
30437b3e DG |
383 | DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n", |
384 | initrd_start, initrd_end); | |
a82765b6 DW |
385 | |
386 | /* If we were passed an initrd, set the ROOT_DEV properly if the values | |
387 | * look sensible. If not, clear initrd reference. | |
388 | */ | |
51fae6de | 389 | if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) && |
a82765b6 DW |
390 | initrd_end > initrd_start) |
391 | ROOT_DEV = Root_RAM0; | |
6761c4a0 | 392 | else |
a82765b6 | 393 | initrd_start = initrd_end = 0; |
a82765b6 DW |
394 | |
395 | if (initrd_start) | |
a7696b36 | 396 | pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end); |
a82765b6 DW |
397 | |
398 | DBG(" <- check_for_initrd()\n"); | |
399 | #endif /* CONFIG_BLK_DEV_INITRD */ | |
400 | } | |
401 | ||
5ad57078 PM |
402 | #ifdef CONFIG_SMP |
403 | ||
5853aef1 | 404 | int threads_per_core, threads_per_subcore, threads_shift; |
8d089085 | 405 | cpumask_t threads_core_mask; |
de56a948 | 406 | EXPORT_SYMBOL_GPL(threads_per_core); |
5853aef1 | 407 | EXPORT_SYMBOL_GPL(threads_per_subcore); |
de56a948 PM |
408 | EXPORT_SYMBOL_GPL(threads_shift); |
409 | EXPORT_SYMBOL_GPL(threads_core_mask); | |
8d089085 BH |
410 | |
411 | static void __init cpu_init_thread_core_maps(int tpc) | |
412 | { | |
413 | int i; | |
414 | ||
415 | threads_per_core = tpc; | |
5853aef1 | 416 | threads_per_subcore = tpc; |
104699c0 | 417 | cpumask_clear(&threads_core_mask); |
8d089085 BH |
418 | |
419 | /* This implementation only supports power of 2 number of threads | |
420 | * for simplicity and performance | |
421 | */ | |
422 | threads_shift = ilog2(tpc); | |
423 | BUG_ON(tpc != (1 << threads_shift)); | |
424 | ||
425 | for (i = 0; i < tpc; i++) | |
104699c0 | 426 | cpumask_set_cpu(i, &threads_core_mask); |
8d089085 BH |
427 | |
428 | printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n", | |
429 | tpc, tpc > 1 ? "s" : ""); | |
430 | printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift); | |
431 | } | |
432 | ||
433 | ||
9f593f13 NP |
434 | u32 *cpu_to_phys_id = NULL; |
435 | ||
5ad57078 PM |
436 | /** |
437 | * setup_cpu_maps - initialize the following cpu maps: | |
828a6986 AB |
438 | * cpu_possible_mask |
439 | * cpu_present_mask | |
5ad57078 PM |
440 | * |
441 | * Having the possible map set up early allows us to restrict allocations | |
8657ae28 | 442 | * of things like irqstacks to nr_cpu_ids rather than NR_CPUS. |
5ad57078 PM |
443 | * |
444 | * We do not initialize the online map here; cpus set their own bits in | |
828a6986 | 445 | * cpu_online_mask as they come up. |
5ad57078 PM |
446 | * |
447 | * This function is valid only for Open Firmware systems. finish_device_tree | |
448 | * must be called before using this. | |
449 | * | |
450 | * While we're here, we may as well set the "physical" cpu ids in the paca. | |
4df20460 AB |
451 | * |
452 | * NOTE: This must match the parsing done in early_init_dt_scan_cpus. | |
5ad57078 PM |
453 | */ |
454 | void __init smp_setup_cpu_maps(void) | |
455 | { | |
9625e69a | 456 | struct device_node *dn; |
5ad57078 | 457 | int cpu = 0; |
8d089085 BH |
458 | int nthreads = 1; |
459 | ||
460 | DBG("smp_setup_cpu_maps()\n"); | |
5ad57078 | 461 | |
b63a07d6 MR |
462 | cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32), |
463 | __alignof__(u32)); | |
9f593f13 | 464 | |
9625e69a | 465 | for_each_node_by_type(dn, "cpu") { |
ac13282d | 466 | const __be32 *intserv; |
43f88120 | 467 | __be32 cpu_be; |
8d089085 BH |
468 | int j, len; |
469 | ||
b7c670d6 | 470 | DBG(" * %pOF...\n", dn); |
5ad57078 | 471 | |
e2eb6392 SR |
472 | intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", |
473 | &len); | |
8d089085 | 474 | if (intserv) { |
8d089085 BH |
475 | DBG(" ibm,ppc-interrupt-server#s -> %d threads\n", |
476 | nthreads); | |
477 | } else { | |
478 | DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n"); | |
e16c8765 | 479 | intserv = of_get_property(dn, "reg", &len); |
43f88120 AP |
480 | if (!intserv) { |
481 | cpu_be = cpu_to_be32(cpu); | |
9f593f13 | 482 | /* XXX: what is this? uninitialized?? */ |
43f88120 | 483 | intserv = &cpu_be; /* assume logical == phys */ |
e16c8765 | 484 | len = 4; |
43f88120 | 485 | } |
5ad57078 PM |
486 | } |
487 | ||
e16c8765 AF |
488 | nthreads = len / sizeof(int); |
489 | ||
8657ae28 | 490 | for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) { |
6663a4fa SW |
491 | bool avail; |
492 | ||
8d089085 | 493 | DBG(" thread %d -> cpu %d (hard id %d)\n", |
ac13282d | 494 | j, cpu, be32_to_cpu(intserv[j])); |
6663a4fa SW |
495 | |
496 | avail = of_device_is_available(dn); | |
497 | if (!avail) | |
498 | avail = !of_property_match_string(dn, | |
499 | "enable-method", "spin-table"); | |
500 | ||
501 | set_cpu_present(cpu, avail); | |
ea0f1cab | 502 | set_cpu_possible(cpu, true); |
9f593f13 | 503 | cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]); |
5ad57078 PM |
504 | cpu++; |
505 | } | |
9625e69a DT |
506 | |
507 | if (cpu >= nr_cpu_ids) { | |
508 | of_node_put(dn); | |
509 | break; | |
510 | } | |
5ad57078 PM |
511 | } |
512 | ||
8d089085 BH |
513 | /* If no SMT supported, nthreads is forced to 1 */ |
514 | if (!cpu_has_feature(CPU_FTR_SMT)) { | |
515 | DBG(" SMT disabled ! nthreads forced to 1\n"); | |
516 | nthreads = 1; | |
517 | } | |
518 | ||
5ad57078 PM |
519 | #ifdef CONFIG_PPC64 |
520 | /* | |
521 | * On pSeries LPAR, we need to know how many cpus | |
522 | * could possibly be added to this partition. | |
523 | */ | |
0f2b3442 | 524 | if (firmware_has_feature(FW_FEATURE_LPAR) && |
799d6046 | 525 | (dn = of_find_node_by_path("/rtas"))) { |
5ad57078 | 526 | int num_addr_cell, num_size_cell, maxcpus; |
01666c8e | 527 | const __be32 *ireg; |
5ad57078 | 528 | |
a8bda5dd | 529 | num_addr_cell = of_n_addr_cells(dn); |
9213feea | 530 | num_size_cell = of_n_size_cells(dn); |
5ad57078 | 531 | |
e2eb6392 | 532 | ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL); |
5ad57078 PM |
533 | |
534 | if (!ireg) | |
535 | goto out; | |
536 | ||
01666c8e | 537 | maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell); |
5ad57078 PM |
538 | |
539 | /* Double maxcpus for processors which have SMT capability */ | |
540 | if (cpu_has_feature(CPU_FTR_SMT)) | |
8d089085 | 541 | maxcpus *= nthreads; |
5ad57078 | 542 | |
8657ae28 | 543 | if (maxcpus > nr_cpu_ids) { |
5ad57078 PM |
544 | printk(KERN_WARNING |
545 | "Partition configured for %d cpus, " | |
9b130ad5 | 546 | "operating system maximum is %u.\n", |
8657ae28 MM |
547 | maxcpus, nr_cpu_ids); |
548 | maxcpus = nr_cpu_ids; | |
5ad57078 PM |
549 | } else |
550 | printk(KERN_INFO "Partition configured for %d cpus.\n", | |
551 | maxcpus); | |
552 | ||
553 | for (cpu = 0; cpu < maxcpus; cpu++) | |
ea0f1cab | 554 | set_cpu_possible(cpu, true); |
5ad57078 PM |
555 | out: |
556 | of_node_put(dn); | |
557 | } | |
d5a7430d MT |
558 | vdso_data->processorCount = num_present_cpus(); |
559 | #endif /* CONFIG_PPC64 */ | |
8d089085 BH |
560 | |
561 | /* Initialize CPU <=> thread mapping/ | |
562 | * | |
563 | * WARNING: We assume that the number of threads is the same for | |
564 | * every CPU in the system. If that is not the case, then some code | |
565 | * here will have to be reworked | |
566 | */ | |
567 | cpu_init_thread_core_maps(nthreads); | |
1426d5a3 | 568 | |
c1854e00 | 569 | /* Now that possible cpus are set, set nr_cpu_ids for later use */ |
aa79bc21 | 570 | setup_nr_cpu_ids(); |
c1854e00 | 571 | |
1426d5a3 | 572 | free_unused_pacas(); |
d5a7430d | 573 | } |
5ad57078 | 574 | #endif /* CONFIG_SMP */ |
fca5dcd4 | 575 | |
d33b78df | 576 | #ifdef CONFIG_PCSPKR_PLATFORM |
e5c6c8e4 MN |
577 | static __init int add_pcspkr(void) |
578 | { | |
579 | struct device_node *np; | |
580 | struct platform_device *pd; | |
581 | int ret; | |
582 | ||
583 | np = of_find_compatible_node(NULL, NULL, "pnpPNP,100"); | |
584 | of_node_put(np); | |
585 | if (!np) | |
586 | return -ENODEV; | |
587 | ||
588 | pd = platform_device_alloc("pcspkr", -1); | |
589 | if (!pd) | |
590 | return -ENOMEM; | |
591 | ||
592 | ret = platform_device_add(pd); | |
593 | if (ret) | |
594 | platform_device_put(pd); | |
595 | ||
596 | return ret; | |
597 | } | |
598 | device_initcall(add_pcspkr); | |
d33b78df | 599 | #endif /* CONFIG_PCSPKR_PLATFORM */ |
95d465fd | 600 | |
e8222502 BH |
601 | void probe_machine(void) |
602 | { | |
603 | extern struct machdep_calls __machine_desc_start; | |
604 | extern struct machdep_calls __machine_desc_end; | |
84b62c72 | 605 | unsigned int i; |
e8222502 BH |
606 | |
607 | /* | |
608 | * Iterate all ppc_md structures until we find the proper | |
609 | * one for the current machine type | |
610 | */ | |
611 | DBG("Probing machine type ...\n"); | |
612 | ||
84b62c72 BH |
613 | /* |
614 | * Check ppc_md is empty, if not we have a bug, ie, we setup an | |
615 | * entry before probe_machine() which will be overwritten | |
616 | */ | |
617 | for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) { | |
618 | if (((void **)&ppc_md)[i]) { | |
619 | printk(KERN_ERR "Entry %d in ppc_md non empty before" | |
620 | " machine probe !\n", i); | |
621 | } | |
622 | } | |
623 | ||
e8222502 BH |
624 | for (machine_id = &__machine_desc_start; |
625 | machine_id < &__machine_desc_end; | |
626 | machine_id++) { | |
627 | DBG(" %s ...", machine_id->name); | |
628 | memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls)); | |
629 | if (ppc_md.probe()) { | |
630 | DBG(" match !\n"); | |
631 | break; | |
632 | } | |
633 | DBG("\n"); | |
634 | } | |
635 | /* What can we do if we didn't find ? */ | |
636 | if (machine_id >= &__machine_desc_end) { | |
e9952652 | 637 | pr_err("No suitable machine description found !\n"); |
e8222502 BH |
638 | for (;;); |
639 | } | |
640 | ||
641 | printk(KERN_INFO "Using %s machine description\n", ppc_md.name); | |
642 | } | |
1269277a | 643 | |
8d8a0241 | 644 | /* Match a class of boards, not a specific device configuration. */ |
1269277a DW |
645 | int check_legacy_ioport(unsigned long base_port) |
646 | { | |
8d8a0241 OH |
647 | struct device_node *parent, *np = NULL; |
648 | int ret = -ENODEV; | |
649 | ||
650 | switch(base_port) { | |
651 | case I8042_DATA_REG: | |
db0dbae9 WF |
652 | if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303"))) |
653 | np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03"); | |
654 | if (np) { | |
655 | parent = of_get_parent(np); | |
540c6c39 MW |
656 | |
657 | of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0); | |
658 | if (!of_i8042_kbd_irq) | |
659 | of_i8042_kbd_irq = 1; | |
660 | ||
661 | of_i8042_aux_irq = irq_of_parse_and_map(parent, 1); | |
662 | if (!of_i8042_aux_irq) | |
663 | of_i8042_aux_irq = 12; | |
664 | ||
db0dbae9 WF |
665 | of_node_put(np); |
666 | np = parent; | |
667 | break; | |
668 | } | |
8d8a0241 | 669 | np = of_find_node_by_type(NULL, "8042"); |
f5d834fc AC |
670 | /* Pegasos has no device_type on its 8042 node, look for the |
671 | * name instead */ | |
672 | if (!np) | |
673 | np = of_find_node_by_name(NULL, "8042"); | |
2c78027a GP |
674 | if (np) { |
675 | of_i8042_kbd_irq = 1; | |
676 | of_i8042_aux_irq = 12; | |
677 | } | |
8d8a0241 OH |
678 | break; |
679 | case FDC_BASE: /* FDC1 */ | |
680 | np = of_find_node_by_type(NULL, "fdc"); | |
681 | break; | |
8d8a0241 OH |
682 | default: |
683 | /* ipmi is supposed to fail here */ | |
684 | break; | |
685 | } | |
686 | if (!np) | |
687 | return ret; | |
688 | parent = of_get_parent(np); | |
689 | if (parent) { | |
e5480bdc | 690 | if (of_node_is_type(parent, "isa")) |
8d8a0241 OH |
691 | ret = 0; |
692 | of_node_put(parent); | |
693 | } | |
694 | of_node_put(np); | |
695 | return ret; | |
1269277a DW |
696 | } |
697 | EXPORT_SYMBOL(check_legacy_ioport); | |
7e990266 | 698 | |
ab9dbf77 DG |
699 | static int ppc_panic_event(struct notifier_block *this, |
700 | unsigned long event, void *ptr) | |
701 | { | |
855b6232 NP |
702 | /* |
703 | * panic does a local_irq_disable, but we really | |
704 | * want interrupts to be hard disabled. | |
705 | */ | |
706 | hard_irq_disable(); | |
707 | ||
ab9dbf77 DG |
708 | /* |
709 | * If firmware-assisted dump has been registered then trigger | |
710 | * firmware-assisted dump and let firmware handle everything else. | |
711 | */ | |
712 | crash_fadump(NULL, ptr); | |
855b6232 NP |
713 | if (ppc_md.panic) |
714 | ppc_md.panic(ptr); /* May not return */ | |
ab9dbf77 DG |
715 | return NOTIFY_DONE; |
716 | } | |
717 | ||
718 | static struct notifier_block ppc_panic_block = { | |
719 | .notifier_call = ppc_panic_event, | |
720 | .priority = INT_MIN /* may not return; must be done last */ | |
721 | }; | |
722 | ||
723 | void __init setup_panic(void) | |
724 | { | |
855b6232 NP |
725 | /* PPC64 always does a hard irq disable in its panic handler */ |
726 | if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic) | |
ab9dbf77 DG |
727 | return; |
728 | atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block); | |
729 | } | |
730 | ||
06cce43c DF |
731 | #ifdef CONFIG_CHECK_CACHE_COHERENCY |
732 | /* | |
733 | * For platforms that have configurable cache-coherency. This function | |
734 | * checks that the cache coherency setting of the kernel matches the setting | |
735 | * left by the firmware, as indicated in the device tree. Since a mismatch | |
736 | * will eventually result in DMA failures, we print * and error and call | |
737 | * BUG() in that case. | |
738 | */ | |
739 | ||
740 | #ifdef CONFIG_NOT_COHERENT_CACHE | |
741 | #define KERNEL_COHERENCY 0 | |
742 | #else | |
743 | #define KERNEL_COHERENCY 1 | |
744 | #endif | |
745 | ||
746 | static int __init check_cache_coherency(void) | |
747 | { | |
748 | struct device_node *np; | |
749 | const void *prop; | |
750 | int devtree_coherency; | |
751 | ||
752 | np = of_find_node_by_path("/"); | |
753 | prop = of_get_property(np, "coherency-off", NULL); | |
754 | of_node_put(np); | |
755 | ||
756 | devtree_coherency = prop ? 0 : 1; | |
757 | ||
758 | if (devtree_coherency != KERNEL_COHERENCY) { | |
759 | printk(KERN_ERR | |
760 | "kernel coherency:%s != device tree_coherency:%s\n", | |
761 | KERNEL_COHERENCY ? "on" : "off", | |
762 | devtree_coherency ? "on" : "off"); | |
763 | BUG(); | |
764 | } | |
765 | ||
766 | return 0; | |
767 | } | |
768 | ||
769 | late_initcall(check_cache_coherency); | |
770 | #endif /* CONFIG_CHECK_CACHE_COHERENCY */ | |
94a3807c ME |
771 | |
772 | #ifdef CONFIG_DEBUG_FS | |
773 | struct dentry *powerpc_debugfs_root; | |
907b1f45 | 774 | EXPORT_SYMBOL(powerpc_debugfs_root); |
94a3807c ME |
775 | |
776 | static int powerpc_debugfs_init(void) | |
777 | { | |
778 | powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL); | |
779 | ||
780 | return powerpc_debugfs_root == NULL; | |
781 | } | |
782 | arch_initcall(powerpc_debugfs_init); | |
783 | #endif | |
d746286c | 784 | |
a9c0f41b | 785 | void ppc_printk_progress(char *s, unsigned short hex) |
d746286c | 786 | { |
a9c0f41b | 787 | pr_info("%s\n", s); |
d746286c KG |
788 | } |
789 | ||
314b02f5 | 790 | void arch_setup_pdev_archdata(struct platform_device *pdev) |
d746286c | 791 | { |
314b02f5 KG |
792 | pdev->archdata.dma_mask = DMA_BIT_MASK(32); |
793 | pdev->dev.dma_mask = &pdev->archdata.dma_mask; | |
d746286c | 794 | } |
b1923caa BH |
795 | |
796 | static __init void print_system_info(void) | |
797 | { | |
798 | pr_info("-----------------------------------------------------\n"); | |
4e003747 | 799 | #ifdef CONFIG_PPC_BOOK3S_64 |
b1923caa BH |
800 | pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); |
801 | #endif | |
68289ae9 | 802 | #ifdef CONFIG_PPC_BOOK3S_32 |
b1923caa BH |
803 | pr_info("Hash_size = 0x%lx\n", Hash_size); |
804 | #endif | |
805 | pr_info("phys_mem_size = 0x%llx\n", | |
806 | (unsigned long long)memblock_phys_mem_size()); | |
807 | ||
808 | pr_info("dcache_bsize = 0x%x\n", dcache_bsize); | |
809 | pr_info("icache_bsize = 0x%x\n", icache_bsize); | |
810 | if (ucache_bsize != 0) | |
811 | pr_info("ucache_bsize = 0x%x\n", ucache_bsize); | |
812 | ||
813 | pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features); | |
814 | pr_info(" possible = 0x%016lx\n", | |
815 | (unsigned long)CPU_FTRS_POSSIBLE); | |
816 | pr_info(" always = 0x%016lx\n", | |
817 | (unsigned long)CPU_FTRS_ALWAYS); | |
818 | pr_info("cpu_user_features = 0x%08x 0x%08x\n", | |
819 | cur_cpu_spec->cpu_user_features, | |
820 | cur_cpu_spec->cpu_user_features2); | |
821 | pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features); | |
822 | #ifdef CONFIG_PPC64 | |
823 | pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features); | |
824 | #endif | |
825 | ||
4e003747 | 826 | #ifdef CONFIG_PPC_BOOK3S_64 |
b1923caa BH |
827 | if (htab_address) |
828 | pr_info("htab_address = 0x%p\n", htab_address); | |
829 | if (htab_hash_mask) | |
830 | pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask); | |
831 | #endif | |
68289ae9 | 832 | #ifdef CONFIG_PPC_BOOK3S_32 |
b1923caa BH |
833 | if (Hash) |
834 | pr_info("Hash = 0x%p\n", Hash); | |
835 | if (Hash_mask) | |
836 | pr_info("Hash_mask = 0x%lx\n", Hash_mask); | |
837 | #endif | |
838 | ||
839 | if (PHYSICAL_START > 0) | |
840 | pr_info("physical_start = 0x%llx\n", | |
841 | (unsigned long long)PHYSICAL_START); | |
842 | pr_info("-----------------------------------------------------\n"); | |
843 | } | |
844 | ||
59f57774 NP |
845 | #ifdef CONFIG_SMP |
846 | static void smp_setup_pacas(void) | |
847 | { | |
848 | int cpu; | |
849 | ||
850 | for_each_possible_cpu(cpu) { | |
851 | if (cpu == smp_processor_id()) | |
852 | continue; | |
853 | allocate_paca(cpu); | |
854 | set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]); | |
855 | } | |
856 | ||
857 | memblock_free(__pa(cpu_to_phys_id), nr_cpu_ids * sizeof(u32)); | |
858 | cpu_to_phys_id = NULL; | |
859 | } | |
860 | #endif | |
861 | ||
b1923caa BH |
862 | /* |
863 | * Called into from start_kernel this initializes memblock, which is used | |
864 | * to manage page allocation until mem_init is called. | |
865 | */ | |
866 | void __init setup_arch(char **cmdline_p) | |
867 | { | |
868 | *cmdline_p = boot_command_line; | |
869 | ||
870 | /* Set a half-reasonable default so udelay does something sensible */ | |
871 | loops_per_jiffy = 500000000 / HZ; | |
872 | ||
873 | /* Unflatten the device-tree passed by prom_init or kexec */ | |
874 | unflatten_device_tree(); | |
875 | ||
876 | /* | |
877 | * Initialize cache line/block info from device-tree (on ppc64) or | |
878 | * just cputable (on ppc32). | |
879 | */ | |
880 | initialize_cache_info(); | |
881 | ||
882 | /* Initialize RTAS if available. */ | |
883 | rtas_initialize(); | |
884 | ||
885 | /* Check if we have an initrd provided via the device-tree. */ | |
886 | check_for_initrd(); | |
887 | ||
888 | /* Probe the machine type, establish ppc_md. */ | |
889 | probe_machine(); | |
890 | ||
ab9dbf77 DG |
891 | /* Setup panic notifier if requested by the platform. */ |
892 | setup_panic(); | |
893 | ||
b1923caa BH |
894 | /* |
895 | * Configure ppc_md.power_save (ppc32 only, 64-bit machines do | |
896 | * it from their respective probe() function. | |
897 | */ | |
898 | setup_power_save(); | |
899 | ||
900 | /* Discover standard serial ports. */ | |
901 | find_legacy_serial_ports(); | |
902 | ||
903 | /* Register early console with the printk subsystem. */ | |
904 | register_early_udbg_console(); | |
905 | ||
906 | /* Setup the various CPU maps based on the device-tree. */ | |
907 | smp_setup_cpu_maps(); | |
908 | ||
909 | /* Initialize xmon. */ | |
910 | xmon_setup(); | |
911 | ||
912 | /* Check the SMT related command line arguments (ppc64). */ | |
913 | check_smt_enabled(); | |
914 | ||
9bd9be00 NP |
915 | /* Parse memory topology */ |
916 | mem_topology_setup(); | |
917 | ||
b1923caa BH |
918 | /* |
919 | * Release secondary cpus out of their spinloops at 0x60 now that | |
920 | * we can map physical -> logical CPU ids. | |
921 | * | |
922 | * Freescale Book3e parts spin in a loop provided by firmware, | |
923 | * so smp_release_cpus() does nothing for them. | |
924 | */ | |
925 | #ifdef CONFIG_SMP | |
59f57774 | 926 | smp_setup_pacas(); |
1d0afc0d ME |
927 | |
928 | /* On BookE, setup per-core TLB data structures. */ | |
929 | setup_tlb_core_data(); | |
930 | ||
b1923caa BH |
931 | smp_release_cpus(); |
932 | #endif | |
933 | ||
934 | /* Print various info about the machine that has been gathered so far. */ | |
935 | print_system_info(); | |
936 | ||
937 | /* Reserve large chunks of memory for use by CMA for KVM. */ | |
938 | kvm_cma_reserve(); | |
939 | ||
ed1cd6de | 940 | klp_init_thread_info(&init_task); |
b1923caa BH |
941 | |
942 | init_mm.start_code = (unsigned long)_stext; | |
943 | init_mm.end_code = (unsigned long) _etext; | |
944 | init_mm.end_data = (unsigned long) _edata; | |
945 | init_mm.brk = klimit; | |
957b778a AK |
946 | |
947 | #ifdef CONFIG_PPC_MM_SLICES | |
948 | #ifdef CONFIG_PPC64 | |
4722476b NP |
949 | if (!radix_enabled()) |
950 | init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW_USER64; | |
aa0ab02b CL |
951 | #elif defined(CONFIG_PPC_8xx) |
952 | init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW; | |
957b778a AK |
953 | #else |
954 | #error "context.addr_limit not initialized." | |
955 | #endif | |
956 | #endif | |
957 | ||
b1923caa | 958 | #ifdef CONFIG_SPAPR_TCE_IOMMU |
88f54a35 | 959 | mm_iommu_init(&init_mm); |
b1923caa BH |
960 | #endif |
961 | irqstack_early_init(); | |
962 | exc_lvl_early_init(); | |
963 | emergency_stack_init(); | |
964 | ||
965 | initmem_init(); | |
966 | ||
d90fe2ac CL |
967 | early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT); |
968 | ||
b1923caa BH |
969 | #ifdef CONFIG_DUMMY_CONSOLE |
970 | conswitchp = &dummy_con; | |
971 | #endif | |
972 | if (ppc_md.setup_arch) | |
973 | ppc_md.setup_arch(); | |
974 | ||
af375eef | 975 | setup_barrier_nospec(); |
3bc8ea86 | 976 | setup_spectre_v2(); |
af375eef | 977 | |
b1923caa BH |
978 | paging_init(); |
979 | ||
980 | /* Initialize the MMU context management stuff. */ | |
981 | mmu_context_init(); | |
982 | ||
983 | #ifdef CONFIG_PPC64 | |
984 | /* Interrupt code needs to be 64K-aligned. */ | |
985 | if ((unsigned long)_stext & 0xffff) | |
986 | panic("Kernelbase not 64K-aligned (0x%lx)!\n", | |
987 | (unsigned long)_stext); | |
988 | #endif | |
989 | } |