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Commit | Line | Data |
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03501dab PM |
1 | /* |
2 | * Common boot and setup code for both 32-bit and 64-bit. | |
3 | * Extracted from arch/powerpc/kernel/setup_64.c. | |
4 | * | |
5 | * Copyright (C) 2001 PPC64 Team, IBM Corp | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
e8222502 BH |
12 | |
13 | #undef DEBUG | |
14 | ||
4b16f8e2 | 15 | #include <linux/export.h> |
03501dab PM |
16 | #include <linux/string.h> |
17 | #include <linux/sched.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/reboot.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/initrd.h> | |
e5c6c8e4 | 23 | #include <linux/platform_device.h> |
03501dab PM |
24 | #include <linux/seq_file.h> |
25 | #include <linux/ioport.h> | |
26 | #include <linux/console.h> | |
894673ee | 27 | #include <linux/screen_info.h> |
03501dab PM |
28 | #include <linux/root_dev.h> |
29 | #include <linux/notifier.h> | |
30 | #include <linux/cpu.h> | |
31 | #include <linux/unistd.h> | |
32 | #include <linux/serial.h> | |
33 | #include <linux/serial_8250.h> | |
8d089085 | 34 | #include <linux/percpu.h> |
95f72d1e | 35 | #include <linux/memblock.h> |
d746286c | 36 | #include <linux/of_platform.h> |
b1923caa | 37 | #include <linux/hugetlb.h> |
7644d581 | 38 | #include <asm/debugfs.h> |
03501dab | 39 | #include <asm/io.h> |
1426d5a3 | 40 | #include <asm/paca.h> |
03501dab PM |
41 | #include <asm/prom.h> |
42 | #include <asm/processor.h> | |
a7f290da | 43 | #include <asm/vdso_datapage.h> |
03501dab | 44 | #include <asm/pgtable.h> |
03501dab PM |
45 | #include <asm/smp.h> |
46 | #include <asm/elf.h> | |
47 | #include <asm/machdep.h> | |
48 | #include <asm/time.h> | |
49 | #include <asm/cputable.h> | |
50 | #include <asm/sections.h> | |
e8222502 | 51 | #include <asm/firmware.h> |
03501dab PM |
52 | #include <asm/btext.h> |
53 | #include <asm/nvram.h> | |
54 | #include <asm/setup.h> | |
03501dab PM |
55 | #include <asm/rtas.h> |
56 | #include <asm/iommu.h> | |
57 | #include <asm/serial.h> | |
58 | #include <asm/cache.h> | |
59 | #include <asm/page.h> | |
60 | #include <asm/mmu.h> | |
fca5dcd4 | 61 | #include <asm/xmon.h> |
8d089085 | 62 | #include <asm/cputhreads.h> |
f465df81 | 63 | #include <mm/mmu_decl.h> |
ebaeb5ae | 64 | #include <asm/fadump.h> |
b1923caa BH |
65 | #include <asm/udbg.h> |
66 | #include <asm/hugetlb.h> | |
67 | #include <asm/livepatch.h> | |
68 | #include <asm/mmu_context.h> | |
b92a226e | 69 | #include <asm/cpu_has_feature.h> |
b1923caa BH |
70 | |
71 | #include "setup.h" | |
03501dab | 72 | |
03501dab | 73 | #ifdef DEBUG |
f9e4ec57 | 74 | #include <asm/udbg.h> |
03501dab PM |
75 | #define DBG(fmt...) udbg_printf(fmt) |
76 | #else | |
77 | #define DBG(fmt...) | |
78 | #endif | |
79 | ||
e8222502 BH |
80 | /* The main machine-dep calls structure |
81 | */ | |
82 | struct machdep_calls ppc_md; | |
83 | EXPORT_SYMBOL(ppc_md); | |
84 | struct machdep_calls *machine_id; | |
85 | EXPORT_SYMBOL(machine_id); | |
799d6046 | 86 | |
36ae37e3 BH |
87 | int boot_cpuid = -1; |
88 | EXPORT_SYMBOL_GPL(boot_cpuid); | |
89 | ||
33ec723c BH |
90 | /* |
91 | * These are used in binfmt_elf.c to put aux entries on the stack | |
92 | * for each elf executable being started. | |
93 | */ | |
94 | int dcache_bsize; | |
95 | int icache_bsize; | |
96 | int ucache_bsize; | |
97 | ||
98 | ||
49b09853 PM |
99 | unsigned long klimit = (unsigned long) _end; |
100 | ||
03501dab PM |
101 | /* |
102 | * This still seems to be needed... -- paulus | |
103 | */ | |
104 | struct screen_info screen_info = { | |
105 | .orig_x = 0, | |
106 | .orig_y = 25, | |
107 | .orig_video_cols = 80, | |
108 | .orig_video_lines = 25, | |
109 | .orig_video_isVGA = 1, | |
110 | .orig_video_points = 16 | |
111 | }; | |
e1802b06 AB |
112 | #if defined(CONFIG_FB_VGA16_MODULE) |
113 | EXPORT_SYMBOL(screen_info); | |
114 | #endif | |
03501dab | 115 | |
540c6c39 MW |
116 | /* Variables required to store legacy IO irq routing */ |
117 | int of_i8042_kbd_irq; | |
ee110066 | 118 | EXPORT_SYMBOL_GPL(of_i8042_kbd_irq); |
540c6c39 | 119 | int of_i8042_aux_irq; |
ee110066 | 120 | EXPORT_SYMBOL_GPL(of_i8042_aux_irq); |
540c6c39 | 121 | |
03501dab PM |
122 | #ifdef __DO_IRQ_CANON |
123 | /* XXX should go elsewhere eventually */ | |
124 | int ppc_do_canonicalize_irqs; | |
125 | EXPORT_SYMBOL(ppc_do_canonicalize_irqs); | |
126 | #endif | |
127 | ||
22bd0177 HB |
128 | #ifdef CONFIG_CRASH_CORE |
129 | /* This keeps a track of which one is the crashing cpu. */ | |
130 | int crashing_cpu = -1; | |
131 | #endif | |
132 | ||
03501dab PM |
133 | /* also used by kexec */ |
134 | void machine_shutdown(void) | |
135 | { | |
67b43b9d MS |
136 | #ifdef CONFIG_FA_DUMP |
137 | /* | |
138 | * if fadump is active, cleanup the fadump registration before we | |
139 | * shutdown. | |
140 | */ | |
141 | fadump_cleanup(); | |
142 | #endif | |
143 | ||
3d1229d6 ME |
144 | if (ppc_md.machine_shutdown) |
145 | ppc_md.machine_shutdown(); | |
03501dab PM |
146 | } |
147 | ||
d0d738a4 AS |
148 | static void machine_hang(void) |
149 | { | |
150 | pr_emerg("System Halted, OK to turn off power\n"); | |
151 | local_irq_disable(); | |
152 | while (1) | |
153 | ; | |
154 | } | |
155 | ||
03501dab PM |
156 | void machine_restart(char *cmd) |
157 | { | |
158 | machine_shutdown(); | |
b8e383d5 KG |
159 | if (ppc_md.restart) |
160 | ppc_md.restart(cmd); | |
d0d738a4 | 161 | |
03501dab | 162 | smp_send_stop(); |
ad247473 AS |
163 | |
164 | do_kernel_restart(cmd); | |
165 | mdelay(1000); | |
166 | ||
d0d738a4 | 167 | machine_hang(); |
03501dab PM |
168 | } |
169 | ||
170 | void machine_power_off(void) | |
171 | { | |
172 | machine_shutdown(); | |
9178ba29 AG |
173 | if (pm_power_off) |
174 | pm_power_off(); | |
d0d738a4 | 175 | |
03501dab | 176 | smp_send_stop(); |
d0d738a4 | 177 | machine_hang(); |
03501dab PM |
178 | } |
179 | /* Used by the G5 thermal driver */ | |
180 | EXPORT_SYMBOL_GPL(machine_power_off); | |
181 | ||
9178ba29 | 182 | void (*pm_power_off)(void); |
03501dab PM |
183 | EXPORT_SYMBOL_GPL(pm_power_off); |
184 | ||
185 | void machine_halt(void) | |
186 | { | |
187 | machine_shutdown(); | |
b8e383d5 KG |
188 | if (ppc_md.halt) |
189 | ppc_md.halt(); | |
d0d738a4 | 190 | |
03501dab | 191 | smp_send_stop(); |
d0d738a4 | 192 | machine_hang(); |
03501dab PM |
193 | } |
194 | ||
195 | ||
196 | #ifdef CONFIG_TAU | |
197 | extern u32 cpu_temp(unsigned long cpu); | |
198 | extern u32 cpu_temp_both(unsigned long cpu); | |
199 | #endif /* CONFIG_TAU */ | |
200 | ||
201 | #ifdef CONFIG_SMP | |
6b7487fc | 202 | DEFINE_PER_CPU(unsigned int, cpu_pvr); |
03501dab PM |
203 | #endif |
204 | ||
2c2df038 AB |
205 | static void show_cpuinfo_summary(struct seq_file *m) |
206 | { | |
207 | struct device_node *root; | |
208 | const char *model = NULL; | |
209 | #if defined(CONFIG_SMP) && defined(CONFIG_PPC32) | |
210 | unsigned long bogosum = 0; | |
211 | int i; | |
212 | for_each_online_cpu(i) | |
213 | bogosum += loops_per_jiffy; | |
214 | seq_printf(m, "total bogomips\t: %lu.%02lu\n", | |
215 | bogosum/(500000/HZ), bogosum/(5000/HZ) % 100); | |
216 | #endif /* CONFIG_SMP && CONFIG_PPC32 */ | |
217 | seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq); | |
218 | if (ppc_md.name) | |
219 | seq_printf(m, "platform\t: %s\n", ppc_md.name); | |
220 | root = of_find_node_by_path("/"); | |
221 | if (root) | |
222 | model = of_get_property(root, "model", NULL); | |
223 | if (model) | |
224 | seq_printf(m, "model\t\t: %s\n", model); | |
225 | of_node_put(root); | |
226 | ||
227 | if (ppc_md.show_cpuinfo != NULL) | |
228 | ppc_md.show_cpuinfo(m); | |
229 | ||
230 | #ifdef CONFIG_PPC32 | |
231 | /* Display the amount of memory */ | |
232 | seq_printf(m, "Memory\t\t: %d MB\n", | |
233 | (unsigned int)(total_memory / (1024 * 1024))); | |
234 | #endif | |
235 | } | |
236 | ||
03501dab PM |
237 | static int show_cpuinfo(struct seq_file *m, void *v) |
238 | { | |
239 | unsigned long cpu_id = (unsigned long)v - 1; | |
240 | unsigned int pvr; | |
2299d03a | 241 | unsigned long proc_freq; |
03501dab PM |
242 | unsigned short maj; |
243 | unsigned short min; | |
244 | ||
03501dab | 245 | #ifdef CONFIG_SMP |
6b7487fc | 246 | pvr = per_cpu(cpu_pvr, cpu_id); |
03501dab PM |
247 | #else |
248 | pvr = mfspr(SPRN_PVR); | |
249 | #endif | |
250 | maj = (pvr >> 8) & 0xFF; | |
251 | min = pvr & 0xFF; | |
252 | ||
253 | seq_printf(m, "processor\t: %lu\n", cpu_id); | |
254 | seq_printf(m, "cpu\t\t: "); | |
255 | ||
75bda950 | 256 | if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name) |
03501dab PM |
257 | seq_printf(m, "%s", cur_cpu_spec->cpu_name); |
258 | else | |
259 | seq_printf(m, "unknown (%08x)", pvr); | |
260 | ||
261 | #ifdef CONFIG_ALTIVEC | |
262 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) | |
263 | seq_printf(m, ", altivec supported"); | |
264 | #endif /* CONFIG_ALTIVEC */ | |
265 | ||
266 | seq_printf(m, "\n"); | |
267 | ||
268 | #ifdef CONFIG_TAU | |
269 | if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) { | |
270 | #ifdef CONFIG_TAU_AVERAGE | |
271 | /* more straightforward, but potentially misleading */ | |
272 | seq_printf(m, "temperature \t: %u C (uncalibrated)\n", | |
bccfd588 | 273 | cpu_temp(cpu_id)); |
03501dab PM |
274 | #else |
275 | /* show the actual temp sensor range */ | |
276 | u32 temp; | |
bccfd588 | 277 | temp = cpu_temp_both(cpu_id); |
03501dab PM |
278 | seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n", |
279 | temp & 0xff, temp >> 16); | |
280 | #endif | |
281 | } | |
282 | #endif /* CONFIG_TAU */ | |
283 | ||
284 | /* | |
2299d03a GS |
285 | * Platforms that have variable clock rates, should implement |
286 | * the method ppc_md.get_proc_freq() that reports the clock | |
287 | * rate of a given cpu. The rest can use ppc_proc_freq to | |
288 | * report the clock rate that is same across all cpus. | |
03501dab | 289 | */ |
2299d03a GS |
290 | if (ppc_md.get_proc_freq) |
291 | proc_freq = ppc_md.get_proc_freq(cpu_id); | |
292 | else | |
293 | proc_freq = ppc_proc_freq; | |
294 | ||
295 | if (proc_freq) | |
03501dab | 296 | seq_printf(m, "clock\t\t: %lu.%06luMHz\n", |
2299d03a | 297 | proc_freq / 1000000, proc_freq % 1000000); |
03501dab PM |
298 | |
299 | if (ppc_md.show_percpuinfo != NULL) | |
300 | ppc_md.show_percpuinfo(m, cpu_id); | |
301 | ||
302 | /* If we are a Freescale core do a simple check so | |
303 | * we dont have to keep adding cases in the future */ | |
304 | if (PVR_VER(pvr) & 0x8000) { | |
a501d8f3 ML |
305 | switch (PVR_VER(pvr)) { |
306 | case 0x8000: /* 7441/7450/7451, Voyager */ | |
307 | case 0x8001: /* 7445/7455, Apollo 6 */ | |
308 | case 0x8002: /* 7447/7457, Apollo 7 */ | |
309 | case 0x8003: /* 7447A, Apollo 7 PM */ | |
310 | case 0x8004: /* 7448, Apollo 8 */ | |
311 | case 0x800c: /* 7410, Nitro */ | |
312 | maj = ((pvr >> 8) & 0xF); | |
313 | min = PVR_MIN(pvr); | |
314 | break; | |
315 | default: /* e500/book-e */ | |
316 | maj = PVR_MAJ(pvr); | |
317 | min = PVR_MIN(pvr); | |
318 | break; | |
319 | } | |
03501dab PM |
320 | } else { |
321 | switch (PVR_VER(pvr)) { | |
322 | case 0x0020: /* 403 family */ | |
323 | maj = PVR_MAJ(pvr) + 1; | |
324 | min = PVR_MIN(pvr); | |
325 | break; | |
326 | case 0x1008: /* 740P/750P ?? */ | |
327 | maj = ((pvr >> 8) & 0xFF) - 1; | |
328 | min = pvr & 0xFF; | |
329 | break; | |
64ebb9a2 MN |
330 | case 0x004e: /* POWER9 bits 12-15 give chip type */ |
331 | maj = (pvr >> 8) & 0x0F; | |
332 | min = pvr & 0xFF; | |
333 | break; | |
03501dab PM |
334 | default: |
335 | maj = (pvr >> 8) & 0xFF; | |
336 | min = pvr & 0xFF; | |
337 | break; | |
338 | } | |
339 | } | |
340 | ||
341 | seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n", | |
342 | maj, min, PVR_VER(pvr), PVR_REV(pvr)); | |
343 | ||
344 | #ifdef CONFIG_PPC32 | |
345 | seq_printf(m, "bogomips\t: %lu.%02lu\n", | |
346 | loops_per_jiffy / (500000/HZ), | |
347 | (loops_per_jiffy / (5000/HZ)) % 100); | |
348 | #endif | |
349 | ||
350 | #ifdef CONFIG_SMP | |
351 | seq_printf(m, "\n"); | |
352 | #endif | |
e6532c63 AB |
353 | /* If this is the last cpu, print the summary */ |
354 | if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids) | |
355 | show_cpuinfo_summary(m); | |
356 | ||
03501dab PM |
357 | return 0; |
358 | } | |
359 | ||
360 | static void *c_start(struct seq_file *m, loff_t *pos) | |
361 | { | |
e6532c63 AB |
362 | if (*pos == 0) /* just in case, cpu 0 is not the first */ |
363 | *pos = cpumask_first(cpu_online_mask); | |
364 | else | |
365 | *pos = cpumask_next(*pos - 1, cpu_online_mask); | |
366 | if ((*pos) < nr_cpu_ids) | |
367 | return (void *)(unsigned long)(*pos + 1); | |
368 | return NULL; | |
03501dab PM |
369 | } |
370 | ||
371 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
372 | { | |
e6532c63 | 373 | (*pos)++; |
03501dab PM |
374 | return c_start(m, pos); |
375 | } | |
376 | ||
377 | static void c_stop(struct seq_file *m, void *v) | |
378 | { | |
379 | } | |
380 | ||
88e9d34c | 381 | const struct seq_operations cpuinfo_op = { |
03501dab PM |
382 | .start =c_start, |
383 | .next = c_next, | |
384 | .stop = c_stop, | |
385 | .show = show_cpuinfo, | |
386 | }; | |
387 | ||
a82765b6 DW |
388 | void __init check_for_initrd(void) |
389 | { | |
390 | #ifdef CONFIG_BLK_DEV_INITRD | |
30437b3e DG |
391 | DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n", |
392 | initrd_start, initrd_end); | |
a82765b6 DW |
393 | |
394 | /* If we were passed an initrd, set the ROOT_DEV properly if the values | |
395 | * look sensible. If not, clear initrd reference. | |
396 | */ | |
51fae6de | 397 | if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) && |
a82765b6 DW |
398 | initrd_end > initrd_start) |
399 | ROOT_DEV = Root_RAM0; | |
6761c4a0 | 400 | else |
a82765b6 | 401 | initrd_start = initrd_end = 0; |
a82765b6 DW |
402 | |
403 | if (initrd_start) | |
a7696b36 | 404 | pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end); |
a82765b6 DW |
405 | |
406 | DBG(" <- check_for_initrd()\n"); | |
407 | #endif /* CONFIG_BLK_DEV_INITRD */ | |
408 | } | |
409 | ||
5ad57078 PM |
410 | #ifdef CONFIG_SMP |
411 | ||
5853aef1 | 412 | int threads_per_core, threads_per_subcore, threads_shift; |
8d089085 | 413 | cpumask_t threads_core_mask; |
de56a948 | 414 | EXPORT_SYMBOL_GPL(threads_per_core); |
5853aef1 | 415 | EXPORT_SYMBOL_GPL(threads_per_subcore); |
de56a948 PM |
416 | EXPORT_SYMBOL_GPL(threads_shift); |
417 | EXPORT_SYMBOL_GPL(threads_core_mask); | |
8d089085 BH |
418 | |
419 | static void __init cpu_init_thread_core_maps(int tpc) | |
420 | { | |
421 | int i; | |
422 | ||
423 | threads_per_core = tpc; | |
5853aef1 | 424 | threads_per_subcore = tpc; |
104699c0 | 425 | cpumask_clear(&threads_core_mask); |
8d089085 BH |
426 | |
427 | /* This implementation only supports power of 2 number of threads | |
428 | * for simplicity and performance | |
429 | */ | |
430 | threads_shift = ilog2(tpc); | |
431 | BUG_ON(tpc != (1 << threads_shift)); | |
432 | ||
433 | for (i = 0; i < tpc; i++) | |
104699c0 | 434 | cpumask_set_cpu(i, &threads_core_mask); |
8d089085 BH |
435 | |
436 | printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n", | |
437 | tpc, tpc > 1 ? "s" : ""); | |
438 | printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift); | |
439 | } | |
440 | ||
441 | ||
5ad57078 PM |
442 | /** |
443 | * setup_cpu_maps - initialize the following cpu maps: | |
828a6986 AB |
444 | * cpu_possible_mask |
445 | * cpu_present_mask | |
5ad57078 PM |
446 | * |
447 | * Having the possible map set up early allows us to restrict allocations | |
8657ae28 | 448 | * of things like irqstacks to nr_cpu_ids rather than NR_CPUS. |
5ad57078 PM |
449 | * |
450 | * We do not initialize the online map here; cpus set their own bits in | |
828a6986 | 451 | * cpu_online_mask as they come up. |
5ad57078 PM |
452 | * |
453 | * This function is valid only for Open Firmware systems. finish_device_tree | |
454 | * must be called before using this. | |
455 | * | |
456 | * While we're here, we may as well set the "physical" cpu ids in the paca. | |
4df20460 AB |
457 | * |
458 | * NOTE: This must match the parsing done in early_init_dt_scan_cpus. | |
5ad57078 PM |
459 | */ |
460 | void __init smp_setup_cpu_maps(void) | |
461 | { | |
462 | struct device_node *dn = NULL; | |
463 | int cpu = 0; | |
8d089085 BH |
464 | int nthreads = 1; |
465 | ||
466 | DBG("smp_setup_cpu_maps()\n"); | |
5ad57078 | 467 | |
8657ae28 | 468 | while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) { |
ac13282d | 469 | const __be32 *intserv; |
43f88120 | 470 | __be32 cpu_be; |
8d089085 BH |
471 | int j, len; |
472 | ||
b7c670d6 | 473 | DBG(" * %pOF...\n", dn); |
5ad57078 | 474 | |
e2eb6392 SR |
475 | intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", |
476 | &len); | |
8d089085 | 477 | if (intserv) { |
8d089085 BH |
478 | DBG(" ibm,ppc-interrupt-server#s -> %d threads\n", |
479 | nthreads); | |
480 | } else { | |
481 | DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n"); | |
e16c8765 | 482 | intserv = of_get_property(dn, "reg", &len); |
43f88120 AP |
483 | if (!intserv) { |
484 | cpu_be = cpu_to_be32(cpu); | |
485 | intserv = &cpu_be; /* assume logical == phys */ | |
e16c8765 | 486 | len = 4; |
43f88120 | 487 | } |
5ad57078 PM |
488 | } |
489 | ||
e16c8765 AF |
490 | nthreads = len / sizeof(int); |
491 | ||
8657ae28 | 492 | for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) { |
6663a4fa SW |
493 | bool avail; |
494 | ||
8d089085 | 495 | DBG(" thread %d -> cpu %d (hard id %d)\n", |
ac13282d | 496 | j, cpu, be32_to_cpu(intserv[j])); |
6663a4fa SW |
497 | |
498 | avail = of_device_is_available(dn); | |
499 | if (!avail) | |
500 | avail = !of_property_match_string(dn, | |
501 | "enable-method", "spin-table"); | |
502 | ||
503 | set_cpu_present(cpu, avail); | |
ac13282d | 504 | set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j])); |
ea0f1cab | 505 | set_cpu_possible(cpu, true); |
5ad57078 PM |
506 | cpu++; |
507 | } | |
508 | } | |
509 | ||
8d089085 BH |
510 | /* If no SMT supported, nthreads is forced to 1 */ |
511 | if (!cpu_has_feature(CPU_FTR_SMT)) { | |
512 | DBG(" SMT disabled ! nthreads forced to 1\n"); | |
513 | nthreads = 1; | |
514 | } | |
515 | ||
5ad57078 PM |
516 | #ifdef CONFIG_PPC64 |
517 | /* | |
518 | * On pSeries LPAR, we need to know how many cpus | |
519 | * could possibly be added to this partition. | |
520 | */ | |
0f2b3442 | 521 | if (firmware_has_feature(FW_FEATURE_LPAR) && |
799d6046 | 522 | (dn = of_find_node_by_path("/rtas"))) { |
5ad57078 | 523 | int num_addr_cell, num_size_cell, maxcpus; |
01666c8e | 524 | const __be32 *ireg; |
5ad57078 | 525 | |
a8bda5dd | 526 | num_addr_cell = of_n_addr_cells(dn); |
9213feea | 527 | num_size_cell = of_n_size_cells(dn); |
5ad57078 | 528 | |
e2eb6392 | 529 | ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL); |
5ad57078 PM |
530 | |
531 | if (!ireg) | |
532 | goto out; | |
533 | ||
01666c8e | 534 | maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell); |
5ad57078 PM |
535 | |
536 | /* Double maxcpus for processors which have SMT capability */ | |
537 | if (cpu_has_feature(CPU_FTR_SMT)) | |
8d089085 | 538 | maxcpus *= nthreads; |
5ad57078 | 539 | |
8657ae28 | 540 | if (maxcpus > nr_cpu_ids) { |
5ad57078 PM |
541 | printk(KERN_WARNING |
542 | "Partition configured for %d cpus, " | |
9b130ad5 | 543 | "operating system maximum is %u.\n", |
8657ae28 MM |
544 | maxcpus, nr_cpu_ids); |
545 | maxcpus = nr_cpu_ids; | |
5ad57078 PM |
546 | } else |
547 | printk(KERN_INFO "Partition configured for %d cpus.\n", | |
548 | maxcpus); | |
549 | ||
550 | for (cpu = 0; cpu < maxcpus; cpu++) | |
ea0f1cab | 551 | set_cpu_possible(cpu, true); |
5ad57078 PM |
552 | out: |
553 | of_node_put(dn); | |
554 | } | |
d5a7430d MT |
555 | vdso_data->processorCount = num_present_cpus(); |
556 | #endif /* CONFIG_PPC64 */ | |
8d089085 BH |
557 | |
558 | /* Initialize CPU <=> thread mapping/ | |
559 | * | |
560 | * WARNING: We assume that the number of threads is the same for | |
561 | * every CPU in the system. If that is not the case, then some code | |
562 | * here will have to be reworked | |
563 | */ | |
564 | cpu_init_thread_core_maps(nthreads); | |
1426d5a3 | 565 | |
c1854e00 | 566 | /* Now that possible cpus are set, set nr_cpu_ids for later use */ |
aa79bc21 | 567 | setup_nr_cpu_ids(); |
c1854e00 | 568 | |
1426d5a3 | 569 | free_unused_pacas(); |
d5a7430d | 570 | } |
5ad57078 | 571 | #endif /* CONFIG_SMP */ |
fca5dcd4 | 572 | |
d33b78df | 573 | #ifdef CONFIG_PCSPKR_PLATFORM |
e5c6c8e4 MN |
574 | static __init int add_pcspkr(void) |
575 | { | |
576 | struct device_node *np; | |
577 | struct platform_device *pd; | |
578 | int ret; | |
579 | ||
580 | np = of_find_compatible_node(NULL, NULL, "pnpPNP,100"); | |
581 | of_node_put(np); | |
582 | if (!np) | |
583 | return -ENODEV; | |
584 | ||
585 | pd = platform_device_alloc("pcspkr", -1); | |
586 | if (!pd) | |
587 | return -ENOMEM; | |
588 | ||
589 | ret = platform_device_add(pd); | |
590 | if (ret) | |
591 | platform_device_put(pd); | |
592 | ||
593 | return ret; | |
594 | } | |
595 | device_initcall(add_pcspkr); | |
d33b78df | 596 | #endif /* CONFIG_PCSPKR_PLATFORM */ |
95d465fd | 597 | |
e8222502 BH |
598 | void probe_machine(void) |
599 | { | |
600 | extern struct machdep_calls __machine_desc_start; | |
601 | extern struct machdep_calls __machine_desc_end; | |
84b62c72 | 602 | unsigned int i; |
e8222502 BH |
603 | |
604 | /* | |
605 | * Iterate all ppc_md structures until we find the proper | |
606 | * one for the current machine type | |
607 | */ | |
608 | DBG("Probing machine type ...\n"); | |
609 | ||
84b62c72 BH |
610 | /* |
611 | * Check ppc_md is empty, if not we have a bug, ie, we setup an | |
612 | * entry before probe_machine() which will be overwritten | |
613 | */ | |
614 | for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) { | |
615 | if (((void **)&ppc_md)[i]) { | |
616 | printk(KERN_ERR "Entry %d in ppc_md non empty before" | |
617 | " machine probe !\n", i); | |
618 | } | |
619 | } | |
620 | ||
e8222502 BH |
621 | for (machine_id = &__machine_desc_start; |
622 | machine_id < &__machine_desc_end; | |
623 | machine_id++) { | |
624 | DBG(" %s ...", machine_id->name); | |
625 | memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls)); | |
626 | if (ppc_md.probe()) { | |
627 | DBG(" match !\n"); | |
628 | break; | |
629 | } | |
630 | DBG("\n"); | |
631 | } | |
632 | /* What can we do if we didn't find ? */ | |
633 | if (machine_id >= &__machine_desc_end) { | |
634 | DBG("No suitable machine found !\n"); | |
635 | for (;;); | |
636 | } | |
637 | ||
638 | printk(KERN_INFO "Using %s machine description\n", ppc_md.name); | |
639 | } | |
1269277a | 640 | |
8d8a0241 | 641 | /* Match a class of boards, not a specific device configuration. */ |
1269277a DW |
642 | int check_legacy_ioport(unsigned long base_port) |
643 | { | |
8d8a0241 OH |
644 | struct device_node *parent, *np = NULL; |
645 | int ret = -ENODEV; | |
646 | ||
647 | switch(base_port) { | |
648 | case I8042_DATA_REG: | |
db0dbae9 WF |
649 | if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303"))) |
650 | np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03"); | |
651 | if (np) { | |
652 | parent = of_get_parent(np); | |
540c6c39 MW |
653 | |
654 | of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0); | |
655 | if (!of_i8042_kbd_irq) | |
656 | of_i8042_kbd_irq = 1; | |
657 | ||
658 | of_i8042_aux_irq = irq_of_parse_and_map(parent, 1); | |
659 | if (!of_i8042_aux_irq) | |
660 | of_i8042_aux_irq = 12; | |
661 | ||
db0dbae9 WF |
662 | of_node_put(np); |
663 | np = parent; | |
664 | break; | |
665 | } | |
8d8a0241 | 666 | np = of_find_node_by_type(NULL, "8042"); |
f5d834fc AC |
667 | /* Pegasos has no device_type on its 8042 node, look for the |
668 | * name instead */ | |
669 | if (!np) | |
670 | np = of_find_node_by_name(NULL, "8042"); | |
2c78027a GP |
671 | if (np) { |
672 | of_i8042_kbd_irq = 1; | |
673 | of_i8042_aux_irq = 12; | |
674 | } | |
8d8a0241 OH |
675 | break; |
676 | case FDC_BASE: /* FDC1 */ | |
677 | np = of_find_node_by_type(NULL, "fdc"); | |
678 | break; | |
8d8a0241 OH |
679 | default: |
680 | /* ipmi is supposed to fail here */ | |
681 | break; | |
682 | } | |
683 | if (!np) | |
684 | return ret; | |
685 | parent = of_get_parent(np); | |
686 | if (parent) { | |
687 | if (strcmp(parent->type, "isa") == 0) | |
688 | ret = 0; | |
689 | of_node_put(parent); | |
690 | } | |
691 | of_node_put(np); | |
692 | return ret; | |
1269277a DW |
693 | } |
694 | EXPORT_SYMBOL(check_legacy_ioport); | |
7e990266 | 695 | |
ab9dbf77 DG |
696 | static int ppc_panic_event(struct notifier_block *this, |
697 | unsigned long event, void *ptr) | |
698 | { | |
699 | /* | |
700 | * If firmware-assisted dump has been registered then trigger | |
701 | * firmware-assisted dump and let firmware handle everything else. | |
702 | */ | |
703 | crash_fadump(NULL, ptr); | |
704 | ppc_md.panic(ptr); /* May not return */ | |
705 | return NOTIFY_DONE; | |
706 | } | |
707 | ||
708 | static struct notifier_block ppc_panic_block = { | |
709 | .notifier_call = ppc_panic_event, | |
710 | .priority = INT_MIN /* may not return; must be done last */ | |
711 | }; | |
712 | ||
713 | void __init setup_panic(void) | |
714 | { | |
715 | if (!ppc_md.panic) | |
716 | return; | |
717 | atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block); | |
718 | } | |
719 | ||
06cce43c DF |
720 | #ifdef CONFIG_CHECK_CACHE_COHERENCY |
721 | /* | |
722 | * For platforms that have configurable cache-coherency. This function | |
723 | * checks that the cache coherency setting of the kernel matches the setting | |
724 | * left by the firmware, as indicated in the device tree. Since a mismatch | |
725 | * will eventually result in DMA failures, we print * and error and call | |
726 | * BUG() in that case. | |
727 | */ | |
728 | ||
729 | #ifdef CONFIG_NOT_COHERENT_CACHE | |
730 | #define KERNEL_COHERENCY 0 | |
731 | #else | |
732 | #define KERNEL_COHERENCY 1 | |
733 | #endif | |
734 | ||
735 | static int __init check_cache_coherency(void) | |
736 | { | |
737 | struct device_node *np; | |
738 | const void *prop; | |
739 | int devtree_coherency; | |
740 | ||
741 | np = of_find_node_by_path("/"); | |
742 | prop = of_get_property(np, "coherency-off", NULL); | |
743 | of_node_put(np); | |
744 | ||
745 | devtree_coherency = prop ? 0 : 1; | |
746 | ||
747 | if (devtree_coherency != KERNEL_COHERENCY) { | |
748 | printk(KERN_ERR | |
749 | "kernel coherency:%s != device tree_coherency:%s\n", | |
750 | KERNEL_COHERENCY ? "on" : "off", | |
751 | devtree_coherency ? "on" : "off"); | |
752 | BUG(); | |
753 | } | |
754 | ||
755 | return 0; | |
756 | } | |
757 | ||
758 | late_initcall(check_cache_coherency); | |
759 | #endif /* CONFIG_CHECK_CACHE_COHERENCY */ | |
94a3807c ME |
760 | |
761 | #ifdef CONFIG_DEBUG_FS | |
762 | struct dentry *powerpc_debugfs_root; | |
907b1f45 | 763 | EXPORT_SYMBOL(powerpc_debugfs_root); |
94a3807c ME |
764 | |
765 | static int powerpc_debugfs_init(void) | |
766 | { | |
767 | powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL); | |
768 | ||
769 | return powerpc_debugfs_root == NULL; | |
770 | } | |
771 | arch_initcall(powerpc_debugfs_init); | |
772 | #endif | |
d746286c | 773 | |
a9c0f41b | 774 | void ppc_printk_progress(char *s, unsigned short hex) |
d746286c | 775 | { |
a9c0f41b | 776 | pr_info("%s\n", s); |
d746286c KG |
777 | } |
778 | ||
314b02f5 | 779 | void arch_setup_pdev_archdata(struct platform_device *pdev) |
d746286c | 780 | { |
314b02f5 KG |
781 | pdev->archdata.dma_mask = DMA_BIT_MASK(32); |
782 | pdev->dev.dma_mask = &pdev->archdata.dma_mask; | |
783 | set_dma_ops(&pdev->dev, &dma_direct_ops); | |
d746286c | 784 | } |
b1923caa BH |
785 | |
786 | static __init void print_system_info(void) | |
787 | { | |
788 | pr_info("-----------------------------------------------------\n"); | |
4e003747 | 789 | #ifdef CONFIG_PPC_BOOK3S_64 |
b1923caa BH |
790 | pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); |
791 | #endif | |
792 | #ifdef CONFIG_PPC_STD_MMU_32 | |
793 | pr_info("Hash_size = 0x%lx\n", Hash_size); | |
794 | #endif | |
795 | pr_info("phys_mem_size = 0x%llx\n", | |
796 | (unsigned long long)memblock_phys_mem_size()); | |
797 | ||
798 | pr_info("dcache_bsize = 0x%x\n", dcache_bsize); | |
799 | pr_info("icache_bsize = 0x%x\n", icache_bsize); | |
800 | if (ucache_bsize != 0) | |
801 | pr_info("ucache_bsize = 0x%x\n", ucache_bsize); | |
802 | ||
803 | pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features); | |
804 | pr_info(" possible = 0x%016lx\n", | |
805 | (unsigned long)CPU_FTRS_POSSIBLE); | |
806 | pr_info(" always = 0x%016lx\n", | |
807 | (unsigned long)CPU_FTRS_ALWAYS); | |
808 | pr_info("cpu_user_features = 0x%08x 0x%08x\n", | |
809 | cur_cpu_spec->cpu_user_features, | |
810 | cur_cpu_spec->cpu_user_features2); | |
811 | pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features); | |
812 | #ifdef CONFIG_PPC64 | |
813 | pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features); | |
814 | #endif | |
815 | ||
4e003747 | 816 | #ifdef CONFIG_PPC_BOOK3S_64 |
b1923caa BH |
817 | if (htab_address) |
818 | pr_info("htab_address = 0x%p\n", htab_address); | |
819 | if (htab_hash_mask) | |
820 | pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask); | |
821 | #endif | |
822 | #ifdef CONFIG_PPC_STD_MMU_32 | |
823 | if (Hash) | |
824 | pr_info("Hash = 0x%p\n", Hash); | |
825 | if (Hash_mask) | |
826 | pr_info("Hash_mask = 0x%lx\n", Hash_mask); | |
827 | #endif | |
828 | ||
829 | if (PHYSICAL_START > 0) | |
830 | pr_info("physical_start = 0x%llx\n", | |
831 | (unsigned long long)PHYSICAL_START); | |
832 | pr_info("-----------------------------------------------------\n"); | |
833 | } | |
834 | ||
835 | /* | |
836 | * Called into from start_kernel this initializes memblock, which is used | |
837 | * to manage page allocation until mem_init is called. | |
838 | */ | |
839 | void __init setup_arch(char **cmdline_p) | |
840 | { | |
841 | *cmdline_p = boot_command_line; | |
842 | ||
843 | /* Set a half-reasonable default so udelay does something sensible */ | |
844 | loops_per_jiffy = 500000000 / HZ; | |
845 | ||
846 | /* Unflatten the device-tree passed by prom_init or kexec */ | |
847 | unflatten_device_tree(); | |
848 | ||
849 | /* | |
850 | * Initialize cache line/block info from device-tree (on ppc64) or | |
851 | * just cputable (on ppc32). | |
852 | */ | |
853 | initialize_cache_info(); | |
854 | ||
855 | /* Initialize RTAS if available. */ | |
856 | rtas_initialize(); | |
857 | ||
858 | /* Check if we have an initrd provided via the device-tree. */ | |
859 | check_for_initrd(); | |
860 | ||
861 | /* Probe the machine type, establish ppc_md. */ | |
862 | probe_machine(); | |
863 | ||
ab9dbf77 DG |
864 | /* Setup panic notifier if requested by the platform. */ |
865 | setup_panic(); | |
866 | ||
b1923caa BH |
867 | /* |
868 | * Configure ppc_md.power_save (ppc32 only, 64-bit machines do | |
869 | * it from their respective probe() function. | |
870 | */ | |
871 | setup_power_save(); | |
872 | ||
873 | /* Discover standard serial ports. */ | |
874 | find_legacy_serial_ports(); | |
875 | ||
876 | /* Register early console with the printk subsystem. */ | |
877 | register_early_udbg_console(); | |
878 | ||
879 | /* Setup the various CPU maps based on the device-tree. */ | |
880 | smp_setup_cpu_maps(); | |
881 | ||
882 | /* Initialize xmon. */ | |
883 | xmon_setup(); | |
884 | ||
885 | /* Check the SMT related command line arguments (ppc64). */ | |
886 | check_smt_enabled(); | |
887 | ||
888 | /* On BookE, setup per-core TLB data structures. */ | |
889 | setup_tlb_core_data(); | |
890 | ||
891 | /* | |
892 | * Release secondary cpus out of their spinloops at 0x60 now that | |
893 | * we can map physical -> logical CPU ids. | |
894 | * | |
895 | * Freescale Book3e parts spin in a loop provided by firmware, | |
896 | * so smp_release_cpus() does nothing for them. | |
897 | */ | |
898 | #ifdef CONFIG_SMP | |
899 | smp_release_cpus(); | |
900 | #endif | |
901 | ||
902 | /* Print various info about the machine that has been gathered so far. */ | |
903 | print_system_info(); | |
904 | ||
905 | /* Reserve large chunks of memory for use by CMA for KVM. */ | |
906 | kvm_cma_reserve(); | |
907 | ||
b1923caa BH |
908 | klp_init_thread_info(&init_thread_info); |
909 | ||
910 | init_mm.start_code = (unsigned long)_stext; | |
911 | init_mm.end_code = (unsigned long) _etext; | |
912 | init_mm.end_data = (unsigned long) _edata; | |
913 | init_mm.brk = klimit; | |
957b778a AK |
914 | |
915 | #ifdef CONFIG_PPC_MM_SLICES | |
916 | #ifdef CONFIG_PPC64 | |
4722476b NP |
917 | if (!radix_enabled()) |
918 | init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW_USER64; | |
957b778a AK |
919 | #else |
920 | #error "context.addr_limit not initialized." | |
921 | #endif | |
922 | #endif | |
923 | ||
b1923caa | 924 | #ifdef CONFIG_SPAPR_TCE_IOMMU |
88f54a35 | 925 | mm_iommu_init(&init_mm); |
b1923caa BH |
926 | #endif |
927 | irqstack_early_init(); | |
928 | exc_lvl_early_init(); | |
929 | emergency_stack_init(); | |
930 | ||
931 | initmem_init(); | |
932 | ||
933 | #ifdef CONFIG_DUMMY_CONSOLE | |
934 | conswitchp = &dummy_con; | |
935 | #endif | |
936 | if (ppc_md.setup_arch) | |
937 | ppc_md.setup_arch(); | |
938 | ||
939 | paging_init(); | |
940 | ||
941 | /* Initialize the MMU context management stuff. */ | |
942 | mmu_context_init(); | |
943 | ||
944 | #ifdef CONFIG_PPC64 | |
945 | /* Interrupt code needs to be 64K-aligned. */ | |
946 | if ((unsigned long)_stext & 0xffff) | |
947 | panic("Kernelbase not 64K-aligned (0x%lx)!\n", | |
948 | (unsigned long)_stext); | |
949 | #endif | |
950 | } |