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Commit | Line | Data |
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40ef8cbc PM |
1 | /* |
2 | * | |
3 | * Common boot and setup code. | |
4 | * | |
5 | * Copyright (C) 2001 PPC64 Team, IBM Corp | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #undef DEBUG | |
14 | ||
40ef8cbc PM |
15 | #include <linux/module.h> |
16 | #include <linux/string.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/reboot.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/initrd.h> | |
40ef8cbc PM |
23 | #include <linux/seq_file.h> |
24 | #include <linux/ioport.h> | |
25 | #include <linux/console.h> | |
26 | #include <linux/utsname.h> | |
27 | #include <linux/tty.h> | |
28 | #include <linux/root_dev.h> | |
29 | #include <linux/notifier.h> | |
30 | #include <linux/cpu.h> | |
31 | #include <linux/unistd.h> | |
32 | #include <linux/serial.h> | |
33 | #include <linux/serial_8250.h> | |
7a0268fa | 34 | #include <linux/bootmem.h> |
12d04eef | 35 | #include <linux/pci.h> |
945feb17 | 36 | #include <linux/lockdep.h> |
d9b2b2a2 | 37 | #include <linux/lmb.h> |
40ef8cbc | 38 | #include <asm/io.h> |
0cc4746c | 39 | #include <asm/kdump.h> |
40ef8cbc PM |
40 | #include <asm/prom.h> |
41 | #include <asm/processor.h> | |
42 | #include <asm/pgtable.h> | |
40ef8cbc PM |
43 | #include <asm/smp.h> |
44 | #include <asm/elf.h> | |
45 | #include <asm/machdep.h> | |
46 | #include <asm/paca.h> | |
40ef8cbc PM |
47 | #include <asm/time.h> |
48 | #include <asm/cputable.h> | |
49 | #include <asm/sections.h> | |
50 | #include <asm/btext.h> | |
51 | #include <asm/nvram.h> | |
52 | #include <asm/setup.h> | |
53 | #include <asm/system.h> | |
54 | #include <asm/rtas.h> | |
55 | #include <asm/iommu.h> | |
56 | #include <asm/serial.h> | |
57 | #include <asm/cache.h> | |
58 | #include <asm/page.h> | |
59 | #include <asm/mmu.h> | |
40ef8cbc | 60 | #include <asm/firmware.h> |
f78541dc | 61 | #include <asm/xmon.h> |
dcad47fc | 62 | #include <asm/udbg.h> |
593e537b | 63 | #include <asm/kexec.h> |
40ef8cbc | 64 | |
66ba135c SR |
65 | #include "setup.h" |
66 | ||
40ef8cbc PM |
67 | #ifdef DEBUG |
68 | #define DBG(fmt...) udbg_printf(fmt) | |
69 | #else | |
70 | #define DBG(fmt...) | |
71 | #endif | |
72 | ||
40ef8cbc | 73 | int boot_cpuid = 0; |
40ef8cbc PM |
74 | u64 ppc64_pft_size; |
75 | ||
dabcafd3 OJ |
76 | /* Pick defaults since we might want to patch instructions |
77 | * before we've read this from the device tree. | |
78 | */ | |
79 | struct ppc64_caches ppc64_caches = { | |
5a2fe38d OJ |
80 | .dline_size = 0x40, |
81 | .log_dline_size = 6, | |
82 | .iline_size = 0x40, | |
83 | .log_iline_size = 6 | |
dabcafd3 | 84 | }; |
40ef8cbc PM |
85 | EXPORT_SYMBOL_GPL(ppc64_caches); |
86 | ||
87 | /* | |
88 | * These are used in binfmt_elf.c to put aux entries on the stack | |
89 | * for each elf executable being started. | |
90 | */ | |
91 | int dcache_bsize; | |
92 | int icache_bsize; | |
93 | int ucache_bsize; | |
94 | ||
40ef8cbc PM |
95 | #ifdef CONFIG_SMP |
96 | ||
97 | static int smt_enabled_cmdline; | |
98 | ||
99 | /* Look for ibm,smt-enabled OF option */ | |
100 | static void check_smt_enabled(void) | |
101 | { | |
102 | struct device_node *dn; | |
a7f67bdf | 103 | const char *smt_option; |
40ef8cbc PM |
104 | |
105 | /* Allow the command line to overrule the OF option */ | |
106 | if (smt_enabled_cmdline) | |
107 | return; | |
108 | ||
109 | dn = of_find_node_by_path("/options"); | |
110 | ||
111 | if (dn) { | |
e2eb6392 | 112 | smt_option = of_get_property(dn, "ibm,smt-enabled", NULL); |
40ef8cbc PM |
113 | |
114 | if (smt_option) { | |
115 | if (!strcmp(smt_option, "on")) | |
116 | smt_enabled_at_boot = 1; | |
117 | else if (!strcmp(smt_option, "off")) | |
118 | smt_enabled_at_boot = 0; | |
119 | } | |
120 | } | |
121 | } | |
122 | ||
123 | /* Look for smt-enabled= cmdline option */ | |
124 | static int __init early_smt_enabled(char *p) | |
125 | { | |
126 | smt_enabled_cmdline = 1; | |
127 | ||
128 | if (!p) | |
129 | return 0; | |
130 | ||
131 | if (!strcmp(p, "on") || !strcmp(p, "1")) | |
132 | smt_enabled_at_boot = 1; | |
133 | else if (!strcmp(p, "off") || !strcmp(p, "0")) | |
134 | smt_enabled_at_boot = 0; | |
135 | ||
136 | return 0; | |
137 | } | |
138 | early_param("smt-enabled", early_smt_enabled); | |
139 | ||
5ad57078 PM |
140 | #else |
141 | #define check_smt_enabled() | |
40ef8cbc PM |
142 | #endif /* CONFIG_SMP */ |
143 | ||
4ba99b97 ME |
144 | /* Put the paca pointer into r13 and SPRG3 */ |
145 | void __init setup_paca(int cpu) | |
146 | { | |
147 | local_paca = &paca[cpu]; | |
148 | mtspr(SPRN_SPRG3, local_paca); | |
149 | } | |
150 | ||
40ef8cbc PM |
151 | /* |
152 | * Early initialization entry point. This is called by head.S | |
153 | * with MMU translation disabled. We rely on the "feature" of | |
154 | * the CPU that ignores the top 2 bits of the address in real | |
155 | * mode so we can access kernel globals normally provided we | |
156 | * only toy with things in the RMO region. From here, we do | |
157 | * some early parsing of the device-tree to setup out LMB | |
158 | * data structures, and allocate & initialize the hash table | |
159 | * and segment tables so we can start running with translation | |
160 | * enabled. | |
161 | * | |
162 | * It is this function which will call the probe() callback of | |
163 | * the various platform types and copy the matching one to the | |
164 | * global ppc_md structure. Your platform can eventually do | |
165 | * some very early initializations from the probe() routine, but | |
166 | * this is not recommended, be very careful as, for example, the | |
167 | * device-tree is not accessible via normal means at this point. | |
168 | */ | |
169 | ||
170 | void __init early_setup(unsigned long dt_ptr) | |
171 | { | |
24d96495 BH |
172 | /* -------- printk is _NOT_ safe to use here ! ------- */ |
173 | ||
90035fe3 TB |
174 | /* Fill in any unititialised pacas */ |
175 | initialise_pacas(); | |
176 | ||
42c4aaad | 177 | /* Identify CPU type */ |
974a76f5 | 178 | identify_cpu(0, mfspr(SPRN_PVR)); |
42c4aaad | 179 | |
33dbcf72 ME |
180 | /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ |
181 | setup_paca(0); | |
182 | ||
945feb17 BH |
183 | /* Initialize lockdep early or else spinlocks will blow */ |
184 | lockdep_init(); | |
185 | ||
24d96495 BH |
186 | /* -------- printk is now safe to use ------- */ |
187 | ||
f2fd2513 BH |
188 | /* Enable early debugging if any specified (see udbg.h) */ |
189 | udbg_early_init(); | |
190 | ||
e8222502 | 191 | DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); |
40ef8cbc | 192 | |
40ef8cbc | 193 | /* |
3c607ce2 LV |
194 | * Do early initialization using the flattened device |
195 | * tree, such as retrieving the physical memory map or | |
196 | * calculating/retrieving the hash table size. | |
40ef8cbc PM |
197 | */ |
198 | early_init_devtree(__va(dt_ptr)); | |
199 | ||
4df20460 | 200 | /* Now we know the logical id of our boot cpu, setup the paca. */ |
4ba99b97 | 201 | setup_paca(boot_cpuid); |
4df20460 AB |
202 | |
203 | /* Fix up paca fields required for the boot cpu */ | |
204 | get_paca()->cpu_start = 1; | |
205 | get_paca()->stab_real = __pa((u64)&initial_stab); | |
206 | get_paca()->stab_addr = (u64)&initial_stab; | |
207 | ||
e8222502 BH |
208 | /* Probe the machine type */ |
209 | probe_machine(); | |
40ef8cbc | 210 | |
47310413 | 211 | setup_kdump_trampoline(); |
0cc4746c | 212 | |
40ef8cbc PM |
213 | DBG("Found, Initializing memory management...\n"); |
214 | ||
215 | /* | |
3c726f8d BH |
216 | * Initialize the MMU Hash table and create the linear mapping |
217 | * of memory. Has to be done before stab/slb initialization as | |
218 | * this is currently where the page size encoding is obtained | |
40ef8cbc | 219 | */ |
3c726f8d | 220 | htab_initialize(); |
40ef8cbc PM |
221 | |
222 | /* | |
3c726f8d | 223 | * Initialize stab / SLB management except on iSeries |
40ef8cbc | 224 | */ |
856d08ec SR |
225 | if (cpu_has_feature(CPU_FTR_SLB)) |
226 | slb_initialize(); | |
227 | else if (!firmware_has_feature(FW_FEATURE_ISERIES)) | |
228 | stab_initialize(get_paca()->stab_real); | |
40ef8cbc PM |
229 | |
230 | DBG(" <- early_setup()\n"); | |
231 | } | |
232 | ||
799d6046 PM |
233 | #ifdef CONFIG_SMP |
234 | void early_setup_secondary(void) | |
235 | { | |
236 | struct paca_struct *lpaca = get_paca(); | |
237 | ||
d04c56f7 PM |
238 | /* Mark interrupts enabled in PACA */ |
239 | lpaca->soft_enabled = 0; | |
799d6046 PM |
240 | |
241 | /* Initialize hash table for that CPU */ | |
242 | htab_initialize_secondary(); | |
243 | ||
244 | /* Initialize STAB/SLB. We use a virtual address as it works | |
245 | * in real mode on pSeries and we want a virutal address on | |
246 | * iSeries anyway | |
247 | */ | |
248 | if (cpu_has_feature(CPU_FTR_SLB)) | |
249 | slb_initialize(); | |
250 | else | |
251 | stab_initialize(lpaca->stab_addr); | |
252 | } | |
253 | ||
254 | #endif /* CONFIG_SMP */ | |
40ef8cbc | 255 | |
b8f51021 | 256 | #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) |
1f6a93e4 PM |
257 | extern unsigned long __secondary_hold_spinloop; |
258 | extern void generic_secondary_smp_init(void); | |
259 | ||
b8f51021 ME |
260 | void smp_release_cpus(void) |
261 | { | |
758438a7 | 262 | unsigned long *ptr; |
b8f51021 ME |
263 | |
264 | DBG(" -> smp_release_cpus()\n"); | |
265 | ||
266 | /* All secondary cpus are spinning on a common spinloop, release them | |
267 | * all now so they can start to spin on their individual paca | |
268 | * spinloops. For non SMP kernels, the secondary cpus never get out | |
269 | * of the common spinloop. | |
1f6a93e4 | 270 | */ |
b8f51021 | 271 | |
758438a7 ME |
272 | ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop |
273 | - PHYSICAL_START); | |
1f6a93e4 | 274 | *ptr = __pa(generic_secondary_smp_init); |
b8f51021 ME |
275 | mb(); |
276 | ||
277 | DBG(" <- smp_release_cpus()\n"); | |
278 | } | |
279 | #endif /* CONFIG_SMP || CONFIG_KEXEC */ | |
280 | ||
40ef8cbc | 281 | /* |
799d6046 PM |
282 | * Initialize some remaining members of the ppc64_caches and systemcfg |
283 | * structures | |
40ef8cbc PM |
284 | * (at least until we get rid of them completely). This is mostly some |
285 | * cache informations about the CPU that will be used by cache flush | |
286 | * routines and/or provided to userland | |
287 | */ | |
288 | static void __init initialize_cache_info(void) | |
289 | { | |
290 | struct device_node *np; | |
291 | unsigned long num_cpus = 0; | |
292 | ||
293 | DBG(" -> initialize_cache_info()\n"); | |
294 | ||
295 | for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) { | |
296 | num_cpus += 1; | |
297 | ||
298 | /* We're assuming *all* of the CPUs have the same | |
299 | * d-cache and i-cache sizes... -Peter | |
300 | */ | |
301 | ||
302 | if ( num_cpus == 1 ) { | |
a7f67bdf | 303 | const u32 *sizep, *lsizep; |
40ef8cbc | 304 | u32 size, lsize; |
40ef8cbc PM |
305 | |
306 | size = 0; | |
307 | lsize = cur_cpu_spec->dcache_bsize; | |
e2eb6392 | 308 | sizep = of_get_property(np, "d-cache-size", NULL); |
40ef8cbc PM |
309 | if (sizep != NULL) |
310 | size = *sizep; | |
20474abd BH |
311 | lsizep = of_get_property(np, "d-cache-block-size", NULL); |
312 | /* fallback if block size missing */ | |
313 | if (lsizep == NULL) | |
314 | lsizep = of_get_property(np, "d-cache-line-size", NULL); | |
40ef8cbc PM |
315 | if (lsizep != NULL) |
316 | lsize = *lsizep; | |
317 | if (sizep == 0 || lsizep == 0) | |
318 | DBG("Argh, can't find dcache properties ! " | |
319 | "sizep: %p, lsizep: %p\n", sizep, lsizep); | |
320 | ||
a7f290da BH |
321 | ppc64_caches.dsize = size; |
322 | ppc64_caches.dline_size = lsize; | |
40ef8cbc PM |
323 | ppc64_caches.log_dline_size = __ilog2(lsize); |
324 | ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; | |
325 | ||
326 | size = 0; | |
327 | lsize = cur_cpu_spec->icache_bsize; | |
e2eb6392 | 328 | sizep = of_get_property(np, "i-cache-size", NULL); |
40ef8cbc PM |
329 | if (sizep != NULL) |
330 | size = *sizep; | |
20474abd BH |
331 | lsizep = of_get_property(np, "i-cache-block-size", NULL); |
332 | if (lsizep == NULL) | |
333 | lsizep = of_get_property(np, "i-cache-line-size", NULL); | |
40ef8cbc PM |
334 | if (lsizep != NULL) |
335 | lsize = *lsizep; | |
336 | if (sizep == 0 || lsizep == 0) | |
337 | DBG("Argh, can't find icache properties ! " | |
338 | "sizep: %p, lsizep: %p\n", sizep, lsizep); | |
339 | ||
a7f290da BH |
340 | ppc64_caches.isize = size; |
341 | ppc64_caches.iline_size = lsize; | |
40ef8cbc PM |
342 | ppc64_caches.log_iline_size = __ilog2(lsize); |
343 | ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; | |
344 | } | |
345 | } | |
346 | ||
40ef8cbc PM |
347 | DBG(" <- initialize_cache_info()\n"); |
348 | } | |
349 | ||
40ef8cbc PM |
350 | |
351 | /* | |
352 | * Do some initial setup of the system. The parameters are those which | |
353 | * were passed in from the bootloader. | |
354 | */ | |
355 | void __init setup_system(void) | |
356 | { | |
357 | DBG(" -> setup_system()\n"); | |
358 | ||
826ea8f2 TB |
359 | /* Apply the CPUs-specific and firmware specific fixups to kernel |
360 | * text (nop out sections not relevant to this CPU or this firmware) | |
42c4aaad | 361 | */ |
0909c8c2 | 362 | do_feature_fixups(cur_cpu_spec->cpu_features, |
42c4aaad | 363 | &__start___ftr_fixup, &__stop___ftr_fixup); |
7c03d653 BH |
364 | do_feature_fixups(cur_cpu_spec->mmu_features, |
365 | &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup); | |
826ea8f2 TB |
366 | do_feature_fixups(powerpc_firmware_features, |
367 | &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); | |
2d1b2027 KG |
368 | do_lwsync_fixups(cur_cpu_spec->cpu_features, |
369 | &__start___lwsync_fixup, &__stop___lwsync_fixup); | |
42c4aaad | 370 | |
40ef8cbc PM |
371 | /* |
372 | * Unflatten the device-tree passed by prom_init or kexec | |
373 | */ | |
374 | unflatten_device_tree(); | |
375 | ||
376 | /* | |
377 | * Fill the ppc64_caches & systemcfg structures with informations | |
0ebfff14 | 378 | * retrieved from the device-tree. |
40ef8cbc PM |
379 | */ |
380 | initialize_cache_info(); | |
381 | ||
0ebfff14 BH |
382 | /* |
383 | * Initialize irq remapping subsystem | |
384 | */ | |
385 | irq_early_init(); | |
386 | ||
40ef8cbc PM |
387 | #ifdef CONFIG_PPC_RTAS |
388 | /* | |
389 | * Initialize RTAS if available | |
390 | */ | |
391 | rtas_initialize(); | |
392 | #endif /* CONFIG_PPC_RTAS */ | |
40ef8cbc PM |
393 | |
394 | /* | |
395 | * Check if we have an initrd provided via the device-tree | |
396 | */ | |
397 | check_for_initrd(); | |
40ef8cbc PM |
398 | |
399 | /* | |
400 | * Do some platform specific early initializations, that includes | |
401 | * setting up the hash table pointers. It also sets up some interrupt-mapping | |
402 | * related options that will be used by finish_device_tree() | |
403 | */ | |
57744ea9 GL |
404 | if (ppc_md.init_early) |
405 | ppc_md.init_early(); | |
40ef8cbc | 406 | |
463ce0e1 BH |
407 | /* |
408 | * We can discover serial ports now since the above did setup the | |
409 | * hash table management for us, thus ioremap works. We do that early | |
410 | * so that further code can be debugged | |
411 | */ | |
463ce0e1 | 412 | find_legacy_serial_ports(); |
463ce0e1 | 413 | |
40ef8cbc PM |
414 | /* |
415 | * Register early console | |
416 | */ | |
417 | register_early_udbg_console(); | |
40ef8cbc | 418 | |
47679283 ME |
419 | /* |
420 | * Initialize xmon | |
421 | */ | |
422 | xmon_setup(); | |
480f6f35 | 423 | |
5ad57078 PM |
424 | check_smt_enabled(); |
425 | smp_setup_cpu_maps(); | |
40ef8cbc | 426 | |
f018b36f | 427 | #ifdef CONFIG_SMP |
40ef8cbc PM |
428 | /* Release secondary cpus out of their spinloops at 0x60 now that |
429 | * we can map physical -> logical CPU ids | |
430 | */ | |
431 | smp_release_cpus(); | |
f018b36f | 432 | #endif |
40ef8cbc | 433 | |
96b644bd | 434 | printk("Starting Linux PPC64 %s\n", init_utsname()->version); |
40ef8cbc PM |
435 | |
436 | printk("-----------------------------------------------------\n"); | |
fe333321 IM |
437 | printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); |
438 | printk("physicalMemorySize = 0x%llx\n", lmb_phys_mem_size()); | |
9697add0 AB |
439 | if (ppc64_caches.dline_size != 0x80) |
440 | printk("ppc64_caches.dcache_line_size = 0x%x\n", | |
441 | ppc64_caches.dline_size); | |
442 | if (ppc64_caches.iline_size != 0x80) | |
443 | printk("ppc64_caches.icache_line_size = 0x%x\n", | |
444 | ppc64_caches.iline_size); | |
445 | if (htab_address) | |
446 | printk("htab_address = 0x%p\n", htab_address); | |
40ef8cbc | 447 | printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); |
b160544c MN |
448 | if (PHYSICAL_START > 0) |
449 | printk("physical_start = 0x%lx\n", | |
450 | PHYSICAL_START); | |
40ef8cbc | 451 | printk("-----------------------------------------------------\n"); |
40ef8cbc | 452 | |
40ef8cbc PM |
453 | DBG(" <- setup_system()\n"); |
454 | } | |
455 | ||
40ef8cbc PM |
456 | #ifdef CONFIG_IRQSTACKS |
457 | static void __init irqstack_early_init(void) | |
458 | { | |
459 | unsigned int i; | |
460 | ||
461 | /* | |
462 | * interrupt stacks must be under 256MB, we cannot afford to take | |
463 | * SLB misses on them. | |
464 | */ | |
0e551954 | 465 | for_each_possible_cpu(i) { |
3c726f8d BH |
466 | softirq_ctx[i] = (struct thread_info *) |
467 | __va(lmb_alloc_base(THREAD_SIZE, | |
468 | THREAD_SIZE, 0x10000000)); | |
469 | hardirq_ctx[i] = (struct thread_info *) | |
470 | __va(lmb_alloc_base(THREAD_SIZE, | |
471 | THREAD_SIZE, 0x10000000)); | |
40ef8cbc PM |
472 | } |
473 | } | |
474 | #else | |
475 | #define irqstack_early_init() | |
476 | #endif | |
477 | ||
478 | /* | |
479 | * Stack space used when we detect a bad kernel stack pointer, and | |
480 | * early in SMP boots before relocation is enabled. | |
481 | */ | |
482 | static void __init emergency_stack_init(void) | |
483 | { | |
484 | unsigned long limit; | |
485 | unsigned int i; | |
486 | ||
487 | /* | |
488 | * Emergency stacks must be under 256MB, we cannot afford to take | |
489 | * SLB misses on them. The ABI also requires them to be 128-byte | |
490 | * aligned. | |
491 | * | |
492 | * Since we use these as temporary stacks during secondary CPU | |
493 | * bringup, we need to get at them in real mode. This means they | |
494 | * must also be within the RMO region. | |
495 | */ | |
fe333321 | 496 | limit = min(0x10000000ULL, lmb.rmo_size); |
40ef8cbc | 497 | |
3243d874 ME |
498 | for_each_possible_cpu(i) { |
499 | unsigned long sp; | |
500 | sp = lmb_alloc_base(THREAD_SIZE, THREAD_SIZE, limit); | |
501 | sp += THREAD_SIZE; | |
502 | paca[i].emergency_sp = __va(sp); | |
503 | } | |
40ef8cbc PM |
504 | } |
505 | ||
40ef8cbc PM |
506 | /* |
507 | * Called into from start_kernel, after lock_kernel has been called. | |
508 | * Initializes bootmem, which is unsed to manage page allocation until | |
509 | * mem_init is called. | |
510 | */ | |
511 | void __init setup_arch(char **cmdline_p) | |
512 | { | |
40ef8cbc PM |
513 | ppc64_boot_msg(0x12, "Setup Arch"); |
514 | ||
515 | *cmdline_p = cmd_line; | |
516 | ||
517 | /* | |
518 | * Set cache line size based on type of cpu as a default. | |
519 | * Systems with OF can look in the properties on the cpu node(s) | |
520 | * for a possibly more accurate value. | |
521 | */ | |
522 | dcache_bsize = ppc64_caches.dline_size; | |
523 | icache_bsize = ppc64_caches.iline_size; | |
524 | ||
525 | /* reboot on panic */ | |
526 | panic_timeout = 180; | |
40ef8cbc PM |
527 | |
528 | if (ppc_md.panic) | |
7e990266 | 529 | setup_panic(); |
40ef8cbc | 530 | |
4846c5de | 531 | init_mm.start_code = (unsigned long)_stext; |
40ef8cbc PM |
532 | init_mm.end_code = (unsigned long) _etext; |
533 | init_mm.end_data = (unsigned long) _edata; | |
534 | init_mm.brk = klimit; | |
535 | ||
536 | irqstack_early_init(); | |
537 | emergency_stack_init(); | |
538 | ||
40ef8cbc PM |
539 | stabs_alloc(); |
540 | ||
541 | /* set up the bootmem stuff with available memory */ | |
542 | do_init_bootmem(); | |
543 | sparse_init(); | |
544 | ||
0458060c PM |
545 | #ifdef CONFIG_DUMMY_CONSOLE |
546 | conswitchp = &dummy_con; | |
547 | #endif | |
548 | ||
38db7e74 GL |
549 | if (ppc_md.setup_arch) |
550 | ppc_md.setup_arch(); | |
40ef8cbc | 551 | |
40ef8cbc PM |
552 | paging_init(); |
553 | ppc64_boot_msg(0x15, "Setup Done"); | |
554 | } | |
555 | ||
556 | ||
557 | /* ToDo: do something useful if ppc_md is not yet setup. */ | |
558 | #define PPC64_LINUX_FUNCTION 0x0f000000 | |
559 | #define PPC64_IPL_MESSAGE 0xc0000000 | |
560 | #define PPC64_TERM_MESSAGE 0xb0000000 | |
561 | ||
562 | static void ppc64_do_msg(unsigned int src, const char *msg) | |
563 | { | |
564 | if (ppc_md.progress) { | |
565 | char buf[128]; | |
566 | ||
567 | sprintf(buf, "%08X\n", src); | |
568 | ppc_md.progress(buf, 0); | |
569 | snprintf(buf, 128, "%s", msg); | |
570 | ppc_md.progress(buf, 0); | |
571 | } | |
572 | } | |
573 | ||
574 | /* Print a boot progress message. */ | |
575 | void ppc64_boot_msg(unsigned int src, const char *msg) | |
576 | { | |
577 | ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); | |
578 | printk("[boot]%04x %s\n", src, msg); | |
579 | } | |
580 | ||
40ef8cbc PM |
581 | void cpu_die(void) |
582 | { | |
583 | if (ppc_md.cpu_die) | |
584 | ppc_md.cpu_die(); | |
585 | } | |
7a0268fa AB |
586 | |
587 | #ifdef CONFIG_SMP | |
588 | void __init setup_per_cpu_areas(void) | |
589 | { | |
590 | int i; | |
591 | unsigned long size; | |
592 | char *ptr; | |
593 | ||
594 | /* Copy section for each CPU (we discard the original) */ | |
b6e3590f | 595 | size = ALIGN(__per_cpu_end - __per_cpu_start, PAGE_SIZE); |
7a0268fa AB |
596 | #ifdef CONFIG_MODULES |
597 | if (size < PERCPU_ENOUGH_ROOM) | |
598 | size = PERCPU_ENOUGH_ROOM; | |
599 | #endif | |
600 | ||
0e551954 | 601 | for_each_possible_cpu(i) { |
b6e3590f | 602 | ptr = alloc_bootmem_pages_node(NODE_DATA(cpu_to_node(i)), size); |
7a0268fa AB |
603 | |
604 | paca[i].data_offset = ptr - __per_cpu_start; | |
605 | memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); | |
606 | } | |
607 | } | |
608 | #endif | |
4cb3cee0 BH |
609 | |
610 | ||
611 | #ifdef CONFIG_PPC_INDIRECT_IO | |
612 | struct ppc_pci_io ppc_pci_io; | |
613 | EXPORT_SYMBOL(ppc_pci_io); | |
614 | #endif /* CONFIG_PPC_INDIRECT_IO */ | |
615 |