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1/*
2 *
3 * Common boot and setup code.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#undef DEBUG
14
15#include <linux/config.h>
16#include <linux/module.h>
17#include <linux/string.h>
18#include <linux/sched.h>
19#include <linux/init.h>
20#include <linux/kernel.h>
21#include <linux/reboot.h>
22#include <linux/delay.h>
23#include <linux/initrd.h>
24#include <linux/ide.h>
25#include <linux/seq_file.h>
26#include <linux/ioport.h>
27#include <linux/console.h>
28#include <linux/utsname.h>
29#include <linux/tty.h>
30#include <linux/root_dev.h>
31#include <linux/notifier.h>
32#include <linux/cpu.h>
33#include <linux/unistd.h>
34#include <linux/serial.h>
35#include <linux/serial_8250.h>
7a0268fa 36#include <linux/bootmem.h>
40ef8cbc 37#include <asm/io.h>
0cc4746c 38#include <asm/kdump.h>
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39#include <asm/prom.h>
40#include <asm/processor.h>
41#include <asm/pgtable.h>
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42#include <asm/smp.h>
43#include <asm/elf.h>
44#include <asm/machdep.h>
45#include <asm/paca.h>
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46#include <asm/time.h>
47#include <asm/cputable.h>
48#include <asm/sections.h>
49#include <asm/btext.h>
50#include <asm/nvram.h>
51#include <asm/setup.h>
52#include <asm/system.h>
53#include <asm/rtas.h>
54#include <asm/iommu.h>
55#include <asm/serial.h>
56#include <asm/cache.h>
57#include <asm/page.h>
58#include <asm/mmu.h>
59#include <asm/lmb.h>
f218aab5 60#include <asm/iseries/it_lp_naca.h>
40ef8cbc 61#include <asm/firmware.h>
f78541dc 62#include <asm/xmon.h>
dcad47fc 63#include <asm/udbg.h>
593e537b 64#include <asm/kexec.h>
40ef8cbc 65
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66#include "setup.h"
67
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68#ifdef DEBUG
69#define DBG(fmt...) udbg_printf(fmt)
70#else
71#define DBG(fmt...)
72#endif
73
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74int have_of = 1;
75int boot_cpuid = 0;
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76dev_t boot_dev;
77u64 ppc64_pft_size;
78
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79/* Pick defaults since we might want to patch instructions
80 * before we've read this from the device tree.
81 */
82struct ppc64_caches ppc64_caches = {
83 .dline_size = 0x80,
84 .log_dline_size = 7,
85 .iline_size = 0x80,
86 .log_iline_size = 7
87};
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88EXPORT_SYMBOL_GPL(ppc64_caches);
89
90/*
91 * These are used in binfmt_elf.c to put aux entries on the stack
92 * for each elf executable being started.
93 */
94int dcache_bsize;
95int icache_bsize;
96int ucache_bsize;
97
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98#ifdef CONFIG_MAGIC_SYSRQ
99unsigned long SYSRQ_KEY;
100#endif /* CONFIG_MAGIC_SYSRQ */
101
102
103static int ppc64_panic_event(struct notifier_block *, unsigned long, void *);
104static struct notifier_block ppc64_panic_block = {
105 .notifier_call = ppc64_panic_event,
106 .priority = INT_MIN /* may not return; must be done last */
107};
108
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109#ifdef CONFIG_SMP
110
111static int smt_enabled_cmdline;
112
113/* Look for ibm,smt-enabled OF option */
114static void check_smt_enabled(void)
115{
116 struct device_node *dn;
117 char *smt_option;
118
119 /* Allow the command line to overrule the OF option */
120 if (smt_enabled_cmdline)
121 return;
122
123 dn = of_find_node_by_path("/options");
124
125 if (dn) {
126 smt_option = (char *)get_property(dn, "ibm,smt-enabled", NULL);
127
128 if (smt_option) {
129 if (!strcmp(smt_option, "on"))
130 smt_enabled_at_boot = 1;
131 else if (!strcmp(smt_option, "off"))
132 smt_enabled_at_boot = 0;
133 }
134 }
135}
136
137/* Look for smt-enabled= cmdline option */
138static int __init early_smt_enabled(char *p)
139{
140 smt_enabled_cmdline = 1;
141
142 if (!p)
143 return 0;
144
145 if (!strcmp(p, "on") || !strcmp(p, "1"))
146 smt_enabled_at_boot = 1;
147 else if (!strcmp(p, "off") || !strcmp(p, "0"))
148 smt_enabled_at_boot = 0;
149
150 return 0;
151}
152early_param("smt-enabled", early_smt_enabled);
153
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154#else
155#define check_smt_enabled()
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156#endif /* CONFIG_SMP */
157
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158/*
159 * Early initialization entry point. This is called by head.S
160 * with MMU translation disabled. We rely on the "feature" of
161 * the CPU that ignores the top 2 bits of the address in real
162 * mode so we can access kernel globals normally provided we
163 * only toy with things in the RMO region. From here, we do
164 * some early parsing of the device-tree to setup out LMB
165 * data structures, and allocate & initialize the hash table
166 * and segment tables so we can start running with translation
167 * enabled.
168 *
169 * It is this function which will call the probe() callback of
170 * the various platform types and copy the matching one to the
171 * global ppc_md structure. Your platform can eventually do
172 * some very early initializations from the probe() routine, but
173 * this is not recommended, be very careful as, for example, the
174 * device-tree is not accessible via normal means at this point.
175 */
176
177void __init early_setup(unsigned long dt_ptr)
178{
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179 /* Enable early debugging if any specified (see udbg.h) */
180 udbg_early_init();
40ef8cbc 181
e8222502 182 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
40ef8cbc 183
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184 /*
185 * Do early initializations using the flattened device
186 * tree, like retreiving the physical memory map or
187 * calculating/retreiving the hash table size
188 */
189 early_init_devtree(__va(dt_ptr));
190
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191 /* Now we know the logical id of our boot cpu, setup the paca. */
192 setup_boot_paca();
193
194 /* Fix up paca fields required for the boot cpu */
195 get_paca()->cpu_start = 1;
196 get_paca()->stab_real = __pa((u64)&initial_stab);
197 get_paca()->stab_addr = (u64)&initial_stab;
198
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199 /* Probe the machine type */
200 probe_machine();
40ef8cbc 201
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202#ifdef CONFIG_CRASH_DUMP
203 kdump_setup();
204#endif
205
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206 DBG("Found, Initializing memory management...\n");
207
208 /*
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209 * Initialize the MMU Hash table and create the linear mapping
210 * of memory. Has to be done before stab/slb initialization as
211 * this is currently where the page size encoding is obtained
40ef8cbc 212 */
3c726f8d 213 htab_initialize();
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214
215 /*
3c726f8d 216 * Initialize stab / SLB management except on iSeries
40ef8cbc 217 */
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218 if (cpu_has_feature(CPU_FTR_SLB))
219 slb_initialize();
220 else if (!firmware_has_feature(FW_FEATURE_ISERIES))
221 stab_initialize(get_paca()->stab_real);
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222
223 DBG(" <- early_setup()\n");
224}
225
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226#ifdef CONFIG_SMP
227void early_setup_secondary(void)
228{
229 struct paca_struct *lpaca = get_paca();
230
231 /* Mark enabled in PACA */
232 lpaca->proc_enabled = 0;
233
234 /* Initialize hash table for that CPU */
235 htab_initialize_secondary();
236
237 /* Initialize STAB/SLB. We use a virtual address as it works
238 * in real mode on pSeries and we want a virutal address on
239 * iSeries anyway
240 */
241 if (cpu_has_feature(CPU_FTR_SLB))
242 slb_initialize();
243 else
244 stab_initialize(lpaca->stab_addr);
245}
246
247#endif /* CONFIG_SMP */
40ef8cbc 248
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249#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
250void smp_release_cpus(void)
251{
252 extern unsigned long __secondary_hold_spinloop;
758438a7 253 unsigned long *ptr;
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254
255 DBG(" -> smp_release_cpus()\n");
256
257 /* All secondary cpus are spinning on a common spinloop, release them
258 * all now so they can start to spin on their individual paca
259 * spinloops. For non SMP kernels, the secondary cpus never get out
260 * of the common spinloop.
261 * This is useless but harmless on iSeries, secondaries are already
262 * waiting on their paca spinloops. */
263
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264 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
265 - PHYSICAL_START);
266 *ptr = 1;
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267 mb();
268
269 DBG(" <- smp_release_cpus()\n");
270}
271#endif /* CONFIG_SMP || CONFIG_KEXEC */
272
40ef8cbc 273/*
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274 * Initialize some remaining members of the ppc64_caches and systemcfg
275 * structures
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276 * (at least until we get rid of them completely). This is mostly some
277 * cache informations about the CPU that will be used by cache flush
278 * routines and/or provided to userland
279 */
280static void __init initialize_cache_info(void)
281{
282 struct device_node *np;
283 unsigned long num_cpus = 0;
284
285 DBG(" -> initialize_cache_info()\n");
286
287 for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) {
288 num_cpus += 1;
289
290 /* We're assuming *all* of the CPUs have the same
291 * d-cache and i-cache sizes... -Peter
292 */
293
294 if ( num_cpus == 1 ) {
295 u32 *sizep, *lsizep;
296 u32 size, lsize;
297 const char *dc, *ic;
298
299 /* Then read cache informations */
e8222502 300 if (machine_is(powermac)) {
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301 dc = "d-cache-block-size";
302 ic = "i-cache-block-size";
303 } else {
304 dc = "d-cache-line-size";
305 ic = "i-cache-line-size";
306 }
307
308 size = 0;
309 lsize = cur_cpu_spec->dcache_bsize;
310 sizep = (u32 *)get_property(np, "d-cache-size", NULL);
311 if (sizep != NULL)
312 size = *sizep;
313 lsizep = (u32 *) get_property(np, dc, NULL);
314 if (lsizep != NULL)
315 lsize = *lsizep;
316 if (sizep == 0 || lsizep == 0)
317 DBG("Argh, can't find dcache properties ! "
318 "sizep: %p, lsizep: %p\n", sizep, lsizep);
319
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320 ppc64_caches.dsize = size;
321 ppc64_caches.dline_size = lsize;
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322 ppc64_caches.log_dline_size = __ilog2(lsize);
323 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
324
325 size = 0;
326 lsize = cur_cpu_spec->icache_bsize;
327 sizep = (u32 *)get_property(np, "i-cache-size", NULL);
328 if (sizep != NULL)
329 size = *sizep;
330 lsizep = (u32 *)get_property(np, ic, NULL);
331 if (lsizep != NULL)
332 lsize = *lsizep;
333 if (sizep == 0 || lsizep == 0)
334 DBG("Argh, can't find icache properties ! "
335 "sizep: %p, lsizep: %p\n", sizep, lsizep);
336
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337 ppc64_caches.isize = size;
338 ppc64_caches.iline_size = lsize;
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339 ppc64_caches.log_iline_size = __ilog2(lsize);
340 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
341 }
342 }
343
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344 DBG(" <- initialize_cache_info()\n");
345}
346
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347
348/*
349 * Do some initial setup of the system. The parameters are those which
350 * were passed in from the bootloader.
351 */
352void __init setup_system(void)
353{
354 DBG(" -> setup_system()\n");
355
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356#ifdef CONFIG_KEXEC
357 kdump_move_device_tree();
358#endif
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359 /*
360 * Unflatten the device-tree passed by prom_init or kexec
361 */
362 unflatten_device_tree();
363
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364#ifdef CONFIG_KEXEC
365 kexec_setup(); /* requires unflattened device tree. */
366#endif
367
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368 /*
369 * Fill the ppc64_caches & systemcfg structures with informations
943ffb58 370 * retrieved from the device-tree. Need to be called before
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371 * finish_device_tree() since the later requires some of the
372 * informations filled up here to properly parse the interrupt
373 * tree.
374 * It also sets up the cache line sizes which allows to call
375 * routines like flush_icache_range (used by the hash init
376 * later on).
377 */
378 initialize_cache_info();
379
380#ifdef CONFIG_PPC_RTAS
381 /*
382 * Initialize RTAS if available
383 */
384 rtas_initialize();
385#endif /* CONFIG_PPC_RTAS */
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386
387 /*
388 * Check if we have an initrd provided via the device-tree
389 */
390 check_for_initrd();
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391
392 /*
393 * Do some platform specific early initializations, that includes
394 * setting up the hash table pointers. It also sets up some interrupt-mapping
395 * related options that will be used by finish_device_tree()
396 */
397 ppc_md.init_early();
40ef8cbc 398
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399 /*
400 * We can discover serial ports now since the above did setup the
401 * hash table management for us, thus ioremap works. We do that early
402 * so that further code can be debugged
403 */
463ce0e1 404 find_legacy_serial_ports();
463ce0e1 405
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406 /*
407 * "Finish" the device-tree, that is do the actual parsing of
408 * some of the properties like the interrupt map
409 */
410 finish_device_tree();
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411
412 /*
413 * Initialize xmon
414 */
415#ifdef CONFIG_XMON_DEFAULT
416 xmon_init(1);
417#endif
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418 /*
419 * Register early console
420 */
421 register_early_udbg_console();
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422
423 /* Save unparsed command line copy for /proc/cmdline */
424 strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
425
426 parse_early_param();
40ef8cbc 427
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428 check_smt_enabled();
429 smp_setup_cpu_maps();
40ef8cbc 430
f018b36f 431#ifdef CONFIG_SMP
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432 /* Release secondary cpus out of their spinloops at 0x60 now that
433 * we can map physical -> logical CPU ids
434 */
435 smp_release_cpus();
f018b36f 436#endif
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437
438 printk("Starting Linux PPC64 %s\n", system_utsname.version);
439
440 printk("-----------------------------------------------------\n");
441 printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size);
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442 printk("ppc64_interrupt_controller = 0x%ld\n",
443 ppc64_interrupt_controller);
a7f290da 444 printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size());
40ef8cbc 445 printk("ppc64_caches.dcache_line_size = 0x%x\n",
a7f290da 446 ppc64_caches.dline_size);
40ef8cbc 447 printk("ppc64_caches.icache_line_size = 0x%x\n",
a7f290da 448 ppc64_caches.iline_size);
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449 printk("htab_address = 0x%p\n", htab_address);
450 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
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451#if PHYSICAL_START > 0
452 printk("physical_start = 0x%x\n", PHYSICAL_START);
453#endif
40ef8cbc 454 printk("-----------------------------------------------------\n");
40ef8cbc 455
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456 DBG(" <- setup_system()\n");
457}
458
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459static int ppc64_panic_event(struct notifier_block *this,
460 unsigned long event, void *ptr)
461{
462 ppc_md.panic((char *)ptr); /* May not return */
463 return NOTIFY_DONE;
464}
465
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466#ifdef CONFIG_IRQSTACKS
467static void __init irqstack_early_init(void)
468{
469 unsigned int i;
470
471 /*
472 * interrupt stacks must be under 256MB, we cannot afford to take
473 * SLB misses on them.
474 */
0e551954 475 for_each_possible_cpu(i) {
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476 softirq_ctx[i] = (struct thread_info *)
477 __va(lmb_alloc_base(THREAD_SIZE,
478 THREAD_SIZE, 0x10000000));
479 hardirq_ctx[i] = (struct thread_info *)
480 __va(lmb_alloc_base(THREAD_SIZE,
481 THREAD_SIZE, 0x10000000));
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482 }
483}
484#else
485#define irqstack_early_init()
486#endif
487
488/*
489 * Stack space used when we detect a bad kernel stack pointer, and
490 * early in SMP boots before relocation is enabled.
491 */
492static void __init emergency_stack_init(void)
493{
494 unsigned long limit;
495 unsigned int i;
496
497 /*
498 * Emergency stacks must be under 256MB, we cannot afford to take
499 * SLB misses on them. The ABI also requires them to be 128-byte
500 * aligned.
501 *
502 * Since we use these as temporary stacks during secondary CPU
503 * bringup, we need to get at them in real mode. This means they
504 * must also be within the RMO region.
505 */
506 limit = min(0x10000000UL, lmb.rmo_size);
507
0e551954 508 for_each_possible_cpu(i)
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509 paca[i].emergency_sp =
510 __va(lmb_alloc_base(HW_PAGE_SIZE, 128, limit)) + HW_PAGE_SIZE;
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511}
512
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513/*
514 * Called into from start_kernel, after lock_kernel has been called.
515 * Initializes bootmem, which is unsed to manage page allocation until
516 * mem_init is called.
517 */
518void __init setup_arch(char **cmdline_p)
519{
520 extern void do_init_bootmem(void);
521
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522 ppc64_boot_msg(0x12, "Setup Arch");
523
524 *cmdline_p = cmd_line;
525
526 /*
527 * Set cache line size based on type of cpu as a default.
528 * Systems with OF can look in the properties on the cpu node(s)
529 * for a possibly more accurate value.
530 */
531 dcache_bsize = ppc64_caches.dline_size;
532 icache_bsize = ppc64_caches.iline_size;
533
534 /* reboot on panic */
535 panic_timeout = 180;
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536
537 if (ppc_md.panic)
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538 atomic_notifier_chain_register(&panic_notifier_list,
539 &ppc64_panic_block);
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540
541 init_mm.start_code = PAGE_OFFSET;
542 init_mm.end_code = (unsigned long) _etext;
543 init_mm.end_data = (unsigned long) _edata;
544 init_mm.brk = klimit;
545
546 irqstack_early_init();
547 emergency_stack_init();
548
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549 stabs_alloc();
550
551 /* set up the bootmem stuff with available memory */
552 do_init_bootmem();
553 sparse_init();
554
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555#ifdef CONFIG_DUMMY_CONSOLE
556 conswitchp = &dummy_con;
557#endif
558
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559 ppc_md.setup_arch();
560
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561 paging_init();
562 ppc64_boot_msg(0x15, "Setup Done");
563}
564
565
566/* ToDo: do something useful if ppc_md is not yet setup. */
567#define PPC64_LINUX_FUNCTION 0x0f000000
568#define PPC64_IPL_MESSAGE 0xc0000000
569#define PPC64_TERM_MESSAGE 0xb0000000
570
571static void ppc64_do_msg(unsigned int src, const char *msg)
572{
573 if (ppc_md.progress) {
574 char buf[128];
575
576 sprintf(buf, "%08X\n", src);
577 ppc_md.progress(buf, 0);
578 snprintf(buf, 128, "%s", msg);
579 ppc_md.progress(buf, 0);
580 }
581}
582
583/* Print a boot progress message. */
584void ppc64_boot_msg(unsigned int src, const char *msg)
585{
586 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
587 printk("[boot]%04x %s\n", src, msg);
588}
589
590/* Print a termination message (print only -- does not stop the kernel) */
591void ppc64_terminate_msg(unsigned int src, const char *msg)
592{
593 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg);
594 printk("[terminate]%04x %s\n", src, msg);
595}
596
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597void cpu_die(void)
598{
599 if (ppc_md.cpu_die)
600 ppc_md.cpu_die();
601}
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602
603#ifdef CONFIG_SMP
604void __init setup_per_cpu_areas(void)
605{
606 int i;
607 unsigned long size;
608 char *ptr;
609
610 /* Copy section for each CPU (we discard the original) */
611 size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
612#ifdef CONFIG_MODULES
613 if (size < PERCPU_ENOUGH_ROOM)
614 size = PERCPU_ENOUGH_ROOM;
615#endif
616
0e551954 617 for_each_possible_cpu(i) {
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618 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
619 if (!ptr)
620 panic("Cannot allocate cpu data for CPU %d\n", i);
621
622 paca[i].data_offset = ptr - __per_cpu_start;
623 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
624 }
625}
626#endif