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Commit | Line | Data |
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40ef8cbc PM |
1 | /* |
2 | * | |
3 | * Common boot and setup code. | |
4 | * | |
5 | * Copyright (C) 2001 PPC64 Team, IBM Corp | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #undef DEBUG | |
14 | ||
40ef8cbc PM |
15 | #include <linux/module.h> |
16 | #include <linux/string.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/reboot.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/initrd.h> | |
40ef8cbc PM |
23 | #include <linux/seq_file.h> |
24 | #include <linux/ioport.h> | |
25 | #include <linux/console.h> | |
26 | #include <linux/utsname.h> | |
27 | #include <linux/tty.h> | |
28 | #include <linux/root_dev.h> | |
29 | #include <linux/notifier.h> | |
30 | #include <linux/cpu.h> | |
31 | #include <linux/unistd.h> | |
32 | #include <linux/serial.h> | |
33 | #include <linux/serial_8250.h> | |
7a0268fa | 34 | #include <linux/bootmem.h> |
12d04eef | 35 | #include <linux/pci.h> |
945feb17 | 36 | #include <linux/lockdep.h> |
d9b2b2a2 | 37 | #include <linux/lmb.h> |
40ef8cbc | 38 | #include <asm/io.h> |
0cc4746c | 39 | #include <asm/kdump.h> |
40ef8cbc PM |
40 | #include <asm/prom.h> |
41 | #include <asm/processor.h> | |
42 | #include <asm/pgtable.h> | |
40ef8cbc PM |
43 | #include <asm/smp.h> |
44 | #include <asm/elf.h> | |
45 | #include <asm/machdep.h> | |
46 | #include <asm/paca.h> | |
40ef8cbc PM |
47 | #include <asm/time.h> |
48 | #include <asm/cputable.h> | |
49 | #include <asm/sections.h> | |
50 | #include <asm/btext.h> | |
51 | #include <asm/nvram.h> | |
52 | #include <asm/setup.h> | |
53 | #include <asm/system.h> | |
54 | #include <asm/rtas.h> | |
55 | #include <asm/iommu.h> | |
56 | #include <asm/serial.h> | |
57 | #include <asm/cache.h> | |
58 | #include <asm/page.h> | |
59 | #include <asm/mmu.h> | |
40ef8cbc | 60 | #include <asm/firmware.h> |
f78541dc | 61 | #include <asm/xmon.h> |
dcad47fc | 62 | #include <asm/udbg.h> |
593e537b | 63 | #include <asm/kexec.h> |
ec3cf2ec | 64 | #include <asm/swiotlb.h> |
25d21ad6 | 65 | #include <asm/mmu_context.h> |
40ef8cbc | 66 | |
66ba135c SR |
67 | #include "setup.h" |
68 | ||
40ef8cbc PM |
69 | #ifdef DEBUG |
70 | #define DBG(fmt...) udbg_printf(fmt) | |
71 | #else | |
72 | #define DBG(fmt...) | |
73 | #endif | |
74 | ||
40ef8cbc | 75 | int boot_cpuid = 0; |
40ef8cbc PM |
76 | u64 ppc64_pft_size; |
77 | ||
dabcafd3 OJ |
78 | /* Pick defaults since we might want to patch instructions |
79 | * before we've read this from the device tree. | |
80 | */ | |
81 | struct ppc64_caches ppc64_caches = { | |
5a2fe38d OJ |
82 | .dline_size = 0x40, |
83 | .log_dline_size = 6, | |
84 | .iline_size = 0x40, | |
85 | .log_iline_size = 6 | |
dabcafd3 | 86 | }; |
40ef8cbc PM |
87 | EXPORT_SYMBOL_GPL(ppc64_caches); |
88 | ||
89 | /* | |
90 | * These are used in binfmt_elf.c to put aux entries on the stack | |
91 | * for each elf executable being started. | |
92 | */ | |
93 | int dcache_bsize; | |
94 | int icache_bsize; | |
95 | int ucache_bsize; | |
96 | ||
40ef8cbc PM |
97 | #ifdef CONFIG_SMP |
98 | ||
99 | static int smt_enabled_cmdline; | |
100 | ||
101 | /* Look for ibm,smt-enabled OF option */ | |
102 | static void check_smt_enabled(void) | |
103 | { | |
104 | struct device_node *dn; | |
a7f67bdf | 105 | const char *smt_option; |
40ef8cbc PM |
106 | |
107 | /* Allow the command line to overrule the OF option */ | |
108 | if (smt_enabled_cmdline) | |
109 | return; | |
110 | ||
111 | dn = of_find_node_by_path("/options"); | |
112 | ||
113 | if (dn) { | |
e2eb6392 | 114 | smt_option = of_get_property(dn, "ibm,smt-enabled", NULL); |
40ef8cbc PM |
115 | |
116 | if (smt_option) { | |
117 | if (!strcmp(smt_option, "on")) | |
118 | smt_enabled_at_boot = 1; | |
119 | else if (!strcmp(smt_option, "off")) | |
120 | smt_enabled_at_boot = 0; | |
121 | } | |
122 | } | |
123 | } | |
124 | ||
125 | /* Look for smt-enabled= cmdline option */ | |
126 | static int __init early_smt_enabled(char *p) | |
127 | { | |
128 | smt_enabled_cmdline = 1; | |
129 | ||
130 | if (!p) | |
131 | return 0; | |
132 | ||
133 | if (!strcmp(p, "on") || !strcmp(p, "1")) | |
134 | smt_enabled_at_boot = 1; | |
135 | else if (!strcmp(p, "off") || !strcmp(p, "0")) | |
136 | smt_enabled_at_boot = 0; | |
137 | ||
138 | return 0; | |
139 | } | |
140 | early_param("smt-enabled", early_smt_enabled); | |
141 | ||
5ad57078 PM |
142 | #else |
143 | #define check_smt_enabled() | |
40ef8cbc PM |
144 | #endif /* CONFIG_SMP */ |
145 | ||
ee43eb78 | 146 | /* Put the paca pointer into r13 and SPRG_PACA */ |
4ba99b97 ME |
147 | void __init setup_paca(int cpu) |
148 | { | |
149 | local_paca = &paca[cpu]; | |
ee43eb78 | 150 | mtspr(SPRN_SPRG_PACA, local_paca); |
25d21ad6 BH |
151 | #ifdef CONFIG_PPC_BOOK3E |
152 | mtspr(SPRN_SPRG_TLB_EXFRAME, local_paca->extlb); | |
153 | #endif | |
4ba99b97 ME |
154 | } |
155 | ||
40ef8cbc PM |
156 | /* |
157 | * Early initialization entry point. This is called by head.S | |
158 | * with MMU translation disabled. We rely on the "feature" of | |
159 | * the CPU that ignores the top 2 bits of the address in real | |
160 | * mode so we can access kernel globals normally provided we | |
161 | * only toy with things in the RMO region. From here, we do | |
162 | * some early parsing of the device-tree to setup out LMB | |
163 | * data structures, and allocate & initialize the hash table | |
164 | * and segment tables so we can start running with translation | |
165 | * enabled. | |
166 | * | |
167 | * It is this function which will call the probe() callback of | |
168 | * the various platform types and copy the matching one to the | |
169 | * global ppc_md structure. Your platform can eventually do | |
170 | * some very early initializations from the probe() routine, but | |
171 | * this is not recommended, be very careful as, for example, the | |
172 | * device-tree is not accessible via normal means at this point. | |
173 | */ | |
174 | ||
175 | void __init early_setup(unsigned long dt_ptr) | |
176 | { | |
24d96495 BH |
177 | /* -------- printk is _NOT_ safe to use here ! ------- */ |
178 | ||
90035fe3 TB |
179 | /* Fill in any unititialised pacas */ |
180 | initialise_pacas(); | |
181 | ||
42c4aaad | 182 | /* Identify CPU type */ |
974a76f5 | 183 | identify_cpu(0, mfspr(SPRN_PVR)); |
42c4aaad | 184 | |
33dbcf72 ME |
185 | /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ |
186 | setup_paca(0); | |
187 | ||
945feb17 BH |
188 | /* Initialize lockdep early or else spinlocks will blow */ |
189 | lockdep_init(); | |
190 | ||
24d96495 BH |
191 | /* -------- printk is now safe to use ------- */ |
192 | ||
f2fd2513 BH |
193 | /* Enable early debugging if any specified (see udbg.h) */ |
194 | udbg_early_init(); | |
195 | ||
e8222502 | 196 | DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); |
40ef8cbc | 197 | |
40ef8cbc | 198 | /* |
3c607ce2 LV |
199 | * Do early initialization using the flattened device |
200 | * tree, such as retrieving the physical memory map or | |
201 | * calculating/retrieving the hash table size. | |
40ef8cbc PM |
202 | */ |
203 | early_init_devtree(__va(dt_ptr)); | |
204 | ||
4df20460 | 205 | /* Now we know the logical id of our boot cpu, setup the paca. */ |
4ba99b97 | 206 | setup_paca(boot_cpuid); |
4df20460 AB |
207 | |
208 | /* Fix up paca fields required for the boot cpu */ | |
209 | get_paca()->cpu_start = 1; | |
4df20460 | 210 | |
e8222502 BH |
211 | /* Probe the machine type */ |
212 | probe_machine(); | |
40ef8cbc | 213 | |
47310413 | 214 | setup_kdump_trampoline(); |
0cc4746c | 215 | |
40ef8cbc PM |
216 | DBG("Found, Initializing memory management...\n"); |
217 | ||
757c74d2 BH |
218 | /* Initialize the hash table or TLB handling */ |
219 | early_init_mmu(); | |
40ef8cbc PM |
220 | |
221 | DBG(" <- early_setup()\n"); | |
222 | } | |
223 | ||
799d6046 PM |
224 | #ifdef CONFIG_SMP |
225 | void early_setup_secondary(void) | |
226 | { | |
d04c56f7 | 227 | /* Mark interrupts enabled in PACA */ |
757c74d2 | 228 | get_paca()->soft_enabled = 0; |
799d6046 | 229 | |
757c74d2 BH |
230 | /* Initialize the hash table or TLB handling */ |
231 | early_init_mmu_secondary(); | |
799d6046 PM |
232 | } |
233 | ||
234 | #endif /* CONFIG_SMP */ | |
40ef8cbc | 235 | |
b8f51021 ME |
236 | #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) |
237 | void smp_release_cpus(void) | |
238 | { | |
758438a7 | 239 | unsigned long *ptr; |
b8f51021 ME |
240 | |
241 | DBG(" -> smp_release_cpus()\n"); | |
242 | ||
243 | /* All secondary cpus are spinning on a common spinloop, release them | |
244 | * all now so they can start to spin on their individual paca | |
245 | * spinloops. For non SMP kernels, the secondary cpus never get out | |
246 | * of the common spinloop. | |
1f6a93e4 | 247 | */ |
b8f51021 | 248 | |
758438a7 ME |
249 | ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop |
250 | - PHYSICAL_START); | |
1f6a93e4 | 251 | *ptr = __pa(generic_secondary_smp_init); |
b8f51021 ME |
252 | mb(); |
253 | ||
254 | DBG(" <- smp_release_cpus()\n"); | |
255 | } | |
256 | #endif /* CONFIG_SMP || CONFIG_KEXEC */ | |
257 | ||
40ef8cbc | 258 | /* |
799d6046 PM |
259 | * Initialize some remaining members of the ppc64_caches and systemcfg |
260 | * structures | |
40ef8cbc PM |
261 | * (at least until we get rid of them completely). This is mostly some |
262 | * cache informations about the CPU that will be used by cache flush | |
263 | * routines and/or provided to userland | |
264 | */ | |
265 | static void __init initialize_cache_info(void) | |
266 | { | |
267 | struct device_node *np; | |
268 | unsigned long num_cpus = 0; | |
269 | ||
270 | DBG(" -> initialize_cache_info()\n"); | |
271 | ||
272 | for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) { | |
273 | num_cpus += 1; | |
274 | ||
275 | /* We're assuming *all* of the CPUs have the same | |
276 | * d-cache and i-cache sizes... -Peter | |
277 | */ | |
278 | ||
279 | if ( num_cpus == 1 ) { | |
a7f67bdf | 280 | const u32 *sizep, *lsizep; |
40ef8cbc | 281 | u32 size, lsize; |
40ef8cbc PM |
282 | |
283 | size = 0; | |
284 | lsize = cur_cpu_spec->dcache_bsize; | |
e2eb6392 | 285 | sizep = of_get_property(np, "d-cache-size", NULL); |
40ef8cbc PM |
286 | if (sizep != NULL) |
287 | size = *sizep; | |
20474abd BH |
288 | lsizep = of_get_property(np, "d-cache-block-size", NULL); |
289 | /* fallback if block size missing */ | |
290 | if (lsizep == NULL) | |
291 | lsizep = of_get_property(np, "d-cache-line-size", NULL); | |
40ef8cbc PM |
292 | if (lsizep != NULL) |
293 | lsize = *lsizep; | |
294 | if (sizep == 0 || lsizep == 0) | |
295 | DBG("Argh, can't find dcache properties ! " | |
296 | "sizep: %p, lsizep: %p\n", sizep, lsizep); | |
297 | ||
a7f290da BH |
298 | ppc64_caches.dsize = size; |
299 | ppc64_caches.dline_size = lsize; | |
40ef8cbc PM |
300 | ppc64_caches.log_dline_size = __ilog2(lsize); |
301 | ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; | |
302 | ||
303 | size = 0; | |
304 | lsize = cur_cpu_spec->icache_bsize; | |
e2eb6392 | 305 | sizep = of_get_property(np, "i-cache-size", NULL); |
40ef8cbc PM |
306 | if (sizep != NULL) |
307 | size = *sizep; | |
20474abd BH |
308 | lsizep = of_get_property(np, "i-cache-block-size", NULL); |
309 | if (lsizep == NULL) | |
310 | lsizep = of_get_property(np, "i-cache-line-size", NULL); | |
40ef8cbc PM |
311 | if (lsizep != NULL) |
312 | lsize = *lsizep; | |
313 | if (sizep == 0 || lsizep == 0) | |
314 | DBG("Argh, can't find icache properties ! " | |
315 | "sizep: %p, lsizep: %p\n", sizep, lsizep); | |
316 | ||
a7f290da BH |
317 | ppc64_caches.isize = size; |
318 | ppc64_caches.iline_size = lsize; | |
40ef8cbc PM |
319 | ppc64_caches.log_iline_size = __ilog2(lsize); |
320 | ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; | |
321 | } | |
322 | } | |
323 | ||
40ef8cbc PM |
324 | DBG(" <- initialize_cache_info()\n"); |
325 | } | |
326 | ||
40ef8cbc PM |
327 | |
328 | /* | |
329 | * Do some initial setup of the system. The parameters are those which | |
330 | * were passed in from the bootloader. | |
331 | */ | |
332 | void __init setup_system(void) | |
333 | { | |
334 | DBG(" -> setup_system()\n"); | |
335 | ||
826ea8f2 TB |
336 | /* Apply the CPUs-specific and firmware specific fixups to kernel |
337 | * text (nop out sections not relevant to this CPU or this firmware) | |
42c4aaad | 338 | */ |
0909c8c2 | 339 | do_feature_fixups(cur_cpu_spec->cpu_features, |
42c4aaad | 340 | &__start___ftr_fixup, &__stop___ftr_fixup); |
7c03d653 BH |
341 | do_feature_fixups(cur_cpu_spec->mmu_features, |
342 | &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup); | |
826ea8f2 TB |
343 | do_feature_fixups(powerpc_firmware_features, |
344 | &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); | |
2d1b2027 KG |
345 | do_lwsync_fixups(cur_cpu_spec->cpu_features, |
346 | &__start___lwsync_fixup, &__stop___lwsync_fixup); | |
42c4aaad | 347 | |
40ef8cbc PM |
348 | /* |
349 | * Unflatten the device-tree passed by prom_init or kexec | |
350 | */ | |
351 | unflatten_device_tree(); | |
352 | ||
353 | /* | |
354 | * Fill the ppc64_caches & systemcfg structures with informations | |
0ebfff14 | 355 | * retrieved from the device-tree. |
40ef8cbc PM |
356 | */ |
357 | initialize_cache_info(); | |
358 | ||
0ebfff14 BH |
359 | /* |
360 | * Initialize irq remapping subsystem | |
361 | */ | |
362 | irq_early_init(); | |
363 | ||
40ef8cbc PM |
364 | #ifdef CONFIG_PPC_RTAS |
365 | /* | |
366 | * Initialize RTAS if available | |
367 | */ | |
368 | rtas_initialize(); | |
369 | #endif /* CONFIG_PPC_RTAS */ | |
40ef8cbc PM |
370 | |
371 | /* | |
372 | * Check if we have an initrd provided via the device-tree | |
373 | */ | |
374 | check_for_initrd(); | |
40ef8cbc PM |
375 | |
376 | /* | |
377 | * Do some platform specific early initializations, that includes | |
378 | * setting up the hash table pointers. It also sets up some interrupt-mapping | |
379 | * related options that will be used by finish_device_tree() | |
380 | */ | |
57744ea9 GL |
381 | if (ppc_md.init_early) |
382 | ppc_md.init_early(); | |
40ef8cbc | 383 | |
463ce0e1 BH |
384 | /* |
385 | * We can discover serial ports now since the above did setup the | |
386 | * hash table management for us, thus ioremap works. We do that early | |
387 | * so that further code can be debugged | |
388 | */ | |
463ce0e1 | 389 | find_legacy_serial_ports(); |
463ce0e1 | 390 | |
40ef8cbc PM |
391 | /* |
392 | * Register early console | |
393 | */ | |
394 | register_early_udbg_console(); | |
40ef8cbc | 395 | |
47679283 ME |
396 | /* |
397 | * Initialize xmon | |
398 | */ | |
399 | xmon_setup(); | |
480f6f35 | 400 | |
5ad57078 PM |
401 | check_smt_enabled(); |
402 | smp_setup_cpu_maps(); | |
40ef8cbc | 403 | |
f018b36f | 404 | #ifdef CONFIG_SMP |
40ef8cbc PM |
405 | /* Release secondary cpus out of their spinloops at 0x60 now that |
406 | * we can map physical -> logical CPU ids | |
407 | */ | |
408 | smp_release_cpus(); | |
f018b36f | 409 | #endif |
40ef8cbc | 410 | |
96b644bd | 411 | printk("Starting Linux PPC64 %s\n", init_utsname()->version); |
40ef8cbc PM |
412 | |
413 | printk("-----------------------------------------------------\n"); | |
fe333321 IM |
414 | printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); |
415 | printk("physicalMemorySize = 0x%llx\n", lmb_phys_mem_size()); | |
9697add0 AB |
416 | if (ppc64_caches.dline_size != 0x80) |
417 | printk("ppc64_caches.dcache_line_size = 0x%x\n", | |
418 | ppc64_caches.dline_size); | |
419 | if (ppc64_caches.iline_size != 0x80) | |
420 | printk("ppc64_caches.icache_line_size = 0x%x\n", | |
421 | ppc64_caches.iline_size); | |
94491685 | 422 | #ifdef CONFIG_PPC_STD_MMU_64 |
9697add0 AB |
423 | if (htab_address) |
424 | printk("htab_address = 0x%p\n", htab_address); | |
40ef8cbc | 425 | printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); |
94491685 | 426 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
b160544c | 427 | if (PHYSICAL_START > 0) |
e468455e ME |
428 | printk("physical_start = 0x%llx\n", |
429 | (unsigned long long)PHYSICAL_START); | |
40ef8cbc | 430 | printk("-----------------------------------------------------\n"); |
40ef8cbc | 431 | |
40ef8cbc PM |
432 | DBG(" <- setup_system()\n"); |
433 | } | |
434 | ||
40ef8cbc PM |
435 | #ifdef CONFIG_IRQSTACKS |
436 | static void __init irqstack_early_init(void) | |
437 | { | |
438 | unsigned int i; | |
439 | ||
440 | /* | |
441 | * interrupt stacks must be under 256MB, we cannot afford to take | |
442 | * SLB misses on them. | |
443 | */ | |
0e551954 | 444 | for_each_possible_cpu(i) { |
3c726f8d BH |
445 | softirq_ctx[i] = (struct thread_info *) |
446 | __va(lmb_alloc_base(THREAD_SIZE, | |
447 | THREAD_SIZE, 0x10000000)); | |
448 | hardirq_ctx[i] = (struct thread_info *) | |
449 | __va(lmb_alloc_base(THREAD_SIZE, | |
450 | THREAD_SIZE, 0x10000000)); | |
40ef8cbc PM |
451 | } |
452 | } | |
453 | #else | |
454 | #define irqstack_early_init() | |
455 | #endif | |
456 | ||
2d27cfd3 BH |
457 | #ifdef CONFIG_PPC_BOOK3E |
458 | static void __init exc_lvl_early_init(void) | |
459 | { | |
460 | unsigned int i; | |
461 | ||
462 | for_each_possible_cpu(i) { | |
463 | critirq_ctx[i] = (struct thread_info *) | |
464 | __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); | |
465 | dbgirq_ctx[i] = (struct thread_info *) | |
466 | __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); | |
467 | mcheckirq_ctx[i] = (struct thread_info *) | |
468 | __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); | |
469 | } | |
470 | } | |
471 | #else | |
472 | #define exc_lvl_early_init() | |
473 | #endif | |
474 | ||
40ef8cbc PM |
475 | /* |
476 | * Stack space used when we detect a bad kernel stack pointer, and | |
477 | * early in SMP boots before relocation is enabled. | |
478 | */ | |
479 | static void __init emergency_stack_init(void) | |
480 | { | |
481 | unsigned long limit; | |
482 | unsigned int i; | |
483 | ||
484 | /* | |
485 | * Emergency stacks must be under 256MB, we cannot afford to take | |
486 | * SLB misses on them. The ABI also requires them to be 128-byte | |
487 | * aligned. | |
488 | * | |
489 | * Since we use these as temporary stacks during secondary CPU | |
490 | * bringup, we need to get at them in real mode. This means they | |
491 | * must also be within the RMO region. | |
492 | */ | |
fe333321 | 493 | limit = min(0x10000000ULL, lmb.rmo_size); |
40ef8cbc | 494 | |
3243d874 ME |
495 | for_each_possible_cpu(i) { |
496 | unsigned long sp; | |
497 | sp = lmb_alloc_base(THREAD_SIZE, THREAD_SIZE, limit); | |
498 | sp += THREAD_SIZE; | |
499 | paca[i].emergency_sp = __va(sp); | |
500 | } | |
40ef8cbc PM |
501 | } |
502 | ||
40ef8cbc PM |
503 | /* |
504 | * Called into from start_kernel, after lock_kernel has been called. | |
505 | * Initializes bootmem, which is unsed to manage page allocation until | |
506 | * mem_init is called. | |
507 | */ | |
508 | void __init setup_arch(char **cmdline_p) | |
509 | { | |
40ef8cbc PM |
510 | ppc64_boot_msg(0x12, "Setup Arch"); |
511 | ||
512 | *cmdline_p = cmd_line; | |
513 | ||
514 | /* | |
515 | * Set cache line size based on type of cpu as a default. | |
516 | * Systems with OF can look in the properties on the cpu node(s) | |
517 | * for a possibly more accurate value. | |
518 | */ | |
519 | dcache_bsize = ppc64_caches.dline_size; | |
520 | icache_bsize = ppc64_caches.iline_size; | |
521 | ||
522 | /* reboot on panic */ | |
523 | panic_timeout = 180; | |
40ef8cbc PM |
524 | |
525 | if (ppc_md.panic) | |
7e990266 | 526 | setup_panic(); |
40ef8cbc | 527 | |
4846c5de | 528 | init_mm.start_code = (unsigned long)_stext; |
40ef8cbc PM |
529 | init_mm.end_code = (unsigned long) _etext; |
530 | init_mm.end_data = (unsigned long) _edata; | |
531 | init_mm.brk = klimit; | |
532 | ||
533 | irqstack_early_init(); | |
2d27cfd3 | 534 | exc_lvl_early_init(); |
40ef8cbc PM |
535 | emergency_stack_init(); |
536 | ||
94491685 | 537 | #ifdef CONFIG_PPC_STD_MMU_64 |
40ef8cbc | 538 | stabs_alloc(); |
94491685 | 539 | #endif |
40ef8cbc PM |
540 | /* set up the bootmem stuff with available memory */ |
541 | do_init_bootmem(); | |
542 | sparse_init(); | |
543 | ||
0458060c PM |
544 | #ifdef CONFIG_DUMMY_CONSOLE |
545 | conswitchp = &dummy_con; | |
546 | #endif | |
547 | ||
38db7e74 GL |
548 | if (ppc_md.setup_arch) |
549 | ppc_md.setup_arch(); | |
40ef8cbc | 550 | |
ec3cf2ec BB |
551 | #ifdef CONFIG_SWIOTLB |
552 | if (ppc_swiotlb_enable) | |
ad32e8cb | 553 | swiotlb_init(1); |
ec3cf2ec BB |
554 | #endif |
555 | ||
40ef8cbc | 556 | paging_init(); |
6f0ef0f5 BH |
557 | |
558 | /* Initialize the MMU context management stuff */ | |
559 | mmu_context_init(); | |
560 | ||
40ef8cbc PM |
561 | ppc64_boot_msg(0x15, "Setup Done"); |
562 | } | |
563 | ||
564 | ||
565 | /* ToDo: do something useful if ppc_md is not yet setup. */ | |
566 | #define PPC64_LINUX_FUNCTION 0x0f000000 | |
567 | #define PPC64_IPL_MESSAGE 0xc0000000 | |
568 | #define PPC64_TERM_MESSAGE 0xb0000000 | |
569 | ||
570 | static void ppc64_do_msg(unsigned int src, const char *msg) | |
571 | { | |
572 | if (ppc_md.progress) { | |
573 | char buf[128]; | |
574 | ||
575 | sprintf(buf, "%08X\n", src); | |
576 | ppc_md.progress(buf, 0); | |
577 | snprintf(buf, 128, "%s", msg); | |
578 | ppc_md.progress(buf, 0); | |
579 | } | |
580 | } | |
581 | ||
582 | /* Print a boot progress message. */ | |
583 | void ppc64_boot_msg(unsigned int src, const char *msg) | |
584 | { | |
585 | ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); | |
586 | printk("[boot]%04x %s\n", src, msg); | |
587 | } | |
588 | ||
40ef8cbc PM |
589 | void cpu_die(void) |
590 | { | |
591 | if (ppc_md.cpu_die) | |
592 | ppc_md.cpu_die(); | |
593 | } | |
7a0268fa AB |
594 | |
595 | #ifdef CONFIG_SMP | |
c2a7e818 TH |
596 | #define PCPU_DYN_SIZE () |
597 | ||
598 | static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align) | |
7a0268fa | 599 | { |
c2a7e818 TH |
600 | return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align, |
601 | __pa(MAX_DMA_ADDRESS)); | |
602 | } | |
7a0268fa | 603 | |
c2a7e818 TH |
604 | static void __init pcpu_fc_free(void *ptr, size_t size) |
605 | { | |
606 | free_bootmem(__pa(ptr), size); | |
607 | } | |
7a0268fa | 608 | |
c2a7e818 TH |
609 | static int pcpu_cpu_distance(unsigned int from, unsigned int to) |
610 | { | |
611 | if (cpu_to_node(from) == cpu_to_node(to)) | |
612 | return LOCAL_DISTANCE; | |
613 | else | |
614 | return REMOTE_DISTANCE; | |
615 | } | |
616 | ||
617 | void __init setup_per_cpu_areas(void) | |
618 | { | |
619 | const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE; | |
620 | size_t atom_size; | |
621 | unsigned long delta; | |
622 | unsigned int cpu; | |
623 | int rc; | |
624 | ||
625 | /* | |
626 | * Linear mapping is one of 4K, 1M and 16M. For 4K, no need | |
627 | * to group units. For larger mappings, use 1M atom which | |
628 | * should be large enough to contain a number of units. | |
629 | */ | |
630 | if (mmu_linear_psize == MMU_PAGE_4K) | |
631 | atom_size = PAGE_SIZE; | |
632 | else | |
633 | atom_size = 1 << 20; | |
634 | ||
635 | rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance, | |
636 | pcpu_fc_alloc, pcpu_fc_free); | |
637 | if (rc < 0) | |
638 | panic("cannot initialize percpu area (err=%d)", rc); | |
639 | ||
640 | delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start; | |
641 | for_each_possible_cpu(cpu) | |
642 | paca[cpu].data_offset = delta + pcpu_unit_offsets[cpu]; | |
7a0268fa AB |
643 | } |
644 | #endif | |
4cb3cee0 BH |
645 | |
646 | ||
647 | #ifdef CONFIG_PPC_INDIRECT_IO | |
648 | struct ppc_pci_io ppc_pci_io; | |
649 | EXPORT_SYMBOL(ppc_pci_io); | |
650 | #endif /* CONFIG_PPC_INDIRECT_IO */ | |
651 |