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Commit | Line | Data |
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1da177e4 | 1 | /* |
81e7009e | 2 | * Signal handling for 32bit PPC and 32bit tasks on 64bit PPC |
1da177e4 | 3 | * |
81e7009e SR |
4 | * PowerPC version |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
1da177e4 LT |
6 | * Copyright (C) 2001 IBM |
7 | * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | |
8 | * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) | |
9 | * | |
81e7009e SR |
10 | * Derived from "arch/i386/kernel/signal.c" |
11 | * Copyright (C) 1991, 1992 Linus Torvalds | |
12 | * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson | |
1da177e4 | 13 | * |
81e7009e SR |
14 | * This program is free software; you can redistribute it and/or |
15 | * modify it under the terms of the GNU General Public License | |
16 | * as published by the Free Software Foundation; either version | |
17 | * 2 of the License, or (at your option) any later version. | |
1da177e4 LT |
18 | */ |
19 | ||
1da177e4 | 20 | #include <linux/sched.h> |
81e7009e | 21 | #include <linux/mm.h> |
1da177e4 | 22 | #include <linux/smp.h> |
1da177e4 LT |
23 | #include <linux/kernel.h> |
24 | #include <linux/signal.h> | |
1da177e4 LT |
25 | #include <linux/errno.h> |
26 | #include <linux/elf.h> | |
05ead015 | 27 | #include <linux/ptrace.h> |
76462232 | 28 | #include <linux/ratelimit.h> |
81e7009e SR |
29 | #ifdef CONFIG_PPC64 |
30 | #include <linux/syscalls.h> | |
1da177e4 | 31 | #include <linux/compat.h> |
81e7009e SR |
32 | #else |
33 | #include <linux/wait.h> | |
81e7009e SR |
34 | #include <linux/unistd.h> |
35 | #include <linux/stddef.h> | |
36 | #include <linux/tty.h> | |
37 | #include <linux/binfmts.h> | |
81e7009e SR |
38 | #endif |
39 | ||
1da177e4 | 40 | #include <asm/uaccess.h> |
81e7009e | 41 | #include <asm/cacheflush.h> |
a7f31841 | 42 | #include <asm/syscalls.h> |
c5ff7001 | 43 | #include <asm/sigcontext.h> |
a7f290da | 44 | #include <asm/vdso.h> |
ae3a197e | 45 | #include <asm/switch_to.h> |
2b0a576d | 46 | #include <asm/tm.h> |
81e7009e | 47 | #ifdef CONFIG_PPC64 |
879168ee | 48 | #include "ppc32.h" |
1da177e4 | 49 | #include <asm/unistd.h> |
81e7009e SR |
50 | #else |
51 | #include <asm/ucontext.h> | |
52 | #include <asm/pgtable.h> | |
53 | #endif | |
1da177e4 | 54 | |
22e38f29 BH |
55 | #include "signal.h" |
56 | ||
1da177e4 | 57 | |
81e7009e | 58 | #ifdef CONFIG_PPC64 |
b09a4913 | 59 | #define sys_rt_sigreturn compat_sys_rt_sigreturn |
b09a4913 SR |
60 | #define sys_swapcontext compat_sys_swapcontext |
61 | #define sys_sigreturn compat_sys_sigreturn | |
81e7009e SR |
62 | |
63 | #define old_sigaction old_sigaction32 | |
64 | #define sigcontext sigcontext32 | |
65 | #define mcontext mcontext32 | |
66 | #define ucontext ucontext32 | |
67 | ||
7cce2465 AV |
68 | #define __save_altstack __compat_save_altstack |
69 | ||
c1cb299e MN |
70 | /* |
71 | * Userspace code may pass a ucontext which doesn't include VSX added | |
72 | * at the end. We need to check for this case. | |
73 | */ | |
74 | #define UCONTEXTSIZEWITHOUTVSX \ | |
75 | (sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32)) | |
76 | ||
81e7009e SR |
77 | /* |
78 | * Returning 0 means we return to userspace via | |
79 | * ret_from_except and thus restore all user | |
80 | * registers from *regs. This is what we need | |
81 | * to do when a signal has been delivered. | |
82 | */ | |
81e7009e SR |
83 | |
84 | #define GP_REGS_SIZE min(sizeof(elf_gregset_t32), sizeof(struct pt_regs32)) | |
85 | #undef __SIGNAL_FRAMESIZE | |
86 | #define __SIGNAL_FRAMESIZE __SIGNAL_FRAMESIZE32 | |
87 | #undef ELF_NVRREG | |
88 | #define ELF_NVRREG ELF_NVRREG32 | |
89 | ||
90 | /* | |
91 | * Functions for flipping sigsets (thanks to brain dead generic | |
92 | * implementation that makes things simple for little endian only) | |
93 | */ | |
94 | static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set) | |
95 | { | |
96 | compat_sigset_t cset; | |
97 | ||
98 | switch (_NSIG_WORDS) { | |
a313f4c5 | 99 | case 4: cset.sig[6] = set->sig[3] & 0xffffffffull; |
81e7009e SR |
100 | cset.sig[7] = set->sig[3] >> 32; |
101 | case 3: cset.sig[4] = set->sig[2] & 0xffffffffull; | |
102 | cset.sig[5] = set->sig[2] >> 32; | |
103 | case 2: cset.sig[2] = set->sig[1] & 0xffffffffull; | |
104 | cset.sig[3] = set->sig[1] >> 32; | |
105 | case 1: cset.sig[0] = set->sig[0] & 0xffffffffull; | |
106 | cset.sig[1] = set->sig[0] >> 32; | |
107 | } | |
108 | return copy_to_user(uset, &cset, sizeof(*uset)); | |
109 | } | |
110 | ||
9b7cf8b4 PM |
111 | static inline int get_sigset_t(sigset_t *set, |
112 | const compat_sigset_t __user *uset) | |
81e7009e SR |
113 | { |
114 | compat_sigset_t s32; | |
115 | ||
116 | if (copy_from_user(&s32, uset, sizeof(*uset))) | |
117 | return -EFAULT; | |
118 | ||
119 | /* | |
120 | * Swap the 2 words of the 64-bit sigset_t (they are stored | |
121 | * in the "wrong" endian in 32-bit user storage). | |
122 | */ | |
123 | switch (_NSIG_WORDS) { | |
124 | case 4: set->sig[3] = s32.sig[6] | (((long)s32.sig[7]) << 32); | |
125 | case 3: set->sig[2] = s32.sig[4] | (((long)s32.sig[5]) << 32); | |
126 | case 2: set->sig[1] = s32.sig[2] | (((long)s32.sig[3]) << 32); | |
127 | case 1: set->sig[0] = s32.sig[0] | (((long)s32.sig[1]) << 32); | |
128 | } | |
129 | return 0; | |
130 | } | |
131 | ||
29e646df | 132 | #define to_user_ptr(p) ptr_to_compat(p) |
81e7009e SR |
133 | #define from_user_ptr(p) compat_ptr(p) |
134 | ||
135 | static inline int save_general_regs(struct pt_regs *regs, | |
136 | struct mcontext __user *frame) | |
137 | { | |
138 | elf_greg_t64 *gregs = (elf_greg_t64 *)regs; | |
139 | int i; | |
140 | ||
1bd79336 | 141 | WARN_ON(!FULL_REGS(regs)); |
401d1f02 DW |
142 | |
143 | for (i = 0; i <= PT_RESULT; i ++) { | |
144 | if (i == 14 && !FULL_REGS(regs)) | |
145 | i = 32; | |
81e7009e SR |
146 | if (__put_user((unsigned int)gregs[i], &frame->mc_gregs[i])) |
147 | return -EFAULT; | |
401d1f02 | 148 | } |
81e7009e SR |
149 | return 0; |
150 | } | |
151 | ||
152 | static inline int restore_general_regs(struct pt_regs *regs, | |
153 | struct mcontext __user *sr) | |
154 | { | |
155 | elf_greg_t64 *gregs = (elf_greg_t64 *)regs; | |
156 | int i; | |
157 | ||
158 | for (i = 0; i <= PT_RESULT; i++) { | |
159 | if ((i == PT_MSR) || (i == PT_SOFTE)) | |
160 | continue; | |
161 | if (__get_user(gregs[i], &sr->mc_gregs[i])) | |
162 | return -EFAULT; | |
163 | } | |
164 | return 0; | |
165 | } | |
166 | ||
167 | #else /* CONFIG_PPC64 */ | |
168 | ||
81e7009e SR |
169 | #define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs)) |
170 | ||
171 | static inline int put_sigset_t(sigset_t __user *uset, sigset_t *set) | |
172 | { | |
173 | return copy_to_user(uset, set, sizeof(*uset)); | |
174 | } | |
175 | ||
9b7cf8b4 | 176 | static inline int get_sigset_t(sigset_t *set, const sigset_t __user *uset) |
81e7009e SR |
177 | { |
178 | return copy_from_user(set, uset, sizeof(*uset)); | |
179 | } | |
180 | ||
29e646df AV |
181 | #define to_user_ptr(p) ((unsigned long)(p)) |
182 | #define from_user_ptr(p) ((void __user *)(p)) | |
81e7009e SR |
183 | |
184 | static inline int save_general_regs(struct pt_regs *regs, | |
185 | struct mcontext __user *frame) | |
186 | { | |
1bd79336 | 187 | WARN_ON(!FULL_REGS(regs)); |
81e7009e SR |
188 | return __copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE); |
189 | } | |
190 | ||
191 | static inline int restore_general_regs(struct pt_regs *regs, | |
192 | struct mcontext __user *sr) | |
193 | { | |
194 | /* copy up to but not including MSR */ | |
195 | if (__copy_from_user(regs, &sr->mc_gregs, | |
196 | PT_MSR * sizeof(elf_greg_t))) | |
197 | return -EFAULT; | |
198 | /* copy from orig_r3 (the word after the MSR) up to the end */ | |
199 | if (__copy_from_user(®s->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3], | |
200 | GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t))) | |
201 | return -EFAULT; | |
202 | return 0; | |
203 | } | |
81e7009e SR |
204 | #endif |
205 | ||
1da177e4 LT |
206 | /* |
207 | * When we have signals to deliver, we set up on the | |
208 | * user stack, going down from the original stack pointer: | |
a3f61dc0 BH |
209 | * an ABI gap of 56 words |
210 | * an mcontext struct | |
81e7009e SR |
211 | * a sigcontext struct |
212 | * a gap of __SIGNAL_FRAMESIZE bytes | |
1da177e4 | 213 | * |
a3f61dc0 BH |
214 | * Each of these things must be a multiple of 16 bytes in size. The following |
215 | * structure represent all of this except the __SIGNAL_FRAMESIZE gap | |
1da177e4 LT |
216 | * |
217 | */ | |
a3f61dc0 BH |
218 | struct sigframe { |
219 | struct sigcontext sctx; /* the sigcontext */ | |
81e7009e | 220 | struct mcontext mctx; /* all the register values */ |
2b0a576d MN |
221 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
222 | struct sigcontext sctx_transact; | |
223 | struct mcontext mctx_transact; | |
224 | #endif | |
1da177e4 LT |
225 | /* |
226 | * Programs using the rs6000/xcoff abi can save up to 19 gp | |
227 | * regs and 18 fp regs below sp before decrementing it. | |
228 | */ | |
229 | int abigap[56]; | |
230 | }; | |
231 | ||
232 | /* We use the mc_pad field for the signal return trampoline. */ | |
233 | #define tramp mc_pad | |
234 | ||
235 | /* | |
236 | * When we have rt signals to deliver, we set up on the | |
237 | * user stack, going down from the original stack pointer: | |
81e7009e SR |
238 | * one rt_sigframe struct (siginfo + ucontext + ABI gap) |
239 | * a gap of __SIGNAL_FRAMESIZE+16 bytes | |
240 | * (the +16 is to get the siginfo and ucontext in the same | |
1da177e4 LT |
241 | * positions as in older kernels). |
242 | * | |
243 | * Each of these things must be a multiple of 16 bytes in size. | |
244 | * | |
245 | */ | |
81e7009e SR |
246 | struct rt_sigframe { |
247 | #ifdef CONFIG_PPC64 | |
248 | compat_siginfo_t info; | |
249 | #else | |
250 | struct siginfo info; | |
251 | #endif | |
252 | struct ucontext uc; | |
2b0a576d MN |
253 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
254 | struct ucontext uc_transact; | |
255 | #endif | |
1da177e4 LT |
256 | /* |
257 | * Programs using the rs6000/xcoff abi can save up to 19 gp | |
258 | * regs and 18 fp regs below sp before decrementing it. | |
259 | */ | |
260 | int abigap[56]; | |
261 | }; | |
262 | ||
6a274c08 MN |
263 | #ifdef CONFIG_VSX |
264 | unsigned long copy_fpr_to_user(void __user *to, | |
265 | struct task_struct *task) | |
266 | { | |
de79f7b9 | 267 | u64 buf[ELF_NFPREG]; |
6a274c08 MN |
268 | int i; |
269 | ||
270 | /* save FPR copy to local buffer then write to the thread_struct */ | |
271 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) | |
272 | buf[i] = task->thread.TS_FPR(i); | |
de79f7b9 | 273 | buf[i] = task->thread.fp_state.fpscr; |
6a274c08 MN |
274 | return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double)); |
275 | } | |
276 | ||
277 | unsigned long copy_fpr_from_user(struct task_struct *task, | |
278 | void __user *from) | |
279 | { | |
de79f7b9 | 280 | u64 buf[ELF_NFPREG]; |
6a274c08 MN |
281 | int i; |
282 | ||
283 | if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double))) | |
284 | return 1; | |
285 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) | |
286 | task->thread.TS_FPR(i) = buf[i]; | |
de79f7b9 | 287 | task->thread.fp_state.fpscr = buf[i]; |
6a274c08 MN |
288 | |
289 | return 0; | |
290 | } | |
291 | ||
292 | unsigned long copy_vsx_to_user(void __user *to, | |
293 | struct task_struct *task) | |
294 | { | |
de79f7b9 | 295 | u64 buf[ELF_NVSRHALFREG]; |
6a274c08 MN |
296 | int i; |
297 | ||
298 | /* save FPR copy to local buffer then write to the thread_struct */ | |
299 | for (i = 0; i < ELF_NVSRHALFREG; i++) | |
de79f7b9 | 300 | buf[i] = task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET]; |
6a274c08 MN |
301 | return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double)); |
302 | } | |
303 | ||
304 | unsigned long copy_vsx_from_user(struct task_struct *task, | |
305 | void __user *from) | |
306 | { | |
de79f7b9 | 307 | u64 buf[ELF_NVSRHALFREG]; |
6a274c08 MN |
308 | int i; |
309 | ||
310 | if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double))) | |
311 | return 1; | |
312 | for (i = 0; i < ELF_NVSRHALFREG ; i++) | |
de79f7b9 | 313 | task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i]; |
6a274c08 MN |
314 | return 0; |
315 | } | |
2b0a576d MN |
316 | |
317 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | |
318 | unsigned long copy_transact_fpr_to_user(void __user *to, | |
319 | struct task_struct *task) | |
320 | { | |
de79f7b9 | 321 | u64 buf[ELF_NFPREG]; |
2b0a576d MN |
322 | int i; |
323 | ||
324 | /* save FPR copy to local buffer then write to the thread_struct */ | |
325 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) | |
326 | buf[i] = task->thread.TS_TRANS_FPR(i); | |
de79f7b9 | 327 | buf[i] = task->thread.transact_fp.fpscr; |
2b0a576d MN |
328 | return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double)); |
329 | } | |
330 | ||
331 | unsigned long copy_transact_fpr_from_user(struct task_struct *task, | |
332 | void __user *from) | |
333 | { | |
de79f7b9 | 334 | u64 buf[ELF_NFPREG]; |
2b0a576d MN |
335 | int i; |
336 | ||
337 | if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double))) | |
338 | return 1; | |
339 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) | |
340 | task->thread.TS_TRANS_FPR(i) = buf[i]; | |
de79f7b9 | 341 | task->thread.transact_fp.fpscr = buf[i]; |
2b0a576d MN |
342 | |
343 | return 0; | |
344 | } | |
345 | ||
346 | unsigned long copy_transact_vsx_to_user(void __user *to, | |
347 | struct task_struct *task) | |
348 | { | |
de79f7b9 | 349 | u64 buf[ELF_NVSRHALFREG]; |
2b0a576d MN |
350 | int i; |
351 | ||
352 | /* save FPR copy to local buffer then write to the thread_struct */ | |
353 | for (i = 0; i < ELF_NVSRHALFREG; i++) | |
de79f7b9 | 354 | buf[i] = task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET]; |
2b0a576d MN |
355 | return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double)); |
356 | } | |
357 | ||
358 | unsigned long copy_transact_vsx_from_user(struct task_struct *task, | |
359 | void __user *from) | |
360 | { | |
de79f7b9 | 361 | u64 buf[ELF_NVSRHALFREG]; |
2b0a576d MN |
362 | int i; |
363 | ||
364 | if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double))) | |
365 | return 1; | |
366 | for (i = 0; i < ELF_NVSRHALFREG ; i++) | |
de79f7b9 | 367 | task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = buf[i]; |
2b0a576d MN |
368 | return 0; |
369 | } | |
370 | #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ | |
6a274c08 MN |
371 | #else |
372 | inline unsigned long copy_fpr_to_user(void __user *to, | |
373 | struct task_struct *task) | |
374 | { | |
de79f7b9 | 375 | return __copy_to_user(to, task->thread.fp_state.fpr, |
6a274c08 MN |
376 | ELF_NFPREG * sizeof(double)); |
377 | } | |
378 | ||
379 | inline unsigned long copy_fpr_from_user(struct task_struct *task, | |
380 | void __user *from) | |
381 | { | |
de79f7b9 | 382 | return __copy_from_user(task->thread.fp_state.fpr, from, |
6a274c08 MN |
383 | ELF_NFPREG * sizeof(double)); |
384 | } | |
2b0a576d MN |
385 | |
386 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | |
387 | inline unsigned long copy_transact_fpr_to_user(void __user *to, | |
388 | struct task_struct *task) | |
389 | { | |
de79f7b9 | 390 | return __copy_to_user(to, task->thread.transact_fp.fpr, |
2b0a576d MN |
391 | ELF_NFPREG * sizeof(double)); |
392 | } | |
393 | ||
394 | inline unsigned long copy_transact_fpr_from_user(struct task_struct *task, | |
395 | void __user *from) | |
396 | { | |
de79f7b9 | 397 | return __copy_from_user(task->thread.transact_fp.fpr, from, |
2b0a576d MN |
398 | ELF_NFPREG * sizeof(double)); |
399 | } | |
400 | #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ | |
6a274c08 MN |
401 | #endif |
402 | ||
1da177e4 LT |
403 | /* |
404 | * Save the current user registers on the user stack. | |
81e7009e SR |
405 | * We only save the altivec/spe registers if the process has used |
406 | * altivec/spe instructions at some point. | |
1da177e4 | 407 | */ |
81e7009e | 408 | static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame, |
1d25f11f MN |
409 | struct mcontext __user *tm_frame, int sigret, |
410 | int ctx_has_vsx_region) | |
1da177e4 | 411 | { |
9e751186 MN |
412 | unsigned long msr = regs->msr; |
413 | ||
1da177e4 LT |
414 | /* Make sure floating point registers are stored in regs */ |
415 | flush_fp_to_thread(current); | |
416 | ||
c6e6771b MN |
417 | /* save general registers */ |
418 | if (save_general_regs(regs, frame)) | |
1da177e4 LT |
419 | return 1; |
420 | ||
1da177e4 LT |
421 | #ifdef CONFIG_ALTIVEC |
422 | /* save altivec registers */ | |
423 | if (current->thread.used_vr) { | |
424 | flush_altivec_to_thread(current); | |
de79f7b9 | 425 | if (__copy_to_user(&frame->mc_vregs, ¤t->thread.vr_state, |
81e7009e | 426 | ELF_NVRREG * sizeof(vector128))) |
1da177e4 LT |
427 | return 1; |
428 | /* set MSR_VEC in the saved MSR value to indicate that | |
429 | frame->mc_vregs contains valid data */ | |
9e751186 | 430 | msr |= MSR_VEC; |
1da177e4 LT |
431 | } |
432 | /* else assert((regs->msr & MSR_VEC) == 0) */ | |
433 | ||
434 | /* We always copy to/from vrsave, it's 0 if we don't have or don't | |
435 | * use altivec. Since VSCR only contains 32 bits saved in the least | |
436 | * significant bits of a vector, we "cheat" and stuff VRSAVE in the | |
437 | * most significant bits of that same vector. --BenH | |
408a7e08 | 438 | * Note that the current VRSAVE value is in the SPR at this point. |
1da177e4 | 439 | */ |
408a7e08 PM |
440 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
441 | current->thread.vrsave = mfspr(SPRN_VRSAVE); | |
1da177e4 LT |
442 | if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32])) |
443 | return 1; | |
444 | #endif /* CONFIG_ALTIVEC */ | |
6a274c08 | 445 | if (copy_fpr_to_user(&frame->mc_fregs, current)) |
c6e6771b | 446 | return 1; |
ec67ad82 MN |
447 | |
448 | /* | |
449 | * Clear the MSR VSX bit to indicate there is no valid state attached | |
450 | * to this context, except in the specific case below where we set it. | |
451 | */ | |
452 | msr &= ~MSR_VSX; | |
6a274c08 | 453 | #ifdef CONFIG_VSX |
ce48b210 MN |
454 | /* |
455 | * Copy VSR 0-31 upper half from thread_struct to local | |
456 | * buffer, then write that to userspace. Also set MSR_VSX in | |
457 | * the saved MSR value to indicate that frame->mc_vregs | |
458 | * contains valid data | |
459 | */ | |
16c29d18 | 460 | if (current->thread.used_vsr && ctx_has_vsx_region) { |
7c292170 | 461 | __giveup_vsx(current); |
6a274c08 | 462 | if (copy_vsx_to_user(&frame->mc_vsregs, current)) |
ce48b210 MN |
463 | return 1; |
464 | msr |= MSR_VSX; | |
ec67ad82 | 465 | } |
c6e6771b | 466 | #endif /* CONFIG_VSX */ |
81e7009e SR |
467 | #ifdef CONFIG_SPE |
468 | /* save spe registers */ | |
469 | if (current->thread.used_spe) { | |
470 | flush_spe_to_thread(current); | |
471 | if (__copy_to_user(&frame->mc_vregs, current->thread.evr, | |
472 | ELF_NEVRREG * sizeof(u32))) | |
473 | return 1; | |
474 | /* set MSR_SPE in the saved MSR value to indicate that | |
475 | frame->mc_vregs contains valid data */ | |
9e751186 | 476 | msr |= MSR_SPE; |
81e7009e SR |
477 | } |
478 | /* else assert((regs->msr & MSR_SPE) == 0) */ | |
479 | ||
480 | /* We always copy to/from spefscr */ | |
481 | if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG)) | |
482 | return 1; | |
483 | #endif /* CONFIG_SPE */ | |
484 | ||
9e751186 MN |
485 | if (__put_user(msr, &frame->mc_gregs[PT_MSR])) |
486 | return 1; | |
1d25f11f MN |
487 | /* We need to write 0 the MSR top 32 bits in the tm frame so that we |
488 | * can check it on the restore to see if TM is active | |
489 | */ | |
490 | if (tm_frame && __put_user(0, &tm_frame->mc_gregs[PT_MSR])) | |
491 | return 1; | |
492 | ||
1da177e4 LT |
493 | if (sigret) { |
494 | /* Set up the sigreturn trampoline: li r0,sigret; sc */ | |
495 | if (__put_user(0x38000000UL + sigret, &frame->tramp[0]) | |
496 | || __put_user(0x44000002UL, &frame->tramp[1])) | |
497 | return 1; | |
498 | flush_icache_range((unsigned long) &frame->tramp[0], | |
499 | (unsigned long) &frame->tramp[2]); | |
500 | } | |
501 | ||
502 | return 0; | |
503 | } | |
504 | ||
2b0a576d MN |
505 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
506 | /* | |
507 | * Save the current user registers on the user stack. | |
508 | * We only save the altivec/spe registers if the process has used | |
509 | * altivec/spe instructions at some point. | |
510 | * We also save the transactional registers to a second ucontext in the | |
511 | * frame. | |
512 | * | |
513 | * See save_user_regs() and signal_64.c:setup_tm_sigcontexts(). | |
514 | */ | |
515 | static int save_tm_user_regs(struct pt_regs *regs, | |
516 | struct mcontext __user *frame, | |
517 | struct mcontext __user *tm_frame, int sigret) | |
518 | { | |
519 | unsigned long msr = regs->msr; | |
520 | ||
d31626f7 PM |
521 | /* Remove TM bits from thread's MSR. The MSR in the sigcontext |
522 | * just indicates to userland that we were doing a transaction, but we | |
523 | * don't want to return in transactional state. This also ensures | |
524 | * that flush_fp_to_thread won't set TIF_RESTORE_TM again. | |
525 | */ | |
526 | regs->msr &= ~MSR_TS_MASK; | |
527 | ||
2b0a576d MN |
528 | /* Make sure floating point registers are stored in regs */ |
529 | flush_fp_to_thread(current); | |
530 | ||
531 | /* Save both sets of general registers */ | |
532 | if (save_general_regs(¤t->thread.ckpt_regs, frame) | |
533 | || save_general_regs(regs, tm_frame)) | |
534 | return 1; | |
535 | ||
536 | /* Stash the top half of the 64bit MSR into the 32bit MSR word | |
537 | * of the transactional mcontext. This way we have a backward-compatible | |
538 | * MSR in the 'normal' (checkpointed) mcontext and additionally one can | |
539 | * also look at what type of transaction (T or S) was active at the | |
540 | * time of the signal. | |
541 | */ | |
542 | if (__put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR])) | |
543 | return 1; | |
544 | ||
545 | #ifdef CONFIG_ALTIVEC | |
546 | /* save altivec registers */ | |
547 | if (current->thread.used_vr) { | |
548 | flush_altivec_to_thread(current); | |
de79f7b9 | 549 | if (__copy_to_user(&frame->mc_vregs, ¤t->thread.vr_state, |
2b0a576d MN |
550 | ELF_NVRREG * sizeof(vector128))) |
551 | return 1; | |
552 | if (msr & MSR_VEC) { | |
553 | if (__copy_to_user(&tm_frame->mc_vregs, | |
de79f7b9 | 554 | ¤t->thread.transact_vr, |
2b0a576d MN |
555 | ELF_NVRREG * sizeof(vector128))) |
556 | return 1; | |
557 | } else { | |
558 | if (__copy_to_user(&tm_frame->mc_vregs, | |
de79f7b9 | 559 | ¤t->thread.vr_state, |
2b0a576d MN |
560 | ELF_NVRREG * sizeof(vector128))) |
561 | return 1; | |
562 | } | |
563 | ||
564 | /* set MSR_VEC in the saved MSR value to indicate that | |
565 | * frame->mc_vregs contains valid data | |
566 | */ | |
567 | msr |= MSR_VEC; | |
568 | } | |
569 | ||
570 | /* We always copy to/from vrsave, it's 0 if we don't have or don't | |
571 | * use altivec. Since VSCR only contains 32 bits saved in the least | |
572 | * significant bits of a vector, we "cheat" and stuff VRSAVE in the | |
573 | * most significant bits of that same vector. --BenH | |
574 | */ | |
408a7e08 PM |
575 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
576 | current->thread.vrsave = mfspr(SPRN_VRSAVE); | |
2b0a576d MN |
577 | if (__put_user(current->thread.vrsave, |
578 | (u32 __user *)&frame->mc_vregs[32])) | |
579 | return 1; | |
580 | if (msr & MSR_VEC) { | |
581 | if (__put_user(current->thread.transact_vrsave, | |
582 | (u32 __user *)&tm_frame->mc_vregs[32])) | |
583 | return 1; | |
584 | } else { | |
585 | if (__put_user(current->thread.vrsave, | |
586 | (u32 __user *)&tm_frame->mc_vregs[32])) | |
587 | return 1; | |
588 | } | |
589 | #endif /* CONFIG_ALTIVEC */ | |
590 | ||
591 | if (copy_fpr_to_user(&frame->mc_fregs, current)) | |
592 | return 1; | |
593 | if (msr & MSR_FP) { | |
594 | if (copy_transact_fpr_to_user(&tm_frame->mc_fregs, current)) | |
595 | return 1; | |
596 | } else { | |
597 | if (copy_fpr_to_user(&tm_frame->mc_fregs, current)) | |
598 | return 1; | |
599 | } | |
600 | ||
601 | #ifdef CONFIG_VSX | |
602 | /* | |
603 | * Copy VSR 0-31 upper half from thread_struct to local | |
604 | * buffer, then write that to userspace. Also set MSR_VSX in | |
605 | * the saved MSR value to indicate that frame->mc_vregs | |
606 | * contains valid data | |
607 | */ | |
608 | if (current->thread.used_vsr) { | |
609 | __giveup_vsx(current); | |
610 | if (copy_vsx_to_user(&frame->mc_vsregs, current)) | |
611 | return 1; | |
612 | if (msr & MSR_VSX) { | |
613 | if (copy_transact_vsx_to_user(&tm_frame->mc_vsregs, | |
614 | current)) | |
615 | return 1; | |
616 | } else { | |
617 | if (copy_vsx_to_user(&tm_frame->mc_vsregs, current)) | |
618 | return 1; | |
619 | } | |
620 | ||
621 | msr |= MSR_VSX; | |
622 | } | |
623 | #endif /* CONFIG_VSX */ | |
624 | #ifdef CONFIG_SPE | |
625 | /* SPE regs are not checkpointed with TM, so this section is | |
626 | * simply the same as in save_user_regs(). | |
627 | */ | |
628 | if (current->thread.used_spe) { | |
629 | flush_spe_to_thread(current); | |
630 | if (__copy_to_user(&frame->mc_vregs, current->thread.evr, | |
631 | ELF_NEVRREG * sizeof(u32))) | |
632 | return 1; | |
633 | /* set MSR_SPE in the saved MSR value to indicate that | |
634 | * frame->mc_vregs contains valid data */ | |
635 | msr |= MSR_SPE; | |
636 | } | |
637 | ||
638 | /* We always copy to/from spefscr */ | |
639 | if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG)) | |
640 | return 1; | |
641 | #endif /* CONFIG_SPE */ | |
642 | ||
643 | if (__put_user(msr, &frame->mc_gregs[PT_MSR])) | |
644 | return 1; | |
645 | if (sigret) { | |
646 | /* Set up the sigreturn trampoline: li r0,sigret; sc */ | |
647 | if (__put_user(0x38000000UL + sigret, &frame->tramp[0]) | |
648 | || __put_user(0x44000002UL, &frame->tramp[1])) | |
649 | return 1; | |
650 | flush_icache_range((unsigned long) &frame->tramp[0], | |
651 | (unsigned long) &frame->tramp[2]); | |
652 | } | |
653 | ||
654 | return 0; | |
655 | } | |
656 | #endif | |
657 | ||
1da177e4 LT |
658 | /* |
659 | * Restore the current user register values from the user stack, | |
660 | * (except for MSR). | |
661 | */ | |
662 | static long restore_user_regs(struct pt_regs *regs, | |
81e7009e | 663 | struct mcontext __user *sr, int sig) |
1da177e4 | 664 | { |
81e7009e | 665 | long err; |
1da177e4 | 666 | unsigned int save_r2 = 0; |
1da177e4 | 667 | unsigned long msr; |
c6e6771b | 668 | #ifdef CONFIG_VSX |
c6e6771b MN |
669 | int i; |
670 | #endif | |
1da177e4 LT |
671 | |
672 | /* | |
673 | * restore general registers but not including MSR or SOFTE. Also | |
674 | * take care of keeping r2 (TLS) intact if not a signal | |
675 | */ | |
676 | if (!sig) | |
677 | save_r2 = (unsigned int)regs->gpr[2]; | |
81e7009e | 678 | err = restore_general_regs(regs, sr); |
9a81c16b | 679 | regs->trap = 0; |
fab5db97 | 680 | err |= __get_user(msr, &sr->mc_gregs[PT_MSR]); |
1da177e4 LT |
681 | if (!sig) |
682 | regs->gpr[2] = (unsigned long) save_r2; | |
683 | if (err) | |
684 | return 1; | |
685 | ||
fab5db97 PM |
686 | /* if doing signal return, restore the previous little-endian mode */ |
687 | if (sig) | |
688 | regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); | |
689 | ||
5388fb10 PM |
690 | /* |
691 | * Do this before updating the thread state in | |
692 | * current->thread.fpr/vr/evr. That way, if we get preempted | |
693 | * and another task grabs the FPU/Altivec/SPE, it won't be | |
694 | * tempted to save the current CPU state into the thread_struct | |
695 | * and corrupt what we are writing there. | |
696 | */ | |
697 | discard_lazy_cpu_state(); | |
698 | ||
1da177e4 | 699 | #ifdef CONFIG_ALTIVEC |
c6e6771b MN |
700 | /* |
701 | * Force the process to reload the altivec registers from | |
702 | * current->thread when it next does altivec instructions | |
703 | */ | |
1da177e4 | 704 | regs->msr &= ~MSR_VEC; |
fab5db97 | 705 | if (msr & MSR_VEC) { |
1da177e4 | 706 | /* restore altivec registers from the stack */ |
de79f7b9 | 707 | if (__copy_from_user(¤t->thread.vr_state, &sr->mc_vregs, |
1da177e4 LT |
708 | sizeof(sr->mc_vregs))) |
709 | return 1; | |
710 | } else if (current->thread.used_vr) | |
de79f7b9 PM |
711 | memset(¤t->thread.vr_state, 0, |
712 | ELF_NVRREG * sizeof(vector128)); | |
1da177e4 LT |
713 | |
714 | /* Always get VRSAVE back */ | |
715 | if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32])) | |
716 | return 1; | |
408a7e08 PM |
717 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
718 | mtspr(SPRN_VRSAVE, current->thread.vrsave); | |
1da177e4 | 719 | #endif /* CONFIG_ALTIVEC */ |
6a274c08 MN |
720 | if (copy_fpr_from_user(current, &sr->mc_fregs)) |
721 | return 1; | |
1da177e4 | 722 | |
c6e6771b | 723 | #ifdef CONFIG_VSX |
ce48b210 MN |
724 | /* |
725 | * Force the process to reload the VSX registers from | |
726 | * current->thread when it next does VSX instruction. | |
727 | */ | |
728 | regs->msr &= ~MSR_VSX; | |
729 | if (msr & MSR_VSX) { | |
730 | /* | |
731 | * Restore altivec registers from the stack to a local | |
732 | * buffer, then write this out to the thread_struct | |
733 | */ | |
6a274c08 | 734 | if (copy_vsx_from_user(current, &sr->mc_vsregs)) |
ce48b210 | 735 | return 1; |
ce48b210 MN |
736 | } else if (current->thread.used_vsr) |
737 | for (i = 0; i < 32 ; i++) | |
de79f7b9 | 738 | current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
c6e6771b MN |
739 | #endif /* CONFIG_VSX */ |
740 | /* | |
741 | * force the process to reload the FP registers from | |
742 | * current->thread when it next does FP instructions | |
743 | */ | |
744 | regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1); | |
745 | ||
81e7009e SR |
746 | #ifdef CONFIG_SPE |
747 | /* force the process to reload the spe registers from | |
748 | current->thread when it next does spe instructions */ | |
749 | regs->msr &= ~MSR_SPE; | |
fab5db97 | 750 | if (msr & MSR_SPE) { |
81e7009e SR |
751 | /* restore spe registers from the stack */ |
752 | if (__copy_from_user(current->thread.evr, &sr->mc_vregs, | |
753 | ELF_NEVRREG * sizeof(u32))) | |
754 | return 1; | |
755 | } else if (current->thread.used_spe) | |
756 | memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32)); | |
757 | ||
758 | /* Always get SPEFSCR back */ | |
759 | if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs + ELF_NEVRREG)) | |
760 | return 1; | |
761 | #endif /* CONFIG_SPE */ | |
762 | ||
1da177e4 LT |
763 | return 0; |
764 | } | |
765 | ||
2b0a576d MN |
766 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
767 | /* | |
768 | * Restore the current user register values from the user stack, except for | |
769 | * MSR, and recheckpoint the original checkpointed register state for processes | |
770 | * in transactions. | |
771 | */ | |
772 | static long restore_tm_user_regs(struct pt_regs *regs, | |
773 | struct mcontext __user *sr, | |
774 | struct mcontext __user *tm_sr) | |
775 | { | |
776 | long err; | |
2c27a18f | 777 | unsigned long msr, msr_hi; |
2b0a576d MN |
778 | #ifdef CONFIG_VSX |
779 | int i; | |
780 | #endif | |
781 | ||
782 | /* | |
783 | * restore general registers but not including MSR or SOFTE. Also | |
784 | * take care of keeping r2 (TLS) intact if not a signal. | |
785 | * See comment in signal_64.c:restore_tm_sigcontexts(); | |
786 | * TFHAR is restored from the checkpointed NIP; TEXASR and TFIAR | |
787 | * were set by the signal delivery. | |
788 | */ | |
789 | err = restore_general_regs(regs, tm_sr); | |
790 | err |= restore_general_regs(¤t->thread.ckpt_regs, sr); | |
791 | ||
792 | err |= __get_user(current->thread.tm_tfhar, &sr->mc_gregs[PT_NIP]); | |
793 | ||
794 | err |= __get_user(msr, &sr->mc_gregs[PT_MSR]); | |
795 | if (err) | |
796 | return 1; | |
797 | ||
798 | /* Restore the previous little-endian mode */ | |
799 | regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); | |
800 | ||
801 | /* | |
802 | * Do this before updating the thread state in | |
803 | * current->thread.fpr/vr/evr. That way, if we get preempted | |
804 | * and another task grabs the FPU/Altivec/SPE, it won't be | |
805 | * tempted to save the current CPU state into the thread_struct | |
806 | * and corrupt what we are writing there. | |
807 | */ | |
808 | discard_lazy_cpu_state(); | |
809 | ||
810 | #ifdef CONFIG_ALTIVEC | |
811 | regs->msr &= ~MSR_VEC; | |
812 | if (msr & MSR_VEC) { | |
813 | /* restore altivec registers from the stack */ | |
de79f7b9 | 814 | if (__copy_from_user(¤t->thread.vr_state, &sr->mc_vregs, |
2b0a576d | 815 | sizeof(sr->mc_vregs)) || |
de79f7b9 | 816 | __copy_from_user(¤t->thread.transact_vr, |
2b0a576d MN |
817 | &tm_sr->mc_vregs, |
818 | sizeof(sr->mc_vregs))) | |
819 | return 1; | |
820 | } else if (current->thread.used_vr) { | |
de79f7b9 PM |
821 | memset(¤t->thread.vr_state, 0, |
822 | ELF_NVRREG * sizeof(vector128)); | |
823 | memset(¤t->thread.transact_vr, 0, | |
2b0a576d MN |
824 | ELF_NVRREG * sizeof(vector128)); |
825 | } | |
826 | ||
827 | /* Always get VRSAVE back */ | |
828 | if (__get_user(current->thread.vrsave, | |
829 | (u32 __user *)&sr->mc_vregs[32]) || | |
830 | __get_user(current->thread.transact_vrsave, | |
831 | (u32 __user *)&tm_sr->mc_vregs[32])) | |
832 | return 1; | |
408a7e08 PM |
833 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
834 | mtspr(SPRN_VRSAVE, current->thread.vrsave); | |
2b0a576d MN |
835 | #endif /* CONFIG_ALTIVEC */ |
836 | ||
837 | regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1); | |
838 | ||
839 | if (copy_fpr_from_user(current, &sr->mc_fregs) || | |
840 | copy_transact_fpr_from_user(current, &tm_sr->mc_fregs)) | |
841 | return 1; | |
842 | ||
843 | #ifdef CONFIG_VSX | |
844 | regs->msr &= ~MSR_VSX; | |
845 | if (msr & MSR_VSX) { | |
846 | /* | |
847 | * Restore altivec registers from the stack to a local | |
848 | * buffer, then write this out to the thread_struct | |
849 | */ | |
850 | if (copy_vsx_from_user(current, &sr->mc_vsregs) || | |
851 | copy_transact_vsx_from_user(current, &tm_sr->mc_vsregs)) | |
852 | return 1; | |
853 | } else if (current->thread.used_vsr) | |
854 | for (i = 0; i < 32 ; i++) { | |
de79f7b9 PM |
855 | current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
856 | current->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = 0; | |
2b0a576d MN |
857 | } |
858 | #endif /* CONFIG_VSX */ | |
859 | ||
860 | #ifdef CONFIG_SPE | |
861 | /* SPE regs are not checkpointed with TM, so this section is | |
862 | * simply the same as in restore_user_regs(). | |
863 | */ | |
864 | regs->msr &= ~MSR_SPE; | |
865 | if (msr & MSR_SPE) { | |
866 | if (__copy_from_user(current->thread.evr, &sr->mc_vregs, | |
867 | ELF_NEVRREG * sizeof(u32))) | |
868 | return 1; | |
869 | } else if (current->thread.used_spe) | |
870 | memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32)); | |
871 | ||
872 | /* Always get SPEFSCR back */ | |
873 | if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs | |
874 | + ELF_NEVRREG)) | |
875 | return 1; | |
876 | #endif /* CONFIG_SPE */ | |
877 | ||
878 | /* Now, recheckpoint. This loads up all of the checkpointed (older) | |
879 | * registers, including FP and V[S]Rs. After recheckpointing, the | |
880 | * transactional versions should be loaded. | |
881 | */ | |
882 | tm_enable(); | |
e6b8fd02 MN |
883 | /* Make sure the transaction is marked as failed */ |
884 | current->thread.tm_texasr |= TEXASR_FS; | |
2b0a576d MN |
885 | /* This loads the checkpointed FP/VEC state, if used */ |
886 | tm_recheckpoint(¤t->thread, msr); | |
2c27a18f MN |
887 | /* Get the top half of the MSR */ |
888 | if (__get_user(msr_hi, &tm_sr->mc_gregs[PT_MSR])) | |
889 | return 1; | |
890 | /* Pull in MSR TM from user context */ | |
891 | regs->msr = (regs->msr & ~MSR_TS_MASK) | ((msr_hi<<32) & MSR_TS_MASK); | |
2b0a576d MN |
892 | |
893 | /* This loads the speculative FP/VEC state, if used */ | |
894 | if (msr & MSR_FP) { | |
895 | do_load_up_transact_fpu(¤t->thread); | |
896 | regs->msr |= (MSR_FP | current->thread.fpexc_mode); | |
897 | } | |
f110c0c1 | 898 | #ifdef CONFIG_ALTIVEC |
2b0a576d MN |
899 | if (msr & MSR_VEC) { |
900 | do_load_up_transact_altivec(¤t->thread); | |
901 | regs->msr |= MSR_VEC; | |
902 | } | |
f110c0c1 | 903 | #endif |
2b0a576d MN |
904 | |
905 | return 0; | |
906 | } | |
907 | #endif | |
908 | ||
81e7009e | 909 | #ifdef CONFIG_PPC64 |
ce395960 | 910 | int copy_siginfo_to_user32(struct compat_siginfo __user *d, const siginfo_t *s) |
1da177e4 LT |
911 | { |
912 | int err; | |
913 | ||
914 | if (!access_ok (VERIFY_WRITE, d, sizeof(*d))) | |
915 | return -EFAULT; | |
916 | ||
917 | /* If you change siginfo_t structure, please be sure | |
918 | * this code is fixed accordingly. | |
919 | * It should never copy any pad contained in the structure | |
920 | * to avoid security leaks, but must copy the generic | |
921 | * 3 ints plus the relevant union member. | |
922 | * This routine must convert siginfo from 64bit to 32bit as well | |
923 | * at the same time. | |
924 | */ | |
925 | err = __put_user(s->si_signo, &d->si_signo); | |
926 | err |= __put_user(s->si_errno, &d->si_errno); | |
927 | err |= __put_user((short)s->si_code, &d->si_code); | |
928 | if (s->si_code < 0) | |
929 | err |= __copy_to_user(&d->_sifields._pad, &s->_sifields._pad, | |
930 | SI_PAD_SIZE32); | |
931 | else switch(s->si_code >> 16) { | |
932 | case __SI_CHLD >> 16: | |
933 | err |= __put_user(s->si_pid, &d->si_pid); | |
934 | err |= __put_user(s->si_uid, &d->si_uid); | |
935 | err |= __put_user(s->si_utime, &d->si_utime); | |
936 | err |= __put_user(s->si_stime, &d->si_stime); | |
937 | err |= __put_user(s->si_status, &d->si_status); | |
938 | break; | |
939 | case __SI_FAULT >> 16: | |
940 | err |= __put_user((unsigned int)(unsigned long)s->si_addr, | |
941 | &d->si_addr); | |
942 | break; | |
943 | case __SI_POLL >> 16: | |
944 | err |= __put_user(s->si_band, &d->si_band); | |
945 | err |= __put_user(s->si_fd, &d->si_fd); | |
946 | break; | |
947 | case __SI_TIMER >> 16: | |
948 | err |= __put_user(s->si_tid, &d->si_tid); | |
949 | err |= __put_user(s->si_overrun, &d->si_overrun); | |
950 | err |= __put_user(s->si_int, &d->si_int); | |
951 | break; | |
1b60bab0 ME |
952 | case __SI_SYS >> 16: |
953 | err |= __put_user(ptr_to_compat(s->si_call_addr), &d->si_call_addr); | |
954 | err |= __put_user(s->si_syscall, &d->si_syscall); | |
955 | err |= __put_user(s->si_arch, &d->si_arch); | |
956 | break; | |
1da177e4 LT |
957 | case __SI_RT >> 16: /* This is not generated by the kernel as of now. */ |
958 | case __SI_MESGQ >> 16: | |
959 | err |= __put_user(s->si_int, &d->si_int); | |
960 | /* fallthrough */ | |
961 | case __SI_KILL >> 16: | |
962 | default: | |
963 | err |= __put_user(s->si_pid, &d->si_pid); | |
964 | err |= __put_user(s->si_uid, &d->si_uid); | |
965 | break; | |
966 | } | |
967 | return err; | |
968 | } | |
969 | ||
81e7009e SR |
970 | #define copy_siginfo_to_user copy_siginfo_to_user32 |
971 | ||
9c0c44db RM |
972 | int copy_siginfo_from_user32(siginfo_t *to, struct compat_siginfo __user *from) |
973 | { | |
9c0c44db RM |
974 | if (copy_from_user(to, from, 3*sizeof(int)) || |
975 | copy_from_user(to->_sifields._pad, | |
976 | from->_sifields._pad, SI_PAD_SIZE32)) | |
977 | return -EFAULT; | |
978 | ||
979 | return 0; | |
980 | } | |
81e7009e | 981 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 982 | |
1da177e4 LT |
983 | /* |
984 | * Set up a signal frame for a "real-time" signal handler | |
985 | * (one which gets siginfo). | |
986 | */ | |
129b69df RW |
987 | int handle_rt_signal32(struct ksignal *ksig, sigset_t *oldset, |
988 | struct pt_regs *regs) | |
1da177e4 | 989 | { |
81e7009e SR |
990 | struct rt_sigframe __user *rt_sf; |
991 | struct mcontext __user *frame; | |
1d25f11f | 992 | struct mcontext __user *tm_frame = NULL; |
d0c3d534 | 993 | void __user *addr; |
a3f61dc0 | 994 | unsigned long newsp = 0; |
2b0a576d MN |
995 | int sigret; |
996 | unsigned long tramp; | |
1da177e4 LT |
997 | |
998 | /* Set up Signal Frame */ | |
999 | /* Put a Real Time Context onto stack */ | |
059ade65 | 1000 | rt_sf = get_sigframe(ksig, get_tm_stackpointer(regs), sizeof(*rt_sf), 1); |
d0c3d534 | 1001 | addr = rt_sf; |
a3f61dc0 | 1002 | if (unlikely(rt_sf == NULL)) |
1da177e4 LT |
1003 | goto badframe; |
1004 | ||
1da177e4 | 1005 | /* Put the siginfo & fill in most of the ucontext */ |
129b69df | 1006 | if (copy_siginfo_to_user(&rt_sf->info, &ksig->info) |
1da177e4 | 1007 | || __put_user(0, &rt_sf->uc.uc_flags) |
7cce2465 | 1008 | || __save_altstack(&rt_sf->uc.uc_stack, regs->gpr[1]) |
81e7009e SR |
1009 | || __put_user(to_user_ptr(&rt_sf->uc.uc_mcontext), |
1010 | &rt_sf->uc.uc_regs) | |
1011 | || put_sigset_t(&rt_sf->uc.uc_sigmask, oldset)) | |
1da177e4 LT |
1012 | goto badframe; |
1013 | ||
1014 | /* Save user registers on the stack */ | |
1015 | frame = &rt_sf->uc.uc_mcontext; | |
d0c3d534 | 1016 | addr = frame; |
a5bba930 | 1017 | if (vdso32_rt_sigtramp && current->mm->context.vdso_base) { |
2b0a576d MN |
1018 | sigret = 0; |
1019 | tramp = current->mm->context.vdso_base + vdso32_rt_sigtramp; | |
a7f290da | 1020 | } else { |
2b0a576d MN |
1021 | sigret = __NR_rt_sigreturn; |
1022 | tramp = (unsigned long) frame->tramp; | |
1023 | } | |
1024 | ||
1025 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | |
1d25f11f | 1026 | tm_frame = &rt_sf->uc_transact.uc_mcontext; |
2b0a576d | 1027 | if (MSR_TM_ACTIVE(regs->msr)) { |
d765ff23 PM |
1028 | if (__put_user((unsigned long)&rt_sf->uc_transact, |
1029 | &rt_sf->uc.uc_link) || | |
1030 | __put_user((unsigned long)tm_frame, | |
1031 | &rt_sf->uc_transact.uc_regs)) | |
1032 | goto badframe; | |
1d25f11f | 1033 | if (save_tm_user_regs(regs, frame, tm_frame, sigret)) |
1da177e4 | 1034 | goto badframe; |
1da177e4 | 1035 | } |
2b0a576d MN |
1036 | else |
1037 | #endif | |
1d25f11f | 1038 | { |
d765ff23 PM |
1039 | if (__put_user(0, &rt_sf->uc.uc_link)) |
1040 | goto badframe; | |
1d25f11f | 1041 | if (save_user_regs(regs, frame, tm_frame, sigret, 1)) |
2b0a576d | 1042 | goto badframe; |
1d25f11f | 1043 | } |
2b0a576d MN |
1044 | regs->link = tramp; |
1045 | ||
de79f7b9 | 1046 | current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */ |
cc657f53 | 1047 | |
a3f61dc0 BH |
1048 | /* create a stack frame for the caller of the handler */ |
1049 | newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16); | |
d0c3d534 | 1050 | addr = (void __user *)regs->gpr[1]; |
e2b55306 | 1051 | if (put_user(regs->gpr[1], (u32 __user *)newsp)) |
81e7009e | 1052 | goto badframe; |
a3f61dc0 BH |
1053 | |
1054 | /* Fill registers for signal handler */ | |
81e7009e | 1055 | regs->gpr[1] = newsp; |
129b69df | 1056 | regs->gpr[3] = ksig->sig; |
1da177e4 LT |
1057 | regs->gpr[4] = (unsigned long) &rt_sf->info; |
1058 | regs->gpr[5] = (unsigned long) &rt_sf->uc; | |
1059 | regs->gpr[6] = (unsigned long) rt_sf; | |
129b69df | 1060 | regs->nip = (unsigned long) ksig->ka.sa.sa_handler; |
e871c6bb | 1061 | /* enter the signal handler in native-endian mode */ |
fab5db97 | 1062 | regs->msr &= ~MSR_LE; |
e871c6bb | 1063 | regs->msr |= (MSR_KERNEL & MSR_LE); |
129b69df | 1064 | return 0; |
1da177e4 LT |
1065 | |
1066 | badframe: | |
76462232 CD |
1067 | if (show_unhandled_signals) |
1068 | printk_ratelimited(KERN_INFO | |
1069 | "%s[%d]: bad frame in handle_rt_signal32: " | |
1070 | "%p nip %08lx lr %08lx\n", | |
1071 | current->comm, current->pid, | |
1072 | addr, regs->nip, regs->link); | |
d0c3d534 | 1073 | |
129b69df | 1074 | return 1; |
1da177e4 LT |
1075 | } |
1076 | ||
81e7009e | 1077 | static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig) |
1da177e4 | 1078 | { |
1da177e4 | 1079 | sigset_t set; |
81e7009e SR |
1080 | struct mcontext __user *mcp; |
1081 | ||
1082 | if (get_sigset_t(&set, &ucp->uc_sigmask)) | |
1083 | return -EFAULT; | |
1084 | #ifdef CONFIG_PPC64 | |
1085 | { | |
1086 | u32 cmcp; | |
1da177e4 | 1087 | |
81e7009e SR |
1088 | if (__get_user(cmcp, &ucp->uc_regs)) |
1089 | return -EFAULT; | |
1090 | mcp = (struct mcontext __user *)(u64)cmcp; | |
7c85d1f9 | 1091 | /* no need to check access_ok(mcp), since mcp < 4GB */ |
81e7009e SR |
1092 | } |
1093 | #else | |
1094 | if (__get_user(mcp, &ucp->uc_regs)) | |
1da177e4 | 1095 | return -EFAULT; |
7c85d1f9 PM |
1096 | if (!access_ok(VERIFY_READ, mcp, sizeof(*mcp))) |
1097 | return -EFAULT; | |
81e7009e | 1098 | #endif |
17440f17 | 1099 | set_current_blocked(&set); |
81e7009e | 1100 | if (restore_user_regs(regs, mcp, sig)) |
1da177e4 LT |
1101 | return -EFAULT; |
1102 | ||
1103 | return 0; | |
1104 | } | |
1105 | ||
2b0a576d MN |
1106 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1107 | static int do_setcontext_tm(struct ucontext __user *ucp, | |
1108 | struct ucontext __user *tm_ucp, | |
1109 | struct pt_regs *regs) | |
1110 | { | |
1111 | sigset_t set; | |
1112 | struct mcontext __user *mcp; | |
1113 | struct mcontext __user *tm_mcp; | |
1114 | u32 cmcp; | |
1115 | u32 tm_cmcp; | |
1116 | ||
1117 | if (get_sigset_t(&set, &ucp->uc_sigmask)) | |
1118 | return -EFAULT; | |
1119 | ||
1120 | if (__get_user(cmcp, &ucp->uc_regs) || | |
1121 | __get_user(tm_cmcp, &tm_ucp->uc_regs)) | |
1122 | return -EFAULT; | |
1123 | mcp = (struct mcontext __user *)(u64)cmcp; | |
1124 | tm_mcp = (struct mcontext __user *)(u64)tm_cmcp; | |
1125 | /* no need to check access_ok(mcp), since mcp < 4GB */ | |
1126 | ||
1127 | set_current_blocked(&set); | |
1128 | if (restore_tm_user_regs(regs, mcp, tm_mcp)) | |
1129 | return -EFAULT; | |
1130 | ||
1131 | return 0; | |
1132 | } | |
1133 | #endif | |
1134 | ||
81e7009e | 1135 | long sys_swapcontext(struct ucontext __user *old_ctx, |
1bd79336 PM |
1136 | struct ucontext __user *new_ctx, |
1137 | int ctx_size, int r6, int r7, int r8, struct pt_regs *regs) | |
1da177e4 LT |
1138 | { |
1139 | unsigned char tmp; | |
16c29d18 | 1140 | int ctx_has_vsx_region = 0; |
1da177e4 | 1141 | |
c1cb299e MN |
1142 | #ifdef CONFIG_PPC64 |
1143 | unsigned long new_msr = 0; | |
1144 | ||
77eb50ae AS |
1145 | if (new_ctx) { |
1146 | struct mcontext __user *mcp; | |
1147 | u32 cmcp; | |
1148 | ||
1149 | /* | |
1150 | * Get pointer to the real mcontext. No need for | |
1151 | * access_ok since we are dealing with compat | |
1152 | * pointers. | |
1153 | */ | |
1154 | if (__get_user(cmcp, &new_ctx->uc_regs)) | |
1155 | return -EFAULT; | |
1156 | mcp = (struct mcontext __user *)(u64)cmcp; | |
1157 | if (__get_user(new_msr, &mcp->mc_gregs[PT_MSR])) | |
1158 | return -EFAULT; | |
1159 | } | |
c1cb299e MN |
1160 | /* |
1161 | * Check that the context is not smaller than the original | |
1162 | * size (with VMX but without VSX) | |
1163 | */ | |
1164 | if (ctx_size < UCONTEXTSIZEWITHOUTVSX) | |
1165 | return -EINVAL; | |
1166 | /* | |
1167 | * If the new context state sets the MSR VSX bits but | |
1168 | * it doesn't provide VSX state. | |
1169 | */ | |
1170 | if ((ctx_size < sizeof(struct ucontext)) && | |
1171 | (new_msr & MSR_VSX)) | |
1172 | return -EINVAL; | |
16c29d18 MN |
1173 | /* Does the context have enough room to store VSX data? */ |
1174 | if (ctx_size >= sizeof(struct ucontext)) | |
1175 | ctx_has_vsx_region = 1; | |
c1cb299e | 1176 | #else |
1da177e4 LT |
1177 | /* Context size is for future use. Right now, we only make sure |
1178 | * we are passed something we understand | |
1179 | */ | |
81e7009e | 1180 | if (ctx_size < sizeof(struct ucontext)) |
1da177e4 | 1181 | return -EINVAL; |
c1cb299e | 1182 | #endif |
1da177e4 | 1183 | if (old_ctx != NULL) { |
1c9bb1a0 PM |
1184 | struct mcontext __user *mctx; |
1185 | ||
1186 | /* | |
1187 | * old_ctx might not be 16-byte aligned, in which | |
1188 | * case old_ctx->uc_mcontext won't be either. | |
1189 | * Because we have the old_ctx->uc_pad2 field | |
1190 | * before old_ctx->uc_mcontext, we need to round down | |
1191 | * from &old_ctx->uc_mcontext to a 16-byte boundary. | |
1192 | */ | |
1193 | mctx = (struct mcontext __user *) | |
1194 | ((unsigned long) &old_ctx->uc_mcontext & ~0xfUL); | |
16c29d18 | 1195 | if (!access_ok(VERIFY_WRITE, old_ctx, ctx_size) |
1d25f11f | 1196 | || save_user_regs(regs, mctx, NULL, 0, ctx_has_vsx_region) |
81e7009e | 1197 | || put_sigset_t(&old_ctx->uc_sigmask, ¤t->blocked) |
1c9bb1a0 | 1198 | || __put_user(to_user_ptr(mctx), &old_ctx->uc_regs)) |
1da177e4 LT |
1199 | return -EFAULT; |
1200 | } | |
1201 | if (new_ctx == NULL) | |
1202 | return 0; | |
16c29d18 | 1203 | if (!access_ok(VERIFY_READ, new_ctx, ctx_size) |
1da177e4 | 1204 | || __get_user(tmp, (u8 __user *) new_ctx) |
16c29d18 | 1205 | || __get_user(tmp, (u8 __user *) new_ctx + ctx_size - 1)) |
1da177e4 LT |
1206 | return -EFAULT; |
1207 | ||
1208 | /* | |
1209 | * If we get a fault copying the context into the kernel's | |
1210 | * image of the user's registers, we can't just return -EFAULT | |
1211 | * because the user's registers will be corrupted. For instance | |
1212 | * the NIP value may have been updated but not some of the | |
1213 | * other registers. Given that we have done the access_ok | |
1214 | * and successfully read the first and last bytes of the region | |
1215 | * above, this should only happen in an out-of-memory situation | |
1216 | * or if another thread unmaps the region containing the context. | |
1217 | * We kill the task with a SIGSEGV in this situation. | |
1218 | */ | |
81e7009e | 1219 | if (do_setcontext(new_ctx, regs, 0)) |
1da177e4 | 1220 | do_exit(SIGSEGV); |
401d1f02 DW |
1221 | |
1222 | set_thread_flag(TIF_RESTOREALL); | |
1da177e4 LT |
1223 | return 0; |
1224 | } | |
1225 | ||
81e7009e | 1226 | long sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8, |
1da177e4 LT |
1227 | struct pt_regs *regs) |
1228 | { | |
81e7009e | 1229 | struct rt_sigframe __user *rt_sf; |
2b0a576d MN |
1230 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1231 | struct ucontext __user *uc_transact; | |
1232 | unsigned long msr_hi; | |
1233 | unsigned long tmp; | |
1234 | int tm_restore = 0; | |
1235 | #endif | |
1da177e4 | 1236 | /* Always make any pending restarted system calls return -EINTR */ |
f56141e3 | 1237 | current->restart_block.fn = do_no_restart_syscall; |
1da177e4 | 1238 | |
81e7009e SR |
1239 | rt_sf = (struct rt_sigframe __user *) |
1240 | (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16); | |
1da177e4 LT |
1241 | if (!access_ok(VERIFY_READ, rt_sf, sizeof(*rt_sf))) |
1242 | goto bad; | |
2b0a576d MN |
1243 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1244 | if (__get_user(tmp, &rt_sf->uc.uc_link)) | |
1245 | goto bad; | |
1246 | uc_transact = (struct ucontext __user *)(uintptr_t)tmp; | |
1247 | if (uc_transact) { | |
1248 | u32 cmcp; | |
1249 | struct mcontext __user *mcp; | |
1250 | ||
1251 | if (__get_user(cmcp, &uc_transact->uc_regs)) | |
1252 | return -EFAULT; | |
1253 | mcp = (struct mcontext __user *)(u64)cmcp; | |
1254 | /* The top 32 bits of the MSR are stashed in the transactional | |
1255 | * ucontext. */ | |
1256 | if (__get_user(msr_hi, &mcp->mc_gregs[PT_MSR])) | |
1257 | goto bad; | |
1258 | ||
55e43418 | 1259 | if (MSR_TM_ACTIVE(msr_hi<<32)) { |
2b0a576d MN |
1260 | /* We only recheckpoint on return if we're |
1261 | * transaction. | |
1262 | */ | |
1263 | tm_restore = 1; | |
1264 | if (do_setcontext_tm(&rt_sf->uc, uc_transact, regs)) | |
1265 | goto bad; | |
1266 | } | |
1267 | } | |
1268 | if (!tm_restore) | |
1269 | /* Fall through, for non-TM restore */ | |
1270 | #endif | |
81e7009e | 1271 | if (do_setcontext(&rt_sf->uc, regs, 1)) |
1da177e4 LT |
1272 | goto bad; |
1273 | ||
1274 | /* | |
1275 | * It's not clear whether or why it is desirable to save the | |
1276 | * sigaltstack setting on signal delivery and restore it on | |
1277 | * signal return. But other architectures do this and we have | |
1278 | * always done it up until now so it is probably better not to | |
1279 | * change it. -- paulus | |
81e7009e SR |
1280 | */ |
1281 | #ifdef CONFIG_PPC64 | |
7cce2465 AV |
1282 | if (compat_restore_altstack(&rt_sf->uc.uc_stack)) |
1283 | goto bad; | |
81e7009e | 1284 | #else |
7cce2465 AV |
1285 | if (restore_altstack(&rt_sf->uc.uc_stack)) |
1286 | goto bad; | |
81e7009e | 1287 | #endif |
401d1f02 DW |
1288 | set_thread_flag(TIF_RESTOREALL); |
1289 | return 0; | |
1da177e4 LT |
1290 | |
1291 | bad: | |
76462232 CD |
1292 | if (show_unhandled_signals) |
1293 | printk_ratelimited(KERN_INFO | |
1294 | "%s[%d]: bad frame in sys_rt_sigreturn: " | |
1295 | "%p nip %08lx lr %08lx\n", | |
1296 | current->comm, current->pid, | |
1297 | rt_sf, regs->nip, regs->link); | |
d0c3d534 | 1298 | |
1da177e4 LT |
1299 | force_sig(SIGSEGV, current); |
1300 | return 0; | |
1301 | } | |
1302 | ||
81e7009e SR |
1303 | #ifdef CONFIG_PPC32 |
1304 | int sys_debug_setcontext(struct ucontext __user *ctx, | |
1305 | int ndbg, struct sig_dbg_op __user *dbg, | |
1306 | int r6, int r7, int r8, | |
1307 | struct pt_regs *regs) | |
1308 | { | |
1309 | struct sig_dbg_op op; | |
1310 | int i; | |
7c85d1f9 | 1311 | unsigned char tmp; |
81e7009e | 1312 | unsigned long new_msr = regs->msr; |
172ae2e7 | 1313 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
51ae8d4a | 1314 | unsigned long new_dbcr0 = current->thread.debug.dbcr0; |
81e7009e SR |
1315 | #endif |
1316 | ||
1317 | for (i=0; i<ndbg; i++) { | |
7c85d1f9 | 1318 | if (copy_from_user(&op, dbg + i, sizeof(op))) |
81e7009e SR |
1319 | return -EFAULT; |
1320 | switch (op.dbg_type) { | |
1321 | case SIG_DBG_SINGLE_STEPPING: | |
172ae2e7 | 1322 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
81e7009e SR |
1323 | if (op.dbg_value) { |
1324 | new_msr |= MSR_DE; | |
1325 | new_dbcr0 |= (DBCR0_IDM | DBCR0_IC); | |
1326 | } else { | |
3bffb652 DK |
1327 | new_dbcr0 &= ~DBCR0_IC; |
1328 | if (!DBCR_ACTIVE_EVENTS(new_dbcr0, | |
51ae8d4a | 1329 | current->thread.debug.dbcr1)) { |
3bffb652 DK |
1330 | new_msr &= ~MSR_DE; |
1331 | new_dbcr0 &= ~DBCR0_IDM; | |
1332 | } | |
81e7009e SR |
1333 | } |
1334 | #else | |
1335 | if (op.dbg_value) | |
1336 | new_msr |= MSR_SE; | |
1337 | else | |
1338 | new_msr &= ~MSR_SE; | |
1339 | #endif | |
1340 | break; | |
1341 | case SIG_DBG_BRANCH_TRACING: | |
172ae2e7 | 1342 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
81e7009e SR |
1343 | return -EINVAL; |
1344 | #else | |
1345 | if (op.dbg_value) | |
1346 | new_msr |= MSR_BE; | |
1347 | else | |
1348 | new_msr &= ~MSR_BE; | |
1349 | #endif | |
1350 | break; | |
1351 | ||
1352 | default: | |
1353 | return -EINVAL; | |
1354 | } | |
1355 | } | |
1356 | ||
1357 | /* We wait until here to actually install the values in the | |
1358 | registers so if we fail in the above loop, it will not | |
1359 | affect the contents of these registers. After this point, | |
1360 | failure is a problem, anyway, and it's very unlikely unless | |
1361 | the user is really doing something wrong. */ | |
1362 | regs->msr = new_msr; | |
172ae2e7 | 1363 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
51ae8d4a | 1364 | current->thread.debug.dbcr0 = new_dbcr0; |
81e7009e SR |
1365 | #endif |
1366 | ||
7c85d1f9 PM |
1367 | if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx)) |
1368 | || __get_user(tmp, (u8 __user *) ctx) | |
1369 | || __get_user(tmp, (u8 __user *) (ctx + 1) - 1)) | |
1370 | return -EFAULT; | |
1371 | ||
81e7009e SR |
1372 | /* |
1373 | * If we get a fault copying the context into the kernel's | |
1374 | * image of the user's registers, we can't just return -EFAULT | |
1375 | * because the user's registers will be corrupted. For instance | |
1376 | * the NIP value may have been updated but not some of the | |
1377 | * other registers. Given that we have done the access_ok | |
1378 | * and successfully read the first and last bytes of the region | |
1379 | * above, this should only happen in an out-of-memory situation | |
1380 | * or if another thread unmaps the region containing the context. | |
1381 | * We kill the task with a SIGSEGV in this situation. | |
1382 | */ | |
1383 | if (do_setcontext(ctx, regs, 1)) { | |
76462232 CD |
1384 | if (show_unhandled_signals) |
1385 | printk_ratelimited(KERN_INFO "%s[%d]: bad frame in " | |
1386 | "sys_debug_setcontext: %p nip %08lx " | |
1387 | "lr %08lx\n", | |
1388 | current->comm, current->pid, | |
1389 | ctx, regs->nip, regs->link); | |
d0c3d534 | 1390 | |
81e7009e SR |
1391 | force_sig(SIGSEGV, current); |
1392 | goto out; | |
1393 | } | |
1394 | ||
1395 | /* | |
1396 | * It's not clear whether or why it is desirable to save the | |
1397 | * sigaltstack setting on signal delivery and restore it on | |
1398 | * signal return. But other architectures do this and we have | |
1399 | * always done it up until now so it is probably better not to | |
1400 | * change it. -- paulus | |
1401 | */ | |
7cce2465 | 1402 | restore_altstack(&ctx->uc_stack); |
81e7009e | 1403 | |
401d1f02 | 1404 | set_thread_flag(TIF_RESTOREALL); |
81e7009e SR |
1405 | out: |
1406 | return 0; | |
1407 | } | |
1408 | #endif | |
1da177e4 LT |
1409 | |
1410 | /* | |
1411 | * OK, we're invoking a handler | |
1412 | */ | |
129b69df | 1413 | int handle_signal32(struct ksignal *ksig, sigset_t *oldset, struct pt_regs *regs) |
1da177e4 | 1414 | { |
81e7009e | 1415 | struct sigcontext __user *sc; |
a3f61dc0 | 1416 | struct sigframe __user *frame; |
1d25f11f | 1417 | struct mcontext __user *tm_mctx = NULL; |
a3f61dc0 | 1418 | unsigned long newsp = 0; |
2b0a576d MN |
1419 | int sigret; |
1420 | unsigned long tramp; | |
1da177e4 LT |
1421 | |
1422 | /* Set up Signal Frame */ | |
059ade65 | 1423 | frame = get_sigframe(ksig, get_tm_stackpointer(regs), sizeof(*frame), 1); |
a3f61dc0 | 1424 | if (unlikely(frame == NULL)) |
1da177e4 | 1425 | goto badframe; |
a3f61dc0 | 1426 | sc = (struct sigcontext __user *) &frame->sctx; |
1da177e4 LT |
1427 | |
1428 | #if _NSIG != 64 | |
81e7009e | 1429 | #error "Please adjust handle_signal()" |
1da177e4 | 1430 | #endif |
129b69df | 1431 | if (__put_user(to_user_ptr(ksig->ka.sa.sa_handler), &sc->handler) |
1da177e4 | 1432 | || __put_user(oldset->sig[0], &sc->oldmask) |
81e7009e | 1433 | #ifdef CONFIG_PPC64 |
1da177e4 | 1434 | || __put_user((oldset->sig[0] >> 32), &sc->_unused[3]) |
81e7009e SR |
1435 | #else |
1436 | || __put_user(oldset->sig[1], &sc->_unused[3]) | |
1437 | #endif | |
a3f61dc0 | 1438 | || __put_user(to_user_ptr(&frame->mctx), &sc->regs) |
129b69df | 1439 | || __put_user(ksig->sig, &sc->signal)) |
1da177e4 LT |
1440 | goto badframe; |
1441 | ||
a5bba930 | 1442 | if (vdso32_sigtramp && current->mm->context.vdso_base) { |
2b0a576d MN |
1443 | sigret = 0; |
1444 | tramp = current->mm->context.vdso_base + vdso32_sigtramp; | |
a7f290da | 1445 | } else { |
2b0a576d MN |
1446 | sigret = __NR_sigreturn; |
1447 | tramp = (unsigned long) frame->mctx.tramp; | |
1448 | } | |
1449 | ||
1450 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | |
1d25f11f | 1451 | tm_mctx = &frame->mctx_transact; |
2b0a576d MN |
1452 | if (MSR_TM_ACTIVE(regs->msr)) { |
1453 | if (save_tm_user_regs(regs, &frame->mctx, &frame->mctx_transact, | |
1454 | sigret)) | |
1da177e4 | 1455 | goto badframe; |
1da177e4 | 1456 | } |
2b0a576d MN |
1457 | else |
1458 | #endif | |
1d25f11f MN |
1459 | { |
1460 | if (save_user_regs(regs, &frame->mctx, tm_mctx, sigret, 1)) | |
2b0a576d | 1461 | goto badframe; |
1d25f11f | 1462 | } |
2b0a576d MN |
1463 | |
1464 | regs->link = tramp; | |
1da177e4 | 1465 | |
de79f7b9 | 1466 | current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */ |
cc657f53 | 1467 | |
a3f61dc0 BH |
1468 | /* create a stack frame for the caller of the handler */ |
1469 | newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE; | |
9747dd6f | 1470 | if (put_user(regs->gpr[1], (u32 __user *)newsp)) |
1da177e4 | 1471 | goto badframe; |
a3f61dc0 | 1472 | |
81e7009e | 1473 | regs->gpr[1] = newsp; |
129b69df | 1474 | regs->gpr[3] = ksig->sig; |
1da177e4 | 1475 | regs->gpr[4] = (unsigned long) sc; |
129b69df | 1476 | regs->nip = (unsigned long) (unsigned long)ksig->ka.sa.sa_handler; |
fab5db97 PM |
1477 | /* enter the signal handler in big-endian mode */ |
1478 | regs->msr &= ~MSR_LE; | |
129b69df | 1479 | return 0; |
1da177e4 LT |
1480 | |
1481 | badframe: | |
76462232 CD |
1482 | if (show_unhandled_signals) |
1483 | printk_ratelimited(KERN_INFO | |
1484 | "%s[%d]: bad frame in handle_signal32: " | |
1485 | "%p nip %08lx lr %08lx\n", | |
1486 | current->comm, current->pid, | |
1487 | frame, regs->nip, regs->link); | |
d0c3d534 | 1488 | |
129b69df | 1489 | return 1; |
1da177e4 LT |
1490 | } |
1491 | ||
1492 | /* | |
1493 | * Do a signal return; undo the signal stack. | |
1494 | */ | |
81e7009e | 1495 | long sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8, |
1da177e4 LT |
1496 | struct pt_regs *regs) |
1497 | { | |
fee55450 | 1498 | struct sigframe __user *sf; |
81e7009e SR |
1499 | struct sigcontext __user *sc; |
1500 | struct sigcontext sigctx; | |
1501 | struct mcontext __user *sr; | |
d0c3d534 | 1502 | void __user *addr; |
1da177e4 | 1503 | sigset_t set; |
fee55450 MN |
1504 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1505 | struct mcontext __user *mcp, *tm_mcp; | |
1506 | unsigned long msr_hi; | |
1507 | #endif | |
1da177e4 LT |
1508 | |
1509 | /* Always make any pending restarted system calls return -EINTR */ | |
f56141e3 | 1510 | current->restart_block.fn = do_no_restart_syscall; |
1da177e4 | 1511 | |
fee55450 MN |
1512 | sf = (struct sigframe __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE); |
1513 | sc = &sf->sctx; | |
d0c3d534 | 1514 | addr = sc; |
1da177e4 LT |
1515 | if (copy_from_user(&sigctx, sc, sizeof(sigctx))) |
1516 | goto badframe; | |
1517 | ||
81e7009e | 1518 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
1519 | /* |
1520 | * Note that PPC32 puts the upper 32 bits of the sigmask in the | |
1521 | * unused part of the signal stackframe | |
1522 | */ | |
1523 | set.sig[0] = sigctx.oldmask + ((long)(sigctx._unused[3]) << 32); | |
81e7009e SR |
1524 | #else |
1525 | set.sig[0] = sigctx.oldmask; | |
1526 | set.sig[1] = sigctx._unused[3]; | |
1527 | #endif | |
17440f17 | 1528 | set_current_blocked(&set); |
1da177e4 | 1529 | |
fee55450 MN |
1530 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1531 | mcp = (struct mcontext __user *)&sf->mctx; | |
1532 | tm_mcp = (struct mcontext __user *)&sf->mctx_transact; | |
1533 | if (__get_user(msr_hi, &tm_mcp->mc_gregs[PT_MSR])) | |
1da177e4 | 1534 | goto badframe; |
fee55450 MN |
1535 | if (MSR_TM_ACTIVE(msr_hi<<32)) { |
1536 | if (!cpu_has_feature(CPU_FTR_TM)) | |
1537 | goto badframe; | |
1538 | if (restore_tm_user_regs(regs, mcp, tm_mcp)) | |
1539 | goto badframe; | |
1540 | } else | |
1541 | #endif | |
1542 | { | |
1543 | sr = (struct mcontext __user *)from_user_ptr(sigctx.regs); | |
1544 | addr = sr; | |
1545 | if (!access_ok(VERIFY_READ, sr, sizeof(*sr)) | |
1546 | || restore_user_regs(regs, sr, 1)) | |
1547 | goto badframe; | |
1548 | } | |
1da177e4 | 1549 | |
401d1f02 | 1550 | set_thread_flag(TIF_RESTOREALL); |
81e7009e | 1551 | return 0; |
1da177e4 LT |
1552 | |
1553 | badframe: | |
76462232 CD |
1554 | if (show_unhandled_signals) |
1555 | printk_ratelimited(KERN_INFO | |
1556 | "%s[%d]: bad frame in sys_sigreturn: " | |
1557 | "%p nip %08lx lr %08lx\n", | |
1558 | current->comm, current->pid, | |
1559 | addr, regs->nip, regs->link); | |
d0c3d534 | 1560 | |
1da177e4 LT |
1561 | force_sig(SIGSEGV, current); |
1562 | return 0; | |
1563 | } |