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powerpc/ptrace: Fix cppcheck issue in gpr32_set_common/gpr32_get_common()
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1da177e4 1/*
81e7009e 2 * Signal handling for 32bit PPC and 32bit tasks on 64bit PPC
1da177e4 3 *
81e7009e
SR
4 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
1da177e4
LT
6 * Copyright (C) 2001 IBM
7 * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
9 *
81e7009e
SR
10 * Derived from "arch/i386/kernel/signal.c"
11 * Copyright (C) 1991, 1992 Linus Torvalds
12 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
1da177e4 13 *
81e7009e
SR
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version
17 * 2 of the License, or (at your option) any later version.
1da177e4
LT
18 */
19
1da177e4 20#include <linux/sched.h>
81e7009e 21#include <linux/mm.h>
1da177e4 22#include <linux/smp.h>
1da177e4
LT
23#include <linux/kernel.h>
24#include <linux/signal.h>
1da177e4
LT
25#include <linux/errno.h>
26#include <linux/elf.h>
05ead015 27#include <linux/ptrace.h>
76462232 28#include <linux/ratelimit.h>
81e7009e
SR
29#ifdef CONFIG_PPC64
30#include <linux/syscalls.h>
1da177e4 31#include <linux/compat.h>
81e7009e
SR
32#else
33#include <linux/wait.h>
81e7009e
SR
34#include <linux/unistd.h>
35#include <linux/stddef.h>
36#include <linux/tty.h>
37#include <linux/binfmts.h>
81e7009e
SR
38#endif
39
1da177e4 40#include <asm/uaccess.h>
81e7009e 41#include <asm/cacheflush.h>
a7f31841 42#include <asm/syscalls.h>
c5ff7001 43#include <asm/sigcontext.h>
a7f290da 44#include <asm/vdso.h>
ae3a197e 45#include <asm/switch_to.h>
2b0a576d 46#include <asm/tm.h>
0545d543 47#include <asm/asm-prototypes.h>
81e7009e 48#ifdef CONFIG_PPC64
879168ee 49#include "ppc32.h"
1da177e4 50#include <asm/unistd.h>
81e7009e
SR
51#else
52#include <asm/ucontext.h>
53#include <asm/pgtable.h>
54#endif
1da177e4 55
22e38f29
BH
56#include "signal.h"
57
1da177e4 58
81e7009e 59#ifdef CONFIG_PPC64
b09a4913 60#define sys_rt_sigreturn compat_sys_rt_sigreturn
b09a4913
SR
61#define sys_swapcontext compat_sys_swapcontext
62#define sys_sigreturn compat_sys_sigreturn
81e7009e
SR
63
64#define old_sigaction old_sigaction32
65#define sigcontext sigcontext32
66#define mcontext mcontext32
67#define ucontext ucontext32
68
7cce2465
AV
69#define __save_altstack __compat_save_altstack
70
c1cb299e
MN
71/*
72 * Userspace code may pass a ucontext which doesn't include VSX added
73 * at the end. We need to check for this case.
74 */
75#define UCONTEXTSIZEWITHOUTVSX \
76 (sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32))
77
81e7009e
SR
78/*
79 * Returning 0 means we return to userspace via
80 * ret_from_except and thus restore all user
81 * registers from *regs. This is what we need
82 * to do when a signal has been delivered.
83 */
81e7009e
SR
84
85#define GP_REGS_SIZE min(sizeof(elf_gregset_t32), sizeof(struct pt_regs32))
86#undef __SIGNAL_FRAMESIZE
87#define __SIGNAL_FRAMESIZE __SIGNAL_FRAMESIZE32
88#undef ELF_NVRREG
89#define ELF_NVRREG ELF_NVRREG32
90
91/*
92 * Functions for flipping sigsets (thanks to brain dead generic
93 * implementation that makes things simple for little endian only)
94 */
95static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
96{
97 compat_sigset_t cset;
98
99 switch (_NSIG_WORDS) {
a313f4c5 100 case 4: cset.sig[6] = set->sig[3] & 0xffffffffull;
81e7009e
SR
101 cset.sig[7] = set->sig[3] >> 32;
102 case 3: cset.sig[4] = set->sig[2] & 0xffffffffull;
103 cset.sig[5] = set->sig[2] >> 32;
104 case 2: cset.sig[2] = set->sig[1] & 0xffffffffull;
105 cset.sig[3] = set->sig[1] >> 32;
106 case 1: cset.sig[0] = set->sig[0] & 0xffffffffull;
107 cset.sig[1] = set->sig[0] >> 32;
108 }
109 return copy_to_user(uset, &cset, sizeof(*uset));
110}
111
9b7cf8b4
PM
112static inline int get_sigset_t(sigset_t *set,
113 const compat_sigset_t __user *uset)
81e7009e
SR
114{
115 compat_sigset_t s32;
116
117 if (copy_from_user(&s32, uset, sizeof(*uset)))
118 return -EFAULT;
119
120 /*
121 * Swap the 2 words of the 64-bit sigset_t (they are stored
122 * in the "wrong" endian in 32-bit user storage).
123 */
124 switch (_NSIG_WORDS) {
125 case 4: set->sig[3] = s32.sig[6] | (((long)s32.sig[7]) << 32);
126 case 3: set->sig[2] = s32.sig[4] | (((long)s32.sig[5]) << 32);
127 case 2: set->sig[1] = s32.sig[2] | (((long)s32.sig[3]) << 32);
128 case 1: set->sig[0] = s32.sig[0] | (((long)s32.sig[1]) << 32);
129 }
130 return 0;
131}
132
29e646df 133#define to_user_ptr(p) ptr_to_compat(p)
81e7009e
SR
134#define from_user_ptr(p) compat_ptr(p)
135
136static inline int save_general_regs(struct pt_regs *regs,
137 struct mcontext __user *frame)
138{
139 elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
140 int i;
141
1bd79336 142 WARN_ON(!FULL_REGS(regs));
401d1f02
DW
143
144 for (i = 0; i <= PT_RESULT; i ++) {
145 if (i == 14 && !FULL_REGS(regs))
146 i = 32;
81e7009e
SR
147 if (__put_user((unsigned int)gregs[i], &frame->mc_gregs[i]))
148 return -EFAULT;
401d1f02 149 }
81e7009e
SR
150 return 0;
151}
152
153static inline int restore_general_regs(struct pt_regs *regs,
154 struct mcontext __user *sr)
155{
156 elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
157 int i;
158
159 for (i = 0; i <= PT_RESULT; i++) {
160 if ((i == PT_MSR) || (i == PT_SOFTE))
161 continue;
162 if (__get_user(gregs[i], &sr->mc_gregs[i]))
163 return -EFAULT;
164 }
165 return 0;
166}
167
168#else /* CONFIG_PPC64 */
169
81e7009e
SR
170#define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
171
172static inline int put_sigset_t(sigset_t __user *uset, sigset_t *set)
173{
174 return copy_to_user(uset, set, sizeof(*uset));
175}
176
9b7cf8b4 177static inline int get_sigset_t(sigset_t *set, const sigset_t __user *uset)
81e7009e
SR
178{
179 return copy_from_user(set, uset, sizeof(*uset));
180}
181
29e646df
AV
182#define to_user_ptr(p) ((unsigned long)(p))
183#define from_user_ptr(p) ((void __user *)(p))
81e7009e
SR
184
185static inline int save_general_regs(struct pt_regs *regs,
186 struct mcontext __user *frame)
187{
1bd79336 188 WARN_ON(!FULL_REGS(regs));
81e7009e
SR
189 return __copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE);
190}
191
192static inline int restore_general_regs(struct pt_regs *regs,
193 struct mcontext __user *sr)
194{
195 /* copy up to but not including MSR */
196 if (__copy_from_user(regs, &sr->mc_gregs,
197 PT_MSR * sizeof(elf_greg_t)))
198 return -EFAULT;
199 /* copy from orig_r3 (the word after the MSR) up to the end */
200 if (__copy_from_user(&regs->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3],
201 GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t)))
202 return -EFAULT;
203 return 0;
204}
81e7009e
SR
205#endif
206
1da177e4
LT
207/*
208 * When we have signals to deliver, we set up on the
209 * user stack, going down from the original stack pointer:
a3f61dc0
BH
210 * an ABI gap of 56 words
211 * an mcontext struct
81e7009e
SR
212 * a sigcontext struct
213 * a gap of __SIGNAL_FRAMESIZE bytes
1da177e4 214 *
a3f61dc0
BH
215 * Each of these things must be a multiple of 16 bytes in size. The following
216 * structure represent all of this except the __SIGNAL_FRAMESIZE gap
1da177e4
LT
217 *
218 */
a3f61dc0
BH
219struct sigframe {
220 struct sigcontext sctx; /* the sigcontext */
81e7009e 221 struct mcontext mctx; /* all the register values */
2b0a576d
MN
222#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
223 struct sigcontext sctx_transact;
224 struct mcontext mctx_transact;
225#endif
1da177e4
LT
226 /*
227 * Programs using the rs6000/xcoff abi can save up to 19 gp
228 * regs and 18 fp regs below sp before decrementing it.
229 */
230 int abigap[56];
231};
232
233/* We use the mc_pad field for the signal return trampoline. */
234#define tramp mc_pad
235
236/*
237 * When we have rt signals to deliver, we set up on the
238 * user stack, going down from the original stack pointer:
81e7009e
SR
239 * one rt_sigframe struct (siginfo + ucontext + ABI gap)
240 * a gap of __SIGNAL_FRAMESIZE+16 bytes
241 * (the +16 is to get the siginfo and ucontext in the same
1da177e4
LT
242 * positions as in older kernels).
243 *
244 * Each of these things must be a multiple of 16 bytes in size.
245 *
246 */
81e7009e
SR
247struct rt_sigframe {
248#ifdef CONFIG_PPC64
249 compat_siginfo_t info;
250#else
251 struct siginfo info;
252#endif
253 struct ucontext uc;
2b0a576d
MN
254#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
255 struct ucontext uc_transact;
256#endif
1da177e4
LT
257 /*
258 * Programs using the rs6000/xcoff abi can save up to 19 gp
259 * regs and 18 fp regs below sp before decrementing it.
260 */
261 int abigap[56];
262};
263
6a274c08
MN
264#ifdef CONFIG_VSX
265unsigned long copy_fpr_to_user(void __user *to,
266 struct task_struct *task)
267{
de79f7b9 268 u64 buf[ELF_NFPREG];
6a274c08
MN
269 int i;
270
271 /* save FPR copy to local buffer then write to the thread_struct */
272 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
273 buf[i] = task->thread.TS_FPR(i);
de79f7b9 274 buf[i] = task->thread.fp_state.fpscr;
6a274c08
MN
275 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
276}
277
278unsigned long copy_fpr_from_user(struct task_struct *task,
279 void __user *from)
280{
de79f7b9 281 u64 buf[ELF_NFPREG];
6a274c08
MN
282 int i;
283
284 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
285 return 1;
286 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
287 task->thread.TS_FPR(i) = buf[i];
de79f7b9 288 task->thread.fp_state.fpscr = buf[i];
6a274c08
MN
289
290 return 0;
291}
292
293unsigned long copy_vsx_to_user(void __user *to,
294 struct task_struct *task)
295{
de79f7b9 296 u64 buf[ELF_NVSRHALFREG];
6a274c08
MN
297 int i;
298
299 /* save FPR copy to local buffer then write to the thread_struct */
300 for (i = 0; i < ELF_NVSRHALFREG; i++)
de79f7b9 301 buf[i] = task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
6a274c08
MN
302 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
303}
304
305unsigned long copy_vsx_from_user(struct task_struct *task,
306 void __user *from)
307{
de79f7b9 308 u64 buf[ELF_NVSRHALFREG];
6a274c08
MN
309 int i;
310
311 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
312 return 1;
313 for (i = 0; i < ELF_NVSRHALFREG ; i++)
de79f7b9 314 task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
6a274c08
MN
315 return 0;
316}
2b0a576d
MN
317
318#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
319unsigned long copy_transact_fpr_to_user(void __user *to,
320 struct task_struct *task)
321{
de79f7b9 322 u64 buf[ELF_NFPREG];
2b0a576d
MN
323 int i;
324
325 /* save FPR copy to local buffer then write to the thread_struct */
326 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
327 buf[i] = task->thread.TS_TRANS_FPR(i);
de79f7b9 328 buf[i] = task->thread.transact_fp.fpscr;
2b0a576d
MN
329 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
330}
331
332unsigned long copy_transact_fpr_from_user(struct task_struct *task,
333 void __user *from)
334{
de79f7b9 335 u64 buf[ELF_NFPREG];
2b0a576d
MN
336 int i;
337
338 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
339 return 1;
340 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
341 task->thread.TS_TRANS_FPR(i) = buf[i];
de79f7b9 342 task->thread.transact_fp.fpscr = buf[i];
2b0a576d
MN
343
344 return 0;
345}
346
347unsigned long copy_transact_vsx_to_user(void __user *to,
348 struct task_struct *task)
349{
de79f7b9 350 u64 buf[ELF_NVSRHALFREG];
2b0a576d
MN
351 int i;
352
353 /* save FPR copy to local buffer then write to the thread_struct */
354 for (i = 0; i < ELF_NVSRHALFREG; i++)
de79f7b9 355 buf[i] = task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET];
2b0a576d
MN
356 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
357}
358
359unsigned long copy_transact_vsx_from_user(struct task_struct *task,
360 void __user *from)
361{
de79f7b9 362 u64 buf[ELF_NVSRHALFREG];
2b0a576d
MN
363 int i;
364
365 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
366 return 1;
367 for (i = 0; i < ELF_NVSRHALFREG ; i++)
de79f7b9 368 task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = buf[i];
2b0a576d
MN
369 return 0;
370}
371#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
6a274c08
MN
372#else
373inline unsigned long copy_fpr_to_user(void __user *to,
374 struct task_struct *task)
375{
de79f7b9 376 return __copy_to_user(to, task->thread.fp_state.fpr,
6a274c08
MN
377 ELF_NFPREG * sizeof(double));
378}
379
380inline unsigned long copy_fpr_from_user(struct task_struct *task,
381 void __user *from)
382{
de79f7b9 383 return __copy_from_user(task->thread.fp_state.fpr, from,
6a274c08
MN
384 ELF_NFPREG * sizeof(double));
385}
2b0a576d
MN
386
387#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
388inline unsigned long copy_transact_fpr_to_user(void __user *to,
389 struct task_struct *task)
390{
de79f7b9 391 return __copy_to_user(to, task->thread.transact_fp.fpr,
2b0a576d
MN
392 ELF_NFPREG * sizeof(double));
393}
394
395inline unsigned long copy_transact_fpr_from_user(struct task_struct *task,
396 void __user *from)
397{
de79f7b9 398 return __copy_from_user(task->thread.transact_fp.fpr, from,
2b0a576d
MN
399 ELF_NFPREG * sizeof(double));
400}
401#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
6a274c08
MN
402#endif
403
1da177e4
LT
404/*
405 * Save the current user registers on the user stack.
81e7009e
SR
406 * We only save the altivec/spe registers if the process has used
407 * altivec/spe instructions at some point.
1da177e4 408 */
81e7009e 409static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
1d25f11f
MN
410 struct mcontext __user *tm_frame, int sigret,
411 int ctx_has_vsx_region)
1da177e4 412{
9e751186
MN
413 unsigned long msr = regs->msr;
414
1da177e4
LT
415 /* Make sure floating point registers are stored in regs */
416 flush_fp_to_thread(current);
417
c6e6771b
MN
418 /* save general registers */
419 if (save_general_regs(regs, frame))
1da177e4
LT
420 return 1;
421
1da177e4
LT
422#ifdef CONFIG_ALTIVEC
423 /* save altivec registers */
424 if (current->thread.used_vr) {
425 flush_altivec_to_thread(current);
de79f7b9 426 if (__copy_to_user(&frame->mc_vregs, &current->thread.vr_state,
81e7009e 427 ELF_NVRREG * sizeof(vector128)))
1da177e4
LT
428 return 1;
429 /* set MSR_VEC in the saved MSR value to indicate that
430 frame->mc_vregs contains valid data */
9e751186 431 msr |= MSR_VEC;
1da177e4
LT
432 }
433 /* else assert((regs->msr & MSR_VEC) == 0) */
434
435 /* We always copy to/from vrsave, it's 0 if we don't have or don't
436 * use altivec. Since VSCR only contains 32 bits saved in the least
437 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
438 * most significant bits of that same vector. --BenH
408a7e08 439 * Note that the current VRSAVE value is in the SPR at this point.
1da177e4 440 */
408a7e08
PM
441 if (cpu_has_feature(CPU_FTR_ALTIVEC))
442 current->thread.vrsave = mfspr(SPRN_VRSAVE);
1da177e4
LT
443 if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32]))
444 return 1;
445#endif /* CONFIG_ALTIVEC */
6a274c08 446 if (copy_fpr_to_user(&frame->mc_fregs, current))
c6e6771b 447 return 1;
ec67ad82
MN
448
449 /*
450 * Clear the MSR VSX bit to indicate there is no valid state attached
451 * to this context, except in the specific case below where we set it.
452 */
453 msr &= ~MSR_VSX;
6a274c08 454#ifdef CONFIG_VSX
ce48b210
MN
455 /*
456 * Copy VSR 0-31 upper half from thread_struct to local
457 * buffer, then write that to userspace. Also set MSR_VSX in
458 * the saved MSR value to indicate that frame->mc_vregs
459 * contains valid data
460 */
16c29d18 461 if (current->thread.used_vsr && ctx_has_vsx_region) {
a7d623d4 462 flush_vsx_to_thread(current);
6a274c08 463 if (copy_vsx_to_user(&frame->mc_vsregs, current))
ce48b210
MN
464 return 1;
465 msr |= MSR_VSX;
ec67ad82 466 }
c6e6771b 467#endif /* CONFIG_VSX */
81e7009e
SR
468#ifdef CONFIG_SPE
469 /* save spe registers */
470 if (current->thread.used_spe) {
471 flush_spe_to_thread(current);
472 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
473 ELF_NEVRREG * sizeof(u32)))
474 return 1;
475 /* set MSR_SPE in the saved MSR value to indicate that
476 frame->mc_vregs contains valid data */
9e751186 477 msr |= MSR_SPE;
81e7009e
SR
478 }
479 /* else assert((regs->msr & MSR_SPE) == 0) */
480
481 /* We always copy to/from spefscr */
482 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
483 return 1;
484#endif /* CONFIG_SPE */
485
9e751186
MN
486 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
487 return 1;
1d25f11f
MN
488 /* We need to write 0 the MSR top 32 bits in the tm frame so that we
489 * can check it on the restore to see if TM is active
490 */
491 if (tm_frame && __put_user(0, &tm_frame->mc_gregs[PT_MSR]))
492 return 1;
493
1da177e4
LT
494 if (sigret) {
495 /* Set up the sigreturn trampoline: li r0,sigret; sc */
496 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
497 || __put_user(0x44000002UL, &frame->tramp[1]))
498 return 1;
499 flush_icache_range((unsigned long) &frame->tramp[0],
500 (unsigned long) &frame->tramp[2]);
501 }
502
503 return 0;
504}
505
2b0a576d
MN
506#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
507/*
508 * Save the current user registers on the user stack.
509 * We only save the altivec/spe registers if the process has used
510 * altivec/spe instructions at some point.
511 * We also save the transactional registers to a second ucontext in the
512 * frame.
513 *
514 * See save_user_regs() and signal_64.c:setup_tm_sigcontexts().
515 */
516static int save_tm_user_regs(struct pt_regs *regs,
517 struct mcontext __user *frame,
518 struct mcontext __user *tm_frame, int sigret)
519{
520 unsigned long msr = regs->msr;
521
d31626f7
PM
522 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
523 * just indicates to userland that we were doing a transaction, but we
524 * don't want to return in transactional state. This also ensures
525 * that flush_fp_to_thread won't set TIF_RESTORE_TM again.
526 */
527 regs->msr &= ~MSR_TS_MASK;
528
2b0a576d
MN
529 /* Make sure floating point registers are stored in regs */
530 flush_fp_to_thread(current);
531
532 /* Save both sets of general registers */
533 if (save_general_regs(&current->thread.ckpt_regs, frame)
534 || save_general_regs(regs, tm_frame))
535 return 1;
536
537 /* Stash the top half of the 64bit MSR into the 32bit MSR word
538 * of the transactional mcontext. This way we have a backward-compatible
539 * MSR in the 'normal' (checkpointed) mcontext and additionally one can
540 * also look at what type of transaction (T or S) was active at the
541 * time of the signal.
542 */
543 if (__put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR]))
544 return 1;
545
546#ifdef CONFIG_ALTIVEC
547 /* save altivec registers */
548 if (current->thread.used_vr) {
549 flush_altivec_to_thread(current);
de79f7b9 550 if (__copy_to_user(&frame->mc_vregs, &current->thread.vr_state,
2b0a576d
MN
551 ELF_NVRREG * sizeof(vector128)))
552 return 1;
553 if (msr & MSR_VEC) {
554 if (__copy_to_user(&tm_frame->mc_vregs,
de79f7b9 555 &current->thread.transact_vr,
2b0a576d
MN
556 ELF_NVRREG * sizeof(vector128)))
557 return 1;
558 } else {
559 if (__copy_to_user(&tm_frame->mc_vregs,
de79f7b9 560 &current->thread.vr_state,
2b0a576d
MN
561 ELF_NVRREG * sizeof(vector128)))
562 return 1;
563 }
564
565 /* set MSR_VEC in the saved MSR value to indicate that
566 * frame->mc_vregs contains valid data
567 */
568 msr |= MSR_VEC;
569 }
570
571 /* We always copy to/from vrsave, it's 0 if we don't have or don't
572 * use altivec. Since VSCR only contains 32 bits saved in the least
573 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
574 * most significant bits of that same vector. --BenH
575 */
408a7e08
PM
576 if (cpu_has_feature(CPU_FTR_ALTIVEC))
577 current->thread.vrsave = mfspr(SPRN_VRSAVE);
2b0a576d
MN
578 if (__put_user(current->thread.vrsave,
579 (u32 __user *)&frame->mc_vregs[32]))
580 return 1;
581 if (msr & MSR_VEC) {
582 if (__put_user(current->thread.transact_vrsave,
583 (u32 __user *)&tm_frame->mc_vregs[32]))
584 return 1;
585 } else {
586 if (__put_user(current->thread.vrsave,
587 (u32 __user *)&tm_frame->mc_vregs[32]))
588 return 1;
589 }
590#endif /* CONFIG_ALTIVEC */
591
592 if (copy_fpr_to_user(&frame->mc_fregs, current))
593 return 1;
594 if (msr & MSR_FP) {
595 if (copy_transact_fpr_to_user(&tm_frame->mc_fregs, current))
596 return 1;
597 } else {
598 if (copy_fpr_to_user(&tm_frame->mc_fregs, current))
599 return 1;
600 }
601
602#ifdef CONFIG_VSX
603 /*
604 * Copy VSR 0-31 upper half from thread_struct to local
605 * buffer, then write that to userspace. Also set MSR_VSX in
606 * the saved MSR value to indicate that frame->mc_vregs
607 * contains valid data
608 */
609 if (current->thread.used_vsr) {
a7d623d4 610 flush_vsx_to_thread(current);
2b0a576d
MN
611 if (copy_vsx_to_user(&frame->mc_vsregs, current))
612 return 1;
613 if (msr & MSR_VSX) {
614 if (copy_transact_vsx_to_user(&tm_frame->mc_vsregs,
615 current))
616 return 1;
617 } else {
618 if (copy_vsx_to_user(&tm_frame->mc_vsregs, current))
619 return 1;
620 }
621
622 msr |= MSR_VSX;
623 }
624#endif /* CONFIG_VSX */
625#ifdef CONFIG_SPE
626 /* SPE regs are not checkpointed with TM, so this section is
627 * simply the same as in save_user_regs().
628 */
629 if (current->thread.used_spe) {
630 flush_spe_to_thread(current);
631 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
632 ELF_NEVRREG * sizeof(u32)))
633 return 1;
634 /* set MSR_SPE in the saved MSR value to indicate that
635 * frame->mc_vregs contains valid data */
636 msr |= MSR_SPE;
637 }
638
639 /* We always copy to/from spefscr */
640 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
641 return 1;
642#endif /* CONFIG_SPE */
643
644 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
645 return 1;
646 if (sigret) {
647 /* Set up the sigreturn trampoline: li r0,sigret; sc */
648 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
649 || __put_user(0x44000002UL, &frame->tramp[1]))
650 return 1;
651 flush_icache_range((unsigned long) &frame->tramp[0],
652 (unsigned long) &frame->tramp[2]);
653 }
654
655 return 0;
656}
657#endif
658
1da177e4
LT
659/*
660 * Restore the current user register values from the user stack,
661 * (except for MSR).
662 */
663static long restore_user_regs(struct pt_regs *regs,
81e7009e 664 struct mcontext __user *sr, int sig)
1da177e4 665{
81e7009e 666 long err;
1da177e4 667 unsigned int save_r2 = 0;
1da177e4 668 unsigned long msr;
c6e6771b 669#ifdef CONFIG_VSX
c6e6771b
MN
670 int i;
671#endif
1da177e4
LT
672
673 /*
674 * restore general registers but not including MSR or SOFTE. Also
675 * take care of keeping r2 (TLS) intact if not a signal
676 */
677 if (!sig)
678 save_r2 = (unsigned int)regs->gpr[2];
81e7009e 679 err = restore_general_regs(regs, sr);
9a81c16b 680 regs->trap = 0;
fab5db97 681 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
1da177e4
LT
682 if (!sig)
683 regs->gpr[2] = (unsigned long) save_r2;
684 if (err)
685 return 1;
686
fab5db97
PM
687 /* if doing signal return, restore the previous little-endian mode */
688 if (sig)
689 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
690
1da177e4 691#ifdef CONFIG_ALTIVEC
c6e6771b
MN
692 /*
693 * Force the process to reload the altivec registers from
694 * current->thread when it next does altivec instructions
695 */
1da177e4 696 regs->msr &= ~MSR_VEC;
fab5db97 697 if (msr & MSR_VEC) {
1da177e4 698 /* restore altivec registers from the stack */
de79f7b9 699 if (__copy_from_user(&current->thread.vr_state, &sr->mc_vregs,
1da177e4
LT
700 sizeof(sr->mc_vregs)))
701 return 1;
702 } else if (current->thread.used_vr)
de79f7b9
PM
703 memset(&current->thread.vr_state, 0,
704 ELF_NVRREG * sizeof(vector128));
1da177e4
LT
705
706 /* Always get VRSAVE back */
707 if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
708 return 1;
408a7e08
PM
709 if (cpu_has_feature(CPU_FTR_ALTIVEC))
710 mtspr(SPRN_VRSAVE, current->thread.vrsave);
1da177e4 711#endif /* CONFIG_ALTIVEC */
6a274c08
MN
712 if (copy_fpr_from_user(current, &sr->mc_fregs))
713 return 1;
1da177e4 714
c6e6771b 715#ifdef CONFIG_VSX
ce48b210
MN
716 /*
717 * Force the process to reload the VSX registers from
718 * current->thread when it next does VSX instruction.
719 */
720 regs->msr &= ~MSR_VSX;
721 if (msr & MSR_VSX) {
722 /*
723 * Restore altivec registers from the stack to a local
724 * buffer, then write this out to the thread_struct
725 */
6a274c08 726 if (copy_vsx_from_user(current, &sr->mc_vsregs))
ce48b210 727 return 1;
ce48b210
MN
728 } else if (current->thread.used_vsr)
729 for (i = 0; i < 32 ; i++)
de79f7b9 730 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
c6e6771b
MN
731#endif /* CONFIG_VSX */
732 /*
733 * force the process to reload the FP registers from
734 * current->thread when it next does FP instructions
735 */
736 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
737
81e7009e
SR
738#ifdef CONFIG_SPE
739 /* force the process to reload the spe registers from
740 current->thread when it next does spe instructions */
741 regs->msr &= ~MSR_SPE;
fab5db97 742 if (msr & MSR_SPE) {
81e7009e
SR
743 /* restore spe registers from the stack */
744 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
745 ELF_NEVRREG * sizeof(u32)))
746 return 1;
747 } else if (current->thread.used_spe)
748 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
749
750 /* Always get SPEFSCR back */
751 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs + ELF_NEVRREG))
752 return 1;
753#endif /* CONFIG_SPE */
754
1da177e4
LT
755 return 0;
756}
757
2b0a576d
MN
758#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
759/*
760 * Restore the current user register values from the user stack, except for
761 * MSR, and recheckpoint the original checkpointed register state for processes
762 * in transactions.
763 */
764static long restore_tm_user_regs(struct pt_regs *regs,
765 struct mcontext __user *sr,
766 struct mcontext __user *tm_sr)
767{
768 long err;
2c27a18f 769 unsigned long msr, msr_hi;
2b0a576d
MN
770#ifdef CONFIG_VSX
771 int i;
772#endif
773
774 /*
775 * restore general registers but not including MSR or SOFTE. Also
776 * take care of keeping r2 (TLS) intact if not a signal.
777 * See comment in signal_64.c:restore_tm_sigcontexts();
778 * TFHAR is restored from the checkpointed NIP; TEXASR and TFIAR
779 * were set by the signal delivery.
780 */
781 err = restore_general_regs(regs, tm_sr);
782 err |= restore_general_regs(&current->thread.ckpt_regs, sr);
783
784 err |= __get_user(current->thread.tm_tfhar, &sr->mc_gregs[PT_NIP]);
785
786 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
787 if (err)
788 return 1;
789
790 /* Restore the previous little-endian mode */
791 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
792
2b0a576d
MN
793#ifdef CONFIG_ALTIVEC
794 regs->msr &= ~MSR_VEC;
795 if (msr & MSR_VEC) {
796 /* restore altivec registers from the stack */
de79f7b9 797 if (__copy_from_user(&current->thread.vr_state, &sr->mc_vregs,
2b0a576d 798 sizeof(sr->mc_vregs)) ||
de79f7b9 799 __copy_from_user(&current->thread.transact_vr,
2b0a576d
MN
800 &tm_sr->mc_vregs,
801 sizeof(sr->mc_vregs)))
802 return 1;
803 } else if (current->thread.used_vr) {
de79f7b9
PM
804 memset(&current->thread.vr_state, 0,
805 ELF_NVRREG * sizeof(vector128));
806 memset(&current->thread.transact_vr, 0,
2b0a576d
MN
807 ELF_NVRREG * sizeof(vector128));
808 }
809
810 /* Always get VRSAVE back */
811 if (__get_user(current->thread.vrsave,
812 (u32 __user *)&sr->mc_vregs[32]) ||
813 __get_user(current->thread.transact_vrsave,
814 (u32 __user *)&tm_sr->mc_vregs[32]))
815 return 1;
408a7e08
PM
816 if (cpu_has_feature(CPU_FTR_ALTIVEC))
817 mtspr(SPRN_VRSAVE, current->thread.vrsave);
2b0a576d
MN
818#endif /* CONFIG_ALTIVEC */
819
820 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
821
822 if (copy_fpr_from_user(current, &sr->mc_fregs) ||
823 copy_transact_fpr_from_user(current, &tm_sr->mc_fregs))
824 return 1;
825
826#ifdef CONFIG_VSX
827 regs->msr &= ~MSR_VSX;
828 if (msr & MSR_VSX) {
829 /*
830 * Restore altivec registers from the stack to a local
831 * buffer, then write this out to the thread_struct
832 */
833 if (copy_vsx_from_user(current, &sr->mc_vsregs) ||
834 copy_transact_vsx_from_user(current, &tm_sr->mc_vsregs))
835 return 1;
836 } else if (current->thread.used_vsr)
837 for (i = 0; i < 32 ; i++) {
de79f7b9
PM
838 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
839 current->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = 0;
2b0a576d
MN
840 }
841#endif /* CONFIG_VSX */
842
843#ifdef CONFIG_SPE
844 /* SPE regs are not checkpointed with TM, so this section is
845 * simply the same as in restore_user_regs().
846 */
847 regs->msr &= ~MSR_SPE;
848 if (msr & MSR_SPE) {
849 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
850 ELF_NEVRREG * sizeof(u32)))
851 return 1;
852 } else if (current->thread.used_spe)
853 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
854
855 /* Always get SPEFSCR back */
856 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs
857 + ELF_NEVRREG))
858 return 1;
859#endif /* CONFIG_SPE */
860
d2b9d2a5
MN
861 /* Get the top half of the MSR from the user context */
862 if (__get_user(msr_hi, &tm_sr->mc_gregs[PT_MSR]))
863 return 1;
864 msr_hi <<= 32;
865 /* If TM bits are set to the reserved value, it's an invalid context */
866 if (MSR_TM_RESV(msr_hi))
867 return 1;
868 /* Pull in the MSR TM bits from the user context */
869 regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr_hi & MSR_TS_MASK);
2b0a576d
MN
870 /* Now, recheckpoint. This loads up all of the checkpointed (older)
871 * registers, including FP and V[S]Rs. After recheckpointing, the
872 * transactional versions should be loaded.
873 */
874 tm_enable();
e6b8fd02
MN
875 /* Make sure the transaction is marked as failed */
876 current->thread.tm_texasr |= TEXASR_FS;
2b0a576d
MN
877 /* This loads the checkpointed FP/VEC state, if used */
878 tm_recheckpoint(&current->thread, msr);
2b0a576d
MN
879
880 /* This loads the speculative FP/VEC state, if used */
881 if (msr & MSR_FP) {
882 do_load_up_transact_fpu(&current->thread);
883 regs->msr |= (MSR_FP | current->thread.fpexc_mode);
884 }
f110c0c1 885#ifdef CONFIG_ALTIVEC
2b0a576d
MN
886 if (msr & MSR_VEC) {
887 do_load_up_transact_altivec(&current->thread);
888 regs->msr |= MSR_VEC;
889 }
f110c0c1 890#endif
2b0a576d
MN
891
892 return 0;
893}
894#endif
895
81e7009e 896#ifdef CONFIG_PPC64
ce395960 897int copy_siginfo_to_user32(struct compat_siginfo __user *d, const siginfo_t *s)
1da177e4
LT
898{
899 int err;
900
901 if (!access_ok (VERIFY_WRITE, d, sizeof(*d)))
902 return -EFAULT;
903
904 /* If you change siginfo_t structure, please be sure
905 * this code is fixed accordingly.
906 * It should never copy any pad contained in the structure
907 * to avoid security leaks, but must copy the generic
908 * 3 ints plus the relevant union member.
909 * This routine must convert siginfo from 64bit to 32bit as well
910 * at the same time.
911 */
912 err = __put_user(s->si_signo, &d->si_signo);
913 err |= __put_user(s->si_errno, &d->si_errno);
914 err |= __put_user((short)s->si_code, &d->si_code);
915 if (s->si_code < 0)
916 err |= __copy_to_user(&d->_sifields._pad, &s->_sifields._pad,
917 SI_PAD_SIZE32);
918 else switch(s->si_code >> 16) {
919 case __SI_CHLD >> 16:
920 err |= __put_user(s->si_pid, &d->si_pid);
921 err |= __put_user(s->si_uid, &d->si_uid);
922 err |= __put_user(s->si_utime, &d->si_utime);
923 err |= __put_user(s->si_stime, &d->si_stime);
924 err |= __put_user(s->si_status, &d->si_status);
925 break;
926 case __SI_FAULT >> 16:
927 err |= __put_user((unsigned int)(unsigned long)s->si_addr,
928 &d->si_addr);
929 break;
930 case __SI_POLL >> 16:
931 err |= __put_user(s->si_band, &d->si_band);
932 err |= __put_user(s->si_fd, &d->si_fd);
933 break;
934 case __SI_TIMER >> 16:
935 err |= __put_user(s->si_tid, &d->si_tid);
936 err |= __put_user(s->si_overrun, &d->si_overrun);
937 err |= __put_user(s->si_int, &d->si_int);
938 break;
1b60bab0
ME
939 case __SI_SYS >> 16:
940 err |= __put_user(ptr_to_compat(s->si_call_addr), &d->si_call_addr);
941 err |= __put_user(s->si_syscall, &d->si_syscall);
942 err |= __put_user(s->si_arch, &d->si_arch);
943 break;
1da177e4
LT
944 case __SI_RT >> 16: /* This is not generated by the kernel as of now. */
945 case __SI_MESGQ >> 16:
946 err |= __put_user(s->si_int, &d->si_int);
947 /* fallthrough */
948 case __SI_KILL >> 16:
949 default:
950 err |= __put_user(s->si_pid, &d->si_pid);
951 err |= __put_user(s->si_uid, &d->si_uid);
952 break;
953 }
954 return err;
955}
956
81e7009e
SR
957#define copy_siginfo_to_user copy_siginfo_to_user32
958
9c0c44db
RM
959int copy_siginfo_from_user32(siginfo_t *to, struct compat_siginfo __user *from)
960{
9c0c44db
RM
961 if (copy_from_user(to, from, 3*sizeof(int)) ||
962 copy_from_user(to->_sifields._pad,
963 from->_sifields._pad, SI_PAD_SIZE32))
964 return -EFAULT;
965
966 return 0;
967}
81e7009e 968#endif /* CONFIG_PPC64 */
1da177e4 969
1da177e4
LT
970/*
971 * Set up a signal frame for a "real-time" signal handler
972 * (one which gets siginfo).
973 */
129b69df
RW
974int handle_rt_signal32(struct ksignal *ksig, sigset_t *oldset,
975 struct pt_regs *regs)
1da177e4 976{
81e7009e
SR
977 struct rt_sigframe __user *rt_sf;
978 struct mcontext __user *frame;
1d25f11f 979 struct mcontext __user *tm_frame = NULL;
d0c3d534 980 void __user *addr;
a3f61dc0 981 unsigned long newsp = 0;
2b0a576d
MN
982 int sigret;
983 unsigned long tramp;
1da177e4
LT
984
985 /* Set up Signal Frame */
986 /* Put a Real Time Context onto stack */
059ade65 987 rt_sf = get_sigframe(ksig, get_tm_stackpointer(regs), sizeof(*rt_sf), 1);
d0c3d534 988 addr = rt_sf;
a3f61dc0 989 if (unlikely(rt_sf == NULL))
1da177e4
LT
990 goto badframe;
991
1da177e4 992 /* Put the siginfo & fill in most of the ucontext */
129b69df 993 if (copy_siginfo_to_user(&rt_sf->info, &ksig->info)
1da177e4 994 || __put_user(0, &rt_sf->uc.uc_flags)
7cce2465 995 || __save_altstack(&rt_sf->uc.uc_stack, regs->gpr[1])
81e7009e
SR
996 || __put_user(to_user_ptr(&rt_sf->uc.uc_mcontext),
997 &rt_sf->uc.uc_regs)
998 || put_sigset_t(&rt_sf->uc.uc_sigmask, oldset))
1da177e4
LT
999 goto badframe;
1000
1001 /* Save user registers on the stack */
1002 frame = &rt_sf->uc.uc_mcontext;
d0c3d534 1003 addr = frame;
a5bba930 1004 if (vdso32_rt_sigtramp && current->mm->context.vdso_base) {
2b0a576d
MN
1005 sigret = 0;
1006 tramp = current->mm->context.vdso_base + vdso32_rt_sigtramp;
a7f290da 1007 } else {
2b0a576d
MN
1008 sigret = __NR_rt_sigreturn;
1009 tramp = (unsigned long) frame->tramp;
1010 }
1011
1012#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1d25f11f 1013 tm_frame = &rt_sf->uc_transact.uc_mcontext;
2b0a576d 1014 if (MSR_TM_ACTIVE(regs->msr)) {
d765ff23
PM
1015 if (__put_user((unsigned long)&rt_sf->uc_transact,
1016 &rt_sf->uc.uc_link) ||
1017 __put_user((unsigned long)tm_frame,
1018 &rt_sf->uc_transact.uc_regs))
1019 goto badframe;
1d25f11f 1020 if (save_tm_user_regs(regs, frame, tm_frame, sigret))
1da177e4 1021 goto badframe;
1da177e4 1022 }
2b0a576d
MN
1023 else
1024#endif
1d25f11f 1025 {
d765ff23
PM
1026 if (__put_user(0, &rt_sf->uc.uc_link))
1027 goto badframe;
1d25f11f 1028 if (save_user_regs(regs, frame, tm_frame, sigret, 1))
2b0a576d 1029 goto badframe;
1d25f11f 1030 }
2b0a576d
MN
1031 regs->link = tramp;
1032
de79f7b9 1033 current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
cc657f53 1034
a3f61dc0
BH
1035 /* create a stack frame for the caller of the handler */
1036 newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16);
d0c3d534 1037 addr = (void __user *)regs->gpr[1];
e2b55306 1038 if (put_user(regs->gpr[1], (u32 __user *)newsp))
81e7009e 1039 goto badframe;
a3f61dc0
BH
1040
1041 /* Fill registers for signal handler */
81e7009e 1042 regs->gpr[1] = newsp;
129b69df 1043 regs->gpr[3] = ksig->sig;
1da177e4
LT
1044 regs->gpr[4] = (unsigned long) &rt_sf->info;
1045 regs->gpr[5] = (unsigned long) &rt_sf->uc;
1046 regs->gpr[6] = (unsigned long) rt_sf;
129b69df 1047 regs->nip = (unsigned long) ksig->ka.sa.sa_handler;
e871c6bb 1048 /* enter the signal handler in native-endian mode */
fab5db97 1049 regs->msr &= ~MSR_LE;
e871c6bb 1050 regs->msr |= (MSR_KERNEL & MSR_LE);
129b69df 1051 return 0;
1da177e4
LT
1052
1053badframe:
76462232
CD
1054 if (show_unhandled_signals)
1055 printk_ratelimited(KERN_INFO
1056 "%s[%d]: bad frame in handle_rt_signal32: "
1057 "%p nip %08lx lr %08lx\n",
1058 current->comm, current->pid,
1059 addr, regs->nip, regs->link);
d0c3d534 1060
129b69df 1061 return 1;
1da177e4
LT
1062}
1063
81e7009e 1064static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig)
1da177e4 1065{
1da177e4 1066 sigset_t set;
81e7009e
SR
1067 struct mcontext __user *mcp;
1068
1069 if (get_sigset_t(&set, &ucp->uc_sigmask))
1070 return -EFAULT;
1071#ifdef CONFIG_PPC64
1072 {
1073 u32 cmcp;
1da177e4 1074
81e7009e
SR
1075 if (__get_user(cmcp, &ucp->uc_regs))
1076 return -EFAULT;
1077 mcp = (struct mcontext __user *)(u64)cmcp;
7c85d1f9 1078 /* no need to check access_ok(mcp), since mcp < 4GB */
81e7009e
SR
1079 }
1080#else
1081 if (__get_user(mcp, &ucp->uc_regs))
1da177e4 1082 return -EFAULT;
7c85d1f9
PM
1083 if (!access_ok(VERIFY_READ, mcp, sizeof(*mcp)))
1084 return -EFAULT;
81e7009e 1085#endif
17440f17 1086 set_current_blocked(&set);
81e7009e 1087 if (restore_user_regs(regs, mcp, sig))
1da177e4
LT
1088 return -EFAULT;
1089
1090 return 0;
1091}
1092
2b0a576d
MN
1093#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1094static int do_setcontext_tm(struct ucontext __user *ucp,
1095 struct ucontext __user *tm_ucp,
1096 struct pt_regs *regs)
1097{
1098 sigset_t set;
1099 struct mcontext __user *mcp;
1100 struct mcontext __user *tm_mcp;
1101 u32 cmcp;
1102 u32 tm_cmcp;
1103
1104 if (get_sigset_t(&set, &ucp->uc_sigmask))
1105 return -EFAULT;
1106
1107 if (__get_user(cmcp, &ucp->uc_regs) ||
1108 __get_user(tm_cmcp, &tm_ucp->uc_regs))
1109 return -EFAULT;
1110 mcp = (struct mcontext __user *)(u64)cmcp;
1111 tm_mcp = (struct mcontext __user *)(u64)tm_cmcp;
1112 /* no need to check access_ok(mcp), since mcp < 4GB */
1113
1114 set_current_blocked(&set);
1115 if (restore_tm_user_regs(regs, mcp, tm_mcp))
1116 return -EFAULT;
1117
1118 return 0;
1119}
1120#endif
1121
81e7009e 1122long sys_swapcontext(struct ucontext __user *old_ctx,
1bd79336
PM
1123 struct ucontext __user *new_ctx,
1124 int ctx_size, int r6, int r7, int r8, struct pt_regs *regs)
1da177e4
LT
1125{
1126 unsigned char tmp;
16c29d18 1127 int ctx_has_vsx_region = 0;
1da177e4 1128
c1cb299e
MN
1129#ifdef CONFIG_PPC64
1130 unsigned long new_msr = 0;
1131
77eb50ae
AS
1132 if (new_ctx) {
1133 struct mcontext __user *mcp;
1134 u32 cmcp;
1135
1136 /*
1137 * Get pointer to the real mcontext. No need for
1138 * access_ok since we are dealing with compat
1139 * pointers.
1140 */
1141 if (__get_user(cmcp, &new_ctx->uc_regs))
1142 return -EFAULT;
1143 mcp = (struct mcontext __user *)(u64)cmcp;
1144 if (__get_user(new_msr, &mcp->mc_gregs[PT_MSR]))
1145 return -EFAULT;
1146 }
c1cb299e
MN
1147 /*
1148 * Check that the context is not smaller than the original
1149 * size (with VMX but without VSX)
1150 */
1151 if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
1152 return -EINVAL;
1153 /*
1154 * If the new context state sets the MSR VSX bits but
1155 * it doesn't provide VSX state.
1156 */
1157 if ((ctx_size < sizeof(struct ucontext)) &&
1158 (new_msr & MSR_VSX))
1159 return -EINVAL;
16c29d18
MN
1160 /* Does the context have enough room to store VSX data? */
1161 if (ctx_size >= sizeof(struct ucontext))
1162 ctx_has_vsx_region = 1;
c1cb299e 1163#else
1da177e4
LT
1164 /* Context size is for future use. Right now, we only make sure
1165 * we are passed something we understand
1166 */
81e7009e 1167 if (ctx_size < sizeof(struct ucontext))
1da177e4 1168 return -EINVAL;
c1cb299e 1169#endif
1da177e4 1170 if (old_ctx != NULL) {
1c9bb1a0
PM
1171 struct mcontext __user *mctx;
1172
1173 /*
1174 * old_ctx might not be 16-byte aligned, in which
1175 * case old_ctx->uc_mcontext won't be either.
1176 * Because we have the old_ctx->uc_pad2 field
1177 * before old_ctx->uc_mcontext, we need to round down
1178 * from &old_ctx->uc_mcontext to a 16-byte boundary.
1179 */
1180 mctx = (struct mcontext __user *)
1181 ((unsigned long) &old_ctx->uc_mcontext & ~0xfUL);
16c29d18 1182 if (!access_ok(VERIFY_WRITE, old_ctx, ctx_size)
1d25f11f 1183 || save_user_regs(regs, mctx, NULL, 0, ctx_has_vsx_region)
81e7009e 1184 || put_sigset_t(&old_ctx->uc_sigmask, &current->blocked)
1c9bb1a0 1185 || __put_user(to_user_ptr(mctx), &old_ctx->uc_regs))
1da177e4
LT
1186 return -EFAULT;
1187 }
1188 if (new_ctx == NULL)
1189 return 0;
16c29d18 1190 if (!access_ok(VERIFY_READ, new_ctx, ctx_size)
1da177e4 1191 || __get_user(tmp, (u8 __user *) new_ctx)
16c29d18 1192 || __get_user(tmp, (u8 __user *) new_ctx + ctx_size - 1))
1da177e4
LT
1193 return -EFAULT;
1194
1195 /*
1196 * If we get a fault copying the context into the kernel's
1197 * image of the user's registers, we can't just return -EFAULT
1198 * because the user's registers will be corrupted. For instance
1199 * the NIP value may have been updated but not some of the
1200 * other registers. Given that we have done the access_ok
1201 * and successfully read the first and last bytes of the region
1202 * above, this should only happen in an out-of-memory situation
1203 * or if another thread unmaps the region containing the context.
1204 * We kill the task with a SIGSEGV in this situation.
1205 */
81e7009e 1206 if (do_setcontext(new_ctx, regs, 0))
1da177e4 1207 do_exit(SIGSEGV);
401d1f02
DW
1208
1209 set_thread_flag(TIF_RESTOREALL);
1da177e4
LT
1210 return 0;
1211}
1212
81e7009e 1213long sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1da177e4
LT
1214 struct pt_regs *regs)
1215{
81e7009e 1216 struct rt_sigframe __user *rt_sf;
2b0a576d
MN
1217#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1218 struct ucontext __user *uc_transact;
1219 unsigned long msr_hi;
1220 unsigned long tmp;
1221 int tm_restore = 0;
1222#endif
1da177e4 1223 /* Always make any pending restarted system calls return -EINTR */
f56141e3 1224 current->restart_block.fn = do_no_restart_syscall;
1da177e4 1225
81e7009e
SR
1226 rt_sf = (struct rt_sigframe __user *)
1227 (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16);
1da177e4
LT
1228 if (!access_ok(VERIFY_READ, rt_sf, sizeof(*rt_sf)))
1229 goto bad;
78a3e888 1230
2b0a576d 1231#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
78a3e888
CB
1232 /*
1233 * If there is a transactional state then throw it away.
1234 * The purpose of a sigreturn is to destroy all traces of the
1235 * signal frame, this includes any transactional state created
1236 * within in. We only check for suspended as we can never be
1237 * active in the kernel, we are active, there is nothing better to
1238 * do than go ahead and Bad Thing later.
1239 * The cause is not important as there will never be a
1240 * recheckpoint so it's not user visible.
1241 */
1242 if (MSR_TM_SUSPENDED(mfmsr()))
1243 tm_reclaim_current(0);
1244
2b0a576d
MN
1245 if (__get_user(tmp, &rt_sf->uc.uc_link))
1246 goto bad;
1247 uc_transact = (struct ucontext __user *)(uintptr_t)tmp;
1248 if (uc_transact) {
1249 u32 cmcp;
1250 struct mcontext __user *mcp;
1251
1252 if (__get_user(cmcp, &uc_transact->uc_regs))
1253 return -EFAULT;
1254 mcp = (struct mcontext __user *)(u64)cmcp;
1255 /* The top 32 bits of the MSR are stashed in the transactional
1256 * ucontext. */
1257 if (__get_user(msr_hi, &mcp->mc_gregs[PT_MSR]))
1258 goto bad;
1259
55e43418 1260 if (MSR_TM_ACTIVE(msr_hi<<32)) {
2b0a576d
MN
1261 /* We only recheckpoint on return if we're
1262 * transaction.
1263 */
1264 tm_restore = 1;
1265 if (do_setcontext_tm(&rt_sf->uc, uc_transact, regs))
1266 goto bad;
1267 }
1268 }
1269 if (!tm_restore)
1270 /* Fall through, for non-TM restore */
1271#endif
81e7009e 1272 if (do_setcontext(&rt_sf->uc, regs, 1))
1da177e4
LT
1273 goto bad;
1274
1275 /*
1276 * It's not clear whether or why it is desirable to save the
1277 * sigaltstack setting on signal delivery and restore it on
1278 * signal return. But other architectures do this and we have
1279 * always done it up until now so it is probably better not to
1280 * change it. -- paulus
81e7009e
SR
1281 */
1282#ifdef CONFIG_PPC64
7cce2465
AV
1283 if (compat_restore_altstack(&rt_sf->uc.uc_stack))
1284 goto bad;
81e7009e 1285#else
7cce2465
AV
1286 if (restore_altstack(&rt_sf->uc.uc_stack))
1287 goto bad;
81e7009e 1288#endif
401d1f02
DW
1289 set_thread_flag(TIF_RESTOREALL);
1290 return 0;
1da177e4
LT
1291
1292 bad:
76462232
CD
1293 if (show_unhandled_signals)
1294 printk_ratelimited(KERN_INFO
1295 "%s[%d]: bad frame in sys_rt_sigreturn: "
1296 "%p nip %08lx lr %08lx\n",
1297 current->comm, current->pid,
1298 rt_sf, regs->nip, regs->link);
d0c3d534 1299
1da177e4
LT
1300 force_sig(SIGSEGV, current);
1301 return 0;
1302}
1303
81e7009e
SR
1304#ifdef CONFIG_PPC32
1305int sys_debug_setcontext(struct ucontext __user *ctx,
1306 int ndbg, struct sig_dbg_op __user *dbg,
1307 int r6, int r7, int r8,
1308 struct pt_regs *regs)
1309{
1310 struct sig_dbg_op op;
1311 int i;
7c85d1f9 1312 unsigned char tmp;
81e7009e 1313 unsigned long new_msr = regs->msr;
172ae2e7 1314#ifdef CONFIG_PPC_ADV_DEBUG_REGS
51ae8d4a 1315 unsigned long new_dbcr0 = current->thread.debug.dbcr0;
81e7009e
SR
1316#endif
1317
1318 for (i=0; i<ndbg; i++) {
7c85d1f9 1319 if (copy_from_user(&op, dbg + i, sizeof(op)))
81e7009e
SR
1320 return -EFAULT;
1321 switch (op.dbg_type) {
1322 case SIG_DBG_SINGLE_STEPPING:
172ae2e7 1323#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1324 if (op.dbg_value) {
1325 new_msr |= MSR_DE;
1326 new_dbcr0 |= (DBCR0_IDM | DBCR0_IC);
1327 } else {
3bffb652
DK
1328 new_dbcr0 &= ~DBCR0_IC;
1329 if (!DBCR_ACTIVE_EVENTS(new_dbcr0,
51ae8d4a 1330 current->thread.debug.dbcr1)) {
3bffb652
DK
1331 new_msr &= ~MSR_DE;
1332 new_dbcr0 &= ~DBCR0_IDM;
1333 }
81e7009e
SR
1334 }
1335#else
1336 if (op.dbg_value)
1337 new_msr |= MSR_SE;
1338 else
1339 new_msr &= ~MSR_SE;
1340#endif
1341 break;
1342 case SIG_DBG_BRANCH_TRACING:
172ae2e7 1343#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1344 return -EINVAL;
1345#else
1346 if (op.dbg_value)
1347 new_msr |= MSR_BE;
1348 else
1349 new_msr &= ~MSR_BE;
1350#endif
1351 break;
1352
1353 default:
1354 return -EINVAL;
1355 }
1356 }
1357
1358 /* We wait until here to actually install the values in the
1359 registers so if we fail in the above loop, it will not
1360 affect the contents of these registers. After this point,
1361 failure is a problem, anyway, and it's very unlikely unless
1362 the user is really doing something wrong. */
1363 regs->msr = new_msr;
172ae2e7 1364#ifdef CONFIG_PPC_ADV_DEBUG_REGS
51ae8d4a 1365 current->thread.debug.dbcr0 = new_dbcr0;
81e7009e
SR
1366#endif
1367
7c85d1f9
PM
1368 if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx))
1369 || __get_user(tmp, (u8 __user *) ctx)
1370 || __get_user(tmp, (u8 __user *) (ctx + 1) - 1))
1371 return -EFAULT;
1372
81e7009e
SR
1373 /*
1374 * If we get a fault copying the context into the kernel's
1375 * image of the user's registers, we can't just return -EFAULT
1376 * because the user's registers will be corrupted. For instance
1377 * the NIP value may have been updated but not some of the
1378 * other registers. Given that we have done the access_ok
1379 * and successfully read the first and last bytes of the region
1380 * above, this should only happen in an out-of-memory situation
1381 * or if another thread unmaps the region containing the context.
1382 * We kill the task with a SIGSEGV in this situation.
1383 */
1384 if (do_setcontext(ctx, regs, 1)) {
76462232
CD
1385 if (show_unhandled_signals)
1386 printk_ratelimited(KERN_INFO "%s[%d]: bad frame in "
1387 "sys_debug_setcontext: %p nip %08lx "
1388 "lr %08lx\n",
1389 current->comm, current->pid,
1390 ctx, regs->nip, regs->link);
d0c3d534 1391
81e7009e
SR
1392 force_sig(SIGSEGV, current);
1393 goto out;
1394 }
1395
1396 /*
1397 * It's not clear whether or why it is desirable to save the
1398 * sigaltstack setting on signal delivery and restore it on
1399 * signal return. But other architectures do this and we have
1400 * always done it up until now so it is probably better not to
1401 * change it. -- paulus
1402 */
7cce2465 1403 restore_altstack(&ctx->uc_stack);
81e7009e 1404
401d1f02 1405 set_thread_flag(TIF_RESTOREALL);
81e7009e
SR
1406 out:
1407 return 0;
1408}
1409#endif
1da177e4
LT
1410
1411/*
1412 * OK, we're invoking a handler
1413 */
129b69df 1414int handle_signal32(struct ksignal *ksig, sigset_t *oldset, struct pt_regs *regs)
1da177e4 1415{
81e7009e 1416 struct sigcontext __user *sc;
a3f61dc0 1417 struct sigframe __user *frame;
1d25f11f 1418 struct mcontext __user *tm_mctx = NULL;
a3f61dc0 1419 unsigned long newsp = 0;
2b0a576d
MN
1420 int sigret;
1421 unsigned long tramp;
1da177e4
LT
1422
1423 /* Set up Signal Frame */
059ade65 1424 frame = get_sigframe(ksig, get_tm_stackpointer(regs), sizeof(*frame), 1);
a3f61dc0 1425 if (unlikely(frame == NULL))
1da177e4 1426 goto badframe;
a3f61dc0 1427 sc = (struct sigcontext __user *) &frame->sctx;
1da177e4
LT
1428
1429#if _NSIG != 64
81e7009e 1430#error "Please adjust handle_signal()"
1da177e4 1431#endif
129b69df 1432 if (__put_user(to_user_ptr(ksig->ka.sa.sa_handler), &sc->handler)
1da177e4 1433 || __put_user(oldset->sig[0], &sc->oldmask)
81e7009e 1434#ifdef CONFIG_PPC64
1da177e4 1435 || __put_user((oldset->sig[0] >> 32), &sc->_unused[3])
81e7009e
SR
1436#else
1437 || __put_user(oldset->sig[1], &sc->_unused[3])
1438#endif
a3f61dc0 1439 || __put_user(to_user_ptr(&frame->mctx), &sc->regs)
129b69df 1440 || __put_user(ksig->sig, &sc->signal))
1da177e4
LT
1441 goto badframe;
1442
a5bba930 1443 if (vdso32_sigtramp && current->mm->context.vdso_base) {
2b0a576d
MN
1444 sigret = 0;
1445 tramp = current->mm->context.vdso_base + vdso32_sigtramp;
a7f290da 1446 } else {
2b0a576d
MN
1447 sigret = __NR_sigreturn;
1448 tramp = (unsigned long) frame->mctx.tramp;
1449 }
1450
1451#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1d25f11f 1452 tm_mctx = &frame->mctx_transact;
2b0a576d
MN
1453 if (MSR_TM_ACTIVE(regs->msr)) {
1454 if (save_tm_user_regs(regs, &frame->mctx, &frame->mctx_transact,
1455 sigret))
1da177e4 1456 goto badframe;
1da177e4 1457 }
2b0a576d
MN
1458 else
1459#endif
1d25f11f
MN
1460 {
1461 if (save_user_regs(regs, &frame->mctx, tm_mctx, sigret, 1))
2b0a576d 1462 goto badframe;
1d25f11f 1463 }
2b0a576d
MN
1464
1465 regs->link = tramp;
1da177e4 1466
de79f7b9 1467 current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
cc657f53 1468
a3f61dc0
BH
1469 /* create a stack frame for the caller of the handler */
1470 newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE;
9747dd6f 1471 if (put_user(regs->gpr[1], (u32 __user *)newsp))
1da177e4 1472 goto badframe;
a3f61dc0 1473
81e7009e 1474 regs->gpr[1] = newsp;
129b69df 1475 regs->gpr[3] = ksig->sig;
1da177e4 1476 regs->gpr[4] = (unsigned long) sc;
129b69df 1477 regs->nip = (unsigned long) (unsigned long)ksig->ka.sa.sa_handler;
fab5db97
PM
1478 /* enter the signal handler in big-endian mode */
1479 regs->msr &= ~MSR_LE;
129b69df 1480 return 0;
1da177e4
LT
1481
1482badframe:
76462232
CD
1483 if (show_unhandled_signals)
1484 printk_ratelimited(KERN_INFO
1485 "%s[%d]: bad frame in handle_signal32: "
1486 "%p nip %08lx lr %08lx\n",
1487 current->comm, current->pid,
1488 frame, regs->nip, regs->link);
d0c3d534 1489
129b69df 1490 return 1;
1da177e4
LT
1491}
1492
1493/*
1494 * Do a signal return; undo the signal stack.
1495 */
81e7009e 1496long sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1da177e4
LT
1497 struct pt_regs *regs)
1498{
fee55450 1499 struct sigframe __user *sf;
81e7009e
SR
1500 struct sigcontext __user *sc;
1501 struct sigcontext sigctx;
1502 struct mcontext __user *sr;
d0c3d534 1503 void __user *addr;
1da177e4 1504 sigset_t set;
fee55450
MN
1505#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1506 struct mcontext __user *mcp, *tm_mcp;
1507 unsigned long msr_hi;
1508#endif
1da177e4
LT
1509
1510 /* Always make any pending restarted system calls return -EINTR */
f56141e3 1511 current->restart_block.fn = do_no_restart_syscall;
1da177e4 1512
fee55450
MN
1513 sf = (struct sigframe __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE);
1514 sc = &sf->sctx;
d0c3d534 1515 addr = sc;
1da177e4
LT
1516 if (copy_from_user(&sigctx, sc, sizeof(sigctx)))
1517 goto badframe;
1518
81e7009e 1519#ifdef CONFIG_PPC64
1da177e4
LT
1520 /*
1521 * Note that PPC32 puts the upper 32 bits of the sigmask in the
1522 * unused part of the signal stackframe
1523 */
1524 set.sig[0] = sigctx.oldmask + ((long)(sigctx._unused[3]) << 32);
81e7009e
SR
1525#else
1526 set.sig[0] = sigctx.oldmask;
1527 set.sig[1] = sigctx._unused[3];
1528#endif
17440f17 1529 set_current_blocked(&set);
1da177e4 1530
fee55450
MN
1531#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1532 mcp = (struct mcontext __user *)&sf->mctx;
1533 tm_mcp = (struct mcontext __user *)&sf->mctx_transact;
1534 if (__get_user(msr_hi, &tm_mcp->mc_gregs[PT_MSR]))
1da177e4 1535 goto badframe;
fee55450
MN
1536 if (MSR_TM_ACTIVE(msr_hi<<32)) {
1537 if (!cpu_has_feature(CPU_FTR_TM))
1538 goto badframe;
1539 if (restore_tm_user_regs(regs, mcp, tm_mcp))
1540 goto badframe;
1541 } else
1542#endif
1543 {
1544 sr = (struct mcontext __user *)from_user_ptr(sigctx.regs);
1545 addr = sr;
1546 if (!access_ok(VERIFY_READ, sr, sizeof(*sr))
1547 || restore_user_regs(regs, sr, 1))
1548 goto badframe;
1549 }
1da177e4 1550
401d1f02 1551 set_thread_flag(TIF_RESTOREALL);
81e7009e 1552 return 0;
1da177e4
LT
1553
1554badframe:
76462232
CD
1555 if (show_unhandled_signals)
1556 printk_ratelimited(KERN_INFO
1557 "%s[%d]: bad frame in sys_sigreturn: "
1558 "%p nip %08lx lr %08lx\n",
1559 current->comm, current->pid,
1560 addr, regs->nip, regs->link);
d0c3d534 1561
1da177e4
LT
1562 force_sig(SIGSEGV, current);
1563 return 0;
1564}