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2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4 2/*
81e7009e 3 * Signal handling for 32bit PPC and 32bit tasks on 64bit PPC
1da177e4 4 *
81e7009e
SR
5 * PowerPC version
6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
1da177e4
LT
7 * Copyright (C) 2001 IBM
8 * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
9 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
10 *
81e7009e
SR
11 * Derived from "arch/i386/kernel/signal.c"
12 * Copyright (C) 1991, 1992 Linus Torvalds
13 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
1da177e4
LT
14 */
15
1da177e4 16#include <linux/sched.h>
81e7009e 17#include <linux/mm.h>
1da177e4 18#include <linux/smp.h>
1da177e4
LT
19#include <linux/kernel.h>
20#include <linux/signal.h>
1da177e4
LT
21#include <linux/errno.h>
22#include <linux/elf.h>
05ead015 23#include <linux/ptrace.h>
56b04d56 24#include <linux/pagemap.h>
76462232 25#include <linux/ratelimit.h>
81e7009e 26#include <linux/syscalls.h>
f3675644 27#ifdef CONFIG_PPC64
1da177e4 28#include <linux/compat.h>
81e7009e
SR
29#else
30#include <linux/wait.h>
81e7009e
SR
31#include <linux/unistd.h>
32#include <linux/stddef.h>
33#include <linux/tty.h>
34#include <linux/binfmts.h>
81e7009e
SR
35#endif
36
7c0f6ba6 37#include <linux/uaccess.h>
81e7009e 38#include <asm/cacheflush.h>
a7f31841 39#include <asm/syscalls.h>
c5ff7001 40#include <asm/sigcontext.h>
a7f290da 41#include <asm/vdso.h>
ae3a197e 42#include <asm/switch_to.h>
2b0a576d 43#include <asm/tm.h>
0545d543 44#include <asm/asm-prototypes.h>
81e7009e 45#ifdef CONFIG_PPC64
879168ee 46#include "ppc32.h"
1da177e4 47#include <asm/unistd.h>
81e7009e
SR
48#else
49#include <asm/ucontext.h>
50#include <asm/pgtable.h>
51#endif
1da177e4 52
22e38f29
BH
53#include "signal.h"
54
1da177e4 55
81e7009e 56#ifdef CONFIG_PPC64
81e7009e
SR
57#define old_sigaction old_sigaction32
58#define sigcontext sigcontext32
59#define mcontext mcontext32
60#define ucontext ucontext32
61
7cce2465
AV
62#define __save_altstack __compat_save_altstack
63
c1cb299e
MN
64/*
65 * Userspace code may pass a ucontext which doesn't include VSX added
66 * at the end. We need to check for this case.
67 */
68#define UCONTEXTSIZEWITHOUTVSX \
69 (sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32))
70
81e7009e
SR
71/*
72 * Returning 0 means we return to userspace via
73 * ret_from_except and thus restore all user
74 * registers from *regs. This is what we need
75 * to do when a signal has been delivered.
76 */
81e7009e
SR
77
78#define GP_REGS_SIZE min(sizeof(elf_gregset_t32), sizeof(struct pt_regs32))
79#undef __SIGNAL_FRAMESIZE
80#define __SIGNAL_FRAMESIZE __SIGNAL_FRAMESIZE32
81#undef ELF_NVRREG
82#define ELF_NVRREG ELF_NVRREG32
83
84/*
85 * Functions for flipping sigsets (thanks to brain dead generic
86 * implementation that makes things simple for little endian only)
87 */
88static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
89{
a5ae754a 90 return put_compat_sigset(uset, set, sizeof(*uset));
81e7009e
SR
91}
92
9b7cf8b4
PM
93static inline int get_sigset_t(sigset_t *set,
94 const compat_sigset_t __user *uset)
81e7009e 95{
a5ae754a 96 return get_compat_sigset(set, uset);
81e7009e
SR
97}
98
29e646df 99#define to_user_ptr(p) ptr_to_compat(p)
81e7009e
SR
100#define from_user_ptr(p) compat_ptr(p)
101
102static inline int save_general_regs(struct pt_regs *regs,
103 struct mcontext __user *frame)
104{
105 elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
106 int i;
a8a4b03a
MS
107 /* Force usr to alway see softe as 1 (interrupts enabled) */
108 elf_greg_t64 softe = 0x1;
81e7009e 109
1bd79336 110 WARN_ON(!FULL_REGS(regs));
401d1f02
DW
111
112 for (i = 0; i <= PT_RESULT; i ++) {
113 if (i == 14 && !FULL_REGS(regs))
114 i = 32;
a8a4b03a
MS
115 if ( i == PT_SOFTE) {
116 if(__put_user((unsigned int)softe, &frame->mc_gregs[i]))
117 return -EFAULT;
118 else
119 continue;
120 }
81e7009e
SR
121 if (__put_user((unsigned int)gregs[i], &frame->mc_gregs[i]))
122 return -EFAULT;
401d1f02 123 }
81e7009e
SR
124 return 0;
125}
126
127static inline int restore_general_regs(struct pt_regs *regs,
128 struct mcontext __user *sr)
129{
130 elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
131 int i;
132
133 for (i = 0; i <= PT_RESULT; i++) {
134 if ((i == PT_MSR) || (i == PT_SOFTE))
135 continue;
136 if (__get_user(gregs[i], &sr->mc_gregs[i]))
137 return -EFAULT;
138 }
139 return 0;
140}
141
142#else /* CONFIG_PPC64 */
143
81e7009e
SR
144#define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
145
146static inline int put_sigset_t(sigset_t __user *uset, sigset_t *set)
147{
148 return copy_to_user(uset, set, sizeof(*uset));
149}
150
9b7cf8b4 151static inline int get_sigset_t(sigset_t *set, const sigset_t __user *uset)
81e7009e
SR
152{
153 return copy_from_user(set, uset, sizeof(*uset));
154}
155
29e646df
AV
156#define to_user_ptr(p) ((unsigned long)(p))
157#define from_user_ptr(p) ((void __user *)(p))
81e7009e
SR
158
159static inline int save_general_regs(struct pt_regs *regs,
160 struct mcontext __user *frame)
161{
1bd79336 162 WARN_ON(!FULL_REGS(regs));
81e7009e
SR
163 return __copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE);
164}
165
166static inline int restore_general_regs(struct pt_regs *regs,
167 struct mcontext __user *sr)
168{
169 /* copy up to but not including MSR */
170 if (__copy_from_user(regs, &sr->mc_gregs,
171 PT_MSR * sizeof(elf_greg_t)))
172 return -EFAULT;
173 /* copy from orig_r3 (the word after the MSR) up to the end */
174 if (__copy_from_user(&regs->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3],
175 GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t)))
176 return -EFAULT;
177 return 0;
178}
81e7009e
SR
179#endif
180
1da177e4
LT
181/*
182 * When we have signals to deliver, we set up on the
183 * user stack, going down from the original stack pointer:
a3f61dc0
BH
184 * an ABI gap of 56 words
185 * an mcontext struct
81e7009e
SR
186 * a sigcontext struct
187 * a gap of __SIGNAL_FRAMESIZE bytes
1da177e4 188 *
a3f61dc0
BH
189 * Each of these things must be a multiple of 16 bytes in size. The following
190 * structure represent all of this except the __SIGNAL_FRAMESIZE gap
1da177e4
LT
191 *
192 */
a3f61dc0
BH
193struct sigframe {
194 struct sigcontext sctx; /* the sigcontext */
81e7009e 195 struct mcontext mctx; /* all the register values */
2b0a576d
MN
196#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
197 struct sigcontext sctx_transact;
198 struct mcontext mctx_transact;
199#endif
1da177e4
LT
200 /*
201 * Programs using the rs6000/xcoff abi can save up to 19 gp
202 * regs and 18 fp regs below sp before decrementing it.
203 */
204 int abigap[56];
205};
206
207/* We use the mc_pad field for the signal return trampoline. */
208#define tramp mc_pad
209
210/*
211 * When we have rt signals to deliver, we set up on the
212 * user stack, going down from the original stack pointer:
81e7009e
SR
213 * one rt_sigframe struct (siginfo + ucontext + ABI gap)
214 * a gap of __SIGNAL_FRAMESIZE+16 bytes
215 * (the +16 is to get the siginfo and ucontext in the same
1da177e4
LT
216 * positions as in older kernels).
217 *
218 * Each of these things must be a multiple of 16 bytes in size.
219 *
220 */
81e7009e
SR
221struct rt_sigframe {
222#ifdef CONFIG_PPC64
223 compat_siginfo_t info;
224#else
225 struct siginfo info;
226#endif
227 struct ucontext uc;
2b0a576d
MN
228#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
229 struct ucontext uc_transact;
230#endif
1da177e4
LT
231 /*
232 * Programs using the rs6000/xcoff abi can save up to 19 gp
233 * regs and 18 fp regs below sp before decrementing it.
234 */
235 int abigap[56];
236};
237
6a274c08
MN
238#ifdef CONFIG_VSX
239unsigned long copy_fpr_to_user(void __user *to,
240 struct task_struct *task)
241{
de79f7b9 242 u64 buf[ELF_NFPREG];
6a274c08
MN
243 int i;
244
245 /* save FPR copy to local buffer then write to the thread_struct */
246 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
247 buf[i] = task->thread.TS_FPR(i);
de79f7b9 248 buf[i] = task->thread.fp_state.fpscr;
6a274c08
MN
249 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
250}
251
252unsigned long copy_fpr_from_user(struct task_struct *task,
253 void __user *from)
254{
de79f7b9 255 u64 buf[ELF_NFPREG];
6a274c08
MN
256 int i;
257
258 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
259 return 1;
260 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
261 task->thread.TS_FPR(i) = buf[i];
de79f7b9 262 task->thread.fp_state.fpscr = buf[i];
6a274c08
MN
263
264 return 0;
265}
266
267unsigned long copy_vsx_to_user(void __user *to,
268 struct task_struct *task)
269{
de79f7b9 270 u64 buf[ELF_NVSRHALFREG];
6a274c08
MN
271 int i;
272
273 /* save FPR copy to local buffer then write to the thread_struct */
274 for (i = 0; i < ELF_NVSRHALFREG; i++)
de79f7b9 275 buf[i] = task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
6a274c08
MN
276 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
277}
278
279unsigned long copy_vsx_from_user(struct task_struct *task,
280 void __user *from)
281{
de79f7b9 282 u64 buf[ELF_NVSRHALFREG];
6a274c08
MN
283 int i;
284
285 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
286 return 1;
287 for (i = 0; i < ELF_NVSRHALFREG ; i++)
de79f7b9 288 task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
6a274c08
MN
289 return 0;
290}
2b0a576d
MN
291
292#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
000ec280 293unsigned long copy_ckfpr_to_user(void __user *to,
2b0a576d
MN
294 struct task_struct *task)
295{
de79f7b9 296 u64 buf[ELF_NFPREG];
2b0a576d
MN
297 int i;
298
299 /* save FPR copy to local buffer then write to the thread_struct */
300 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
000ec280
CB
301 buf[i] = task->thread.TS_CKFPR(i);
302 buf[i] = task->thread.ckfp_state.fpscr;
2b0a576d
MN
303 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
304}
305
000ec280 306unsigned long copy_ckfpr_from_user(struct task_struct *task,
2b0a576d
MN
307 void __user *from)
308{
de79f7b9 309 u64 buf[ELF_NFPREG];
2b0a576d
MN
310 int i;
311
312 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
313 return 1;
314 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
000ec280
CB
315 task->thread.TS_CKFPR(i) = buf[i];
316 task->thread.ckfp_state.fpscr = buf[i];
2b0a576d
MN
317
318 return 0;
319}
320
000ec280 321unsigned long copy_ckvsx_to_user(void __user *to,
2b0a576d
MN
322 struct task_struct *task)
323{
de79f7b9 324 u64 buf[ELF_NVSRHALFREG];
2b0a576d
MN
325 int i;
326
327 /* save FPR copy to local buffer then write to the thread_struct */
328 for (i = 0; i < ELF_NVSRHALFREG; i++)
000ec280 329 buf[i] = task->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET];
2b0a576d
MN
330 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
331}
332
000ec280 333unsigned long copy_ckvsx_from_user(struct task_struct *task,
2b0a576d
MN
334 void __user *from)
335{
de79f7b9 336 u64 buf[ELF_NVSRHALFREG];
2b0a576d
MN
337 int i;
338
339 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
340 return 1;
341 for (i = 0; i < ELF_NVSRHALFREG ; i++)
000ec280 342 task->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
2b0a576d
MN
343 return 0;
344}
345#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
6a274c08
MN
346#else
347inline unsigned long copy_fpr_to_user(void __user *to,
348 struct task_struct *task)
349{
de79f7b9 350 return __copy_to_user(to, task->thread.fp_state.fpr,
6a274c08
MN
351 ELF_NFPREG * sizeof(double));
352}
353
354inline unsigned long copy_fpr_from_user(struct task_struct *task,
355 void __user *from)
356{
de79f7b9 357 return __copy_from_user(task->thread.fp_state.fpr, from,
6a274c08
MN
358 ELF_NFPREG * sizeof(double));
359}
2b0a576d
MN
360
361#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
000ec280 362inline unsigned long copy_ckfpr_to_user(void __user *to,
2b0a576d
MN
363 struct task_struct *task)
364{
000ec280 365 return __copy_to_user(to, task->thread.ckfp_state.fpr,
2b0a576d
MN
366 ELF_NFPREG * sizeof(double));
367}
368
000ec280 369inline unsigned long copy_ckfpr_from_user(struct task_struct *task,
2b0a576d
MN
370 void __user *from)
371{
000ec280 372 return __copy_from_user(task->thread.ckfp_state.fpr, from,
2b0a576d
MN
373 ELF_NFPREG * sizeof(double));
374}
375#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
6a274c08
MN
376#endif
377
1da177e4
LT
378/*
379 * Save the current user registers on the user stack.
81e7009e
SR
380 * We only save the altivec/spe registers if the process has used
381 * altivec/spe instructions at some point.
1da177e4 382 */
81e7009e 383static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
1d25f11f
MN
384 struct mcontext __user *tm_frame, int sigret,
385 int ctx_has_vsx_region)
1da177e4 386{
9e751186
MN
387 unsigned long msr = regs->msr;
388
1da177e4
LT
389 /* Make sure floating point registers are stored in regs */
390 flush_fp_to_thread(current);
391
c6e6771b
MN
392 /* save general registers */
393 if (save_general_regs(regs, frame))
1da177e4
LT
394 return 1;
395
1da177e4
LT
396#ifdef CONFIG_ALTIVEC
397 /* save altivec registers */
398 if (current->thread.used_vr) {
399 flush_altivec_to_thread(current);
de79f7b9 400 if (__copy_to_user(&frame->mc_vregs, &current->thread.vr_state,
81e7009e 401 ELF_NVRREG * sizeof(vector128)))
1da177e4
LT
402 return 1;
403 /* set MSR_VEC in the saved MSR value to indicate that
404 frame->mc_vregs contains valid data */
9e751186 405 msr |= MSR_VEC;
1da177e4
LT
406 }
407 /* else assert((regs->msr & MSR_VEC) == 0) */
408
409 /* We always copy to/from vrsave, it's 0 if we don't have or don't
410 * use altivec. Since VSCR only contains 32 bits saved in the least
411 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
412 * most significant bits of that same vector. --BenH
408a7e08 413 * Note that the current VRSAVE value is in the SPR at this point.
1da177e4 414 */
408a7e08
PM
415 if (cpu_has_feature(CPU_FTR_ALTIVEC))
416 current->thread.vrsave = mfspr(SPRN_VRSAVE);
1da177e4
LT
417 if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32]))
418 return 1;
419#endif /* CONFIG_ALTIVEC */
6a274c08 420 if (copy_fpr_to_user(&frame->mc_fregs, current))
c6e6771b 421 return 1;
ec67ad82
MN
422
423 /*
424 * Clear the MSR VSX bit to indicate there is no valid state attached
425 * to this context, except in the specific case below where we set it.
426 */
427 msr &= ~MSR_VSX;
6a274c08 428#ifdef CONFIG_VSX
ce48b210
MN
429 /*
430 * Copy VSR 0-31 upper half from thread_struct to local
431 * buffer, then write that to userspace. Also set MSR_VSX in
432 * the saved MSR value to indicate that frame->mc_vregs
433 * contains valid data
434 */
16c29d18 435 if (current->thread.used_vsr && ctx_has_vsx_region) {
a7d623d4 436 flush_vsx_to_thread(current);
6a274c08 437 if (copy_vsx_to_user(&frame->mc_vsregs, current))
ce48b210
MN
438 return 1;
439 msr |= MSR_VSX;
ec67ad82 440 }
c6e6771b 441#endif /* CONFIG_VSX */
81e7009e
SR
442#ifdef CONFIG_SPE
443 /* save spe registers */
444 if (current->thread.used_spe) {
445 flush_spe_to_thread(current);
446 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
447 ELF_NEVRREG * sizeof(u32)))
448 return 1;
449 /* set MSR_SPE in the saved MSR value to indicate that
450 frame->mc_vregs contains valid data */
9e751186 451 msr |= MSR_SPE;
81e7009e
SR
452 }
453 /* else assert((regs->msr & MSR_SPE) == 0) */
454
455 /* We always copy to/from spefscr */
456 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
457 return 1;
458#endif /* CONFIG_SPE */
459
9e751186
MN
460 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
461 return 1;
1d25f11f
MN
462 /* We need to write 0 the MSR top 32 bits in the tm frame so that we
463 * can check it on the restore to see if TM is active
464 */
465 if (tm_frame && __put_user(0, &tm_frame->mc_gregs[PT_MSR]))
466 return 1;
467
1da177e4 468 if (sigret) {
d16952a6
CL
469 /* Set up the sigreturn trampoline: li 0,sigret; sc */
470 if (__put_user(PPC_INST_ADDI + sigret, &frame->tramp[0])
471 || __put_user(PPC_INST_SC, &frame->tramp[1]))
1da177e4
LT
472 return 1;
473 flush_icache_range((unsigned long) &frame->tramp[0],
474 (unsigned long) &frame->tramp[2]);
475 }
476
477 return 0;
478}
479
2b0a576d
MN
480#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
481/*
482 * Save the current user registers on the user stack.
483 * We only save the altivec/spe registers if the process has used
484 * altivec/spe instructions at some point.
485 * We also save the transactional registers to a second ucontext in the
486 * frame.
487 *
488 * See save_user_regs() and signal_64.c:setup_tm_sigcontexts().
489 */
490static int save_tm_user_regs(struct pt_regs *regs,
491 struct mcontext __user *frame,
492 struct mcontext __user *tm_frame, int sigret)
493{
494 unsigned long msr = regs->msr;
495
92fb8690
MN
496 WARN_ON(tm_suspend_disabled);
497
d31626f7
PM
498 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
499 * just indicates to userland that we were doing a transaction, but we
500 * don't want to return in transactional state. This also ensures
501 * that flush_fp_to_thread won't set TIF_RESTORE_TM again.
502 */
503 regs->msr &= ~MSR_TS_MASK;
504
2b0a576d
MN
505 /* Save both sets of general registers */
506 if (save_general_regs(&current->thread.ckpt_regs, frame)
507 || save_general_regs(regs, tm_frame))
508 return 1;
509
510 /* Stash the top half of the 64bit MSR into the 32bit MSR word
511 * of the transactional mcontext. This way we have a backward-compatible
512 * MSR in the 'normal' (checkpointed) mcontext and additionally one can
513 * also look at what type of transaction (T or S) was active at the
514 * time of the signal.
515 */
516 if (__put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR]))
517 return 1;
518
519#ifdef CONFIG_ALTIVEC
520 /* save altivec registers */
521 if (current->thread.used_vr) {
000ec280 522 if (__copy_to_user(&frame->mc_vregs, &current->thread.ckvr_state,
2b0a576d
MN
523 ELF_NVRREG * sizeof(vector128)))
524 return 1;
525 if (msr & MSR_VEC) {
526 if (__copy_to_user(&tm_frame->mc_vregs,
dc310669 527 &current->thread.vr_state,
2b0a576d
MN
528 ELF_NVRREG * sizeof(vector128)))
529 return 1;
530 } else {
531 if (__copy_to_user(&tm_frame->mc_vregs,
000ec280 532 &current->thread.ckvr_state,
2b0a576d
MN
533 ELF_NVRREG * sizeof(vector128)))
534 return 1;
535 }
536
537 /* set MSR_VEC in the saved MSR value to indicate that
538 * frame->mc_vregs contains valid data
539 */
540 msr |= MSR_VEC;
541 }
542
543 /* We always copy to/from vrsave, it's 0 if we don't have or don't
544 * use altivec. Since VSCR only contains 32 bits saved in the least
545 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
546 * most significant bits of that same vector. --BenH
547 */
408a7e08 548 if (cpu_has_feature(CPU_FTR_ALTIVEC))
000ec280
CB
549 current->thread.ckvrsave = mfspr(SPRN_VRSAVE);
550 if (__put_user(current->thread.ckvrsave,
2b0a576d
MN
551 (u32 __user *)&frame->mc_vregs[32]))
552 return 1;
553 if (msr & MSR_VEC) {
dc310669 554 if (__put_user(current->thread.vrsave,
2b0a576d
MN
555 (u32 __user *)&tm_frame->mc_vregs[32]))
556 return 1;
557 } else {
000ec280 558 if (__put_user(current->thread.ckvrsave,
2b0a576d
MN
559 (u32 __user *)&tm_frame->mc_vregs[32]))
560 return 1;
561 }
562#endif /* CONFIG_ALTIVEC */
563
000ec280 564 if (copy_ckfpr_to_user(&frame->mc_fregs, current))
2b0a576d
MN
565 return 1;
566 if (msr & MSR_FP) {
dc310669 567 if (copy_fpr_to_user(&tm_frame->mc_fregs, current))
2b0a576d
MN
568 return 1;
569 } else {
000ec280 570 if (copy_ckfpr_to_user(&tm_frame->mc_fregs, current))
2b0a576d
MN
571 return 1;
572 }
573
574#ifdef CONFIG_VSX
575 /*
576 * Copy VSR 0-31 upper half from thread_struct to local
577 * buffer, then write that to userspace. Also set MSR_VSX in
578 * the saved MSR value to indicate that frame->mc_vregs
579 * contains valid data
580 */
581 if (current->thread.used_vsr) {
000ec280 582 if (copy_ckvsx_to_user(&frame->mc_vsregs, current))
2b0a576d
MN
583 return 1;
584 if (msr & MSR_VSX) {
dc310669 585 if (copy_vsx_to_user(&tm_frame->mc_vsregs,
2b0a576d
MN
586 current))
587 return 1;
588 } else {
000ec280 589 if (copy_ckvsx_to_user(&tm_frame->mc_vsregs, current))
2b0a576d
MN
590 return 1;
591 }
592
593 msr |= MSR_VSX;
594 }
595#endif /* CONFIG_VSX */
596#ifdef CONFIG_SPE
597 /* SPE regs are not checkpointed with TM, so this section is
598 * simply the same as in save_user_regs().
599 */
600 if (current->thread.used_spe) {
601 flush_spe_to_thread(current);
602 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
603 ELF_NEVRREG * sizeof(u32)))
604 return 1;
605 /* set MSR_SPE in the saved MSR value to indicate that
606 * frame->mc_vregs contains valid data */
607 msr |= MSR_SPE;
608 }
609
610 /* We always copy to/from spefscr */
611 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
612 return 1;
613#endif /* CONFIG_SPE */
614
615 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
616 return 1;
617 if (sigret) {
d16952a6
CL
618 /* Set up the sigreturn trampoline: li 0,sigret; sc */
619 if (__put_user(PPC_INST_ADDI + sigret, &frame->tramp[0])
620 || __put_user(PPC_INST_SC, &frame->tramp[1]))
2b0a576d
MN
621 return 1;
622 flush_icache_range((unsigned long) &frame->tramp[0],
623 (unsigned long) &frame->tramp[2]);
624 }
625
626 return 0;
627}
628#endif
629
1da177e4
LT
630/*
631 * Restore the current user register values from the user stack,
632 * (except for MSR).
633 */
634static long restore_user_regs(struct pt_regs *regs,
81e7009e 635 struct mcontext __user *sr, int sig)
1da177e4 636{
81e7009e 637 long err;
1da177e4 638 unsigned int save_r2 = 0;
1da177e4 639 unsigned long msr;
c6e6771b 640#ifdef CONFIG_VSX
c6e6771b
MN
641 int i;
642#endif
1da177e4
LT
643
644 /*
645 * restore general registers but not including MSR or SOFTE. Also
646 * take care of keeping r2 (TLS) intact if not a signal
647 */
648 if (!sig)
649 save_r2 = (unsigned int)regs->gpr[2];
81e7009e 650 err = restore_general_regs(regs, sr);
9a81c16b 651 regs->trap = 0;
fab5db97 652 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
1da177e4
LT
653 if (!sig)
654 regs->gpr[2] = (unsigned long) save_r2;
655 if (err)
656 return 1;
657
fab5db97
PM
658 /* if doing signal return, restore the previous little-endian mode */
659 if (sig)
660 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
661
1da177e4 662#ifdef CONFIG_ALTIVEC
c6e6771b
MN
663 /*
664 * Force the process to reload the altivec registers from
665 * current->thread when it next does altivec instructions
666 */
1da177e4 667 regs->msr &= ~MSR_VEC;
fab5db97 668 if (msr & MSR_VEC) {
1da177e4 669 /* restore altivec registers from the stack */
de79f7b9 670 if (__copy_from_user(&current->thread.vr_state, &sr->mc_vregs,
1da177e4
LT
671 sizeof(sr->mc_vregs)))
672 return 1;
e1c0d66f 673 current->thread.used_vr = true;
1da177e4 674 } else if (current->thread.used_vr)
de79f7b9
PM
675 memset(&current->thread.vr_state, 0,
676 ELF_NVRREG * sizeof(vector128));
1da177e4
LT
677
678 /* Always get VRSAVE back */
679 if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
680 return 1;
408a7e08
PM
681 if (cpu_has_feature(CPU_FTR_ALTIVEC))
682 mtspr(SPRN_VRSAVE, current->thread.vrsave);
1da177e4 683#endif /* CONFIG_ALTIVEC */
6a274c08
MN
684 if (copy_fpr_from_user(current, &sr->mc_fregs))
685 return 1;
1da177e4 686
c6e6771b 687#ifdef CONFIG_VSX
ce48b210
MN
688 /*
689 * Force the process to reload the VSX registers from
690 * current->thread when it next does VSX instruction.
691 */
692 regs->msr &= ~MSR_VSX;
693 if (msr & MSR_VSX) {
694 /*
695 * Restore altivec registers from the stack to a local
696 * buffer, then write this out to the thread_struct
697 */
6a274c08 698 if (copy_vsx_from_user(current, &sr->mc_vsregs))
ce48b210 699 return 1;
e1c0d66f 700 current->thread.used_vsr = true;
ce48b210
MN
701 } else if (current->thread.used_vsr)
702 for (i = 0; i < 32 ; i++)
de79f7b9 703 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
c6e6771b
MN
704#endif /* CONFIG_VSX */
705 /*
706 * force the process to reload the FP registers from
707 * current->thread when it next does FP instructions
708 */
709 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
710
81e7009e
SR
711#ifdef CONFIG_SPE
712 /* force the process to reload the spe registers from
713 current->thread when it next does spe instructions */
714 regs->msr &= ~MSR_SPE;
fab5db97 715 if (msr & MSR_SPE) {
81e7009e
SR
716 /* restore spe registers from the stack */
717 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
718 ELF_NEVRREG * sizeof(u32)))
719 return 1;
e1c0d66f 720 current->thread.used_spe = true;
81e7009e
SR
721 } else if (current->thread.used_spe)
722 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
723
724 /* Always get SPEFSCR back */
725 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs + ELF_NEVRREG))
726 return 1;
727#endif /* CONFIG_SPE */
728
1da177e4
LT
729 return 0;
730}
731
2b0a576d
MN
732#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
733/*
734 * Restore the current user register values from the user stack, except for
735 * MSR, and recheckpoint the original checkpointed register state for processes
736 * in transactions.
737 */
738static long restore_tm_user_regs(struct pt_regs *regs,
739 struct mcontext __user *sr,
740 struct mcontext __user *tm_sr)
741{
742 long err;
2c27a18f 743 unsigned long msr, msr_hi;
2b0a576d
MN
744#ifdef CONFIG_VSX
745 int i;
746#endif
747
92fb8690
MN
748 if (tm_suspend_disabled)
749 return 1;
2b0a576d
MN
750 /*
751 * restore general registers but not including MSR or SOFTE. Also
752 * take care of keeping r2 (TLS) intact if not a signal.
753 * See comment in signal_64.c:restore_tm_sigcontexts();
754 * TFHAR is restored from the checkpointed NIP; TEXASR and TFIAR
755 * were set by the signal delivery.
756 */
757 err = restore_general_regs(regs, tm_sr);
758 err |= restore_general_regs(&current->thread.ckpt_regs, sr);
759
760 err |= __get_user(current->thread.tm_tfhar, &sr->mc_gregs[PT_NIP]);
761
762 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
763 if (err)
764 return 1;
765
766 /* Restore the previous little-endian mode */
767 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
768
2b0a576d
MN
769#ifdef CONFIG_ALTIVEC
770 regs->msr &= ~MSR_VEC;
771 if (msr & MSR_VEC) {
772 /* restore altivec registers from the stack */
000ec280 773 if (__copy_from_user(&current->thread.ckvr_state, &sr->mc_vregs,
2b0a576d 774 sizeof(sr->mc_vregs)) ||
dc310669 775 __copy_from_user(&current->thread.vr_state,
2b0a576d
MN
776 &tm_sr->mc_vregs,
777 sizeof(sr->mc_vregs)))
778 return 1;
e1c0d66f 779 current->thread.used_vr = true;
2b0a576d 780 } else if (current->thread.used_vr) {
de79f7b9
PM
781 memset(&current->thread.vr_state, 0,
782 ELF_NVRREG * sizeof(vector128));
000ec280 783 memset(&current->thread.ckvr_state, 0,
2b0a576d
MN
784 ELF_NVRREG * sizeof(vector128));
785 }
786
787 /* Always get VRSAVE back */
000ec280 788 if (__get_user(current->thread.ckvrsave,
2b0a576d 789 (u32 __user *)&sr->mc_vregs[32]) ||
dc310669 790 __get_user(current->thread.vrsave,
2b0a576d
MN
791 (u32 __user *)&tm_sr->mc_vregs[32]))
792 return 1;
408a7e08 793 if (cpu_has_feature(CPU_FTR_ALTIVEC))
000ec280 794 mtspr(SPRN_VRSAVE, current->thread.ckvrsave);
2b0a576d
MN
795#endif /* CONFIG_ALTIVEC */
796
797 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
798
799 if (copy_fpr_from_user(current, &sr->mc_fregs) ||
000ec280 800 copy_ckfpr_from_user(current, &tm_sr->mc_fregs))
2b0a576d
MN
801 return 1;
802
803#ifdef CONFIG_VSX
804 regs->msr &= ~MSR_VSX;
805 if (msr & MSR_VSX) {
806 /*
807 * Restore altivec registers from the stack to a local
808 * buffer, then write this out to the thread_struct
809 */
dc310669 810 if (copy_vsx_from_user(current, &tm_sr->mc_vsregs) ||
000ec280 811 copy_ckvsx_from_user(current, &sr->mc_vsregs))
2b0a576d 812 return 1;
e1c0d66f 813 current->thread.used_vsr = true;
2b0a576d
MN
814 } else if (current->thread.used_vsr)
815 for (i = 0; i < 32 ; i++) {
de79f7b9 816 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
000ec280 817 current->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
2b0a576d
MN
818 }
819#endif /* CONFIG_VSX */
820
821#ifdef CONFIG_SPE
822 /* SPE regs are not checkpointed with TM, so this section is
823 * simply the same as in restore_user_regs().
824 */
825 regs->msr &= ~MSR_SPE;
826 if (msr & MSR_SPE) {
827 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
828 ELF_NEVRREG * sizeof(u32)))
829 return 1;
e1c0d66f 830 current->thread.used_spe = true;
2b0a576d
MN
831 } else if (current->thread.used_spe)
832 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
833
834 /* Always get SPEFSCR back */
835 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs
836 + ELF_NEVRREG))
837 return 1;
838#endif /* CONFIG_SPE */
839
d2b9d2a5
MN
840 /* Get the top half of the MSR from the user context */
841 if (__get_user(msr_hi, &tm_sr->mc_gregs[PT_MSR]))
842 return 1;
843 msr_hi <<= 32;
844 /* If TM bits are set to the reserved value, it's an invalid context */
845 if (MSR_TM_RESV(msr_hi))
846 return 1;
e1c3743e
BL
847
848 /*
849 * Disabling preemption, since it is unsafe to be preempted
850 * with MSR[TS] set without recheckpointing.
851 */
852 preempt_disable();
853
854 /*
855 * CAUTION:
856 * After regs->MSR[TS] being updated, make sure that get_user(),
857 * put_user() or similar functions are *not* called. These
858 * functions can generate page faults which will cause the process
859 * to be de-scheduled with MSR[TS] set but without calling
860 * tm_recheckpoint(). This can cause a bug.
861 *
862 * Pull in the MSR TM bits from the user context
863 */
d2b9d2a5 864 regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr_hi & MSR_TS_MASK);
2b0a576d
MN
865 /* Now, recheckpoint. This loads up all of the checkpointed (older)
866 * registers, including FP and V[S]Rs. After recheckpointing, the
867 * transactional versions should be loaded.
868 */
869 tm_enable();
e6b8fd02
MN
870 /* Make sure the transaction is marked as failed */
871 current->thread.tm_texasr |= TEXASR_FS;
2b0a576d 872 /* This loads the checkpointed FP/VEC state, if used */
eb5c3f1c 873 tm_recheckpoint(&current->thread);
2b0a576d
MN
874
875 /* This loads the speculative FP/VEC state, if used */
dc310669 876 msr_check_and_set(msr & (MSR_FP | MSR_VEC));
2b0a576d 877 if (msr & MSR_FP) {
dc310669 878 load_fp_state(&current->thread.fp_state);
2b0a576d
MN
879 regs->msr |= (MSR_FP | current->thread.fpexc_mode);
880 }
f110c0c1 881#ifdef CONFIG_ALTIVEC
2b0a576d 882 if (msr & MSR_VEC) {
dc310669 883 load_vr_state(&current->thread.vr_state);
2b0a576d
MN
884 regs->msr |= MSR_VEC;
885 }
f110c0c1 886#endif
2b0a576d 887
e1c3743e
BL
888 preempt_enable();
889
2b0a576d
MN
890 return 0;
891}
892#endif
893
81e7009e 894#ifdef CONFIG_PPC64
1da177e4 895
81e7009e
SR
896#define copy_siginfo_to_user copy_siginfo_to_user32
897
81e7009e 898#endif /* CONFIG_PPC64 */
1da177e4 899
1da177e4
LT
900/*
901 * Set up a signal frame for a "real-time" signal handler
902 * (one which gets siginfo).
903 */
129b69df 904int handle_rt_signal32(struct ksignal *ksig, sigset_t *oldset,
d1199431 905 struct task_struct *tsk)
1da177e4 906{
81e7009e
SR
907 struct rt_sigframe __user *rt_sf;
908 struct mcontext __user *frame;
1d25f11f 909 struct mcontext __user *tm_frame = NULL;
d0c3d534 910 void __user *addr;
a3f61dc0 911 unsigned long newsp = 0;
2b0a576d
MN
912 int sigret;
913 unsigned long tramp;
d1199431
CB
914 struct pt_regs *regs = tsk->thread.regs;
915
916 BUG_ON(tsk != current);
1da177e4
LT
917
918 /* Set up Signal Frame */
919 /* Put a Real Time Context onto stack */
d1199431 920 rt_sf = get_sigframe(ksig, get_tm_stackpointer(tsk), sizeof(*rt_sf), 1);
d0c3d534 921 addr = rt_sf;
a3f61dc0 922 if (unlikely(rt_sf == NULL))
1da177e4
LT
923 goto badframe;
924
1da177e4 925 /* Put the siginfo & fill in most of the ucontext */
129b69df 926 if (copy_siginfo_to_user(&rt_sf->info, &ksig->info)
1da177e4 927 || __put_user(0, &rt_sf->uc.uc_flags)
7cce2465 928 || __save_altstack(&rt_sf->uc.uc_stack, regs->gpr[1])
81e7009e
SR
929 || __put_user(to_user_ptr(&rt_sf->uc.uc_mcontext),
930 &rt_sf->uc.uc_regs)
931 || put_sigset_t(&rt_sf->uc.uc_sigmask, oldset))
1da177e4
LT
932 goto badframe;
933
934 /* Save user registers on the stack */
935 frame = &rt_sf->uc.uc_mcontext;
d0c3d534 936 addr = frame;
d1199431 937 if (vdso32_rt_sigtramp && tsk->mm->context.vdso_base) {
2b0a576d 938 sigret = 0;
d1199431 939 tramp = tsk->mm->context.vdso_base + vdso32_rt_sigtramp;
a7f290da 940 } else {
2b0a576d
MN
941 sigret = __NR_rt_sigreturn;
942 tramp = (unsigned long) frame->tramp;
943 }
944
945#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1d25f11f 946 tm_frame = &rt_sf->uc_transact.uc_mcontext;
2b0a576d 947 if (MSR_TM_ACTIVE(regs->msr)) {
d765ff23
PM
948 if (__put_user((unsigned long)&rt_sf->uc_transact,
949 &rt_sf->uc.uc_link) ||
950 __put_user((unsigned long)tm_frame,
951 &rt_sf->uc_transact.uc_regs))
952 goto badframe;
1d25f11f 953 if (save_tm_user_regs(regs, frame, tm_frame, sigret))
1da177e4 954 goto badframe;
1da177e4 955 }
2b0a576d
MN
956 else
957#endif
1d25f11f 958 {
d765ff23
PM
959 if (__put_user(0, &rt_sf->uc.uc_link))
960 goto badframe;
1d25f11f 961 if (save_user_regs(regs, frame, tm_frame, sigret, 1))
2b0a576d 962 goto badframe;
1d25f11f 963 }
2b0a576d
MN
964 regs->link = tramp;
965
d1199431 966 tsk->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
cc657f53 967
a3f61dc0
BH
968 /* create a stack frame for the caller of the handler */
969 newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16);
d0c3d534 970 addr = (void __user *)regs->gpr[1];
e2b55306 971 if (put_user(regs->gpr[1], (u32 __user *)newsp))
81e7009e 972 goto badframe;
a3f61dc0
BH
973
974 /* Fill registers for signal handler */
81e7009e 975 regs->gpr[1] = newsp;
129b69df 976 regs->gpr[3] = ksig->sig;
1da177e4
LT
977 regs->gpr[4] = (unsigned long) &rt_sf->info;
978 regs->gpr[5] = (unsigned long) &rt_sf->uc;
979 regs->gpr[6] = (unsigned long) rt_sf;
129b69df 980 regs->nip = (unsigned long) ksig->ka.sa.sa_handler;
e871c6bb 981 /* enter the signal handler in native-endian mode */
fab5db97 982 regs->msr &= ~MSR_LE;
e871c6bb 983 regs->msr |= (MSR_KERNEL & MSR_LE);
129b69df 984 return 0;
1da177e4
LT
985
986badframe:
76462232
CD
987 if (show_unhandled_signals)
988 printk_ratelimited(KERN_INFO
989 "%s[%d]: bad frame in handle_rt_signal32: "
990 "%p nip %08lx lr %08lx\n",
d1199431 991 tsk->comm, tsk->pid,
76462232 992 addr, regs->nip, regs->link);
d0c3d534 993
129b69df 994 return 1;
1da177e4
LT
995}
996
81e7009e 997static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig)
1da177e4 998{
1da177e4 999 sigset_t set;
81e7009e
SR
1000 struct mcontext __user *mcp;
1001
1002 if (get_sigset_t(&set, &ucp->uc_sigmask))
1003 return -EFAULT;
1004#ifdef CONFIG_PPC64
1005 {
1006 u32 cmcp;
1da177e4 1007
81e7009e
SR
1008 if (__get_user(cmcp, &ucp->uc_regs))
1009 return -EFAULT;
1010 mcp = (struct mcontext __user *)(u64)cmcp;
7c85d1f9 1011 /* no need to check access_ok(mcp), since mcp < 4GB */
81e7009e
SR
1012 }
1013#else
1014 if (__get_user(mcp, &ucp->uc_regs))
1da177e4 1015 return -EFAULT;
96d4f267 1016 if (!access_ok(mcp, sizeof(*mcp)))
7c85d1f9 1017 return -EFAULT;
81e7009e 1018#endif
17440f17 1019 set_current_blocked(&set);
81e7009e 1020 if (restore_user_regs(regs, mcp, sig))
1da177e4
LT
1021 return -EFAULT;
1022
1023 return 0;
1024}
1025
2b0a576d
MN
1026#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1027static int do_setcontext_tm(struct ucontext __user *ucp,
1028 struct ucontext __user *tm_ucp,
1029 struct pt_regs *regs)
1030{
1031 sigset_t set;
1032 struct mcontext __user *mcp;
1033 struct mcontext __user *tm_mcp;
1034 u32 cmcp;
1035 u32 tm_cmcp;
1036
1037 if (get_sigset_t(&set, &ucp->uc_sigmask))
1038 return -EFAULT;
1039
1040 if (__get_user(cmcp, &ucp->uc_regs) ||
1041 __get_user(tm_cmcp, &tm_ucp->uc_regs))
1042 return -EFAULT;
1043 mcp = (struct mcontext __user *)(u64)cmcp;
1044 tm_mcp = (struct mcontext __user *)(u64)tm_cmcp;
1045 /* no need to check access_ok(mcp), since mcp < 4GB */
1046
1047 set_current_blocked(&set);
1048 if (restore_tm_user_regs(regs, mcp, tm_mcp))
1049 return -EFAULT;
1050
1051 return 0;
1052}
1053#endif
1054
f3675644
AV
1055#ifdef CONFIG_PPC64
1056COMPAT_SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx,
1057 struct ucontext __user *, new_ctx, int, ctx_size)
1058#else
1059SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx,
1060 struct ucontext __user *, new_ctx, long, ctx_size)
1061#endif
1da177e4 1062{
f3675644 1063 struct pt_regs *regs = current_pt_regs();
16c29d18 1064 int ctx_has_vsx_region = 0;
1da177e4 1065
c1cb299e
MN
1066#ifdef CONFIG_PPC64
1067 unsigned long new_msr = 0;
1068
77eb50ae
AS
1069 if (new_ctx) {
1070 struct mcontext __user *mcp;
1071 u32 cmcp;
1072
1073 /*
1074 * Get pointer to the real mcontext. No need for
1075 * access_ok since we are dealing with compat
1076 * pointers.
1077 */
1078 if (__get_user(cmcp, &new_ctx->uc_regs))
1079 return -EFAULT;
1080 mcp = (struct mcontext __user *)(u64)cmcp;
1081 if (__get_user(new_msr, &mcp->mc_gregs[PT_MSR]))
1082 return -EFAULT;
1083 }
c1cb299e
MN
1084 /*
1085 * Check that the context is not smaller than the original
1086 * size (with VMX but without VSX)
1087 */
1088 if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
1089 return -EINVAL;
1090 /*
1091 * If the new context state sets the MSR VSX bits but
1092 * it doesn't provide VSX state.
1093 */
1094 if ((ctx_size < sizeof(struct ucontext)) &&
1095 (new_msr & MSR_VSX))
1096 return -EINVAL;
16c29d18
MN
1097 /* Does the context have enough room to store VSX data? */
1098 if (ctx_size >= sizeof(struct ucontext))
1099 ctx_has_vsx_region = 1;
c1cb299e 1100#else
1da177e4
LT
1101 /* Context size is for future use. Right now, we only make sure
1102 * we are passed something we understand
1103 */
81e7009e 1104 if (ctx_size < sizeof(struct ucontext))
1da177e4 1105 return -EINVAL;
c1cb299e 1106#endif
1da177e4 1107 if (old_ctx != NULL) {
1c9bb1a0
PM
1108 struct mcontext __user *mctx;
1109
1110 /*
1111 * old_ctx might not be 16-byte aligned, in which
1112 * case old_ctx->uc_mcontext won't be either.
1113 * Because we have the old_ctx->uc_pad2 field
1114 * before old_ctx->uc_mcontext, we need to round down
1115 * from &old_ctx->uc_mcontext to a 16-byte boundary.
1116 */
1117 mctx = (struct mcontext __user *)
1118 ((unsigned long) &old_ctx->uc_mcontext & ~0xfUL);
96d4f267 1119 if (!access_ok(old_ctx, ctx_size)
1d25f11f 1120 || save_user_regs(regs, mctx, NULL, 0, ctx_has_vsx_region)
81e7009e 1121 || put_sigset_t(&old_ctx->uc_sigmask, &current->blocked)
1c9bb1a0 1122 || __put_user(to_user_ptr(mctx), &old_ctx->uc_regs))
1da177e4
LT
1123 return -EFAULT;
1124 }
1125 if (new_ctx == NULL)
1126 return 0;
96d4f267 1127 if (!access_ok(new_ctx, ctx_size) ||
56b04d56 1128 fault_in_pages_readable((u8 __user *)new_ctx, ctx_size))
1da177e4
LT
1129 return -EFAULT;
1130
1131 /*
1132 * If we get a fault copying the context into the kernel's
1133 * image of the user's registers, we can't just return -EFAULT
1134 * because the user's registers will be corrupted. For instance
1135 * the NIP value may have been updated but not some of the
1136 * other registers. Given that we have done the access_ok
1137 * and successfully read the first and last bytes of the region
1138 * above, this should only happen in an out-of-memory situation
1139 * or if another thread unmaps the region containing the context.
1140 * We kill the task with a SIGSEGV in this situation.
1141 */
81e7009e 1142 if (do_setcontext(new_ctx, regs, 0))
1da177e4 1143 do_exit(SIGSEGV);
401d1f02
DW
1144
1145 set_thread_flag(TIF_RESTOREALL);
1da177e4
LT
1146 return 0;
1147}
1148
f3675644
AV
1149#ifdef CONFIG_PPC64
1150COMPAT_SYSCALL_DEFINE0(rt_sigreturn)
1151#else
1152SYSCALL_DEFINE0(rt_sigreturn)
1153#endif
1da177e4 1154{
81e7009e 1155 struct rt_sigframe __user *rt_sf;
f3675644 1156 struct pt_regs *regs = current_pt_regs();
6f5b9f01 1157 int tm_restore = 0;
2b0a576d
MN
1158#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1159 struct ucontext __user *uc_transact;
1160 unsigned long msr_hi;
1161 unsigned long tmp;
2b0a576d 1162#endif
1da177e4 1163 /* Always make any pending restarted system calls return -EINTR */
f56141e3 1164 current->restart_block.fn = do_no_restart_syscall;
1da177e4 1165
81e7009e
SR
1166 rt_sf = (struct rt_sigframe __user *)
1167 (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16);
96d4f267 1168 if (!access_ok(rt_sf, sizeof(*rt_sf)))
1da177e4 1169 goto bad;
78a3e888 1170
2b0a576d 1171#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
78a3e888
CB
1172 /*
1173 * If there is a transactional state then throw it away.
1174 * The purpose of a sigreturn is to destroy all traces of the
1175 * signal frame, this includes any transactional state created
1176 * within in. We only check for suspended as we can never be
1177 * active in the kernel, we are active, there is nothing better to
1178 * do than go ahead and Bad Thing later.
1179 * The cause is not important as there will never be a
1180 * recheckpoint so it's not user visible.
1181 */
1182 if (MSR_TM_SUSPENDED(mfmsr()))
1183 tm_reclaim_current(0);
1184
2b0a576d
MN
1185 if (__get_user(tmp, &rt_sf->uc.uc_link))
1186 goto bad;
1187 uc_transact = (struct ucontext __user *)(uintptr_t)tmp;
1188 if (uc_transact) {
1189 u32 cmcp;
1190 struct mcontext __user *mcp;
1191
1192 if (__get_user(cmcp, &uc_transact->uc_regs))
1193 return -EFAULT;
1194 mcp = (struct mcontext __user *)(u64)cmcp;
1195 /* The top 32 bits of the MSR are stashed in the transactional
1196 * ucontext. */
1197 if (__get_user(msr_hi, &mcp->mc_gregs[PT_MSR]))
1198 goto bad;
1199
55e43418 1200 if (MSR_TM_ACTIVE(msr_hi<<32)) {
2b0a576d
MN
1201 /* We only recheckpoint on return if we're
1202 * transaction.
1203 */
1204 tm_restore = 1;
1205 if (do_setcontext_tm(&rt_sf->uc, uc_transact, regs))
1206 goto bad;
1207 }
1208 }
6f5b9f01
BL
1209 if (!tm_restore) {
1210 /*
1211 * Unset regs->msr because ucontext MSR TS is not
1212 * set, and recheckpoint was not called. This avoid
1213 * hitting a TM Bad thing at RFID
1214 */
1215 regs->msr &= ~MSR_TS_MASK;
1216 }
1217 /* Fall through, for non-TM restore */
2b0a576d 1218#endif
6f5b9f01
BL
1219 if (!tm_restore)
1220 if (do_setcontext(&rt_sf->uc, regs, 1))
1221 goto bad;
1da177e4
LT
1222
1223 /*
1224 * It's not clear whether or why it is desirable to save the
1225 * sigaltstack setting on signal delivery and restore it on
1226 * signal return. But other architectures do this and we have
1227 * always done it up until now so it is probably better not to
1228 * change it. -- paulus
81e7009e
SR
1229 */
1230#ifdef CONFIG_PPC64
7cce2465
AV
1231 if (compat_restore_altstack(&rt_sf->uc.uc_stack))
1232 goto bad;
81e7009e 1233#else
7cce2465
AV
1234 if (restore_altstack(&rt_sf->uc.uc_stack))
1235 goto bad;
81e7009e 1236#endif
401d1f02
DW
1237 set_thread_flag(TIF_RESTOREALL);
1238 return 0;
1da177e4
LT
1239
1240 bad:
76462232
CD
1241 if (show_unhandled_signals)
1242 printk_ratelimited(KERN_INFO
1243 "%s[%d]: bad frame in sys_rt_sigreturn: "
1244 "%p nip %08lx lr %08lx\n",
1245 current->comm, current->pid,
1246 rt_sf, regs->nip, regs->link);
d0c3d534 1247
1da177e4
LT
1248 force_sig(SIGSEGV, current);
1249 return 0;
1250}
1251
81e7009e 1252#ifdef CONFIG_PPC32
f3675644
AV
1253SYSCALL_DEFINE3(debug_setcontext, struct ucontext __user *, ctx,
1254 int, ndbg, struct sig_dbg_op __user *, dbg)
81e7009e 1255{
f3675644 1256 struct pt_regs *regs = current_pt_regs();
81e7009e
SR
1257 struct sig_dbg_op op;
1258 int i;
1259 unsigned long new_msr = regs->msr;
172ae2e7 1260#ifdef CONFIG_PPC_ADV_DEBUG_REGS
51ae8d4a 1261 unsigned long new_dbcr0 = current->thread.debug.dbcr0;
81e7009e
SR
1262#endif
1263
1264 for (i=0; i<ndbg; i++) {
7c85d1f9 1265 if (copy_from_user(&op, dbg + i, sizeof(op)))
81e7009e
SR
1266 return -EFAULT;
1267 switch (op.dbg_type) {
1268 case SIG_DBG_SINGLE_STEPPING:
172ae2e7 1269#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1270 if (op.dbg_value) {
1271 new_msr |= MSR_DE;
1272 new_dbcr0 |= (DBCR0_IDM | DBCR0_IC);
1273 } else {
3bffb652
DK
1274 new_dbcr0 &= ~DBCR0_IC;
1275 if (!DBCR_ACTIVE_EVENTS(new_dbcr0,
51ae8d4a 1276 current->thread.debug.dbcr1)) {
3bffb652
DK
1277 new_msr &= ~MSR_DE;
1278 new_dbcr0 &= ~DBCR0_IDM;
1279 }
81e7009e
SR
1280 }
1281#else
1282 if (op.dbg_value)
1283 new_msr |= MSR_SE;
1284 else
1285 new_msr &= ~MSR_SE;
1286#endif
1287 break;
1288 case SIG_DBG_BRANCH_TRACING:
172ae2e7 1289#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1290 return -EINVAL;
1291#else
1292 if (op.dbg_value)
1293 new_msr |= MSR_BE;
1294 else
1295 new_msr &= ~MSR_BE;
1296#endif
1297 break;
1298
1299 default:
1300 return -EINVAL;
1301 }
1302 }
1303
1304 /* We wait until here to actually install the values in the
1305 registers so if we fail in the above loop, it will not
1306 affect the contents of these registers. After this point,
1307 failure is a problem, anyway, and it's very unlikely unless
1308 the user is really doing something wrong. */
1309 regs->msr = new_msr;
172ae2e7 1310#ifdef CONFIG_PPC_ADV_DEBUG_REGS
51ae8d4a 1311 current->thread.debug.dbcr0 = new_dbcr0;
81e7009e
SR
1312#endif
1313
96d4f267 1314 if (!access_ok(ctx, sizeof(*ctx)) ||
56b04d56 1315 fault_in_pages_readable((u8 __user *)ctx, sizeof(*ctx)))
7c85d1f9
PM
1316 return -EFAULT;
1317
81e7009e
SR
1318 /*
1319 * If we get a fault copying the context into the kernel's
1320 * image of the user's registers, we can't just return -EFAULT
1321 * because the user's registers will be corrupted. For instance
1322 * the NIP value may have been updated but not some of the
1323 * other registers. Given that we have done the access_ok
1324 * and successfully read the first and last bytes of the region
1325 * above, this should only happen in an out-of-memory situation
1326 * or if another thread unmaps the region containing the context.
1327 * We kill the task with a SIGSEGV in this situation.
1328 */
1329 if (do_setcontext(ctx, regs, 1)) {
76462232
CD
1330 if (show_unhandled_signals)
1331 printk_ratelimited(KERN_INFO "%s[%d]: bad frame in "
1332 "sys_debug_setcontext: %p nip %08lx "
1333 "lr %08lx\n",
1334 current->comm, current->pid,
1335 ctx, regs->nip, regs->link);
d0c3d534 1336
81e7009e
SR
1337 force_sig(SIGSEGV, current);
1338 goto out;
1339 }
1340
1341 /*
1342 * It's not clear whether or why it is desirable to save the
1343 * sigaltstack setting on signal delivery and restore it on
1344 * signal return. But other architectures do this and we have
1345 * always done it up until now so it is probably better not to
1346 * change it. -- paulus
1347 */
7cce2465 1348 restore_altstack(&ctx->uc_stack);
81e7009e 1349
401d1f02 1350 set_thread_flag(TIF_RESTOREALL);
81e7009e
SR
1351 out:
1352 return 0;
1353}
1354#endif
1da177e4
LT
1355
1356/*
1357 * OK, we're invoking a handler
1358 */
d1199431
CB
1359int handle_signal32(struct ksignal *ksig, sigset_t *oldset,
1360 struct task_struct *tsk)
1da177e4 1361{
81e7009e 1362 struct sigcontext __user *sc;
a3f61dc0 1363 struct sigframe __user *frame;
1d25f11f 1364 struct mcontext __user *tm_mctx = NULL;
a3f61dc0 1365 unsigned long newsp = 0;
2b0a576d
MN
1366 int sigret;
1367 unsigned long tramp;
d1199431
CB
1368 struct pt_regs *regs = tsk->thread.regs;
1369
1370 BUG_ON(tsk != current);
1da177e4
LT
1371
1372 /* Set up Signal Frame */
d1199431 1373 frame = get_sigframe(ksig, get_tm_stackpointer(tsk), sizeof(*frame), 1);
a3f61dc0 1374 if (unlikely(frame == NULL))
1da177e4 1375 goto badframe;
a3f61dc0 1376 sc = (struct sigcontext __user *) &frame->sctx;
1da177e4
LT
1377
1378#if _NSIG != 64
81e7009e 1379#error "Please adjust handle_signal()"
1da177e4 1380#endif
129b69df 1381 if (__put_user(to_user_ptr(ksig->ka.sa.sa_handler), &sc->handler)
1da177e4 1382 || __put_user(oldset->sig[0], &sc->oldmask)
81e7009e 1383#ifdef CONFIG_PPC64
1da177e4 1384 || __put_user((oldset->sig[0] >> 32), &sc->_unused[3])
81e7009e
SR
1385#else
1386 || __put_user(oldset->sig[1], &sc->_unused[3])
1387#endif
a3f61dc0 1388 || __put_user(to_user_ptr(&frame->mctx), &sc->regs)
129b69df 1389 || __put_user(ksig->sig, &sc->signal))
1da177e4
LT
1390 goto badframe;
1391
d1199431 1392 if (vdso32_sigtramp && tsk->mm->context.vdso_base) {
2b0a576d 1393 sigret = 0;
d1199431 1394 tramp = tsk->mm->context.vdso_base + vdso32_sigtramp;
a7f290da 1395 } else {
2b0a576d
MN
1396 sigret = __NR_sigreturn;
1397 tramp = (unsigned long) frame->mctx.tramp;
1398 }
1399
1400#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1d25f11f 1401 tm_mctx = &frame->mctx_transact;
2b0a576d
MN
1402 if (MSR_TM_ACTIVE(regs->msr)) {
1403 if (save_tm_user_regs(regs, &frame->mctx, &frame->mctx_transact,
1404 sigret))
1da177e4 1405 goto badframe;
1da177e4 1406 }
2b0a576d
MN
1407 else
1408#endif
1d25f11f
MN
1409 {
1410 if (save_user_regs(regs, &frame->mctx, tm_mctx, sigret, 1))
2b0a576d 1411 goto badframe;
1d25f11f 1412 }
2b0a576d
MN
1413
1414 regs->link = tramp;
1da177e4 1415
d1199431 1416 tsk->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
cc657f53 1417
a3f61dc0
BH
1418 /* create a stack frame for the caller of the handler */
1419 newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE;
9747dd6f 1420 if (put_user(regs->gpr[1], (u32 __user *)newsp))
1da177e4 1421 goto badframe;
a3f61dc0 1422
81e7009e 1423 regs->gpr[1] = newsp;
129b69df 1424 regs->gpr[3] = ksig->sig;
1da177e4 1425 regs->gpr[4] = (unsigned long) sc;
129b69df 1426 regs->nip = (unsigned long) (unsigned long)ksig->ka.sa.sa_handler;
fab5db97
PM
1427 /* enter the signal handler in big-endian mode */
1428 regs->msr &= ~MSR_LE;
129b69df 1429 return 0;
1da177e4
LT
1430
1431badframe:
76462232
CD
1432 if (show_unhandled_signals)
1433 printk_ratelimited(KERN_INFO
1434 "%s[%d]: bad frame in handle_signal32: "
1435 "%p nip %08lx lr %08lx\n",
d1199431 1436 tsk->comm, tsk->pid,
76462232 1437 frame, regs->nip, regs->link);
d0c3d534 1438
129b69df 1439 return 1;
1da177e4
LT
1440}
1441
1442/*
1443 * Do a signal return; undo the signal stack.
1444 */
f3675644
AV
1445#ifdef CONFIG_PPC64
1446COMPAT_SYSCALL_DEFINE0(sigreturn)
1447#else
1448SYSCALL_DEFINE0(sigreturn)
1449#endif
1da177e4 1450{
f3675644 1451 struct pt_regs *regs = current_pt_regs();
fee55450 1452 struct sigframe __user *sf;
81e7009e
SR
1453 struct sigcontext __user *sc;
1454 struct sigcontext sigctx;
1455 struct mcontext __user *sr;
d0c3d534 1456 void __user *addr;
1da177e4 1457 sigset_t set;
fee55450
MN
1458#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1459 struct mcontext __user *mcp, *tm_mcp;
1460 unsigned long msr_hi;
1461#endif
1da177e4
LT
1462
1463 /* Always make any pending restarted system calls return -EINTR */
f56141e3 1464 current->restart_block.fn = do_no_restart_syscall;
1da177e4 1465
fee55450
MN
1466 sf = (struct sigframe __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE);
1467 sc = &sf->sctx;
d0c3d534 1468 addr = sc;
1da177e4
LT
1469 if (copy_from_user(&sigctx, sc, sizeof(sigctx)))
1470 goto badframe;
1471
81e7009e 1472#ifdef CONFIG_PPC64
1da177e4
LT
1473 /*
1474 * Note that PPC32 puts the upper 32 bits of the sigmask in the
1475 * unused part of the signal stackframe
1476 */
1477 set.sig[0] = sigctx.oldmask + ((long)(sigctx._unused[3]) << 32);
81e7009e
SR
1478#else
1479 set.sig[0] = sigctx.oldmask;
1480 set.sig[1] = sigctx._unused[3];
1481#endif
17440f17 1482 set_current_blocked(&set);
1da177e4 1483
fee55450
MN
1484#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1485 mcp = (struct mcontext __user *)&sf->mctx;
1486 tm_mcp = (struct mcontext __user *)&sf->mctx_transact;
1487 if (__get_user(msr_hi, &tm_mcp->mc_gregs[PT_MSR]))
1da177e4 1488 goto badframe;
fee55450
MN
1489 if (MSR_TM_ACTIVE(msr_hi<<32)) {
1490 if (!cpu_has_feature(CPU_FTR_TM))
1491 goto badframe;
1492 if (restore_tm_user_regs(regs, mcp, tm_mcp))
1493 goto badframe;
1494 } else
1495#endif
1496 {
1497 sr = (struct mcontext __user *)from_user_ptr(sigctx.regs);
1498 addr = sr;
96d4f267 1499 if (!access_ok(sr, sizeof(*sr))
fee55450
MN
1500 || restore_user_regs(regs, sr, 1))
1501 goto badframe;
1502 }
1da177e4 1503
401d1f02 1504 set_thread_flag(TIF_RESTOREALL);
81e7009e 1505 return 0;
1da177e4
LT
1506
1507badframe:
76462232
CD
1508 if (show_unhandled_signals)
1509 printk_ratelimited(KERN_INFO
1510 "%s[%d]: bad frame in sys_sigreturn: "
1511 "%p nip %08lx lr %08lx\n",
1512 current->comm, current->pid,
1513 addr, regs->nip, regs->link);
d0c3d534 1514
1da177e4
LT
1515 force_sig(SIGSEGV, current);
1516 return 0;
1517}