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1da177e4 1/*
81e7009e 2 * Signal handling for 32bit PPC and 32bit tasks on 64bit PPC
1da177e4 3 *
81e7009e
SR
4 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
1da177e4
LT
6 * Copyright (C) 2001 IBM
7 * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
9 *
81e7009e
SR
10 * Derived from "arch/i386/kernel/signal.c"
11 * Copyright (C) 1991, 1992 Linus Torvalds
12 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
1da177e4 13 *
81e7009e
SR
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version
17 * 2 of the License, or (at your option) any later version.
1da177e4
LT
18 */
19
1da177e4 20#include <linux/sched.h>
81e7009e 21#include <linux/mm.h>
1da177e4 22#include <linux/smp.h>
1da177e4
LT
23#include <linux/kernel.h>
24#include <linux/signal.h>
1da177e4
LT
25#include <linux/errno.h>
26#include <linux/elf.h>
05ead015 27#include <linux/ptrace.h>
76462232 28#include <linux/ratelimit.h>
81e7009e
SR
29#ifdef CONFIG_PPC64
30#include <linux/syscalls.h>
1da177e4 31#include <linux/compat.h>
81e7009e
SR
32#else
33#include <linux/wait.h>
81e7009e
SR
34#include <linux/unistd.h>
35#include <linux/stddef.h>
36#include <linux/tty.h>
37#include <linux/binfmts.h>
81e7009e
SR
38#endif
39
7c0f6ba6 40#include <linux/uaccess.h>
81e7009e 41#include <asm/cacheflush.h>
a7f31841 42#include <asm/syscalls.h>
c5ff7001 43#include <asm/sigcontext.h>
a7f290da 44#include <asm/vdso.h>
ae3a197e 45#include <asm/switch_to.h>
2b0a576d 46#include <asm/tm.h>
0545d543 47#include <asm/asm-prototypes.h>
81e7009e 48#ifdef CONFIG_PPC64
879168ee 49#include "ppc32.h"
1da177e4 50#include <asm/unistd.h>
81e7009e
SR
51#else
52#include <asm/ucontext.h>
53#include <asm/pgtable.h>
54#endif
1da177e4 55
22e38f29
BH
56#include "signal.h"
57
1da177e4 58
81e7009e 59#ifdef CONFIG_PPC64
b09a4913 60#define sys_rt_sigreturn compat_sys_rt_sigreturn
b09a4913
SR
61#define sys_swapcontext compat_sys_swapcontext
62#define sys_sigreturn compat_sys_sigreturn
81e7009e
SR
63
64#define old_sigaction old_sigaction32
65#define sigcontext sigcontext32
66#define mcontext mcontext32
67#define ucontext ucontext32
68
7cce2465
AV
69#define __save_altstack __compat_save_altstack
70
c1cb299e
MN
71/*
72 * Userspace code may pass a ucontext which doesn't include VSX added
73 * at the end. We need to check for this case.
74 */
75#define UCONTEXTSIZEWITHOUTVSX \
76 (sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32))
77
81e7009e
SR
78/*
79 * Returning 0 means we return to userspace via
80 * ret_from_except and thus restore all user
81 * registers from *regs. This is what we need
82 * to do when a signal has been delivered.
83 */
81e7009e
SR
84
85#define GP_REGS_SIZE min(sizeof(elf_gregset_t32), sizeof(struct pt_regs32))
86#undef __SIGNAL_FRAMESIZE
87#define __SIGNAL_FRAMESIZE __SIGNAL_FRAMESIZE32
88#undef ELF_NVRREG
89#define ELF_NVRREG ELF_NVRREG32
90
91/*
92 * Functions for flipping sigsets (thanks to brain dead generic
93 * implementation that makes things simple for little endian only)
94 */
95static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
96{
97 compat_sigset_t cset;
98
99 switch (_NSIG_WORDS) {
a313f4c5 100 case 4: cset.sig[6] = set->sig[3] & 0xffffffffull;
81e7009e
SR
101 cset.sig[7] = set->sig[3] >> 32;
102 case 3: cset.sig[4] = set->sig[2] & 0xffffffffull;
103 cset.sig[5] = set->sig[2] >> 32;
104 case 2: cset.sig[2] = set->sig[1] & 0xffffffffull;
105 cset.sig[3] = set->sig[1] >> 32;
106 case 1: cset.sig[0] = set->sig[0] & 0xffffffffull;
107 cset.sig[1] = set->sig[0] >> 32;
108 }
109 return copy_to_user(uset, &cset, sizeof(*uset));
110}
111
9b7cf8b4
PM
112static inline int get_sigset_t(sigset_t *set,
113 const compat_sigset_t __user *uset)
81e7009e
SR
114{
115 compat_sigset_t s32;
116
117 if (copy_from_user(&s32, uset, sizeof(*uset)))
118 return -EFAULT;
119
120 /*
121 * Swap the 2 words of the 64-bit sigset_t (they are stored
122 * in the "wrong" endian in 32-bit user storage).
123 */
124 switch (_NSIG_WORDS) {
125 case 4: set->sig[3] = s32.sig[6] | (((long)s32.sig[7]) << 32);
126 case 3: set->sig[2] = s32.sig[4] | (((long)s32.sig[5]) << 32);
127 case 2: set->sig[1] = s32.sig[2] | (((long)s32.sig[3]) << 32);
128 case 1: set->sig[0] = s32.sig[0] | (((long)s32.sig[1]) << 32);
129 }
130 return 0;
131}
132
29e646df 133#define to_user_ptr(p) ptr_to_compat(p)
81e7009e
SR
134#define from_user_ptr(p) compat_ptr(p)
135
136static inline int save_general_regs(struct pt_regs *regs,
137 struct mcontext __user *frame)
138{
139 elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
140 int i;
141
1bd79336 142 WARN_ON(!FULL_REGS(regs));
401d1f02
DW
143
144 for (i = 0; i <= PT_RESULT; i ++) {
145 if (i == 14 && !FULL_REGS(regs))
146 i = 32;
81e7009e
SR
147 if (__put_user((unsigned int)gregs[i], &frame->mc_gregs[i]))
148 return -EFAULT;
401d1f02 149 }
81e7009e
SR
150 return 0;
151}
152
153static inline int restore_general_regs(struct pt_regs *regs,
154 struct mcontext __user *sr)
155{
156 elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
157 int i;
158
159 for (i = 0; i <= PT_RESULT; i++) {
160 if ((i == PT_MSR) || (i == PT_SOFTE))
161 continue;
162 if (__get_user(gregs[i], &sr->mc_gregs[i]))
163 return -EFAULT;
164 }
165 return 0;
166}
167
168#else /* CONFIG_PPC64 */
169
81e7009e
SR
170#define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
171
172static inline int put_sigset_t(sigset_t __user *uset, sigset_t *set)
173{
174 return copy_to_user(uset, set, sizeof(*uset));
175}
176
9b7cf8b4 177static inline int get_sigset_t(sigset_t *set, const sigset_t __user *uset)
81e7009e
SR
178{
179 return copy_from_user(set, uset, sizeof(*uset));
180}
181
29e646df
AV
182#define to_user_ptr(p) ((unsigned long)(p))
183#define from_user_ptr(p) ((void __user *)(p))
81e7009e
SR
184
185static inline int save_general_regs(struct pt_regs *regs,
186 struct mcontext __user *frame)
187{
1bd79336 188 WARN_ON(!FULL_REGS(regs));
81e7009e
SR
189 return __copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE);
190}
191
192static inline int restore_general_regs(struct pt_regs *regs,
193 struct mcontext __user *sr)
194{
195 /* copy up to but not including MSR */
196 if (__copy_from_user(regs, &sr->mc_gregs,
197 PT_MSR * sizeof(elf_greg_t)))
198 return -EFAULT;
199 /* copy from orig_r3 (the word after the MSR) up to the end */
200 if (__copy_from_user(&regs->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3],
201 GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t)))
202 return -EFAULT;
203 return 0;
204}
81e7009e
SR
205#endif
206
1da177e4
LT
207/*
208 * When we have signals to deliver, we set up on the
209 * user stack, going down from the original stack pointer:
a3f61dc0
BH
210 * an ABI gap of 56 words
211 * an mcontext struct
81e7009e
SR
212 * a sigcontext struct
213 * a gap of __SIGNAL_FRAMESIZE bytes
1da177e4 214 *
a3f61dc0
BH
215 * Each of these things must be a multiple of 16 bytes in size. The following
216 * structure represent all of this except the __SIGNAL_FRAMESIZE gap
1da177e4
LT
217 *
218 */
a3f61dc0
BH
219struct sigframe {
220 struct sigcontext sctx; /* the sigcontext */
81e7009e 221 struct mcontext mctx; /* all the register values */
2b0a576d
MN
222#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
223 struct sigcontext sctx_transact;
224 struct mcontext mctx_transact;
225#endif
1da177e4
LT
226 /*
227 * Programs using the rs6000/xcoff abi can save up to 19 gp
228 * regs and 18 fp regs below sp before decrementing it.
229 */
230 int abigap[56];
231};
232
233/* We use the mc_pad field for the signal return trampoline. */
234#define tramp mc_pad
235
236/*
237 * When we have rt signals to deliver, we set up on the
238 * user stack, going down from the original stack pointer:
81e7009e
SR
239 * one rt_sigframe struct (siginfo + ucontext + ABI gap)
240 * a gap of __SIGNAL_FRAMESIZE+16 bytes
241 * (the +16 is to get the siginfo and ucontext in the same
1da177e4
LT
242 * positions as in older kernels).
243 *
244 * Each of these things must be a multiple of 16 bytes in size.
245 *
246 */
81e7009e
SR
247struct rt_sigframe {
248#ifdef CONFIG_PPC64
249 compat_siginfo_t info;
250#else
251 struct siginfo info;
252#endif
253 struct ucontext uc;
2b0a576d
MN
254#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
255 struct ucontext uc_transact;
256#endif
1da177e4
LT
257 /*
258 * Programs using the rs6000/xcoff abi can save up to 19 gp
259 * regs and 18 fp regs below sp before decrementing it.
260 */
261 int abigap[56];
262};
263
6a274c08
MN
264#ifdef CONFIG_VSX
265unsigned long copy_fpr_to_user(void __user *to,
266 struct task_struct *task)
267{
de79f7b9 268 u64 buf[ELF_NFPREG];
6a274c08
MN
269 int i;
270
271 /* save FPR copy to local buffer then write to the thread_struct */
272 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
273 buf[i] = task->thread.TS_FPR(i);
de79f7b9 274 buf[i] = task->thread.fp_state.fpscr;
6a274c08
MN
275 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
276}
277
278unsigned long copy_fpr_from_user(struct task_struct *task,
279 void __user *from)
280{
de79f7b9 281 u64 buf[ELF_NFPREG];
6a274c08
MN
282 int i;
283
284 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
285 return 1;
286 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
287 task->thread.TS_FPR(i) = buf[i];
de79f7b9 288 task->thread.fp_state.fpscr = buf[i];
6a274c08
MN
289
290 return 0;
291}
292
293unsigned long copy_vsx_to_user(void __user *to,
294 struct task_struct *task)
295{
de79f7b9 296 u64 buf[ELF_NVSRHALFREG];
6a274c08
MN
297 int i;
298
299 /* save FPR copy to local buffer then write to the thread_struct */
300 for (i = 0; i < ELF_NVSRHALFREG; i++)
de79f7b9 301 buf[i] = task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
6a274c08
MN
302 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
303}
304
305unsigned long copy_vsx_from_user(struct task_struct *task,
306 void __user *from)
307{
de79f7b9 308 u64 buf[ELF_NVSRHALFREG];
6a274c08
MN
309 int i;
310
311 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
312 return 1;
313 for (i = 0; i < ELF_NVSRHALFREG ; i++)
de79f7b9 314 task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
6a274c08
MN
315 return 0;
316}
2b0a576d
MN
317
318#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
000ec280 319unsigned long copy_ckfpr_to_user(void __user *to,
2b0a576d
MN
320 struct task_struct *task)
321{
de79f7b9 322 u64 buf[ELF_NFPREG];
2b0a576d
MN
323 int i;
324
325 /* save FPR copy to local buffer then write to the thread_struct */
326 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
000ec280
CB
327 buf[i] = task->thread.TS_CKFPR(i);
328 buf[i] = task->thread.ckfp_state.fpscr;
2b0a576d
MN
329 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
330}
331
000ec280 332unsigned long copy_ckfpr_from_user(struct task_struct *task,
2b0a576d
MN
333 void __user *from)
334{
de79f7b9 335 u64 buf[ELF_NFPREG];
2b0a576d
MN
336 int i;
337
338 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
339 return 1;
340 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
000ec280
CB
341 task->thread.TS_CKFPR(i) = buf[i];
342 task->thread.ckfp_state.fpscr = buf[i];
2b0a576d
MN
343
344 return 0;
345}
346
000ec280 347unsigned long copy_ckvsx_to_user(void __user *to,
2b0a576d
MN
348 struct task_struct *task)
349{
de79f7b9 350 u64 buf[ELF_NVSRHALFREG];
2b0a576d
MN
351 int i;
352
353 /* save FPR copy to local buffer then write to the thread_struct */
354 for (i = 0; i < ELF_NVSRHALFREG; i++)
000ec280 355 buf[i] = task->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET];
2b0a576d
MN
356 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
357}
358
000ec280 359unsigned long copy_ckvsx_from_user(struct task_struct *task,
2b0a576d
MN
360 void __user *from)
361{
de79f7b9 362 u64 buf[ELF_NVSRHALFREG];
2b0a576d
MN
363 int i;
364
365 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
366 return 1;
367 for (i = 0; i < ELF_NVSRHALFREG ; i++)
000ec280 368 task->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
2b0a576d
MN
369 return 0;
370}
371#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
6a274c08
MN
372#else
373inline unsigned long copy_fpr_to_user(void __user *to,
374 struct task_struct *task)
375{
de79f7b9 376 return __copy_to_user(to, task->thread.fp_state.fpr,
6a274c08
MN
377 ELF_NFPREG * sizeof(double));
378}
379
380inline unsigned long copy_fpr_from_user(struct task_struct *task,
381 void __user *from)
382{
de79f7b9 383 return __copy_from_user(task->thread.fp_state.fpr, from,
6a274c08
MN
384 ELF_NFPREG * sizeof(double));
385}
2b0a576d
MN
386
387#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
000ec280 388inline unsigned long copy_ckfpr_to_user(void __user *to,
2b0a576d
MN
389 struct task_struct *task)
390{
000ec280 391 return __copy_to_user(to, task->thread.ckfp_state.fpr,
2b0a576d
MN
392 ELF_NFPREG * sizeof(double));
393}
394
000ec280 395inline unsigned long copy_ckfpr_from_user(struct task_struct *task,
2b0a576d
MN
396 void __user *from)
397{
000ec280 398 return __copy_from_user(task->thread.ckfp_state.fpr, from,
2b0a576d
MN
399 ELF_NFPREG * sizeof(double));
400}
401#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
6a274c08
MN
402#endif
403
1da177e4
LT
404/*
405 * Save the current user registers on the user stack.
81e7009e
SR
406 * We only save the altivec/spe registers if the process has used
407 * altivec/spe instructions at some point.
1da177e4 408 */
81e7009e 409static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
1d25f11f
MN
410 struct mcontext __user *tm_frame, int sigret,
411 int ctx_has_vsx_region)
1da177e4 412{
9e751186
MN
413 unsigned long msr = regs->msr;
414
1da177e4
LT
415 /* Make sure floating point registers are stored in regs */
416 flush_fp_to_thread(current);
417
c6e6771b
MN
418 /* save general registers */
419 if (save_general_regs(regs, frame))
1da177e4
LT
420 return 1;
421
1da177e4
LT
422#ifdef CONFIG_ALTIVEC
423 /* save altivec registers */
424 if (current->thread.used_vr) {
425 flush_altivec_to_thread(current);
de79f7b9 426 if (__copy_to_user(&frame->mc_vregs, &current->thread.vr_state,
81e7009e 427 ELF_NVRREG * sizeof(vector128)))
1da177e4
LT
428 return 1;
429 /* set MSR_VEC in the saved MSR value to indicate that
430 frame->mc_vregs contains valid data */
9e751186 431 msr |= MSR_VEC;
1da177e4
LT
432 }
433 /* else assert((regs->msr & MSR_VEC) == 0) */
434
435 /* We always copy to/from vrsave, it's 0 if we don't have or don't
436 * use altivec. Since VSCR only contains 32 bits saved in the least
437 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
438 * most significant bits of that same vector. --BenH
408a7e08 439 * Note that the current VRSAVE value is in the SPR at this point.
1da177e4 440 */
408a7e08
PM
441 if (cpu_has_feature(CPU_FTR_ALTIVEC))
442 current->thread.vrsave = mfspr(SPRN_VRSAVE);
1da177e4
LT
443 if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32]))
444 return 1;
445#endif /* CONFIG_ALTIVEC */
6a274c08 446 if (copy_fpr_to_user(&frame->mc_fregs, current))
c6e6771b 447 return 1;
ec67ad82
MN
448
449 /*
450 * Clear the MSR VSX bit to indicate there is no valid state attached
451 * to this context, except in the specific case below where we set it.
452 */
453 msr &= ~MSR_VSX;
6a274c08 454#ifdef CONFIG_VSX
ce48b210
MN
455 /*
456 * Copy VSR 0-31 upper half from thread_struct to local
457 * buffer, then write that to userspace. Also set MSR_VSX in
458 * the saved MSR value to indicate that frame->mc_vregs
459 * contains valid data
460 */
16c29d18 461 if (current->thread.used_vsr && ctx_has_vsx_region) {
a7d623d4 462 flush_vsx_to_thread(current);
6a274c08 463 if (copy_vsx_to_user(&frame->mc_vsregs, current))
ce48b210
MN
464 return 1;
465 msr |= MSR_VSX;
ec67ad82 466 }
c6e6771b 467#endif /* CONFIG_VSX */
81e7009e
SR
468#ifdef CONFIG_SPE
469 /* save spe registers */
470 if (current->thread.used_spe) {
471 flush_spe_to_thread(current);
472 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
473 ELF_NEVRREG * sizeof(u32)))
474 return 1;
475 /* set MSR_SPE in the saved MSR value to indicate that
476 frame->mc_vregs contains valid data */
9e751186 477 msr |= MSR_SPE;
81e7009e
SR
478 }
479 /* else assert((regs->msr & MSR_SPE) == 0) */
480
481 /* We always copy to/from spefscr */
482 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
483 return 1;
484#endif /* CONFIG_SPE */
485
9e751186
MN
486 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
487 return 1;
1d25f11f
MN
488 /* We need to write 0 the MSR top 32 bits in the tm frame so that we
489 * can check it on the restore to see if TM is active
490 */
491 if (tm_frame && __put_user(0, &tm_frame->mc_gregs[PT_MSR]))
492 return 1;
493
1da177e4
LT
494 if (sigret) {
495 /* Set up the sigreturn trampoline: li r0,sigret; sc */
496 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
497 || __put_user(0x44000002UL, &frame->tramp[1]))
498 return 1;
499 flush_icache_range((unsigned long) &frame->tramp[0],
500 (unsigned long) &frame->tramp[2]);
501 }
502
503 return 0;
504}
505
2b0a576d
MN
506#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
507/*
508 * Save the current user registers on the user stack.
509 * We only save the altivec/spe registers if the process has used
510 * altivec/spe instructions at some point.
511 * We also save the transactional registers to a second ucontext in the
512 * frame.
513 *
514 * See save_user_regs() and signal_64.c:setup_tm_sigcontexts().
515 */
516static int save_tm_user_regs(struct pt_regs *regs,
517 struct mcontext __user *frame,
518 struct mcontext __user *tm_frame, int sigret)
519{
520 unsigned long msr = regs->msr;
521
d31626f7
PM
522 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
523 * just indicates to userland that we were doing a transaction, but we
524 * don't want to return in transactional state. This also ensures
525 * that flush_fp_to_thread won't set TIF_RESTORE_TM again.
526 */
527 regs->msr &= ~MSR_TS_MASK;
528
2b0a576d
MN
529 /* Save both sets of general registers */
530 if (save_general_regs(&current->thread.ckpt_regs, frame)
531 || save_general_regs(regs, tm_frame))
532 return 1;
533
534 /* Stash the top half of the 64bit MSR into the 32bit MSR word
535 * of the transactional mcontext. This way we have a backward-compatible
536 * MSR in the 'normal' (checkpointed) mcontext and additionally one can
537 * also look at what type of transaction (T or S) was active at the
538 * time of the signal.
539 */
540 if (__put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR]))
541 return 1;
542
543#ifdef CONFIG_ALTIVEC
544 /* save altivec registers */
545 if (current->thread.used_vr) {
000ec280 546 if (__copy_to_user(&frame->mc_vregs, &current->thread.ckvr_state,
2b0a576d
MN
547 ELF_NVRREG * sizeof(vector128)))
548 return 1;
549 if (msr & MSR_VEC) {
550 if (__copy_to_user(&tm_frame->mc_vregs,
dc310669 551 &current->thread.vr_state,
2b0a576d
MN
552 ELF_NVRREG * sizeof(vector128)))
553 return 1;
554 } else {
555 if (__copy_to_user(&tm_frame->mc_vregs,
000ec280 556 &current->thread.ckvr_state,
2b0a576d
MN
557 ELF_NVRREG * sizeof(vector128)))
558 return 1;
559 }
560
561 /* set MSR_VEC in the saved MSR value to indicate that
562 * frame->mc_vregs contains valid data
563 */
564 msr |= MSR_VEC;
565 }
566
567 /* We always copy to/from vrsave, it's 0 if we don't have or don't
568 * use altivec. Since VSCR only contains 32 bits saved in the least
569 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
570 * most significant bits of that same vector. --BenH
571 */
408a7e08 572 if (cpu_has_feature(CPU_FTR_ALTIVEC))
000ec280
CB
573 current->thread.ckvrsave = mfspr(SPRN_VRSAVE);
574 if (__put_user(current->thread.ckvrsave,
2b0a576d
MN
575 (u32 __user *)&frame->mc_vregs[32]))
576 return 1;
577 if (msr & MSR_VEC) {
dc310669 578 if (__put_user(current->thread.vrsave,
2b0a576d
MN
579 (u32 __user *)&tm_frame->mc_vregs[32]))
580 return 1;
581 } else {
000ec280 582 if (__put_user(current->thread.ckvrsave,
2b0a576d
MN
583 (u32 __user *)&tm_frame->mc_vregs[32]))
584 return 1;
585 }
586#endif /* CONFIG_ALTIVEC */
587
000ec280 588 if (copy_ckfpr_to_user(&frame->mc_fregs, current))
2b0a576d
MN
589 return 1;
590 if (msr & MSR_FP) {
dc310669 591 if (copy_fpr_to_user(&tm_frame->mc_fregs, current))
2b0a576d
MN
592 return 1;
593 } else {
000ec280 594 if (copy_ckfpr_to_user(&tm_frame->mc_fregs, current))
2b0a576d
MN
595 return 1;
596 }
597
598#ifdef CONFIG_VSX
599 /*
600 * Copy VSR 0-31 upper half from thread_struct to local
601 * buffer, then write that to userspace. Also set MSR_VSX in
602 * the saved MSR value to indicate that frame->mc_vregs
603 * contains valid data
604 */
605 if (current->thread.used_vsr) {
000ec280 606 if (copy_ckvsx_to_user(&frame->mc_vsregs, current))
2b0a576d
MN
607 return 1;
608 if (msr & MSR_VSX) {
dc310669 609 if (copy_vsx_to_user(&tm_frame->mc_vsregs,
2b0a576d
MN
610 current))
611 return 1;
612 } else {
000ec280 613 if (copy_ckvsx_to_user(&tm_frame->mc_vsregs, current))
2b0a576d
MN
614 return 1;
615 }
616
617 msr |= MSR_VSX;
618 }
619#endif /* CONFIG_VSX */
620#ifdef CONFIG_SPE
621 /* SPE regs are not checkpointed with TM, so this section is
622 * simply the same as in save_user_regs().
623 */
624 if (current->thread.used_spe) {
625 flush_spe_to_thread(current);
626 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
627 ELF_NEVRREG * sizeof(u32)))
628 return 1;
629 /* set MSR_SPE in the saved MSR value to indicate that
630 * frame->mc_vregs contains valid data */
631 msr |= MSR_SPE;
632 }
633
634 /* We always copy to/from spefscr */
635 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
636 return 1;
637#endif /* CONFIG_SPE */
638
639 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
640 return 1;
641 if (sigret) {
642 /* Set up the sigreturn trampoline: li r0,sigret; sc */
643 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
644 || __put_user(0x44000002UL, &frame->tramp[1]))
645 return 1;
646 flush_icache_range((unsigned long) &frame->tramp[0],
647 (unsigned long) &frame->tramp[2]);
648 }
649
650 return 0;
651}
652#endif
653
1da177e4
LT
654/*
655 * Restore the current user register values from the user stack,
656 * (except for MSR).
657 */
658static long restore_user_regs(struct pt_regs *regs,
81e7009e 659 struct mcontext __user *sr, int sig)
1da177e4 660{
81e7009e 661 long err;
1da177e4 662 unsigned int save_r2 = 0;
1da177e4 663 unsigned long msr;
c6e6771b 664#ifdef CONFIG_VSX
c6e6771b
MN
665 int i;
666#endif
1da177e4
LT
667
668 /*
669 * restore general registers but not including MSR or SOFTE. Also
670 * take care of keeping r2 (TLS) intact if not a signal
671 */
672 if (!sig)
673 save_r2 = (unsigned int)regs->gpr[2];
81e7009e 674 err = restore_general_regs(regs, sr);
9a81c16b 675 regs->trap = 0;
fab5db97 676 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
1da177e4
LT
677 if (!sig)
678 regs->gpr[2] = (unsigned long) save_r2;
679 if (err)
680 return 1;
681
fab5db97
PM
682 /* if doing signal return, restore the previous little-endian mode */
683 if (sig)
684 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
685
1da177e4 686#ifdef CONFIG_ALTIVEC
c6e6771b
MN
687 /*
688 * Force the process to reload the altivec registers from
689 * current->thread when it next does altivec instructions
690 */
1da177e4 691 regs->msr &= ~MSR_VEC;
fab5db97 692 if (msr & MSR_VEC) {
1da177e4 693 /* restore altivec registers from the stack */
de79f7b9 694 if (__copy_from_user(&current->thread.vr_state, &sr->mc_vregs,
1da177e4
LT
695 sizeof(sr->mc_vregs)))
696 return 1;
e1c0d66f 697 current->thread.used_vr = true;
1da177e4 698 } else if (current->thread.used_vr)
de79f7b9
PM
699 memset(&current->thread.vr_state, 0,
700 ELF_NVRREG * sizeof(vector128));
1da177e4
LT
701
702 /* Always get VRSAVE back */
703 if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
704 return 1;
408a7e08
PM
705 if (cpu_has_feature(CPU_FTR_ALTIVEC))
706 mtspr(SPRN_VRSAVE, current->thread.vrsave);
1da177e4 707#endif /* CONFIG_ALTIVEC */
6a274c08
MN
708 if (copy_fpr_from_user(current, &sr->mc_fregs))
709 return 1;
1da177e4 710
c6e6771b 711#ifdef CONFIG_VSX
ce48b210
MN
712 /*
713 * Force the process to reload the VSX registers from
714 * current->thread when it next does VSX instruction.
715 */
716 regs->msr &= ~MSR_VSX;
717 if (msr & MSR_VSX) {
718 /*
719 * Restore altivec registers from the stack to a local
720 * buffer, then write this out to the thread_struct
721 */
6a274c08 722 if (copy_vsx_from_user(current, &sr->mc_vsregs))
ce48b210 723 return 1;
e1c0d66f 724 current->thread.used_vsr = true;
ce48b210
MN
725 } else if (current->thread.used_vsr)
726 for (i = 0; i < 32 ; i++)
de79f7b9 727 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
c6e6771b
MN
728#endif /* CONFIG_VSX */
729 /*
730 * force the process to reload the FP registers from
731 * current->thread when it next does FP instructions
732 */
733 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
734
81e7009e
SR
735#ifdef CONFIG_SPE
736 /* force the process to reload the spe registers from
737 current->thread when it next does spe instructions */
738 regs->msr &= ~MSR_SPE;
fab5db97 739 if (msr & MSR_SPE) {
81e7009e
SR
740 /* restore spe registers from the stack */
741 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
742 ELF_NEVRREG * sizeof(u32)))
743 return 1;
e1c0d66f 744 current->thread.used_spe = true;
81e7009e
SR
745 } else if (current->thread.used_spe)
746 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
747
748 /* Always get SPEFSCR back */
749 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs + ELF_NEVRREG))
750 return 1;
751#endif /* CONFIG_SPE */
752
1da177e4
LT
753 return 0;
754}
755
2b0a576d
MN
756#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
757/*
758 * Restore the current user register values from the user stack, except for
759 * MSR, and recheckpoint the original checkpointed register state for processes
760 * in transactions.
761 */
762static long restore_tm_user_regs(struct pt_regs *regs,
763 struct mcontext __user *sr,
764 struct mcontext __user *tm_sr)
765{
766 long err;
2c27a18f 767 unsigned long msr, msr_hi;
2b0a576d
MN
768#ifdef CONFIG_VSX
769 int i;
770#endif
771
772 /*
773 * restore general registers but not including MSR or SOFTE. Also
774 * take care of keeping r2 (TLS) intact if not a signal.
775 * See comment in signal_64.c:restore_tm_sigcontexts();
776 * TFHAR is restored from the checkpointed NIP; TEXASR and TFIAR
777 * were set by the signal delivery.
778 */
779 err = restore_general_regs(regs, tm_sr);
780 err |= restore_general_regs(&current->thread.ckpt_regs, sr);
781
782 err |= __get_user(current->thread.tm_tfhar, &sr->mc_gregs[PT_NIP]);
783
784 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
785 if (err)
786 return 1;
787
788 /* Restore the previous little-endian mode */
789 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
790
2b0a576d
MN
791#ifdef CONFIG_ALTIVEC
792 regs->msr &= ~MSR_VEC;
793 if (msr & MSR_VEC) {
794 /* restore altivec registers from the stack */
000ec280 795 if (__copy_from_user(&current->thread.ckvr_state, &sr->mc_vregs,
2b0a576d 796 sizeof(sr->mc_vregs)) ||
dc310669 797 __copy_from_user(&current->thread.vr_state,
2b0a576d
MN
798 &tm_sr->mc_vregs,
799 sizeof(sr->mc_vregs)))
800 return 1;
e1c0d66f 801 current->thread.used_vr = true;
2b0a576d 802 } else if (current->thread.used_vr) {
de79f7b9
PM
803 memset(&current->thread.vr_state, 0,
804 ELF_NVRREG * sizeof(vector128));
000ec280 805 memset(&current->thread.ckvr_state, 0,
2b0a576d
MN
806 ELF_NVRREG * sizeof(vector128));
807 }
808
809 /* Always get VRSAVE back */
000ec280 810 if (__get_user(current->thread.ckvrsave,
2b0a576d 811 (u32 __user *)&sr->mc_vregs[32]) ||
dc310669 812 __get_user(current->thread.vrsave,
2b0a576d
MN
813 (u32 __user *)&tm_sr->mc_vregs[32]))
814 return 1;
408a7e08 815 if (cpu_has_feature(CPU_FTR_ALTIVEC))
000ec280 816 mtspr(SPRN_VRSAVE, current->thread.ckvrsave);
2b0a576d
MN
817#endif /* CONFIG_ALTIVEC */
818
819 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
820
821 if (copy_fpr_from_user(current, &sr->mc_fregs) ||
000ec280 822 copy_ckfpr_from_user(current, &tm_sr->mc_fregs))
2b0a576d
MN
823 return 1;
824
825#ifdef CONFIG_VSX
826 regs->msr &= ~MSR_VSX;
827 if (msr & MSR_VSX) {
828 /*
829 * Restore altivec registers from the stack to a local
830 * buffer, then write this out to the thread_struct
831 */
dc310669 832 if (copy_vsx_from_user(current, &tm_sr->mc_vsregs) ||
000ec280 833 copy_ckvsx_from_user(current, &sr->mc_vsregs))
2b0a576d 834 return 1;
e1c0d66f 835 current->thread.used_vsr = true;
2b0a576d
MN
836 } else if (current->thread.used_vsr)
837 for (i = 0; i < 32 ; i++) {
de79f7b9 838 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
000ec280 839 current->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
2b0a576d
MN
840 }
841#endif /* CONFIG_VSX */
842
843#ifdef CONFIG_SPE
844 /* SPE regs are not checkpointed with TM, so this section is
845 * simply the same as in restore_user_regs().
846 */
847 regs->msr &= ~MSR_SPE;
848 if (msr & MSR_SPE) {
849 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
850 ELF_NEVRREG * sizeof(u32)))
851 return 1;
e1c0d66f 852 current->thread.used_spe = true;
2b0a576d
MN
853 } else if (current->thread.used_spe)
854 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
855
856 /* Always get SPEFSCR back */
857 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs
858 + ELF_NEVRREG))
859 return 1;
860#endif /* CONFIG_SPE */
861
d2b9d2a5
MN
862 /* Get the top half of the MSR from the user context */
863 if (__get_user(msr_hi, &tm_sr->mc_gregs[PT_MSR]))
864 return 1;
865 msr_hi <<= 32;
866 /* If TM bits are set to the reserved value, it's an invalid context */
867 if (MSR_TM_RESV(msr_hi))
868 return 1;
869 /* Pull in the MSR TM bits from the user context */
870 regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr_hi & MSR_TS_MASK);
2b0a576d
MN
871 /* Now, recheckpoint. This loads up all of the checkpointed (older)
872 * registers, including FP and V[S]Rs. After recheckpointing, the
873 * transactional versions should be loaded.
874 */
875 tm_enable();
e6b8fd02
MN
876 /* Make sure the transaction is marked as failed */
877 current->thread.tm_texasr |= TEXASR_FS;
2b0a576d
MN
878 /* This loads the checkpointed FP/VEC state, if used */
879 tm_recheckpoint(&current->thread, msr);
2b0a576d
MN
880
881 /* This loads the speculative FP/VEC state, if used */
dc310669 882 msr_check_and_set(msr & (MSR_FP | MSR_VEC));
2b0a576d 883 if (msr & MSR_FP) {
dc310669 884 load_fp_state(&current->thread.fp_state);
2b0a576d
MN
885 regs->msr |= (MSR_FP | current->thread.fpexc_mode);
886 }
f110c0c1 887#ifdef CONFIG_ALTIVEC
2b0a576d 888 if (msr & MSR_VEC) {
dc310669 889 load_vr_state(&current->thread.vr_state);
2b0a576d
MN
890 regs->msr |= MSR_VEC;
891 }
f110c0c1 892#endif
2b0a576d
MN
893
894 return 0;
895}
896#endif
897
81e7009e 898#ifdef CONFIG_PPC64
ce395960 899int copy_siginfo_to_user32(struct compat_siginfo __user *d, const siginfo_t *s)
1da177e4
LT
900{
901 int err;
902
903 if (!access_ok (VERIFY_WRITE, d, sizeof(*d)))
904 return -EFAULT;
905
906 /* If you change siginfo_t structure, please be sure
907 * this code is fixed accordingly.
908 * It should never copy any pad contained in the structure
909 * to avoid security leaks, but must copy the generic
910 * 3 ints plus the relevant union member.
911 * This routine must convert siginfo from 64bit to 32bit as well
912 * at the same time.
913 */
914 err = __put_user(s->si_signo, &d->si_signo);
915 err |= __put_user(s->si_errno, &d->si_errno);
916 err |= __put_user((short)s->si_code, &d->si_code);
917 if (s->si_code < 0)
918 err |= __copy_to_user(&d->_sifields._pad, &s->_sifields._pad,
919 SI_PAD_SIZE32);
920 else switch(s->si_code >> 16) {
921 case __SI_CHLD >> 16:
922 err |= __put_user(s->si_pid, &d->si_pid);
923 err |= __put_user(s->si_uid, &d->si_uid);
924 err |= __put_user(s->si_utime, &d->si_utime);
925 err |= __put_user(s->si_stime, &d->si_stime);
926 err |= __put_user(s->si_status, &d->si_status);
927 break;
928 case __SI_FAULT >> 16:
929 err |= __put_user((unsigned int)(unsigned long)s->si_addr,
930 &d->si_addr);
931 break;
932 case __SI_POLL >> 16:
933 err |= __put_user(s->si_band, &d->si_band);
934 err |= __put_user(s->si_fd, &d->si_fd);
935 break;
936 case __SI_TIMER >> 16:
937 err |= __put_user(s->si_tid, &d->si_tid);
938 err |= __put_user(s->si_overrun, &d->si_overrun);
939 err |= __put_user(s->si_int, &d->si_int);
940 break;
1b60bab0
ME
941 case __SI_SYS >> 16:
942 err |= __put_user(ptr_to_compat(s->si_call_addr), &d->si_call_addr);
943 err |= __put_user(s->si_syscall, &d->si_syscall);
944 err |= __put_user(s->si_arch, &d->si_arch);
945 break;
1da177e4
LT
946 case __SI_RT >> 16: /* This is not generated by the kernel as of now. */
947 case __SI_MESGQ >> 16:
948 err |= __put_user(s->si_int, &d->si_int);
949 /* fallthrough */
950 case __SI_KILL >> 16:
951 default:
952 err |= __put_user(s->si_pid, &d->si_pid);
953 err |= __put_user(s->si_uid, &d->si_uid);
954 break;
955 }
956 return err;
957}
958
81e7009e
SR
959#define copy_siginfo_to_user copy_siginfo_to_user32
960
9c0c44db
RM
961int copy_siginfo_from_user32(siginfo_t *to, struct compat_siginfo __user *from)
962{
9c0c44db
RM
963 if (copy_from_user(to, from, 3*sizeof(int)) ||
964 copy_from_user(to->_sifields._pad,
965 from->_sifields._pad, SI_PAD_SIZE32))
966 return -EFAULT;
967
968 return 0;
969}
81e7009e 970#endif /* CONFIG_PPC64 */
1da177e4 971
1da177e4
LT
972/*
973 * Set up a signal frame for a "real-time" signal handler
974 * (one which gets siginfo).
975 */
129b69df 976int handle_rt_signal32(struct ksignal *ksig, sigset_t *oldset,
d1199431 977 struct task_struct *tsk)
1da177e4 978{
81e7009e
SR
979 struct rt_sigframe __user *rt_sf;
980 struct mcontext __user *frame;
1d25f11f 981 struct mcontext __user *tm_frame = NULL;
d0c3d534 982 void __user *addr;
a3f61dc0 983 unsigned long newsp = 0;
2b0a576d
MN
984 int sigret;
985 unsigned long tramp;
d1199431
CB
986 struct pt_regs *regs = tsk->thread.regs;
987
988 BUG_ON(tsk != current);
1da177e4
LT
989
990 /* Set up Signal Frame */
991 /* Put a Real Time Context onto stack */
d1199431 992 rt_sf = get_sigframe(ksig, get_tm_stackpointer(tsk), sizeof(*rt_sf), 1);
d0c3d534 993 addr = rt_sf;
a3f61dc0 994 if (unlikely(rt_sf == NULL))
1da177e4
LT
995 goto badframe;
996
1da177e4 997 /* Put the siginfo & fill in most of the ucontext */
129b69df 998 if (copy_siginfo_to_user(&rt_sf->info, &ksig->info)
1da177e4 999 || __put_user(0, &rt_sf->uc.uc_flags)
7cce2465 1000 || __save_altstack(&rt_sf->uc.uc_stack, regs->gpr[1])
81e7009e
SR
1001 || __put_user(to_user_ptr(&rt_sf->uc.uc_mcontext),
1002 &rt_sf->uc.uc_regs)
1003 || put_sigset_t(&rt_sf->uc.uc_sigmask, oldset))
1da177e4
LT
1004 goto badframe;
1005
1006 /* Save user registers on the stack */
1007 frame = &rt_sf->uc.uc_mcontext;
d0c3d534 1008 addr = frame;
d1199431 1009 if (vdso32_rt_sigtramp && tsk->mm->context.vdso_base) {
2b0a576d 1010 sigret = 0;
d1199431 1011 tramp = tsk->mm->context.vdso_base + vdso32_rt_sigtramp;
a7f290da 1012 } else {
2b0a576d
MN
1013 sigret = __NR_rt_sigreturn;
1014 tramp = (unsigned long) frame->tramp;
1015 }
1016
1017#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1d25f11f 1018 tm_frame = &rt_sf->uc_transact.uc_mcontext;
2b0a576d 1019 if (MSR_TM_ACTIVE(regs->msr)) {
d765ff23
PM
1020 if (__put_user((unsigned long)&rt_sf->uc_transact,
1021 &rt_sf->uc.uc_link) ||
1022 __put_user((unsigned long)tm_frame,
1023 &rt_sf->uc_transact.uc_regs))
1024 goto badframe;
1d25f11f 1025 if (save_tm_user_regs(regs, frame, tm_frame, sigret))
1da177e4 1026 goto badframe;
1da177e4 1027 }
2b0a576d
MN
1028 else
1029#endif
1d25f11f 1030 {
d765ff23
PM
1031 if (__put_user(0, &rt_sf->uc.uc_link))
1032 goto badframe;
1d25f11f 1033 if (save_user_regs(regs, frame, tm_frame, sigret, 1))
2b0a576d 1034 goto badframe;
1d25f11f 1035 }
2b0a576d
MN
1036 regs->link = tramp;
1037
d1199431 1038 tsk->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
cc657f53 1039
a3f61dc0
BH
1040 /* create a stack frame for the caller of the handler */
1041 newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16);
d0c3d534 1042 addr = (void __user *)regs->gpr[1];
e2b55306 1043 if (put_user(regs->gpr[1], (u32 __user *)newsp))
81e7009e 1044 goto badframe;
a3f61dc0
BH
1045
1046 /* Fill registers for signal handler */
81e7009e 1047 regs->gpr[1] = newsp;
129b69df 1048 regs->gpr[3] = ksig->sig;
1da177e4
LT
1049 regs->gpr[4] = (unsigned long) &rt_sf->info;
1050 regs->gpr[5] = (unsigned long) &rt_sf->uc;
1051 regs->gpr[6] = (unsigned long) rt_sf;
129b69df 1052 regs->nip = (unsigned long) ksig->ka.sa.sa_handler;
e871c6bb 1053 /* enter the signal handler in native-endian mode */
fab5db97 1054 regs->msr &= ~MSR_LE;
e871c6bb 1055 regs->msr |= (MSR_KERNEL & MSR_LE);
129b69df 1056 return 0;
1da177e4
LT
1057
1058badframe:
76462232
CD
1059 if (show_unhandled_signals)
1060 printk_ratelimited(KERN_INFO
1061 "%s[%d]: bad frame in handle_rt_signal32: "
1062 "%p nip %08lx lr %08lx\n",
d1199431 1063 tsk->comm, tsk->pid,
76462232 1064 addr, regs->nip, regs->link);
d0c3d534 1065
129b69df 1066 return 1;
1da177e4
LT
1067}
1068
81e7009e 1069static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig)
1da177e4 1070{
1da177e4 1071 sigset_t set;
81e7009e
SR
1072 struct mcontext __user *mcp;
1073
1074 if (get_sigset_t(&set, &ucp->uc_sigmask))
1075 return -EFAULT;
1076#ifdef CONFIG_PPC64
1077 {
1078 u32 cmcp;
1da177e4 1079
81e7009e
SR
1080 if (__get_user(cmcp, &ucp->uc_regs))
1081 return -EFAULT;
1082 mcp = (struct mcontext __user *)(u64)cmcp;
7c85d1f9 1083 /* no need to check access_ok(mcp), since mcp < 4GB */
81e7009e
SR
1084 }
1085#else
1086 if (__get_user(mcp, &ucp->uc_regs))
1da177e4 1087 return -EFAULT;
7c85d1f9
PM
1088 if (!access_ok(VERIFY_READ, mcp, sizeof(*mcp)))
1089 return -EFAULT;
81e7009e 1090#endif
17440f17 1091 set_current_blocked(&set);
81e7009e 1092 if (restore_user_regs(regs, mcp, sig))
1da177e4
LT
1093 return -EFAULT;
1094
1095 return 0;
1096}
1097
2b0a576d
MN
1098#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1099static int do_setcontext_tm(struct ucontext __user *ucp,
1100 struct ucontext __user *tm_ucp,
1101 struct pt_regs *regs)
1102{
1103 sigset_t set;
1104 struct mcontext __user *mcp;
1105 struct mcontext __user *tm_mcp;
1106 u32 cmcp;
1107 u32 tm_cmcp;
1108
1109 if (get_sigset_t(&set, &ucp->uc_sigmask))
1110 return -EFAULT;
1111
1112 if (__get_user(cmcp, &ucp->uc_regs) ||
1113 __get_user(tm_cmcp, &tm_ucp->uc_regs))
1114 return -EFAULT;
1115 mcp = (struct mcontext __user *)(u64)cmcp;
1116 tm_mcp = (struct mcontext __user *)(u64)tm_cmcp;
1117 /* no need to check access_ok(mcp), since mcp < 4GB */
1118
1119 set_current_blocked(&set);
1120 if (restore_tm_user_regs(regs, mcp, tm_mcp))
1121 return -EFAULT;
1122
1123 return 0;
1124}
1125#endif
1126
81e7009e 1127long sys_swapcontext(struct ucontext __user *old_ctx,
1bd79336
PM
1128 struct ucontext __user *new_ctx,
1129 int ctx_size, int r6, int r7, int r8, struct pt_regs *regs)
1da177e4
LT
1130{
1131 unsigned char tmp;
16c29d18 1132 int ctx_has_vsx_region = 0;
1da177e4 1133
c1cb299e
MN
1134#ifdef CONFIG_PPC64
1135 unsigned long new_msr = 0;
1136
77eb50ae
AS
1137 if (new_ctx) {
1138 struct mcontext __user *mcp;
1139 u32 cmcp;
1140
1141 /*
1142 * Get pointer to the real mcontext. No need for
1143 * access_ok since we are dealing with compat
1144 * pointers.
1145 */
1146 if (__get_user(cmcp, &new_ctx->uc_regs))
1147 return -EFAULT;
1148 mcp = (struct mcontext __user *)(u64)cmcp;
1149 if (__get_user(new_msr, &mcp->mc_gregs[PT_MSR]))
1150 return -EFAULT;
1151 }
c1cb299e
MN
1152 /*
1153 * Check that the context is not smaller than the original
1154 * size (with VMX but without VSX)
1155 */
1156 if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
1157 return -EINVAL;
1158 /*
1159 * If the new context state sets the MSR VSX bits but
1160 * it doesn't provide VSX state.
1161 */
1162 if ((ctx_size < sizeof(struct ucontext)) &&
1163 (new_msr & MSR_VSX))
1164 return -EINVAL;
16c29d18
MN
1165 /* Does the context have enough room to store VSX data? */
1166 if (ctx_size >= sizeof(struct ucontext))
1167 ctx_has_vsx_region = 1;
c1cb299e 1168#else
1da177e4
LT
1169 /* Context size is for future use. Right now, we only make sure
1170 * we are passed something we understand
1171 */
81e7009e 1172 if (ctx_size < sizeof(struct ucontext))
1da177e4 1173 return -EINVAL;
c1cb299e 1174#endif
1da177e4 1175 if (old_ctx != NULL) {
1c9bb1a0
PM
1176 struct mcontext __user *mctx;
1177
1178 /*
1179 * old_ctx might not be 16-byte aligned, in which
1180 * case old_ctx->uc_mcontext won't be either.
1181 * Because we have the old_ctx->uc_pad2 field
1182 * before old_ctx->uc_mcontext, we need to round down
1183 * from &old_ctx->uc_mcontext to a 16-byte boundary.
1184 */
1185 mctx = (struct mcontext __user *)
1186 ((unsigned long) &old_ctx->uc_mcontext & ~0xfUL);
16c29d18 1187 if (!access_ok(VERIFY_WRITE, old_ctx, ctx_size)
1d25f11f 1188 || save_user_regs(regs, mctx, NULL, 0, ctx_has_vsx_region)
81e7009e 1189 || put_sigset_t(&old_ctx->uc_sigmask, &current->blocked)
1c9bb1a0 1190 || __put_user(to_user_ptr(mctx), &old_ctx->uc_regs))
1da177e4
LT
1191 return -EFAULT;
1192 }
1193 if (new_ctx == NULL)
1194 return 0;
16c29d18 1195 if (!access_ok(VERIFY_READ, new_ctx, ctx_size)
1da177e4 1196 || __get_user(tmp, (u8 __user *) new_ctx)
16c29d18 1197 || __get_user(tmp, (u8 __user *) new_ctx + ctx_size - 1))
1da177e4
LT
1198 return -EFAULT;
1199
1200 /*
1201 * If we get a fault copying the context into the kernel's
1202 * image of the user's registers, we can't just return -EFAULT
1203 * because the user's registers will be corrupted. For instance
1204 * the NIP value may have been updated but not some of the
1205 * other registers. Given that we have done the access_ok
1206 * and successfully read the first and last bytes of the region
1207 * above, this should only happen in an out-of-memory situation
1208 * or if another thread unmaps the region containing the context.
1209 * We kill the task with a SIGSEGV in this situation.
1210 */
81e7009e 1211 if (do_setcontext(new_ctx, regs, 0))
1da177e4 1212 do_exit(SIGSEGV);
401d1f02
DW
1213
1214 set_thread_flag(TIF_RESTOREALL);
1da177e4
LT
1215 return 0;
1216}
1217
81e7009e 1218long sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1da177e4
LT
1219 struct pt_regs *regs)
1220{
81e7009e 1221 struct rt_sigframe __user *rt_sf;
2b0a576d
MN
1222#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1223 struct ucontext __user *uc_transact;
1224 unsigned long msr_hi;
1225 unsigned long tmp;
1226 int tm_restore = 0;
1227#endif
1da177e4 1228 /* Always make any pending restarted system calls return -EINTR */
f56141e3 1229 current->restart_block.fn = do_no_restart_syscall;
1da177e4 1230
81e7009e
SR
1231 rt_sf = (struct rt_sigframe __user *)
1232 (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16);
1da177e4
LT
1233 if (!access_ok(VERIFY_READ, rt_sf, sizeof(*rt_sf)))
1234 goto bad;
78a3e888 1235
2b0a576d 1236#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
78a3e888
CB
1237 /*
1238 * If there is a transactional state then throw it away.
1239 * The purpose of a sigreturn is to destroy all traces of the
1240 * signal frame, this includes any transactional state created
1241 * within in. We only check for suspended as we can never be
1242 * active in the kernel, we are active, there is nothing better to
1243 * do than go ahead and Bad Thing later.
1244 * The cause is not important as there will never be a
1245 * recheckpoint so it's not user visible.
1246 */
1247 if (MSR_TM_SUSPENDED(mfmsr()))
1248 tm_reclaim_current(0);
1249
2b0a576d
MN
1250 if (__get_user(tmp, &rt_sf->uc.uc_link))
1251 goto bad;
1252 uc_transact = (struct ucontext __user *)(uintptr_t)tmp;
1253 if (uc_transact) {
1254 u32 cmcp;
1255 struct mcontext __user *mcp;
1256
1257 if (__get_user(cmcp, &uc_transact->uc_regs))
1258 return -EFAULT;
1259 mcp = (struct mcontext __user *)(u64)cmcp;
1260 /* The top 32 bits of the MSR are stashed in the transactional
1261 * ucontext. */
1262 if (__get_user(msr_hi, &mcp->mc_gregs[PT_MSR]))
1263 goto bad;
1264
55e43418 1265 if (MSR_TM_ACTIVE(msr_hi<<32)) {
2b0a576d
MN
1266 /* We only recheckpoint on return if we're
1267 * transaction.
1268 */
1269 tm_restore = 1;
1270 if (do_setcontext_tm(&rt_sf->uc, uc_transact, regs))
1271 goto bad;
1272 }
1273 }
1274 if (!tm_restore)
1275 /* Fall through, for non-TM restore */
1276#endif
81e7009e 1277 if (do_setcontext(&rt_sf->uc, regs, 1))
1da177e4
LT
1278 goto bad;
1279
1280 /*
1281 * It's not clear whether or why it is desirable to save the
1282 * sigaltstack setting on signal delivery and restore it on
1283 * signal return. But other architectures do this and we have
1284 * always done it up until now so it is probably better not to
1285 * change it. -- paulus
81e7009e
SR
1286 */
1287#ifdef CONFIG_PPC64
7cce2465
AV
1288 if (compat_restore_altstack(&rt_sf->uc.uc_stack))
1289 goto bad;
81e7009e 1290#else
7cce2465
AV
1291 if (restore_altstack(&rt_sf->uc.uc_stack))
1292 goto bad;
81e7009e 1293#endif
401d1f02
DW
1294 set_thread_flag(TIF_RESTOREALL);
1295 return 0;
1da177e4
LT
1296
1297 bad:
76462232
CD
1298 if (show_unhandled_signals)
1299 printk_ratelimited(KERN_INFO
1300 "%s[%d]: bad frame in sys_rt_sigreturn: "
1301 "%p nip %08lx lr %08lx\n",
1302 current->comm, current->pid,
1303 rt_sf, regs->nip, regs->link);
d0c3d534 1304
1da177e4
LT
1305 force_sig(SIGSEGV, current);
1306 return 0;
1307}
1308
81e7009e
SR
1309#ifdef CONFIG_PPC32
1310int sys_debug_setcontext(struct ucontext __user *ctx,
1311 int ndbg, struct sig_dbg_op __user *dbg,
1312 int r6, int r7, int r8,
1313 struct pt_regs *regs)
1314{
1315 struct sig_dbg_op op;
1316 int i;
7c85d1f9 1317 unsigned char tmp;
81e7009e 1318 unsigned long new_msr = regs->msr;
172ae2e7 1319#ifdef CONFIG_PPC_ADV_DEBUG_REGS
51ae8d4a 1320 unsigned long new_dbcr0 = current->thread.debug.dbcr0;
81e7009e
SR
1321#endif
1322
1323 for (i=0; i<ndbg; i++) {
7c85d1f9 1324 if (copy_from_user(&op, dbg + i, sizeof(op)))
81e7009e
SR
1325 return -EFAULT;
1326 switch (op.dbg_type) {
1327 case SIG_DBG_SINGLE_STEPPING:
172ae2e7 1328#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1329 if (op.dbg_value) {
1330 new_msr |= MSR_DE;
1331 new_dbcr0 |= (DBCR0_IDM | DBCR0_IC);
1332 } else {
3bffb652
DK
1333 new_dbcr0 &= ~DBCR0_IC;
1334 if (!DBCR_ACTIVE_EVENTS(new_dbcr0,
51ae8d4a 1335 current->thread.debug.dbcr1)) {
3bffb652
DK
1336 new_msr &= ~MSR_DE;
1337 new_dbcr0 &= ~DBCR0_IDM;
1338 }
81e7009e
SR
1339 }
1340#else
1341 if (op.dbg_value)
1342 new_msr |= MSR_SE;
1343 else
1344 new_msr &= ~MSR_SE;
1345#endif
1346 break;
1347 case SIG_DBG_BRANCH_TRACING:
172ae2e7 1348#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1349 return -EINVAL;
1350#else
1351 if (op.dbg_value)
1352 new_msr |= MSR_BE;
1353 else
1354 new_msr &= ~MSR_BE;
1355#endif
1356 break;
1357
1358 default:
1359 return -EINVAL;
1360 }
1361 }
1362
1363 /* We wait until here to actually install the values in the
1364 registers so if we fail in the above loop, it will not
1365 affect the contents of these registers. After this point,
1366 failure is a problem, anyway, and it's very unlikely unless
1367 the user is really doing something wrong. */
1368 regs->msr = new_msr;
172ae2e7 1369#ifdef CONFIG_PPC_ADV_DEBUG_REGS
51ae8d4a 1370 current->thread.debug.dbcr0 = new_dbcr0;
81e7009e
SR
1371#endif
1372
7c85d1f9
PM
1373 if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx))
1374 || __get_user(tmp, (u8 __user *) ctx)
1375 || __get_user(tmp, (u8 __user *) (ctx + 1) - 1))
1376 return -EFAULT;
1377
81e7009e
SR
1378 /*
1379 * If we get a fault copying the context into the kernel's
1380 * image of the user's registers, we can't just return -EFAULT
1381 * because the user's registers will be corrupted. For instance
1382 * the NIP value may have been updated but not some of the
1383 * other registers. Given that we have done the access_ok
1384 * and successfully read the first and last bytes of the region
1385 * above, this should only happen in an out-of-memory situation
1386 * or if another thread unmaps the region containing the context.
1387 * We kill the task with a SIGSEGV in this situation.
1388 */
1389 if (do_setcontext(ctx, regs, 1)) {
76462232
CD
1390 if (show_unhandled_signals)
1391 printk_ratelimited(KERN_INFO "%s[%d]: bad frame in "
1392 "sys_debug_setcontext: %p nip %08lx "
1393 "lr %08lx\n",
1394 current->comm, current->pid,
1395 ctx, regs->nip, regs->link);
d0c3d534 1396
81e7009e
SR
1397 force_sig(SIGSEGV, current);
1398 goto out;
1399 }
1400
1401 /*
1402 * It's not clear whether or why it is desirable to save the
1403 * sigaltstack setting on signal delivery and restore it on
1404 * signal return. But other architectures do this and we have
1405 * always done it up until now so it is probably better not to
1406 * change it. -- paulus
1407 */
7cce2465 1408 restore_altstack(&ctx->uc_stack);
81e7009e 1409
401d1f02 1410 set_thread_flag(TIF_RESTOREALL);
81e7009e
SR
1411 out:
1412 return 0;
1413}
1414#endif
1da177e4
LT
1415
1416/*
1417 * OK, we're invoking a handler
1418 */
d1199431
CB
1419int handle_signal32(struct ksignal *ksig, sigset_t *oldset,
1420 struct task_struct *tsk)
1da177e4 1421{
81e7009e 1422 struct sigcontext __user *sc;
a3f61dc0 1423 struct sigframe __user *frame;
1d25f11f 1424 struct mcontext __user *tm_mctx = NULL;
a3f61dc0 1425 unsigned long newsp = 0;
2b0a576d
MN
1426 int sigret;
1427 unsigned long tramp;
d1199431
CB
1428 struct pt_regs *regs = tsk->thread.regs;
1429
1430 BUG_ON(tsk != current);
1da177e4
LT
1431
1432 /* Set up Signal Frame */
d1199431 1433 frame = get_sigframe(ksig, get_tm_stackpointer(tsk), sizeof(*frame), 1);
a3f61dc0 1434 if (unlikely(frame == NULL))
1da177e4 1435 goto badframe;
a3f61dc0 1436 sc = (struct sigcontext __user *) &frame->sctx;
1da177e4
LT
1437
1438#if _NSIG != 64
81e7009e 1439#error "Please adjust handle_signal()"
1da177e4 1440#endif
129b69df 1441 if (__put_user(to_user_ptr(ksig->ka.sa.sa_handler), &sc->handler)
1da177e4 1442 || __put_user(oldset->sig[0], &sc->oldmask)
81e7009e 1443#ifdef CONFIG_PPC64
1da177e4 1444 || __put_user((oldset->sig[0] >> 32), &sc->_unused[3])
81e7009e
SR
1445#else
1446 || __put_user(oldset->sig[1], &sc->_unused[3])
1447#endif
a3f61dc0 1448 || __put_user(to_user_ptr(&frame->mctx), &sc->regs)
129b69df 1449 || __put_user(ksig->sig, &sc->signal))
1da177e4
LT
1450 goto badframe;
1451
d1199431 1452 if (vdso32_sigtramp && tsk->mm->context.vdso_base) {
2b0a576d 1453 sigret = 0;
d1199431 1454 tramp = tsk->mm->context.vdso_base + vdso32_sigtramp;
a7f290da 1455 } else {
2b0a576d
MN
1456 sigret = __NR_sigreturn;
1457 tramp = (unsigned long) frame->mctx.tramp;
1458 }
1459
1460#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1d25f11f 1461 tm_mctx = &frame->mctx_transact;
2b0a576d
MN
1462 if (MSR_TM_ACTIVE(regs->msr)) {
1463 if (save_tm_user_regs(regs, &frame->mctx, &frame->mctx_transact,
1464 sigret))
1da177e4 1465 goto badframe;
1da177e4 1466 }
2b0a576d
MN
1467 else
1468#endif
1d25f11f
MN
1469 {
1470 if (save_user_regs(regs, &frame->mctx, tm_mctx, sigret, 1))
2b0a576d 1471 goto badframe;
1d25f11f 1472 }
2b0a576d
MN
1473
1474 regs->link = tramp;
1da177e4 1475
d1199431 1476 tsk->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
cc657f53 1477
a3f61dc0
BH
1478 /* create a stack frame for the caller of the handler */
1479 newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE;
9747dd6f 1480 if (put_user(regs->gpr[1], (u32 __user *)newsp))
1da177e4 1481 goto badframe;
a3f61dc0 1482
81e7009e 1483 regs->gpr[1] = newsp;
129b69df 1484 regs->gpr[3] = ksig->sig;
1da177e4 1485 regs->gpr[4] = (unsigned long) sc;
129b69df 1486 regs->nip = (unsigned long) (unsigned long)ksig->ka.sa.sa_handler;
fab5db97
PM
1487 /* enter the signal handler in big-endian mode */
1488 regs->msr &= ~MSR_LE;
129b69df 1489 return 0;
1da177e4
LT
1490
1491badframe:
76462232
CD
1492 if (show_unhandled_signals)
1493 printk_ratelimited(KERN_INFO
1494 "%s[%d]: bad frame in handle_signal32: "
1495 "%p nip %08lx lr %08lx\n",
d1199431 1496 tsk->comm, tsk->pid,
76462232 1497 frame, regs->nip, regs->link);
d0c3d534 1498
129b69df 1499 return 1;
1da177e4
LT
1500}
1501
1502/*
1503 * Do a signal return; undo the signal stack.
1504 */
81e7009e 1505long sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1da177e4
LT
1506 struct pt_regs *regs)
1507{
fee55450 1508 struct sigframe __user *sf;
81e7009e
SR
1509 struct sigcontext __user *sc;
1510 struct sigcontext sigctx;
1511 struct mcontext __user *sr;
d0c3d534 1512 void __user *addr;
1da177e4 1513 sigset_t set;
fee55450
MN
1514#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1515 struct mcontext __user *mcp, *tm_mcp;
1516 unsigned long msr_hi;
1517#endif
1da177e4
LT
1518
1519 /* Always make any pending restarted system calls return -EINTR */
f56141e3 1520 current->restart_block.fn = do_no_restart_syscall;
1da177e4 1521
fee55450
MN
1522 sf = (struct sigframe __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE);
1523 sc = &sf->sctx;
d0c3d534 1524 addr = sc;
1da177e4
LT
1525 if (copy_from_user(&sigctx, sc, sizeof(sigctx)))
1526 goto badframe;
1527
81e7009e 1528#ifdef CONFIG_PPC64
1da177e4
LT
1529 /*
1530 * Note that PPC32 puts the upper 32 bits of the sigmask in the
1531 * unused part of the signal stackframe
1532 */
1533 set.sig[0] = sigctx.oldmask + ((long)(sigctx._unused[3]) << 32);
81e7009e
SR
1534#else
1535 set.sig[0] = sigctx.oldmask;
1536 set.sig[1] = sigctx._unused[3];
1537#endif
17440f17 1538 set_current_blocked(&set);
1da177e4 1539
fee55450
MN
1540#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1541 mcp = (struct mcontext __user *)&sf->mctx;
1542 tm_mcp = (struct mcontext __user *)&sf->mctx_transact;
1543 if (__get_user(msr_hi, &tm_mcp->mc_gregs[PT_MSR]))
1da177e4 1544 goto badframe;
fee55450
MN
1545 if (MSR_TM_ACTIVE(msr_hi<<32)) {
1546 if (!cpu_has_feature(CPU_FTR_TM))
1547 goto badframe;
1548 if (restore_tm_user_regs(regs, mcp, tm_mcp))
1549 goto badframe;
1550 } else
1551#endif
1552 {
1553 sr = (struct mcontext __user *)from_user_ptr(sigctx.regs);
1554 addr = sr;
1555 if (!access_ok(VERIFY_READ, sr, sizeof(*sr))
1556 || restore_user_regs(regs, sr, 1))
1557 goto badframe;
1558 }
1da177e4 1559
401d1f02 1560 set_thread_flag(TIF_RESTOREALL);
81e7009e 1561 return 0;
1da177e4
LT
1562
1563badframe:
76462232
CD
1564 if (show_unhandled_signals)
1565 printk_ratelimited(KERN_INFO
1566 "%s[%d]: bad frame in sys_sigreturn: "
1567 "%p nip %08lx lr %08lx\n",
1568 current->comm, current->pid,
1569 addr, regs->nip, regs->link);
d0c3d534 1570
1da177e4
LT
1571 force_sig(SIGSEGV, current);
1572 return 0;
1573}