]>
Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
81e7009e | 2 | * Signal handling for 32bit PPC and 32bit tasks on 64bit PPC |
1da177e4 | 3 | * |
81e7009e SR |
4 | * PowerPC version |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
1da177e4 LT |
6 | * Copyright (C) 2001 IBM |
7 | * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | |
8 | * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) | |
9 | * | |
81e7009e SR |
10 | * Derived from "arch/i386/kernel/signal.c" |
11 | * Copyright (C) 1991, 1992 Linus Torvalds | |
12 | * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson | |
1da177e4 | 13 | * |
81e7009e SR |
14 | * This program is free software; you can redistribute it and/or |
15 | * modify it under the terms of the GNU General Public License | |
16 | * as published by the Free Software Foundation; either version | |
17 | * 2 of the License, or (at your option) any later version. | |
1da177e4 LT |
18 | */ |
19 | ||
1da177e4 | 20 | #include <linux/sched.h> |
81e7009e | 21 | #include <linux/mm.h> |
1da177e4 | 22 | #include <linux/smp.h> |
1da177e4 LT |
23 | #include <linux/kernel.h> |
24 | #include <linux/signal.h> | |
1da177e4 LT |
25 | #include <linux/errno.h> |
26 | #include <linux/elf.h> | |
05ead015 | 27 | #include <linux/ptrace.h> |
76462232 | 28 | #include <linux/ratelimit.h> |
81e7009e SR |
29 | #ifdef CONFIG_PPC64 |
30 | #include <linux/syscalls.h> | |
1da177e4 | 31 | #include <linux/compat.h> |
81e7009e SR |
32 | #else |
33 | #include <linux/wait.h> | |
81e7009e SR |
34 | #include <linux/unistd.h> |
35 | #include <linux/stddef.h> | |
36 | #include <linux/tty.h> | |
37 | #include <linux/binfmts.h> | |
81e7009e SR |
38 | #endif |
39 | ||
1da177e4 | 40 | #include <asm/uaccess.h> |
81e7009e | 41 | #include <asm/cacheflush.h> |
a7f31841 | 42 | #include <asm/syscalls.h> |
c5ff7001 | 43 | #include <asm/sigcontext.h> |
a7f290da | 44 | #include <asm/vdso.h> |
ae3a197e | 45 | #include <asm/switch_to.h> |
2b0a576d | 46 | #include <asm/tm.h> |
81e7009e | 47 | #ifdef CONFIG_PPC64 |
879168ee | 48 | #include "ppc32.h" |
1da177e4 | 49 | #include <asm/unistd.h> |
81e7009e SR |
50 | #else |
51 | #include <asm/ucontext.h> | |
52 | #include <asm/pgtable.h> | |
53 | #endif | |
1da177e4 | 54 | |
22e38f29 BH |
55 | #include "signal.h" |
56 | ||
81e7009e | 57 | #undef DEBUG_SIG |
1da177e4 | 58 | |
81e7009e | 59 | #ifdef CONFIG_PPC64 |
b09a4913 | 60 | #define sys_rt_sigreturn compat_sys_rt_sigreturn |
b09a4913 SR |
61 | #define sys_swapcontext compat_sys_swapcontext |
62 | #define sys_sigreturn compat_sys_sigreturn | |
81e7009e SR |
63 | |
64 | #define old_sigaction old_sigaction32 | |
65 | #define sigcontext sigcontext32 | |
66 | #define mcontext mcontext32 | |
67 | #define ucontext ucontext32 | |
68 | ||
7cce2465 AV |
69 | #define __save_altstack __compat_save_altstack |
70 | ||
c1cb299e MN |
71 | /* |
72 | * Userspace code may pass a ucontext which doesn't include VSX added | |
73 | * at the end. We need to check for this case. | |
74 | */ | |
75 | #define UCONTEXTSIZEWITHOUTVSX \ | |
76 | (sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32)) | |
77 | ||
81e7009e SR |
78 | /* |
79 | * Returning 0 means we return to userspace via | |
80 | * ret_from_except and thus restore all user | |
81 | * registers from *regs. This is what we need | |
82 | * to do when a signal has been delivered. | |
83 | */ | |
81e7009e SR |
84 | |
85 | #define GP_REGS_SIZE min(sizeof(elf_gregset_t32), sizeof(struct pt_regs32)) | |
86 | #undef __SIGNAL_FRAMESIZE | |
87 | #define __SIGNAL_FRAMESIZE __SIGNAL_FRAMESIZE32 | |
88 | #undef ELF_NVRREG | |
89 | #define ELF_NVRREG ELF_NVRREG32 | |
90 | ||
91 | /* | |
92 | * Functions for flipping sigsets (thanks to brain dead generic | |
93 | * implementation that makes things simple for little endian only) | |
94 | */ | |
95 | static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set) | |
96 | { | |
97 | compat_sigset_t cset; | |
98 | ||
99 | switch (_NSIG_WORDS) { | |
a313f4c5 | 100 | case 4: cset.sig[6] = set->sig[3] & 0xffffffffull; |
81e7009e SR |
101 | cset.sig[7] = set->sig[3] >> 32; |
102 | case 3: cset.sig[4] = set->sig[2] & 0xffffffffull; | |
103 | cset.sig[5] = set->sig[2] >> 32; | |
104 | case 2: cset.sig[2] = set->sig[1] & 0xffffffffull; | |
105 | cset.sig[3] = set->sig[1] >> 32; | |
106 | case 1: cset.sig[0] = set->sig[0] & 0xffffffffull; | |
107 | cset.sig[1] = set->sig[0] >> 32; | |
108 | } | |
109 | return copy_to_user(uset, &cset, sizeof(*uset)); | |
110 | } | |
111 | ||
9b7cf8b4 PM |
112 | static inline int get_sigset_t(sigset_t *set, |
113 | const compat_sigset_t __user *uset) | |
81e7009e SR |
114 | { |
115 | compat_sigset_t s32; | |
116 | ||
117 | if (copy_from_user(&s32, uset, sizeof(*uset))) | |
118 | return -EFAULT; | |
119 | ||
120 | /* | |
121 | * Swap the 2 words of the 64-bit sigset_t (they are stored | |
122 | * in the "wrong" endian in 32-bit user storage). | |
123 | */ | |
124 | switch (_NSIG_WORDS) { | |
125 | case 4: set->sig[3] = s32.sig[6] | (((long)s32.sig[7]) << 32); | |
126 | case 3: set->sig[2] = s32.sig[4] | (((long)s32.sig[5]) << 32); | |
127 | case 2: set->sig[1] = s32.sig[2] | (((long)s32.sig[3]) << 32); | |
128 | case 1: set->sig[0] = s32.sig[0] | (((long)s32.sig[1]) << 32); | |
129 | } | |
130 | return 0; | |
131 | } | |
132 | ||
29e646df | 133 | #define to_user_ptr(p) ptr_to_compat(p) |
81e7009e SR |
134 | #define from_user_ptr(p) compat_ptr(p) |
135 | ||
136 | static inline int save_general_regs(struct pt_regs *regs, | |
137 | struct mcontext __user *frame) | |
138 | { | |
139 | elf_greg_t64 *gregs = (elf_greg_t64 *)regs; | |
140 | int i; | |
141 | ||
1bd79336 | 142 | WARN_ON(!FULL_REGS(regs)); |
401d1f02 DW |
143 | |
144 | for (i = 0; i <= PT_RESULT; i ++) { | |
145 | if (i == 14 && !FULL_REGS(regs)) | |
146 | i = 32; | |
81e7009e SR |
147 | if (__put_user((unsigned int)gregs[i], &frame->mc_gregs[i])) |
148 | return -EFAULT; | |
401d1f02 | 149 | } |
81e7009e SR |
150 | return 0; |
151 | } | |
152 | ||
153 | static inline int restore_general_regs(struct pt_regs *regs, | |
154 | struct mcontext __user *sr) | |
155 | { | |
156 | elf_greg_t64 *gregs = (elf_greg_t64 *)regs; | |
157 | int i; | |
158 | ||
159 | for (i = 0; i <= PT_RESULT; i++) { | |
160 | if ((i == PT_MSR) || (i == PT_SOFTE)) | |
161 | continue; | |
162 | if (__get_user(gregs[i], &sr->mc_gregs[i])) | |
163 | return -EFAULT; | |
164 | } | |
165 | return 0; | |
166 | } | |
167 | ||
168 | #else /* CONFIG_PPC64 */ | |
169 | ||
81e7009e SR |
170 | #define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs)) |
171 | ||
172 | static inline int put_sigset_t(sigset_t __user *uset, sigset_t *set) | |
173 | { | |
174 | return copy_to_user(uset, set, sizeof(*uset)); | |
175 | } | |
176 | ||
9b7cf8b4 | 177 | static inline int get_sigset_t(sigset_t *set, const sigset_t __user *uset) |
81e7009e SR |
178 | { |
179 | return copy_from_user(set, uset, sizeof(*uset)); | |
180 | } | |
181 | ||
29e646df AV |
182 | #define to_user_ptr(p) ((unsigned long)(p)) |
183 | #define from_user_ptr(p) ((void __user *)(p)) | |
81e7009e SR |
184 | |
185 | static inline int save_general_regs(struct pt_regs *regs, | |
186 | struct mcontext __user *frame) | |
187 | { | |
1bd79336 | 188 | WARN_ON(!FULL_REGS(regs)); |
81e7009e SR |
189 | return __copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE); |
190 | } | |
191 | ||
192 | static inline int restore_general_regs(struct pt_regs *regs, | |
193 | struct mcontext __user *sr) | |
194 | { | |
195 | /* copy up to but not including MSR */ | |
196 | if (__copy_from_user(regs, &sr->mc_gregs, | |
197 | PT_MSR * sizeof(elf_greg_t))) | |
198 | return -EFAULT; | |
199 | /* copy from orig_r3 (the word after the MSR) up to the end */ | |
200 | if (__copy_from_user(®s->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3], | |
201 | GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t))) | |
202 | return -EFAULT; | |
203 | return 0; | |
204 | } | |
81e7009e SR |
205 | #endif |
206 | ||
1da177e4 LT |
207 | /* |
208 | * When we have signals to deliver, we set up on the | |
209 | * user stack, going down from the original stack pointer: | |
a3f61dc0 BH |
210 | * an ABI gap of 56 words |
211 | * an mcontext struct | |
81e7009e SR |
212 | * a sigcontext struct |
213 | * a gap of __SIGNAL_FRAMESIZE bytes | |
1da177e4 | 214 | * |
a3f61dc0 BH |
215 | * Each of these things must be a multiple of 16 bytes in size. The following |
216 | * structure represent all of this except the __SIGNAL_FRAMESIZE gap | |
1da177e4 LT |
217 | * |
218 | */ | |
a3f61dc0 BH |
219 | struct sigframe { |
220 | struct sigcontext sctx; /* the sigcontext */ | |
81e7009e | 221 | struct mcontext mctx; /* all the register values */ |
2b0a576d MN |
222 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
223 | struct sigcontext sctx_transact; | |
224 | struct mcontext mctx_transact; | |
225 | #endif | |
1da177e4 LT |
226 | /* |
227 | * Programs using the rs6000/xcoff abi can save up to 19 gp | |
228 | * regs and 18 fp regs below sp before decrementing it. | |
229 | */ | |
230 | int abigap[56]; | |
231 | }; | |
232 | ||
233 | /* We use the mc_pad field for the signal return trampoline. */ | |
234 | #define tramp mc_pad | |
235 | ||
236 | /* | |
237 | * When we have rt signals to deliver, we set up on the | |
238 | * user stack, going down from the original stack pointer: | |
81e7009e SR |
239 | * one rt_sigframe struct (siginfo + ucontext + ABI gap) |
240 | * a gap of __SIGNAL_FRAMESIZE+16 bytes | |
241 | * (the +16 is to get the siginfo and ucontext in the same | |
1da177e4 LT |
242 | * positions as in older kernels). |
243 | * | |
244 | * Each of these things must be a multiple of 16 bytes in size. | |
245 | * | |
246 | */ | |
81e7009e SR |
247 | struct rt_sigframe { |
248 | #ifdef CONFIG_PPC64 | |
249 | compat_siginfo_t info; | |
250 | #else | |
251 | struct siginfo info; | |
252 | #endif | |
253 | struct ucontext uc; | |
2b0a576d MN |
254 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
255 | struct ucontext uc_transact; | |
256 | #endif | |
1da177e4 LT |
257 | /* |
258 | * Programs using the rs6000/xcoff abi can save up to 19 gp | |
259 | * regs and 18 fp regs below sp before decrementing it. | |
260 | */ | |
261 | int abigap[56]; | |
262 | }; | |
263 | ||
6a274c08 MN |
264 | #ifdef CONFIG_VSX |
265 | unsigned long copy_fpr_to_user(void __user *to, | |
266 | struct task_struct *task) | |
267 | { | |
de79f7b9 | 268 | u64 buf[ELF_NFPREG]; |
6a274c08 MN |
269 | int i; |
270 | ||
271 | /* save FPR copy to local buffer then write to the thread_struct */ | |
272 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) | |
273 | buf[i] = task->thread.TS_FPR(i); | |
de79f7b9 | 274 | buf[i] = task->thread.fp_state.fpscr; |
6a274c08 MN |
275 | return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double)); |
276 | } | |
277 | ||
278 | unsigned long copy_fpr_from_user(struct task_struct *task, | |
279 | void __user *from) | |
280 | { | |
de79f7b9 | 281 | u64 buf[ELF_NFPREG]; |
6a274c08 MN |
282 | int i; |
283 | ||
284 | if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double))) | |
285 | return 1; | |
286 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) | |
287 | task->thread.TS_FPR(i) = buf[i]; | |
de79f7b9 | 288 | task->thread.fp_state.fpscr = buf[i]; |
6a274c08 MN |
289 | |
290 | return 0; | |
291 | } | |
292 | ||
293 | unsigned long copy_vsx_to_user(void __user *to, | |
294 | struct task_struct *task) | |
295 | { | |
de79f7b9 | 296 | u64 buf[ELF_NVSRHALFREG]; |
6a274c08 MN |
297 | int i; |
298 | ||
299 | /* save FPR copy to local buffer then write to the thread_struct */ | |
300 | for (i = 0; i < ELF_NVSRHALFREG; i++) | |
de79f7b9 | 301 | buf[i] = task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET]; |
6a274c08 MN |
302 | return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double)); |
303 | } | |
304 | ||
305 | unsigned long copy_vsx_from_user(struct task_struct *task, | |
306 | void __user *from) | |
307 | { | |
de79f7b9 | 308 | u64 buf[ELF_NVSRHALFREG]; |
6a274c08 MN |
309 | int i; |
310 | ||
311 | if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double))) | |
312 | return 1; | |
313 | for (i = 0; i < ELF_NVSRHALFREG ; i++) | |
de79f7b9 | 314 | task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i]; |
6a274c08 MN |
315 | return 0; |
316 | } | |
2b0a576d MN |
317 | |
318 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | |
319 | unsigned long copy_transact_fpr_to_user(void __user *to, | |
320 | struct task_struct *task) | |
321 | { | |
de79f7b9 | 322 | u64 buf[ELF_NFPREG]; |
2b0a576d MN |
323 | int i; |
324 | ||
325 | /* save FPR copy to local buffer then write to the thread_struct */ | |
326 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) | |
327 | buf[i] = task->thread.TS_TRANS_FPR(i); | |
de79f7b9 | 328 | buf[i] = task->thread.transact_fp.fpscr; |
2b0a576d MN |
329 | return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double)); |
330 | } | |
331 | ||
332 | unsigned long copy_transact_fpr_from_user(struct task_struct *task, | |
333 | void __user *from) | |
334 | { | |
de79f7b9 | 335 | u64 buf[ELF_NFPREG]; |
2b0a576d MN |
336 | int i; |
337 | ||
338 | if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double))) | |
339 | return 1; | |
340 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) | |
341 | task->thread.TS_TRANS_FPR(i) = buf[i]; | |
de79f7b9 | 342 | task->thread.transact_fp.fpscr = buf[i]; |
2b0a576d MN |
343 | |
344 | return 0; | |
345 | } | |
346 | ||
347 | unsigned long copy_transact_vsx_to_user(void __user *to, | |
348 | struct task_struct *task) | |
349 | { | |
de79f7b9 | 350 | u64 buf[ELF_NVSRHALFREG]; |
2b0a576d MN |
351 | int i; |
352 | ||
353 | /* save FPR copy to local buffer then write to the thread_struct */ | |
354 | for (i = 0; i < ELF_NVSRHALFREG; i++) | |
de79f7b9 | 355 | buf[i] = task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET]; |
2b0a576d MN |
356 | return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double)); |
357 | } | |
358 | ||
359 | unsigned long copy_transact_vsx_from_user(struct task_struct *task, | |
360 | void __user *from) | |
361 | { | |
de79f7b9 | 362 | u64 buf[ELF_NVSRHALFREG]; |
2b0a576d MN |
363 | int i; |
364 | ||
365 | if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double))) | |
366 | return 1; | |
367 | for (i = 0; i < ELF_NVSRHALFREG ; i++) | |
de79f7b9 | 368 | task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = buf[i]; |
2b0a576d MN |
369 | return 0; |
370 | } | |
371 | #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ | |
6a274c08 MN |
372 | #else |
373 | inline unsigned long copy_fpr_to_user(void __user *to, | |
374 | struct task_struct *task) | |
375 | { | |
de79f7b9 | 376 | return __copy_to_user(to, task->thread.fp_state.fpr, |
6a274c08 MN |
377 | ELF_NFPREG * sizeof(double)); |
378 | } | |
379 | ||
380 | inline unsigned long copy_fpr_from_user(struct task_struct *task, | |
381 | void __user *from) | |
382 | { | |
de79f7b9 | 383 | return __copy_from_user(task->thread.fp_state.fpr, from, |
6a274c08 MN |
384 | ELF_NFPREG * sizeof(double)); |
385 | } | |
2b0a576d MN |
386 | |
387 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | |
388 | inline unsigned long copy_transact_fpr_to_user(void __user *to, | |
389 | struct task_struct *task) | |
390 | { | |
de79f7b9 | 391 | return __copy_to_user(to, task->thread.transact_fp.fpr, |
2b0a576d MN |
392 | ELF_NFPREG * sizeof(double)); |
393 | } | |
394 | ||
395 | inline unsigned long copy_transact_fpr_from_user(struct task_struct *task, | |
396 | void __user *from) | |
397 | { | |
de79f7b9 | 398 | return __copy_from_user(task->thread.transact_fp.fpr, from, |
2b0a576d MN |
399 | ELF_NFPREG * sizeof(double)); |
400 | } | |
401 | #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ | |
6a274c08 MN |
402 | #endif |
403 | ||
1da177e4 LT |
404 | /* |
405 | * Save the current user registers on the user stack. | |
81e7009e SR |
406 | * We only save the altivec/spe registers if the process has used |
407 | * altivec/spe instructions at some point. | |
1da177e4 | 408 | */ |
81e7009e | 409 | static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame, |
1d25f11f MN |
410 | struct mcontext __user *tm_frame, int sigret, |
411 | int ctx_has_vsx_region) | |
1da177e4 | 412 | { |
9e751186 MN |
413 | unsigned long msr = regs->msr; |
414 | ||
1da177e4 LT |
415 | /* Make sure floating point registers are stored in regs */ |
416 | flush_fp_to_thread(current); | |
417 | ||
c6e6771b MN |
418 | /* save general registers */ |
419 | if (save_general_regs(regs, frame)) | |
1da177e4 LT |
420 | return 1; |
421 | ||
1da177e4 LT |
422 | #ifdef CONFIG_ALTIVEC |
423 | /* save altivec registers */ | |
424 | if (current->thread.used_vr) { | |
425 | flush_altivec_to_thread(current); | |
de79f7b9 | 426 | if (__copy_to_user(&frame->mc_vregs, ¤t->thread.vr_state, |
81e7009e | 427 | ELF_NVRREG * sizeof(vector128))) |
1da177e4 LT |
428 | return 1; |
429 | /* set MSR_VEC in the saved MSR value to indicate that | |
430 | frame->mc_vregs contains valid data */ | |
9e751186 | 431 | msr |= MSR_VEC; |
1da177e4 LT |
432 | } |
433 | /* else assert((regs->msr & MSR_VEC) == 0) */ | |
434 | ||
435 | /* We always copy to/from vrsave, it's 0 if we don't have or don't | |
436 | * use altivec. Since VSCR only contains 32 bits saved in the least | |
437 | * significant bits of a vector, we "cheat" and stuff VRSAVE in the | |
438 | * most significant bits of that same vector. --BenH | |
408a7e08 | 439 | * Note that the current VRSAVE value is in the SPR at this point. |
1da177e4 | 440 | */ |
408a7e08 PM |
441 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
442 | current->thread.vrsave = mfspr(SPRN_VRSAVE); | |
1da177e4 LT |
443 | if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32])) |
444 | return 1; | |
445 | #endif /* CONFIG_ALTIVEC */ | |
6a274c08 | 446 | if (copy_fpr_to_user(&frame->mc_fregs, current)) |
c6e6771b | 447 | return 1; |
6a274c08 | 448 | #ifdef CONFIG_VSX |
ce48b210 MN |
449 | /* |
450 | * Copy VSR 0-31 upper half from thread_struct to local | |
451 | * buffer, then write that to userspace. Also set MSR_VSX in | |
452 | * the saved MSR value to indicate that frame->mc_vregs | |
453 | * contains valid data | |
454 | */ | |
16c29d18 | 455 | if (current->thread.used_vsr && ctx_has_vsx_region) { |
7c292170 | 456 | __giveup_vsx(current); |
6a274c08 | 457 | if (copy_vsx_to_user(&frame->mc_vsregs, current)) |
ce48b210 MN |
458 | return 1; |
459 | msr |= MSR_VSX; | |
c13f20ac MN |
460 | } else if (!ctx_has_vsx_region) |
461 | /* | |
462 | * With a small context structure we can't hold the VSX | |
463 | * registers, hence clear the MSR value to indicate the state | |
464 | * was not saved. | |
465 | */ | |
466 | msr &= ~MSR_VSX; | |
467 | ||
468 | ||
c6e6771b | 469 | #endif /* CONFIG_VSX */ |
81e7009e SR |
470 | #ifdef CONFIG_SPE |
471 | /* save spe registers */ | |
472 | if (current->thread.used_spe) { | |
473 | flush_spe_to_thread(current); | |
474 | if (__copy_to_user(&frame->mc_vregs, current->thread.evr, | |
475 | ELF_NEVRREG * sizeof(u32))) | |
476 | return 1; | |
477 | /* set MSR_SPE in the saved MSR value to indicate that | |
478 | frame->mc_vregs contains valid data */ | |
9e751186 | 479 | msr |= MSR_SPE; |
81e7009e SR |
480 | } |
481 | /* else assert((regs->msr & MSR_SPE) == 0) */ | |
482 | ||
483 | /* We always copy to/from spefscr */ | |
484 | if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG)) | |
485 | return 1; | |
486 | #endif /* CONFIG_SPE */ | |
487 | ||
9e751186 MN |
488 | if (__put_user(msr, &frame->mc_gregs[PT_MSR])) |
489 | return 1; | |
1d25f11f MN |
490 | /* We need to write 0 the MSR top 32 bits in the tm frame so that we |
491 | * can check it on the restore to see if TM is active | |
492 | */ | |
493 | if (tm_frame && __put_user(0, &tm_frame->mc_gregs[PT_MSR])) | |
494 | return 1; | |
495 | ||
1da177e4 LT |
496 | if (sigret) { |
497 | /* Set up the sigreturn trampoline: li r0,sigret; sc */ | |
498 | if (__put_user(0x38000000UL + sigret, &frame->tramp[0]) | |
499 | || __put_user(0x44000002UL, &frame->tramp[1])) | |
500 | return 1; | |
501 | flush_icache_range((unsigned long) &frame->tramp[0], | |
502 | (unsigned long) &frame->tramp[2]); | |
503 | } | |
504 | ||
505 | return 0; | |
506 | } | |
507 | ||
2b0a576d MN |
508 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
509 | /* | |
510 | * Save the current user registers on the user stack. | |
511 | * We only save the altivec/spe registers if the process has used | |
512 | * altivec/spe instructions at some point. | |
513 | * We also save the transactional registers to a second ucontext in the | |
514 | * frame. | |
515 | * | |
516 | * See save_user_regs() and signal_64.c:setup_tm_sigcontexts(). | |
517 | */ | |
518 | static int save_tm_user_regs(struct pt_regs *regs, | |
519 | struct mcontext __user *frame, | |
520 | struct mcontext __user *tm_frame, int sigret) | |
521 | { | |
522 | unsigned long msr = regs->msr; | |
523 | ||
2b0a576d MN |
524 | /* Make sure floating point registers are stored in regs */ |
525 | flush_fp_to_thread(current); | |
526 | ||
527 | /* Save both sets of general registers */ | |
528 | if (save_general_regs(¤t->thread.ckpt_regs, frame) | |
529 | || save_general_regs(regs, tm_frame)) | |
530 | return 1; | |
531 | ||
532 | /* Stash the top half of the 64bit MSR into the 32bit MSR word | |
533 | * of the transactional mcontext. This way we have a backward-compatible | |
534 | * MSR in the 'normal' (checkpointed) mcontext and additionally one can | |
535 | * also look at what type of transaction (T or S) was active at the | |
536 | * time of the signal. | |
537 | */ | |
538 | if (__put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR])) | |
539 | return 1; | |
540 | ||
541 | #ifdef CONFIG_ALTIVEC | |
542 | /* save altivec registers */ | |
543 | if (current->thread.used_vr) { | |
544 | flush_altivec_to_thread(current); | |
de79f7b9 | 545 | if (__copy_to_user(&frame->mc_vregs, ¤t->thread.vr_state, |
2b0a576d MN |
546 | ELF_NVRREG * sizeof(vector128))) |
547 | return 1; | |
548 | if (msr & MSR_VEC) { | |
549 | if (__copy_to_user(&tm_frame->mc_vregs, | |
de79f7b9 | 550 | ¤t->thread.transact_vr, |
2b0a576d MN |
551 | ELF_NVRREG * sizeof(vector128))) |
552 | return 1; | |
553 | } else { | |
554 | if (__copy_to_user(&tm_frame->mc_vregs, | |
de79f7b9 | 555 | ¤t->thread.vr_state, |
2b0a576d MN |
556 | ELF_NVRREG * sizeof(vector128))) |
557 | return 1; | |
558 | } | |
559 | ||
560 | /* set MSR_VEC in the saved MSR value to indicate that | |
561 | * frame->mc_vregs contains valid data | |
562 | */ | |
563 | msr |= MSR_VEC; | |
564 | } | |
565 | ||
566 | /* We always copy to/from vrsave, it's 0 if we don't have or don't | |
567 | * use altivec. Since VSCR only contains 32 bits saved in the least | |
568 | * significant bits of a vector, we "cheat" and stuff VRSAVE in the | |
569 | * most significant bits of that same vector. --BenH | |
570 | */ | |
408a7e08 PM |
571 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
572 | current->thread.vrsave = mfspr(SPRN_VRSAVE); | |
2b0a576d MN |
573 | if (__put_user(current->thread.vrsave, |
574 | (u32 __user *)&frame->mc_vregs[32])) | |
575 | return 1; | |
576 | if (msr & MSR_VEC) { | |
577 | if (__put_user(current->thread.transact_vrsave, | |
578 | (u32 __user *)&tm_frame->mc_vregs[32])) | |
579 | return 1; | |
580 | } else { | |
581 | if (__put_user(current->thread.vrsave, | |
582 | (u32 __user *)&tm_frame->mc_vregs[32])) | |
583 | return 1; | |
584 | } | |
585 | #endif /* CONFIG_ALTIVEC */ | |
586 | ||
587 | if (copy_fpr_to_user(&frame->mc_fregs, current)) | |
588 | return 1; | |
589 | if (msr & MSR_FP) { | |
590 | if (copy_transact_fpr_to_user(&tm_frame->mc_fregs, current)) | |
591 | return 1; | |
592 | } else { | |
593 | if (copy_fpr_to_user(&tm_frame->mc_fregs, current)) | |
594 | return 1; | |
595 | } | |
596 | ||
597 | #ifdef CONFIG_VSX | |
598 | /* | |
599 | * Copy VSR 0-31 upper half from thread_struct to local | |
600 | * buffer, then write that to userspace. Also set MSR_VSX in | |
601 | * the saved MSR value to indicate that frame->mc_vregs | |
602 | * contains valid data | |
603 | */ | |
604 | if (current->thread.used_vsr) { | |
605 | __giveup_vsx(current); | |
606 | if (copy_vsx_to_user(&frame->mc_vsregs, current)) | |
607 | return 1; | |
608 | if (msr & MSR_VSX) { | |
609 | if (copy_transact_vsx_to_user(&tm_frame->mc_vsregs, | |
610 | current)) | |
611 | return 1; | |
612 | } else { | |
613 | if (copy_vsx_to_user(&tm_frame->mc_vsregs, current)) | |
614 | return 1; | |
615 | } | |
616 | ||
617 | msr |= MSR_VSX; | |
618 | } | |
619 | #endif /* CONFIG_VSX */ | |
620 | #ifdef CONFIG_SPE | |
621 | /* SPE regs are not checkpointed with TM, so this section is | |
622 | * simply the same as in save_user_regs(). | |
623 | */ | |
624 | if (current->thread.used_spe) { | |
625 | flush_spe_to_thread(current); | |
626 | if (__copy_to_user(&frame->mc_vregs, current->thread.evr, | |
627 | ELF_NEVRREG * sizeof(u32))) | |
628 | return 1; | |
629 | /* set MSR_SPE in the saved MSR value to indicate that | |
630 | * frame->mc_vregs contains valid data */ | |
631 | msr |= MSR_SPE; | |
632 | } | |
633 | ||
634 | /* We always copy to/from spefscr */ | |
635 | if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG)) | |
636 | return 1; | |
637 | #endif /* CONFIG_SPE */ | |
638 | ||
639 | if (__put_user(msr, &frame->mc_gregs[PT_MSR])) | |
640 | return 1; | |
641 | if (sigret) { | |
642 | /* Set up the sigreturn trampoline: li r0,sigret; sc */ | |
643 | if (__put_user(0x38000000UL + sigret, &frame->tramp[0]) | |
644 | || __put_user(0x44000002UL, &frame->tramp[1])) | |
645 | return 1; | |
646 | flush_icache_range((unsigned long) &frame->tramp[0], | |
647 | (unsigned long) &frame->tramp[2]); | |
648 | } | |
649 | ||
650 | return 0; | |
651 | } | |
652 | #endif | |
653 | ||
1da177e4 LT |
654 | /* |
655 | * Restore the current user register values from the user stack, | |
656 | * (except for MSR). | |
657 | */ | |
658 | static long restore_user_regs(struct pt_regs *regs, | |
81e7009e | 659 | struct mcontext __user *sr, int sig) |
1da177e4 | 660 | { |
81e7009e | 661 | long err; |
1da177e4 | 662 | unsigned int save_r2 = 0; |
1da177e4 | 663 | unsigned long msr; |
c6e6771b | 664 | #ifdef CONFIG_VSX |
c6e6771b MN |
665 | int i; |
666 | #endif | |
1da177e4 LT |
667 | |
668 | /* | |
669 | * restore general registers but not including MSR or SOFTE. Also | |
670 | * take care of keeping r2 (TLS) intact if not a signal | |
671 | */ | |
672 | if (!sig) | |
673 | save_r2 = (unsigned int)regs->gpr[2]; | |
81e7009e | 674 | err = restore_general_regs(regs, sr); |
9a81c16b | 675 | regs->trap = 0; |
fab5db97 | 676 | err |= __get_user(msr, &sr->mc_gregs[PT_MSR]); |
1da177e4 LT |
677 | if (!sig) |
678 | regs->gpr[2] = (unsigned long) save_r2; | |
679 | if (err) | |
680 | return 1; | |
681 | ||
fab5db97 PM |
682 | /* if doing signal return, restore the previous little-endian mode */ |
683 | if (sig) | |
684 | regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); | |
685 | ||
5388fb10 PM |
686 | /* |
687 | * Do this before updating the thread state in | |
688 | * current->thread.fpr/vr/evr. That way, if we get preempted | |
689 | * and another task grabs the FPU/Altivec/SPE, it won't be | |
690 | * tempted to save the current CPU state into the thread_struct | |
691 | * and corrupt what we are writing there. | |
692 | */ | |
693 | discard_lazy_cpu_state(); | |
694 | ||
1da177e4 | 695 | #ifdef CONFIG_ALTIVEC |
c6e6771b MN |
696 | /* |
697 | * Force the process to reload the altivec registers from | |
698 | * current->thread when it next does altivec instructions | |
699 | */ | |
1da177e4 | 700 | regs->msr &= ~MSR_VEC; |
fab5db97 | 701 | if (msr & MSR_VEC) { |
1da177e4 | 702 | /* restore altivec registers from the stack */ |
de79f7b9 | 703 | if (__copy_from_user(¤t->thread.vr_state, &sr->mc_vregs, |
1da177e4 LT |
704 | sizeof(sr->mc_vregs))) |
705 | return 1; | |
706 | } else if (current->thread.used_vr) | |
de79f7b9 PM |
707 | memset(¤t->thread.vr_state, 0, |
708 | ELF_NVRREG * sizeof(vector128)); | |
1da177e4 LT |
709 | |
710 | /* Always get VRSAVE back */ | |
711 | if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32])) | |
712 | return 1; | |
408a7e08 PM |
713 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
714 | mtspr(SPRN_VRSAVE, current->thread.vrsave); | |
1da177e4 | 715 | #endif /* CONFIG_ALTIVEC */ |
6a274c08 MN |
716 | if (copy_fpr_from_user(current, &sr->mc_fregs)) |
717 | return 1; | |
1da177e4 | 718 | |
c6e6771b | 719 | #ifdef CONFIG_VSX |
ce48b210 MN |
720 | /* |
721 | * Force the process to reload the VSX registers from | |
722 | * current->thread when it next does VSX instruction. | |
723 | */ | |
724 | regs->msr &= ~MSR_VSX; | |
725 | if (msr & MSR_VSX) { | |
726 | /* | |
727 | * Restore altivec registers from the stack to a local | |
728 | * buffer, then write this out to the thread_struct | |
729 | */ | |
6a274c08 | 730 | if (copy_vsx_from_user(current, &sr->mc_vsregs)) |
ce48b210 | 731 | return 1; |
ce48b210 MN |
732 | } else if (current->thread.used_vsr) |
733 | for (i = 0; i < 32 ; i++) | |
de79f7b9 | 734 | current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
c6e6771b MN |
735 | #endif /* CONFIG_VSX */ |
736 | /* | |
737 | * force the process to reload the FP registers from | |
738 | * current->thread when it next does FP instructions | |
739 | */ | |
740 | regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1); | |
741 | ||
81e7009e SR |
742 | #ifdef CONFIG_SPE |
743 | /* force the process to reload the spe registers from | |
744 | current->thread when it next does spe instructions */ | |
745 | regs->msr &= ~MSR_SPE; | |
fab5db97 | 746 | if (msr & MSR_SPE) { |
81e7009e SR |
747 | /* restore spe registers from the stack */ |
748 | if (__copy_from_user(current->thread.evr, &sr->mc_vregs, | |
749 | ELF_NEVRREG * sizeof(u32))) | |
750 | return 1; | |
751 | } else if (current->thread.used_spe) | |
752 | memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32)); | |
753 | ||
754 | /* Always get SPEFSCR back */ | |
755 | if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs + ELF_NEVRREG)) | |
756 | return 1; | |
757 | #endif /* CONFIG_SPE */ | |
758 | ||
1da177e4 LT |
759 | return 0; |
760 | } | |
761 | ||
2b0a576d MN |
762 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
763 | /* | |
764 | * Restore the current user register values from the user stack, except for | |
765 | * MSR, and recheckpoint the original checkpointed register state for processes | |
766 | * in transactions. | |
767 | */ | |
768 | static long restore_tm_user_regs(struct pt_regs *regs, | |
769 | struct mcontext __user *sr, | |
770 | struct mcontext __user *tm_sr) | |
771 | { | |
772 | long err; | |
2c27a18f | 773 | unsigned long msr, msr_hi; |
2b0a576d MN |
774 | #ifdef CONFIG_VSX |
775 | int i; | |
776 | #endif | |
777 | ||
778 | /* | |
779 | * restore general registers but not including MSR or SOFTE. Also | |
780 | * take care of keeping r2 (TLS) intact if not a signal. | |
781 | * See comment in signal_64.c:restore_tm_sigcontexts(); | |
782 | * TFHAR is restored from the checkpointed NIP; TEXASR and TFIAR | |
783 | * were set by the signal delivery. | |
784 | */ | |
785 | err = restore_general_regs(regs, tm_sr); | |
786 | err |= restore_general_regs(¤t->thread.ckpt_regs, sr); | |
787 | ||
788 | err |= __get_user(current->thread.tm_tfhar, &sr->mc_gregs[PT_NIP]); | |
789 | ||
790 | err |= __get_user(msr, &sr->mc_gregs[PT_MSR]); | |
791 | if (err) | |
792 | return 1; | |
793 | ||
794 | /* Restore the previous little-endian mode */ | |
795 | regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); | |
796 | ||
797 | /* | |
798 | * Do this before updating the thread state in | |
799 | * current->thread.fpr/vr/evr. That way, if we get preempted | |
800 | * and another task grabs the FPU/Altivec/SPE, it won't be | |
801 | * tempted to save the current CPU state into the thread_struct | |
802 | * and corrupt what we are writing there. | |
803 | */ | |
804 | discard_lazy_cpu_state(); | |
805 | ||
806 | #ifdef CONFIG_ALTIVEC | |
807 | regs->msr &= ~MSR_VEC; | |
808 | if (msr & MSR_VEC) { | |
809 | /* restore altivec registers from the stack */ | |
de79f7b9 | 810 | if (__copy_from_user(¤t->thread.vr_state, &sr->mc_vregs, |
2b0a576d | 811 | sizeof(sr->mc_vregs)) || |
de79f7b9 | 812 | __copy_from_user(¤t->thread.transact_vr, |
2b0a576d MN |
813 | &tm_sr->mc_vregs, |
814 | sizeof(sr->mc_vregs))) | |
815 | return 1; | |
816 | } else if (current->thread.used_vr) { | |
de79f7b9 PM |
817 | memset(¤t->thread.vr_state, 0, |
818 | ELF_NVRREG * sizeof(vector128)); | |
819 | memset(¤t->thread.transact_vr, 0, | |
2b0a576d MN |
820 | ELF_NVRREG * sizeof(vector128)); |
821 | } | |
822 | ||
823 | /* Always get VRSAVE back */ | |
824 | if (__get_user(current->thread.vrsave, | |
825 | (u32 __user *)&sr->mc_vregs[32]) || | |
826 | __get_user(current->thread.transact_vrsave, | |
827 | (u32 __user *)&tm_sr->mc_vregs[32])) | |
828 | return 1; | |
408a7e08 PM |
829 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
830 | mtspr(SPRN_VRSAVE, current->thread.vrsave); | |
2b0a576d MN |
831 | #endif /* CONFIG_ALTIVEC */ |
832 | ||
833 | regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1); | |
834 | ||
835 | if (copy_fpr_from_user(current, &sr->mc_fregs) || | |
836 | copy_transact_fpr_from_user(current, &tm_sr->mc_fregs)) | |
837 | return 1; | |
838 | ||
839 | #ifdef CONFIG_VSX | |
840 | regs->msr &= ~MSR_VSX; | |
841 | if (msr & MSR_VSX) { | |
842 | /* | |
843 | * Restore altivec registers from the stack to a local | |
844 | * buffer, then write this out to the thread_struct | |
845 | */ | |
846 | if (copy_vsx_from_user(current, &sr->mc_vsregs) || | |
847 | copy_transact_vsx_from_user(current, &tm_sr->mc_vsregs)) | |
848 | return 1; | |
849 | } else if (current->thread.used_vsr) | |
850 | for (i = 0; i < 32 ; i++) { | |
de79f7b9 PM |
851 | current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
852 | current->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = 0; | |
2b0a576d MN |
853 | } |
854 | #endif /* CONFIG_VSX */ | |
855 | ||
856 | #ifdef CONFIG_SPE | |
857 | /* SPE regs are not checkpointed with TM, so this section is | |
858 | * simply the same as in restore_user_regs(). | |
859 | */ | |
860 | regs->msr &= ~MSR_SPE; | |
861 | if (msr & MSR_SPE) { | |
862 | if (__copy_from_user(current->thread.evr, &sr->mc_vregs, | |
863 | ELF_NEVRREG * sizeof(u32))) | |
864 | return 1; | |
865 | } else if (current->thread.used_spe) | |
866 | memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32)); | |
867 | ||
868 | /* Always get SPEFSCR back */ | |
869 | if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs | |
870 | + ELF_NEVRREG)) | |
871 | return 1; | |
872 | #endif /* CONFIG_SPE */ | |
873 | ||
874 | /* Now, recheckpoint. This loads up all of the checkpointed (older) | |
875 | * registers, including FP and V[S]Rs. After recheckpointing, the | |
876 | * transactional versions should be loaded. | |
877 | */ | |
878 | tm_enable(); | |
879 | /* This loads the checkpointed FP/VEC state, if used */ | |
880 | tm_recheckpoint(¤t->thread, msr); | |
2c27a18f MN |
881 | /* Get the top half of the MSR */ |
882 | if (__get_user(msr_hi, &tm_sr->mc_gregs[PT_MSR])) | |
883 | return 1; | |
884 | /* Pull in MSR TM from user context */ | |
885 | regs->msr = (regs->msr & ~MSR_TS_MASK) | ((msr_hi<<32) & MSR_TS_MASK); | |
2b0a576d MN |
886 | |
887 | /* This loads the speculative FP/VEC state, if used */ | |
888 | if (msr & MSR_FP) { | |
889 | do_load_up_transact_fpu(¤t->thread); | |
890 | regs->msr |= (MSR_FP | current->thread.fpexc_mode); | |
891 | } | |
f110c0c1 | 892 | #ifdef CONFIG_ALTIVEC |
2b0a576d MN |
893 | if (msr & MSR_VEC) { |
894 | do_load_up_transact_altivec(¤t->thread); | |
895 | regs->msr |= MSR_VEC; | |
896 | } | |
f110c0c1 | 897 | #endif |
2b0a576d MN |
898 | |
899 | return 0; | |
900 | } | |
901 | #endif | |
902 | ||
81e7009e | 903 | #ifdef CONFIG_PPC64 |
ce395960 | 904 | int copy_siginfo_to_user32(struct compat_siginfo __user *d, const siginfo_t *s) |
1da177e4 LT |
905 | { |
906 | int err; | |
907 | ||
908 | if (!access_ok (VERIFY_WRITE, d, sizeof(*d))) | |
909 | return -EFAULT; | |
910 | ||
911 | /* If you change siginfo_t structure, please be sure | |
912 | * this code is fixed accordingly. | |
913 | * It should never copy any pad contained in the structure | |
914 | * to avoid security leaks, but must copy the generic | |
915 | * 3 ints plus the relevant union member. | |
916 | * This routine must convert siginfo from 64bit to 32bit as well | |
917 | * at the same time. | |
918 | */ | |
919 | err = __put_user(s->si_signo, &d->si_signo); | |
920 | err |= __put_user(s->si_errno, &d->si_errno); | |
921 | err |= __put_user((short)s->si_code, &d->si_code); | |
922 | if (s->si_code < 0) | |
923 | err |= __copy_to_user(&d->_sifields._pad, &s->_sifields._pad, | |
924 | SI_PAD_SIZE32); | |
925 | else switch(s->si_code >> 16) { | |
926 | case __SI_CHLD >> 16: | |
927 | err |= __put_user(s->si_pid, &d->si_pid); | |
928 | err |= __put_user(s->si_uid, &d->si_uid); | |
929 | err |= __put_user(s->si_utime, &d->si_utime); | |
930 | err |= __put_user(s->si_stime, &d->si_stime); | |
931 | err |= __put_user(s->si_status, &d->si_status); | |
932 | break; | |
933 | case __SI_FAULT >> 16: | |
934 | err |= __put_user((unsigned int)(unsigned long)s->si_addr, | |
935 | &d->si_addr); | |
936 | break; | |
937 | case __SI_POLL >> 16: | |
938 | err |= __put_user(s->si_band, &d->si_band); | |
939 | err |= __put_user(s->si_fd, &d->si_fd); | |
940 | break; | |
941 | case __SI_TIMER >> 16: | |
942 | err |= __put_user(s->si_tid, &d->si_tid); | |
943 | err |= __put_user(s->si_overrun, &d->si_overrun); | |
944 | err |= __put_user(s->si_int, &d->si_int); | |
945 | break; | |
946 | case __SI_RT >> 16: /* This is not generated by the kernel as of now. */ | |
947 | case __SI_MESGQ >> 16: | |
948 | err |= __put_user(s->si_int, &d->si_int); | |
949 | /* fallthrough */ | |
950 | case __SI_KILL >> 16: | |
951 | default: | |
952 | err |= __put_user(s->si_pid, &d->si_pid); | |
953 | err |= __put_user(s->si_uid, &d->si_uid); | |
954 | break; | |
955 | } | |
956 | return err; | |
957 | } | |
958 | ||
81e7009e SR |
959 | #define copy_siginfo_to_user copy_siginfo_to_user32 |
960 | ||
9c0c44db RM |
961 | int copy_siginfo_from_user32(siginfo_t *to, struct compat_siginfo __user *from) |
962 | { | |
963 | memset(to, 0, sizeof *to); | |
964 | ||
965 | if (copy_from_user(to, from, 3*sizeof(int)) || | |
966 | copy_from_user(to->_sifields._pad, | |
967 | from->_sifields._pad, SI_PAD_SIZE32)) | |
968 | return -EFAULT; | |
969 | ||
970 | return 0; | |
971 | } | |
81e7009e | 972 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 973 | |
1da177e4 LT |
974 | /* |
975 | * Set up a signal frame for a "real-time" signal handler | |
976 | * (one which gets siginfo). | |
977 | */ | |
f478f543 | 978 | int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka, |
81e7009e | 979 | siginfo_t *info, sigset_t *oldset, |
a3f61dc0 | 980 | struct pt_regs *regs) |
1da177e4 | 981 | { |
81e7009e SR |
982 | struct rt_sigframe __user *rt_sf; |
983 | struct mcontext __user *frame; | |
1d25f11f | 984 | struct mcontext __user *tm_frame = NULL; |
d0c3d534 | 985 | void __user *addr; |
a3f61dc0 | 986 | unsigned long newsp = 0; |
2b0a576d MN |
987 | int sigret; |
988 | unsigned long tramp; | |
1da177e4 LT |
989 | |
990 | /* Set up Signal Frame */ | |
991 | /* Put a Real Time Context onto stack */ | |
2b3f8e87 | 992 | rt_sf = get_sigframe(ka, get_tm_stackpointer(regs), sizeof(*rt_sf), 1); |
d0c3d534 | 993 | addr = rt_sf; |
a3f61dc0 | 994 | if (unlikely(rt_sf == NULL)) |
1da177e4 LT |
995 | goto badframe; |
996 | ||
1da177e4 | 997 | /* Put the siginfo & fill in most of the ucontext */ |
81e7009e | 998 | if (copy_siginfo_to_user(&rt_sf->info, info) |
1da177e4 | 999 | || __put_user(0, &rt_sf->uc.uc_flags) |
7cce2465 | 1000 | || __save_altstack(&rt_sf->uc.uc_stack, regs->gpr[1]) |
81e7009e SR |
1001 | || __put_user(to_user_ptr(&rt_sf->uc.uc_mcontext), |
1002 | &rt_sf->uc.uc_regs) | |
1003 | || put_sigset_t(&rt_sf->uc.uc_sigmask, oldset)) | |
1da177e4 LT |
1004 | goto badframe; |
1005 | ||
1006 | /* Save user registers on the stack */ | |
1007 | frame = &rt_sf->uc.uc_mcontext; | |
d0c3d534 | 1008 | addr = frame; |
a5bba930 | 1009 | if (vdso32_rt_sigtramp && current->mm->context.vdso_base) { |
2b0a576d MN |
1010 | sigret = 0; |
1011 | tramp = current->mm->context.vdso_base + vdso32_rt_sigtramp; | |
a7f290da | 1012 | } else { |
2b0a576d MN |
1013 | sigret = __NR_rt_sigreturn; |
1014 | tramp = (unsigned long) frame->tramp; | |
1015 | } | |
1016 | ||
1017 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | |
1d25f11f | 1018 | tm_frame = &rt_sf->uc_transact.uc_mcontext; |
2b0a576d | 1019 | if (MSR_TM_ACTIVE(regs->msr)) { |
1d25f11f | 1020 | if (save_tm_user_regs(regs, frame, tm_frame, sigret)) |
1da177e4 | 1021 | goto badframe; |
1da177e4 | 1022 | } |
2b0a576d MN |
1023 | else |
1024 | #endif | |
1d25f11f MN |
1025 | { |
1026 | if (save_user_regs(regs, frame, tm_frame, sigret, 1)) | |
2b0a576d | 1027 | goto badframe; |
1d25f11f | 1028 | } |
2b0a576d MN |
1029 | regs->link = tramp; |
1030 | ||
1031 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | |
1032 | if (MSR_TM_ACTIVE(regs->msr)) { | |
1033 | if (__put_user((unsigned long)&rt_sf->uc_transact, | |
1034 | &rt_sf->uc.uc_link) | |
1d25f11f | 1035 | || __put_user((unsigned long)tm_frame, &rt_sf->uc_transact.uc_regs)) |
2b0a576d MN |
1036 | goto badframe; |
1037 | } | |
1038 | else | |
1039 | #endif | |
1040 | if (__put_user(0, &rt_sf->uc.uc_link)) | |
1041 | goto badframe; | |
cc657f53 | 1042 | |
de79f7b9 | 1043 | current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */ |
cc657f53 | 1044 | |
a3f61dc0 BH |
1045 | /* create a stack frame for the caller of the handler */ |
1046 | newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16); | |
d0c3d534 | 1047 | addr = (void __user *)regs->gpr[1]; |
e2b55306 | 1048 | if (put_user(regs->gpr[1], (u32 __user *)newsp)) |
81e7009e | 1049 | goto badframe; |
a3f61dc0 BH |
1050 | |
1051 | /* Fill registers for signal handler */ | |
81e7009e | 1052 | regs->gpr[1] = newsp; |
1da177e4 LT |
1053 | regs->gpr[3] = sig; |
1054 | regs->gpr[4] = (unsigned long) &rt_sf->info; | |
1055 | regs->gpr[5] = (unsigned long) &rt_sf->uc; | |
1056 | regs->gpr[6] = (unsigned long) rt_sf; | |
1057 | regs->nip = (unsigned long) ka->sa.sa_handler; | |
e871c6bb | 1058 | /* enter the signal handler in native-endian mode */ |
fab5db97 | 1059 | regs->msr &= ~MSR_LE; |
e871c6bb | 1060 | regs->msr |= (MSR_KERNEL & MSR_LE); |
2b0a576d MN |
1061 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1062 | /* Remove TM bits from thread's MSR. The MSR in the sigcontext | |
1063 | * just indicates to userland that we were doing a transaction, but we | |
1064 | * don't want to return in transactional state: | |
1065 | */ | |
1066 | regs->msr &= ~MSR_TS_MASK; | |
1067 | #endif | |
1da177e4 LT |
1068 | return 1; |
1069 | ||
1070 | badframe: | |
81e7009e | 1071 | #ifdef DEBUG_SIG |
1da177e4 LT |
1072 | printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n", |
1073 | regs, frame, newsp); | |
1074 | #endif | |
76462232 CD |
1075 | if (show_unhandled_signals) |
1076 | printk_ratelimited(KERN_INFO | |
1077 | "%s[%d]: bad frame in handle_rt_signal32: " | |
1078 | "%p nip %08lx lr %08lx\n", | |
1079 | current->comm, current->pid, | |
1080 | addr, regs->nip, regs->link); | |
d0c3d534 | 1081 | |
1da177e4 LT |
1082 | force_sigsegv(sig, current); |
1083 | return 0; | |
1084 | } | |
1085 | ||
81e7009e | 1086 | static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig) |
1da177e4 | 1087 | { |
1da177e4 | 1088 | sigset_t set; |
81e7009e SR |
1089 | struct mcontext __user *mcp; |
1090 | ||
1091 | if (get_sigset_t(&set, &ucp->uc_sigmask)) | |
1092 | return -EFAULT; | |
1093 | #ifdef CONFIG_PPC64 | |
1094 | { | |
1095 | u32 cmcp; | |
1da177e4 | 1096 | |
81e7009e SR |
1097 | if (__get_user(cmcp, &ucp->uc_regs)) |
1098 | return -EFAULT; | |
1099 | mcp = (struct mcontext __user *)(u64)cmcp; | |
7c85d1f9 | 1100 | /* no need to check access_ok(mcp), since mcp < 4GB */ |
81e7009e SR |
1101 | } |
1102 | #else | |
1103 | if (__get_user(mcp, &ucp->uc_regs)) | |
1da177e4 | 1104 | return -EFAULT; |
7c85d1f9 PM |
1105 | if (!access_ok(VERIFY_READ, mcp, sizeof(*mcp))) |
1106 | return -EFAULT; | |
81e7009e | 1107 | #endif |
17440f17 | 1108 | set_current_blocked(&set); |
81e7009e | 1109 | if (restore_user_regs(regs, mcp, sig)) |
1da177e4 LT |
1110 | return -EFAULT; |
1111 | ||
1112 | return 0; | |
1113 | } | |
1114 | ||
2b0a576d MN |
1115 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1116 | static int do_setcontext_tm(struct ucontext __user *ucp, | |
1117 | struct ucontext __user *tm_ucp, | |
1118 | struct pt_regs *regs) | |
1119 | { | |
1120 | sigset_t set; | |
1121 | struct mcontext __user *mcp; | |
1122 | struct mcontext __user *tm_mcp; | |
1123 | u32 cmcp; | |
1124 | u32 tm_cmcp; | |
1125 | ||
1126 | if (get_sigset_t(&set, &ucp->uc_sigmask)) | |
1127 | return -EFAULT; | |
1128 | ||
1129 | if (__get_user(cmcp, &ucp->uc_regs) || | |
1130 | __get_user(tm_cmcp, &tm_ucp->uc_regs)) | |
1131 | return -EFAULT; | |
1132 | mcp = (struct mcontext __user *)(u64)cmcp; | |
1133 | tm_mcp = (struct mcontext __user *)(u64)tm_cmcp; | |
1134 | /* no need to check access_ok(mcp), since mcp < 4GB */ | |
1135 | ||
1136 | set_current_blocked(&set); | |
1137 | if (restore_tm_user_regs(regs, mcp, tm_mcp)) | |
1138 | return -EFAULT; | |
1139 | ||
1140 | return 0; | |
1141 | } | |
1142 | #endif | |
1143 | ||
81e7009e | 1144 | long sys_swapcontext(struct ucontext __user *old_ctx, |
1bd79336 PM |
1145 | struct ucontext __user *new_ctx, |
1146 | int ctx_size, int r6, int r7, int r8, struct pt_regs *regs) | |
1da177e4 LT |
1147 | { |
1148 | unsigned char tmp; | |
16c29d18 | 1149 | int ctx_has_vsx_region = 0; |
1da177e4 | 1150 | |
c1cb299e MN |
1151 | #ifdef CONFIG_PPC64 |
1152 | unsigned long new_msr = 0; | |
1153 | ||
77eb50ae AS |
1154 | if (new_ctx) { |
1155 | struct mcontext __user *mcp; | |
1156 | u32 cmcp; | |
1157 | ||
1158 | /* | |
1159 | * Get pointer to the real mcontext. No need for | |
1160 | * access_ok since we are dealing with compat | |
1161 | * pointers. | |
1162 | */ | |
1163 | if (__get_user(cmcp, &new_ctx->uc_regs)) | |
1164 | return -EFAULT; | |
1165 | mcp = (struct mcontext __user *)(u64)cmcp; | |
1166 | if (__get_user(new_msr, &mcp->mc_gregs[PT_MSR])) | |
1167 | return -EFAULT; | |
1168 | } | |
c1cb299e MN |
1169 | /* |
1170 | * Check that the context is not smaller than the original | |
1171 | * size (with VMX but without VSX) | |
1172 | */ | |
1173 | if (ctx_size < UCONTEXTSIZEWITHOUTVSX) | |
1174 | return -EINVAL; | |
1175 | /* | |
1176 | * If the new context state sets the MSR VSX bits but | |
1177 | * it doesn't provide VSX state. | |
1178 | */ | |
1179 | if ((ctx_size < sizeof(struct ucontext)) && | |
1180 | (new_msr & MSR_VSX)) | |
1181 | return -EINVAL; | |
16c29d18 MN |
1182 | /* Does the context have enough room to store VSX data? */ |
1183 | if (ctx_size >= sizeof(struct ucontext)) | |
1184 | ctx_has_vsx_region = 1; | |
c1cb299e | 1185 | #else |
1da177e4 LT |
1186 | /* Context size is for future use. Right now, we only make sure |
1187 | * we are passed something we understand | |
1188 | */ | |
81e7009e | 1189 | if (ctx_size < sizeof(struct ucontext)) |
1da177e4 | 1190 | return -EINVAL; |
c1cb299e | 1191 | #endif |
1da177e4 | 1192 | if (old_ctx != NULL) { |
1c9bb1a0 PM |
1193 | struct mcontext __user *mctx; |
1194 | ||
1195 | /* | |
1196 | * old_ctx might not be 16-byte aligned, in which | |
1197 | * case old_ctx->uc_mcontext won't be either. | |
1198 | * Because we have the old_ctx->uc_pad2 field | |
1199 | * before old_ctx->uc_mcontext, we need to round down | |
1200 | * from &old_ctx->uc_mcontext to a 16-byte boundary. | |
1201 | */ | |
1202 | mctx = (struct mcontext __user *) | |
1203 | ((unsigned long) &old_ctx->uc_mcontext & ~0xfUL); | |
16c29d18 | 1204 | if (!access_ok(VERIFY_WRITE, old_ctx, ctx_size) |
1d25f11f | 1205 | || save_user_regs(regs, mctx, NULL, 0, ctx_has_vsx_region) |
81e7009e | 1206 | || put_sigset_t(&old_ctx->uc_sigmask, ¤t->blocked) |
1c9bb1a0 | 1207 | || __put_user(to_user_ptr(mctx), &old_ctx->uc_regs)) |
1da177e4 LT |
1208 | return -EFAULT; |
1209 | } | |
1210 | if (new_ctx == NULL) | |
1211 | return 0; | |
16c29d18 | 1212 | if (!access_ok(VERIFY_READ, new_ctx, ctx_size) |
1da177e4 | 1213 | || __get_user(tmp, (u8 __user *) new_ctx) |
16c29d18 | 1214 | || __get_user(tmp, (u8 __user *) new_ctx + ctx_size - 1)) |
1da177e4 LT |
1215 | return -EFAULT; |
1216 | ||
1217 | /* | |
1218 | * If we get a fault copying the context into the kernel's | |
1219 | * image of the user's registers, we can't just return -EFAULT | |
1220 | * because the user's registers will be corrupted. For instance | |
1221 | * the NIP value may have been updated but not some of the | |
1222 | * other registers. Given that we have done the access_ok | |
1223 | * and successfully read the first and last bytes of the region | |
1224 | * above, this should only happen in an out-of-memory situation | |
1225 | * or if another thread unmaps the region containing the context. | |
1226 | * We kill the task with a SIGSEGV in this situation. | |
1227 | */ | |
81e7009e | 1228 | if (do_setcontext(new_ctx, regs, 0)) |
1da177e4 | 1229 | do_exit(SIGSEGV); |
401d1f02 DW |
1230 | |
1231 | set_thread_flag(TIF_RESTOREALL); | |
1da177e4 LT |
1232 | return 0; |
1233 | } | |
1234 | ||
81e7009e | 1235 | long sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8, |
1da177e4 LT |
1236 | struct pt_regs *regs) |
1237 | { | |
81e7009e | 1238 | struct rt_sigframe __user *rt_sf; |
2b0a576d MN |
1239 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1240 | struct ucontext __user *uc_transact; | |
1241 | unsigned long msr_hi; | |
1242 | unsigned long tmp; | |
1243 | int tm_restore = 0; | |
1244 | #endif | |
1da177e4 LT |
1245 | /* Always make any pending restarted system calls return -EINTR */ |
1246 | current_thread_info()->restart_block.fn = do_no_restart_syscall; | |
1247 | ||
81e7009e SR |
1248 | rt_sf = (struct rt_sigframe __user *) |
1249 | (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16); | |
1da177e4 LT |
1250 | if (!access_ok(VERIFY_READ, rt_sf, sizeof(*rt_sf))) |
1251 | goto bad; | |
2b0a576d MN |
1252 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1253 | if (__get_user(tmp, &rt_sf->uc.uc_link)) | |
1254 | goto bad; | |
1255 | uc_transact = (struct ucontext __user *)(uintptr_t)tmp; | |
1256 | if (uc_transact) { | |
1257 | u32 cmcp; | |
1258 | struct mcontext __user *mcp; | |
1259 | ||
1260 | if (__get_user(cmcp, &uc_transact->uc_regs)) | |
1261 | return -EFAULT; | |
1262 | mcp = (struct mcontext __user *)(u64)cmcp; | |
1263 | /* The top 32 bits of the MSR are stashed in the transactional | |
1264 | * ucontext. */ | |
1265 | if (__get_user(msr_hi, &mcp->mc_gregs[PT_MSR])) | |
1266 | goto bad; | |
1267 | ||
55e43418 | 1268 | if (MSR_TM_ACTIVE(msr_hi<<32)) { |
2b0a576d MN |
1269 | /* We only recheckpoint on return if we're |
1270 | * transaction. | |
1271 | */ | |
1272 | tm_restore = 1; | |
1273 | if (do_setcontext_tm(&rt_sf->uc, uc_transact, regs)) | |
1274 | goto bad; | |
1275 | } | |
1276 | } | |
1277 | if (!tm_restore) | |
1278 | /* Fall through, for non-TM restore */ | |
1279 | #endif | |
81e7009e | 1280 | if (do_setcontext(&rt_sf->uc, regs, 1)) |
1da177e4 LT |
1281 | goto bad; |
1282 | ||
1283 | /* | |
1284 | * It's not clear whether or why it is desirable to save the | |
1285 | * sigaltstack setting on signal delivery and restore it on | |
1286 | * signal return. But other architectures do this and we have | |
1287 | * always done it up until now so it is probably better not to | |
1288 | * change it. -- paulus | |
81e7009e SR |
1289 | */ |
1290 | #ifdef CONFIG_PPC64 | |
7cce2465 AV |
1291 | if (compat_restore_altstack(&rt_sf->uc.uc_stack)) |
1292 | goto bad; | |
81e7009e | 1293 | #else |
7cce2465 AV |
1294 | if (restore_altstack(&rt_sf->uc.uc_stack)) |
1295 | goto bad; | |
81e7009e | 1296 | #endif |
401d1f02 DW |
1297 | set_thread_flag(TIF_RESTOREALL); |
1298 | return 0; | |
1da177e4 LT |
1299 | |
1300 | bad: | |
76462232 CD |
1301 | if (show_unhandled_signals) |
1302 | printk_ratelimited(KERN_INFO | |
1303 | "%s[%d]: bad frame in sys_rt_sigreturn: " | |
1304 | "%p nip %08lx lr %08lx\n", | |
1305 | current->comm, current->pid, | |
1306 | rt_sf, regs->nip, regs->link); | |
d0c3d534 | 1307 | |
1da177e4 LT |
1308 | force_sig(SIGSEGV, current); |
1309 | return 0; | |
1310 | } | |
1311 | ||
81e7009e SR |
1312 | #ifdef CONFIG_PPC32 |
1313 | int sys_debug_setcontext(struct ucontext __user *ctx, | |
1314 | int ndbg, struct sig_dbg_op __user *dbg, | |
1315 | int r6, int r7, int r8, | |
1316 | struct pt_regs *regs) | |
1317 | { | |
1318 | struct sig_dbg_op op; | |
1319 | int i; | |
7c85d1f9 | 1320 | unsigned char tmp; |
81e7009e | 1321 | unsigned long new_msr = regs->msr; |
172ae2e7 | 1322 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
51ae8d4a | 1323 | unsigned long new_dbcr0 = current->thread.debug.dbcr0; |
81e7009e SR |
1324 | #endif |
1325 | ||
1326 | for (i=0; i<ndbg; i++) { | |
7c85d1f9 | 1327 | if (copy_from_user(&op, dbg + i, sizeof(op))) |
81e7009e SR |
1328 | return -EFAULT; |
1329 | switch (op.dbg_type) { | |
1330 | case SIG_DBG_SINGLE_STEPPING: | |
172ae2e7 | 1331 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
81e7009e SR |
1332 | if (op.dbg_value) { |
1333 | new_msr |= MSR_DE; | |
1334 | new_dbcr0 |= (DBCR0_IDM | DBCR0_IC); | |
1335 | } else { | |
3bffb652 DK |
1336 | new_dbcr0 &= ~DBCR0_IC; |
1337 | if (!DBCR_ACTIVE_EVENTS(new_dbcr0, | |
51ae8d4a | 1338 | current->thread.debug.dbcr1)) { |
3bffb652 DK |
1339 | new_msr &= ~MSR_DE; |
1340 | new_dbcr0 &= ~DBCR0_IDM; | |
1341 | } | |
81e7009e SR |
1342 | } |
1343 | #else | |
1344 | if (op.dbg_value) | |
1345 | new_msr |= MSR_SE; | |
1346 | else | |
1347 | new_msr &= ~MSR_SE; | |
1348 | #endif | |
1349 | break; | |
1350 | case SIG_DBG_BRANCH_TRACING: | |
172ae2e7 | 1351 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
81e7009e SR |
1352 | return -EINVAL; |
1353 | #else | |
1354 | if (op.dbg_value) | |
1355 | new_msr |= MSR_BE; | |
1356 | else | |
1357 | new_msr &= ~MSR_BE; | |
1358 | #endif | |
1359 | break; | |
1360 | ||
1361 | default: | |
1362 | return -EINVAL; | |
1363 | } | |
1364 | } | |
1365 | ||
1366 | /* We wait until here to actually install the values in the | |
1367 | registers so if we fail in the above loop, it will not | |
1368 | affect the contents of these registers. After this point, | |
1369 | failure is a problem, anyway, and it's very unlikely unless | |
1370 | the user is really doing something wrong. */ | |
1371 | regs->msr = new_msr; | |
172ae2e7 | 1372 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
51ae8d4a | 1373 | current->thread.debug.dbcr0 = new_dbcr0; |
81e7009e SR |
1374 | #endif |
1375 | ||
7c85d1f9 PM |
1376 | if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx)) |
1377 | || __get_user(tmp, (u8 __user *) ctx) | |
1378 | || __get_user(tmp, (u8 __user *) (ctx + 1) - 1)) | |
1379 | return -EFAULT; | |
1380 | ||
81e7009e SR |
1381 | /* |
1382 | * If we get a fault copying the context into the kernel's | |
1383 | * image of the user's registers, we can't just return -EFAULT | |
1384 | * because the user's registers will be corrupted. For instance | |
1385 | * the NIP value may have been updated but not some of the | |
1386 | * other registers. Given that we have done the access_ok | |
1387 | * and successfully read the first and last bytes of the region | |
1388 | * above, this should only happen in an out-of-memory situation | |
1389 | * or if another thread unmaps the region containing the context. | |
1390 | * We kill the task with a SIGSEGV in this situation. | |
1391 | */ | |
1392 | if (do_setcontext(ctx, regs, 1)) { | |
76462232 CD |
1393 | if (show_unhandled_signals) |
1394 | printk_ratelimited(KERN_INFO "%s[%d]: bad frame in " | |
1395 | "sys_debug_setcontext: %p nip %08lx " | |
1396 | "lr %08lx\n", | |
1397 | current->comm, current->pid, | |
1398 | ctx, regs->nip, regs->link); | |
d0c3d534 | 1399 | |
81e7009e SR |
1400 | force_sig(SIGSEGV, current); |
1401 | goto out; | |
1402 | } | |
1403 | ||
1404 | /* | |
1405 | * It's not clear whether or why it is desirable to save the | |
1406 | * sigaltstack setting on signal delivery and restore it on | |
1407 | * signal return. But other architectures do this and we have | |
1408 | * always done it up until now so it is probably better not to | |
1409 | * change it. -- paulus | |
1410 | */ | |
7cce2465 | 1411 | restore_altstack(&ctx->uc_stack); |
81e7009e | 1412 | |
401d1f02 | 1413 | set_thread_flag(TIF_RESTOREALL); |
81e7009e SR |
1414 | out: |
1415 | return 0; | |
1416 | } | |
1417 | #endif | |
1da177e4 LT |
1418 | |
1419 | /* | |
1420 | * OK, we're invoking a handler | |
1421 | */ | |
f478f543 | 1422 | int handle_signal32(unsigned long sig, struct k_sigaction *ka, |
a3f61dc0 | 1423 | siginfo_t *info, sigset_t *oldset, struct pt_regs *regs) |
1da177e4 | 1424 | { |
81e7009e | 1425 | struct sigcontext __user *sc; |
a3f61dc0 | 1426 | struct sigframe __user *frame; |
1d25f11f | 1427 | struct mcontext __user *tm_mctx = NULL; |
a3f61dc0 | 1428 | unsigned long newsp = 0; |
2b0a576d MN |
1429 | int sigret; |
1430 | unsigned long tramp; | |
1da177e4 LT |
1431 | |
1432 | /* Set up Signal Frame */ | |
2b3f8e87 | 1433 | frame = get_sigframe(ka, get_tm_stackpointer(regs), sizeof(*frame), 1); |
a3f61dc0 | 1434 | if (unlikely(frame == NULL)) |
1da177e4 | 1435 | goto badframe; |
a3f61dc0 | 1436 | sc = (struct sigcontext __user *) &frame->sctx; |
1da177e4 LT |
1437 | |
1438 | #if _NSIG != 64 | |
81e7009e | 1439 | #error "Please adjust handle_signal()" |
1da177e4 | 1440 | #endif |
81e7009e | 1441 | if (__put_user(to_user_ptr(ka->sa.sa_handler), &sc->handler) |
1da177e4 | 1442 | || __put_user(oldset->sig[0], &sc->oldmask) |
81e7009e | 1443 | #ifdef CONFIG_PPC64 |
1da177e4 | 1444 | || __put_user((oldset->sig[0] >> 32), &sc->_unused[3]) |
81e7009e SR |
1445 | #else |
1446 | || __put_user(oldset->sig[1], &sc->_unused[3]) | |
1447 | #endif | |
a3f61dc0 | 1448 | || __put_user(to_user_ptr(&frame->mctx), &sc->regs) |
1da177e4 LT |
1449 | || __put_user(sig, &sc->signal)) |
1450 | goto badframe; | |
1451 | ||
a5bba930 | 1452 | if (vdso32_sigtramp && current->mm->context.vdso_base) { |
2b0a576d MN |
1453 | sigret = 0; |
1454 | tramp = current->mm->context.vdso_base + vdso32_sigtramp; | |
a7f290da | 1455 | } else { |
2b0a576d MN |
1456 | sigret = __NR_sigreturn; |
1457 | tramp = (unsigned long) frame->mctx.tramp; | |
1458 | } | |
1459 | ||
1460 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | |
1d25f11f | 1461 | tm_mctx = &frame->mctx_transact; |
2b0a576d MN |
1462 | if (MSR_TM_ACTIVE(regs->msr)) { |
1463 | if (save_tm_user_regs(regs, &frame->mctx, &frame->mctx_transact, | |
1464 | sigret)) | |
1da177e4 | 1465 | goto badframe; |
1da177e4 | 1466 | } |
2b0a576d MN |
1467 | else |
1468 | #endif | |
1d25f11f MN |
1469 | { |
1470 | if (save_user_regs(regs, &frame->mctx, tm_mctx, sigret, 1)) | |
2b0a576d | 1471 | goto badframe; |
1d25f11f | 1472 | } |
2b0a576d MN |
1473 | |
1474 | regs->link = tramp; | |
1da177e4 | 1475 | |
de79f7b9 | 1476 | current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */ |
cc657f53 | 1477 | |
a3f61dc0 BH |
1478 | /* create a stack frame for the caller of the handler */ |
1479 | newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE; | |
9747dd6f | 1480 | if (put_user(regs->gpr[1], (u32 __user *)newsp)) |
1da177e4 | 1481 | goto badframe; |
a3f61dc0 | 1482 | |
81e7009e | 1483 | regs->gpr[1] = newsp; |
1da177e4 LT |
1484 | regs->gpr[3] = sig; |
1485 | regs->gpr[4] = (unsigned long) sc; | |
1486 | regs->nip = (unsigned long) ka->sa.sa_handler; | |
fab5db97 PM |
1487 | /* enter the signal handler in big-endian mode */ |
1488 | regs->msr &= ~MSR_LE; | |
2b0a576d MN |
1489 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1490 | /* Remove TM bits from thread's MSR. The MSR in the sigcontext | |
1491 | * just indicates to userland that we were doing a transaction, but we | |
1492 | * don't want to return in transactional state: | |
1493 | */ | |
1494 | regs->msr &= ~MSR_TS_MASK; | |
1495 | #endif | |
1da177e4 LT |
1496 | return 1; |
1497 | ||
1498 | badframe: | |
81e7009e SR |
1499 | #ifdef DEBUG_SIG |
1500 | printk("badframe in handle_signal, regs=%p frame=%p newsp=%lx\n", | |
1501 | regs, frame, newsp); | |
1da177e4 | 1502 | #endif |
76462232 CD |
1503 | if (show_unhandled_signals) |
1504 | printk_ratelimited(KERN_INFO | |
1505 | "%s[%d]: bad frame in handle_signal32: " | |
1506 | "%p nip %08lx lr %08lx\n", | |
1507 | current->comm, current->pid, | |
1508 | frame, regs->nip, regs->link); | |
d0c3d534 | 1509 | |
1da177e4 LT |
1510 | force_sigsegv(sig, current); |
1511 | return 0; | |
1512 | } | |
1513 | ||
1514 | /* | |
1515 | * Do a signal return; undo the signal stack. | |
1516 | */ | |
81e7009e | 1517 | long sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8, |
1da177e4 LT |
1518 | struct pt_regs *regs) |
1519 | { | |
fee55450 | 1520 | struct sigframe __user *sf; |
81e7009e SR |
1521 | struct sigcontext __user *sc; |
1522 | struct sigcontext sigctx; | |
1523 | struct mcontext __user *sr; | |
d0c3d534 | 1524 | void __user *addr; |
1da177e4 | 1525 | sigset_t set; |
fee55450 MN |
1526 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1527 | struct mcontext __user *mcp, *tm_mcp; | |
1528 | unsigned long msr_hi; | |
1529 | #endif | |
1da177e4 LT |
1530 | |
1531 | /* Always make any pending restarted system calls return -EINTR */ | |
1532 | current_thread_info()->restart_block.fn = do_no_restart_syscall; | |
1533 | ||
fee55450 MN |
1534 | sf = (struct sigframe __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE); |
1535 | sc = &sf->sctx; | |
d0c3d534 | 1536 | addr = sc; |
1da177e4 LT |
1537 | if (copy_from_user(&sigctx, sc, sizeof(sigctx))) |
1538 | goto badframe; | |
1539 | ||
81e7009e | 1540 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
1541 | /* |
1542 | * Note that PPC32 puts the upper 32 bits of the sigmask in the | |
1543 | * unused part of the signal stackframe | |
1544 | */ | |
1545 | set.sig[0] = sigctx.oldmask + ((long)(sigctx._unused[3]) << 32); | |
81e7009e SR |
1546 | #else |
1547 | set.sig[0] = sigctx.oldmask; | |
1548 | set.sig[1] = sigctx._unused[3]; | |
1549 | #endif | |
17440f17 | 1550 | set_current_blocked(&set); |
1da177e4 | 1551 | |
fee55450 MN |
1552 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1553 | mcp = (struct mcontext __user *)&sf->mctx; | |
1554 | tm_mcp = (struct mcontext __user *)&sf->mctx_transact; | |
1555 | if (__get_user(msr_hi, &tm_mcp->mc_gregs[PT_MSR])) | |
1da177e4 | 1556 | goto badframe; |
fee55450 MN |
1557 | if (MSR_TM_ACTIVE(msr_hi<<32)) { |
1558 | if (!cpu_has_feature(CPU_FTR_TM)) | |
1559 | goto badframe; | |
1560 | if (restore_tm_user_regs(regs, mcp, tm_mcp)) | |
1561 | goto badframe; | |
1562 | } else | |
1563 | #endif | |
1564 | { | |
1565 | sr = (struct mcontext __user *)from_user_ptr(sigctx.regs); | |
1566 | addr = sr; | |
1567 | if (!access_ok(VERIFY_READ, sr, sizeof(*sr)) | |
1568 | || restore_user_regs(regs, sr, 1)) | |
1569 | goto badframe; | |
1570 | } | |
1da177e4 | 1571 | |
401d1f02 | 1572 | set_thread_flag(TIF_RESTOREALL); |
81e7009e | 1573 | return 0; |
1da177e4 LT |
1574 | |
1575 | badframe: | |
76462232 CD |
1576 | if (show_unhandled_signals) |
1577 | printk_ratelimited(KERN_INFO | |
1578 | "%s[%d]: bad frame in sys_sigreturn: " | |
1579 | "%p nip %08lx lr %08lx\n", | |
1580 | current->comm, current->pid, | |
1581 | addr, regs->nip, regs->link); | |
d0c3d534 | 1582 | |
1da177e4 LT |
1583 | force_sig(SIGSEGV, current); |
1584 | return 0; | |
1585 | } |