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powerpc: Reclaim two unused thread_info flag bits
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1da177e4 1/*
81e7009e 2 * Signal handling for 32bit PPC and 32bit tasks on 64bit PPC
1da177e4 3 *
81e7009e
SR
4 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
1da177e4
LT
6 * Copyright (C) 2001 IBM
7 * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
9 *
81e7009e
SR
10 * Derived from "arch/i386/kernel/signal.c"
11 * Copyright (C) 1991, 1992 Linus Torvalds
12 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
1da177e4 13 *
81e7009e
SR
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version
17 * 2 of the License, or (at your option) any later version.
1da177e4
LT
18 */
19
1da177e4 20#include <linux/sched.h>
81e7009e 21#include <linux/mm.h>
1da177e4 22#include <linux/smp.h>
1da177e4
LT
23#include <linux/kernel.h>
24#include <linux/signal.h>
1da177e4
LT
25#include <linux/errno.h>
26#include <linux/elf.h>
05ead015 27#include <linux/ptrace.h>
76462232 28#include <linux/ratelimit.h>
81e7009e
SR
29#ifdef CONFIG_PPC64
30#include <linux/syscalls.h>
1da177e4 31#include <linux/compat.h>
81e7009e
SR
32#else
33#include <linux/wait.h>
81e7009e
SR
34#include <linux/unistd.h>
35#include <linux/stddef.h>
36#include <linux/tty.h>
37#include <linux/binfmts.h>
81e7009e
SR
38#endif
39
1da177e4 40#include <asm/uaccess.h>
81e7009e 41#include <asm/cacheflush.h>
a7f31841 42#include <asm/syscalls.h>
c5ff7001 43#include <asm/sigcontext.h>
a7f290da 44#include <asm/vdso.h>
ae3a197e 45#include <asm/switch_to.h>
2b0a576d 46#include <asm/tm.h>
81e7009e 47#ifdef CONFIG_PPC64
879168ee 48#include "ppc32.h"
1da177e4 49#include <asm/unistd.h>
81e7009e
SR
50#else
51#include <asm/ucontext.h>
52#include <asm/pgtable.h>
53#endif
1da177e4 54
22e38f29
BH
55#include "signal.h"
56
81e7009e 57#undef DEBUG_SIG
1da177e4 58
81e7009e 59#ifdef CONFIG_PPC64
b09a4913 60#define sys_rt_sigreturn compat_sys_rt_sigreturn
b09a4913
SR
61#define sys_swapcontext compat_sys_swapcontext
62#define sys_sigreturn compat_sys_sigreturn
81e7009e
SR
63
64#define old_sigaction old_sigaction32
65#define sigcontext sigcontext32
66#define mcontext mcontext32
67#define ucontext ucontext32
68
7cce2465
AV
69#define __save_altstack __compat_save_altstack
70
c1cb299e
MN
71/*
72 * Userspace code may pass a ucontext which doesn't include VSX added
73 * at the end. We need to check for this case.
74 */
75#define UCONTEXTSIZEWITHOUTVSX \
76 (sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32))
77
81e7009e
SR
78/*
79 * Returning 0 means we return to userspace via
80 * ret_from_except and thus restore all user
81 * registers from *regs. This is what we need
82 * to do when a signal has been delivered.
83 */
81e7009e
SR
84
85#define GP_REGS_SIZE min(sizeof(elf_gregset_t32), sizeof(struct pt_regs32))
86#undef __SIGNAL_FRAMESIZE
87#define __SIGNAL_FRAMESIZE __SIGNAL_FRAMESIZE32
88#undef ELF_NVRREG
89#define ELF_NVRREG ELF_NVRREG32
90
91/*
92 * Functions for flipping sigsets (thanks to brain dead generic
93 * implementation that makes things simple for little endian only)
94 */
95static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
96{
97 compat_sigset_t cset;
98
99 switch (_NSIG_WORDS) {
a313f4c5 100 case 4: cset.sig[6] = set->sig[3] & 0xffffffffull;
81e7009e
SR
101 cset.sig[7] = set->sig[3] >> 32;
102 case 3: cset.sig[4] = set->sig[2] & 0xffffffffull;
103 cset.sig[5] = set->sig[2] >> 32;
104 case 2: cset.sig[2] = set->sig[1] & 0xffffffffull;
105 cset.sig[3] = set->sig[1] >> 32;
106 case 1: cset.sig[0] = set->sig[0] & 0xffffffffull;
107 cset.sig[1] = set->sig[0] >> 32;
108 }
109 return copy_to_user(uset, &cset, sizeof(*uset));
110}
111
9b7cf8b4
PM
112static inline int get_sigset_t(sigset_t *set,
113 const compat_sigset_t __user *uset)
81e7009e
SR
114{
115 compat_sigset_t s32;
116
117 if (copy_from_user(&s32, uset, sizeof(*uset)))
118 return -EFAULT;
119
120 /*
121 * Swap the 2 words of the 64-bit sigset_t (they are stored
122 * in the "wrong" endian in 32-bit user storage).
123 */
124 switch (_NSIG_WORDS) {
125 case 4: set->sig[3] = s32.sig[6] | (((long)s32.sig[7]) << 32);
126 case 3: set->sig[2] = s32.sig[4] | (((long)s32.sig[5]) << 32);
127 case 2: set->sig[1] = s32.sig[2] | (((long)s32.sig[3]) << 32);
128 case 1: set->sig[0] = s32.sig[0] | (((long)s32.sig[1]) << 32);
129 }
130 return 0;
131}
132
29e646df 133#define to_user_ptr(p) ptr_to_compat(p)
81e7009e
SR
134#define from_user_ptr(p) compat_ptr(p)
135
136static inline int save_general_regs(struct pt_regs *regs,
137 struct mcontext __user *frame)
138{
139 elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
140 int i;
141
1bd79336 142 WARN_ON(!FULL_REGS(regs));
401d1f02
DW
143
144 for (i = 0; i <= PT_RESULT; i ++) {
145 if (i == 14 && !FULL_REGS(regs))
146 i = 32;
81e7009e
SR
147 if (__put_user((unsigned int)gregs[i], &frame->mc_gregs[i]))
148 return -EFAULT;
401d1f02 149 }
81e7009e
SR
150 return 0;
151}
152
153static inline int restore_general_regs(struct pt_regs *regs,
154 struct mcontext __user *sr)
155{
156 elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
157 int i;
158
159 for (i = 0; i <= PT_RESULT; i++) {
160 if ((i == PT_MSR) || (i == PT_SOFTE))
161 continue;
162 if (__get_user(gregs[i], &sr->mc_gregs[i]))
163 return -EFAULT;
164 }
165 return 0;
166}
167
168#else /* CONFIG_PPC64 */
169
81e7009e
SR
170#define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
171
172static inline int put_sigset_t(sigset_t __user *uset, sigset_t *set)
173{
174 return copy_to_user(uset, set, sizeof(*uset));
175}
176
9b7cf8b4 177static inline int get_sigset_t(sigset_t *set, const sigset_t __user *uset)
81e7009e
SR
178{
179 return copy_from_user(set, uset, sizeof(*uset));
180}
181
29e646df
AV
182#define to_user_ptr(p) ((unsigned long)(p))
183#define from_user_ptr(p) ((void __user *)(p))
81e7009e
SR
184
185static inline int save_general_regs(struct pt_regs *regs,
186 struct mcontext __user *frame)
187{
1bd79336 188 WARN_ON(!FULL_REGS(regs));
81e7009e
SR
189 return __copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE);
190}
191
192static inline int restore_general_regs(struct pt_regs *regs,
193 struct mcontext __user *sr)
194{
195 /* copy up to but not including MSR */
196 if (__copy_from_user(regs, &sr->mc_gregs,
197 PT_MSR * sizeof(elf_greg_t)))
198 return -EFAULT;
199 /* copy from orig_r3 (the word after the MSR) up to the end */
200 if (__copy_from_user(&regs->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3],
201 GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t)))
202 return -EFAULT;
203 return 0;
204}
81e7009e
SR
205#endif
206
1da177e4
LT
207/*
208 * When we have signals to deliver, we set up on the
209 * user stack, going down from the original stack pointer:
a3f61dc0
BH
210 * an ABI gap of 56 words
211 * an mcontext struct
81e7009e
SR
212 * a sigcontext struct
213 * a gap of __SIGNAL_FRAMESIZE bytes
1da177e4 214 *
a3f61dc0
BH
215 * Each of these things must be a multiple of 16 bytes in size. The following
216 * structure represent all of this except the __SIGNAL_FRAMESIZE gap
1da177e4
LT
217 *
218 */
a3f61dc0
BH
219struct sigframe {
220 struct sigcontext sctx; /* the sigcontext */
81e7009e 221 struct mcontext mctx; /* all the register values */
2b0a576d
MN
222#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
223 struct sigcontext sctx_transact;
224 struct mcontext mctx_transact;
225#endif
1da177e4
LT
226 /*
227 * Programs using the rs6000/xcoff abi can save up to 19 gp
228 * regs and 18 fp regs below sp before decrementing it.
229 */
230 int abigap[56];
231};
232
233/* We use the mc_pad field for the signal return trampoline. */
234#define tramp mc_pad
235
236/*
237 * When we have rt signals to deliver, we set up on the
238 * user stack, going down from the original stack pointer:
81e7009e
SR
239 * one rt_sigframe struct (siginfo + ucontext + ABI gap)
240 * a gap of __SIGNAL_FRAMESIZE+16 bytes
241 * (the +16 is to get the siginfo and ucontext in the same
1da177e4
LT
242 * positions as in older kernels).
243 *
244 * Each of these things must be a multiple of 16 bytes in size.
245 *
246 */
81e7009e
SR
247struct rt_sigframe {
248#ifdef CONFIG_PPC64
249 compat_siginfo_t info;
250#else
251 struct siginfo info;
252#endif
253 struct ucontext uc;
2b0a576d
MN
254#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
255 struct ucontext uc_transact;
256#endif
1da177e4
LT
257 /*
258 * Programs using the rs6000/xcoff abi can save up to 19 gp
259 * regs and 18 fp regs below sp before decrementing it.
260 */
261 int abigap[56];
262};
263
6a274c08
MN
264#ifdef CONFIG_VSX
265unsigned long copy_fpr_to_user(void __user *to,
266 struct task_struct *task)
267{
de79f7b9 268 u64 buf[ELF_NFPREG];
6a274c08
MN
269 int i;
270
271 /* save FPR copy to local buffer then write to the thread_struct */
272 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
273 buf[i] = task->thread.TS_FPR(i);
de79f7b9 274 buf[i] = task->thread.fp_state.fpscr;
6a274c08
MN
275 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
276}
277
278unsigned long copy_fpr_from_user(struct task_struct *task,
279 void __user *from)
280{
de79f7b9 281 u64 buf[ELF_NFPREG];
6a274c08
MN
282 int i;
283
284 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
285 return 1;
286 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
287 task->thread.TS_FPR(i) = buf[i];
de79f7b9 288 task->thread.fp_state.fpscr = buf[i];
6a274c08
MN
289
290 return 0;
291}
292
293unsigned long copy_vsx_to_user(void __user *to,
294 struct task_struct *task)
295{
de79f7b9 296 u64 buf[ELF_NVSRHALFREG];
6a274c08
MN
297 int i;
298
299 /* save FPR copy to local buffer then write to the thread_struct */
300 for (i = 0; i < ELF_NVSRHALFREG; i++)
de79f7b9 301 buf[i] = task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
6a274c08
MN
302 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
303}
304
305unsigned long copy_vsx_from_user(struct task_struct *task,
306 void __user *from)
307{
de79f7b9 308 u64 buf[ELF_NVSRHALFREG];
6a274c08
MN
309 int i;
310
311 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
312 return 1;
313 for (i = 0; i < ELF_NVSRHALFREG ; i++)
de79f7b9 314 task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
6a274c08
MN
315 return 0;
316}
2b0a576d
MN
317
318#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
319unsigned long copy_transact_fpr_to_user(void __user *to,
320 struct task_struct *task)
321{
de79f7b9 322 u64 buf[ELF_NFPREG];
2b0a576d
MN
323 int i;
324
325 /* save FPR copy to local buffer then write to the thread_struct */
326 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
327 buf[i] = task->thread.TS_TRANS_FPR(i);
de79f7b9 328 buf[i] = task->thread.transact_fp.fpscr;
2b0a576d
MN
329 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
330}
331
332unsigned long copy_transact_fpr_from_user(struct task_struct *task,
333 void __user *from)
334{
de79f7b9 335 u64 buf[ELF_NFPREG];
2b0a576d
MN
336 int i;
337
338 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
339 return 1;
340 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
341 task->thread.TS_TRANS_FPR(i) = buf[i];
de79f7b9 342 task->thread.transact_fp.fpscr = buf[i];
2b0a576d
MN
343
344 return 0;
345}
346
347unsigned long copy_transact_vsx_to_user(void __user *to,
348 struct task_struct *task)
349{
de79f7b9 350 u64 buf[ELF_NVSRHALFREG];
2b0a576d
MN
351 int i;
352
353 /* save FPR copy to local buffer then write to the thread_struct */
354 for (i = 0; i < ELF_NVSRHALFREG; i++)
de79f7b9 355 buf[i] = task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET];
2b0a576d
MN
356 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
357}
358
359unsigned long copy_transact_vsx_from_user(struct task_struct *task,
360 void __user *from)
361{
de79f7b9 362 u64 buf[ELF_NVSRHALFREG];
2b0a576d
MN
363 int i;
364
365 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
366 return 1;
367 for (i = 0; i < ELF_NVSRHALFREG ; i++)
de79f7b9 368 task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = buf[i];
2b0a576d
MN
369 return 0;
370}
371#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
6a274c08
MN
372#else
373inline unsigned long copy_fpr_to_user(void __user *to,
374 struct task_struct *task)
375{
de79f7b9 376 return __copy_to_user(to, task->thread.fp_state.fpr,
6a274c08
MN
377 ELF_NFPREG * sizeof(double));
378}
379
380inline unsigned long copy_fpr_from_user(struct task_struct *task,
381 void __user *from)
382{
de79f7b9 383 return __copy_from_user(task->thread.fp_state.fpr, from,
6a274c08
MN
384 ELF_NFPREG * sizeof(double));
385}
2b0a576d
MN
386
387#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
388inline unsigned long copy_transact_fpr_to_user(void __user *to,
389 struct task_struct *task)
390{
de79f7b9 391 return __copy_to_user(to, task->thread.transact_fp.fpr,
2b0a576d
MN
392 ELF_NFPREG * sizeof(double));
393}
394
395inline unsigned long copy_transact_fpr_from_user(struct task_struct *task,
396 void __user *from)
397{
de79f7b9 398 return __copy_from_user(task->thread.transact_fp.fpr, from,
2b0a576d
MN
399 ELF_NFPREG * sizeof(double));
400}
401#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
6a274c08
MN
402#endif
403
1da177e4
LT
404/*
405 * Save the current user registers on the user stack.
81e7009e
SR
406 * We only save the altivec/spe registers if the process has used
407 * altivec/spe instructions at some point.
1da177e4 408 */
81e7009e 409static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
1d25f11f
MN
410 struct mcontext __user *tm_frame, int sigret,
411 int ctx_has_vsx_region)
1da177e4 412{
9e751186
MN
413 unsigned long msr = regs->msr;
414
1da177e4
LT
415 /* Make sure floating point registers are stored in regs */
416 flush_fp_to_thread(current);
417
c6e6771b
MN
418 /* save general registers */
419 if (save_general_regs(regs, frame))
1da177e4
LT
420 return 1;
421
1da177e4
LT
422#ifdef CONFIG_ALTIVEC
423 /* save altivec registers */
424 if (current->thread.used_vr) {
425 flush_altivec_to_thread(current);
de79f7b9 426 if (__copy_to_user(&frame->mc_vregs, &current->thread.vr_state,
81e7009e 427 ELF_NVRREG * sizeof(vector128)))
1da177e4
LT
428 return 1;
429 /* set MSR_VEC in the saved MSR value to indicate that
430 frame->mc_vregs contains valid data */
9e751186 431 msr |= MSR_VEC;
1da177e4
LT
432 }
433 /* else assert((regs->msr & MSR_VEC) == 0) */
434
435 /* We always copy to/from vrsave, it's 0 if we don't have or don't
436 * use altivec. Since VSCR only contains 32 bits saved in the least
437 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
438 * most significant bits of that same vector. --BenH
408a7e08 439 * Note that the current VRSAVE value is in the SPR at this point.
1da177e4 440 */
408a7e08
PM
441 if (cpu_has_feature(CPU_FTR_ALTIVEC))
442 current->thread.vrsave = mfspr(SPRN_VRSAVE);
1da177e4
LT
443 if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32]))
444 return 1;
445#endif /* CONFIG_ALTIVEC */
6a274c08 446 if (copy_fpr_to_user(&frame->mc_fregs, current))
c6e6771b 447 return 1;
ec67ad82
MN
448
449 /*
450 * Clear the MSR VSX bit to indicate there is no valid state attached
451 * to this context, except in the specific case below where we set it.
452 */
453 msr &= ~MSR_VSX;
6a274c08 454#ifdef CONFIG_VSX
ce48b210
MN
455 /*
456 * Copy VSR 0-31 upper half from thread_struct to local
457 * buffer, then write that to userspace. Also set MSR_VSX in
458 * the saved MSR value to indicate that frame->mc_vregs
459 * contains valid data
460 */
16c29d18 461 if (current->thread.used_vsr && ctx_has_vsx_region) {
7c292170 462 __giveup_vsx(current);
6a274c08 463 if (copy_vsx_to_user(&frame->mc_vsregs, current))
ce48b210
MN
464 return 1;
465 msr |= MSR_VSX;
ec67ad82 466 }
c6e6771b 467#endif /* CONFIG_VSX */
81e7009e
SR
468#ifdef CONFIG_SPE
469 /* save spe registers */
470 if (current->thread.used_spe) {
471 flush_spe_to_thread(current);
472 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
473 ELF_NEVRREG * sizeof(u32)))
474 return 1;
475 /* set MSR_SPE in the saved MSR value to indicate that
476 frame->mc_vregs contains valid data */
9e751186 477 msr |= MSR_SPE;
81e7009e
SR
478 }
479 /* else assert((regs->msr & MSR_SPE) == 0) */
480
481 /* We always copy to/from spefscr */
482 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
483 return 1;
484#endif /* CONFIG_SPE */
485
9e751186
MN
486 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
487 return 1;
1d25f11f
MN
488 /* We need to write 0 the MSR top 32 bits in the tm frame so that we
489 * can check it on the restore to see if TM is active
490 */
491 if (tm_frame && __put_user(0, &tm_frame->mc_gregs[PT_MSR]))
492 return 1;
493
1da177e4
LT
494 if (sigret) {
495 /* Set up the sigreturn trampoline: li r0,sigret; sc */
496 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
497 || __put_user(0x44000002UL, &frame->tramp[1]))
498 return 1;
499 flush_icache_range((unsigned long) &frame->tramp[0],
500 (unsigned long) &frame->tramp[2]);
501 }
502
503 return 0;
504}
505
2b0a576d
MN
506#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
507/*
508 * Save the current user registers on the user stack.
509 * We only save the altivec/spe registers if the process has used
510 * altivec/spe instructions at some point.
511 * We also save the transactional registers to a second ucontext in the
512 * frame.
513 *
514 * See save_user_regs() and signal_64.c:setup_tm_sigcontexts().
515 */
516static int save_tm_user_regs(struct pt_regs *regs,
517 struct mcontext __user *frame,
518 struct mcontext __user *tm_frame, int sigret)
519{
520 unsigned long msr = regs->msr;
521
2b0a576d
MN
522 /* Make sure floating point registers are stored in regs */
523 flush_fp_to_thread(current);
524
525 /* Save both sets of general registers */
526 if (save_general_regs(&current->thread.ckpt_regs, frame)
527 || save_general_regs(regs, tm_frame))
528 return 1;
529
530 /* Stash the top half of the 64bit MSR into the 32bit MSR word
531 * of the transactional mcontext. This way we have a backward-compatible
532 * MSR in the 'normal' (checkpointed) mcontext and additionally one can
533 * also look at what type of transaction (T or S) was active at the
534 * time of the signal.
535 */
536 if (__put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR]))
537 return 1;
538
539#ifdef CONFIG_ALTIVEC
540 /* save altivec registers */
541 if (current->thread.used_vr) {
542 flush_altivec_to_thread(current);
de79f7b9 543 if (__copy_to_user(&frame->mc_vregs, &current->thread.vr_state,
2b0a576d
MN
544 ELF_NVRREG * sizeof(vector128)))
545 return 1;
546 if (msr & MSR_VEC) {
547 if (__copy_to_user(&tm_frame->mc_vregs,
de79f7b9 548 &current->thread.transact_vr,
2b0a576d
MN
549 ELF_NVRREG * sizeof(vector128)))
550 return 1;
551 } else {
552 if (__copy_to_user(&tm_frame->mc_vregs,
de79f7b9 553 &current->thread.vr_state,
2b0a576d
MN
554 ELF_NVRREG * sizeof(vector128)))
555 return 1;
556 }
557
558 /* set MSR_VEC in the saved MSR value to indicate that
559 * frame->mc_vregs contains valid data
560 */
561 msr |= MSR_VEC;
562 }
563
564 /* We always copy to/from vrsave, it's 0 if we don't have or don't
565 * use altivec. Since VSCR only contains 32 bits saved in the least
566 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
567 * most significant bits of that same vector. --BenH
568 */
408a7e08
PM
569 if (cpu_has_feature(CPU_FTR_ALTIVEC))
570 current->thread.vrsave = mfspr(SPRN_VRSAVE);
2b0a576d
MN
571 if (__put_user(current->thread.vrsave,
572 (u32 __user *)&frame->mc_vregs[32]))
573 return 1;
574 if (msr & MSR_VEC) {
575 if (__put_user(current->thread.transact_vrsave,
576 (u32 __user *)&tm_frame->mc_vregs[32]))
577 return 1;
578 } else {
579 if (__put_user(current->thread.vrsave,
580 (u32 __user *)&tm_frame->mc_vregs[32]))
581 return 1;
582 }
583#endif /* CONFIG_ALTIVEC */
584
585 if (copy_fpr_to_user(&frame->mc_fregs, current))
586 return 1;
587 if (msr & MSR_FP) {
588 if (copy_transact_fpr_to_user(&tm_frame->mc_fregs, current))
589 return 1;
590 } else {
591 if (copy_fpr_to_user(&tm_frame->mc_fregs, current))
592 return 1;
593 }
594
595#ifdef CONFIG_VSX
596 /*
597 * Copy VSR 0-31 upper half from thread_struct to local
598 * buffer, then write that to userspace. Also set MSR_VSX in
599 * the saved MSR value to indicate that frame->mc_vregs
600 * contains valid data
601 */
602 if (current->thread.used_vsr) {
603 __giveup_vsx(current);
604 if (copy_vsx_to_user(&frame->mc_vsregs, current))
605 return 1;
606 if (msr & MSR_VSX) {
607 if (copy_transact_vsx_to_user(&tm_frame->mc_vsregs,
608 current))
609 return 1;
610 } else {
611 if (copy_vsx_to_user(&tm_frame->mc_vsregs, current))
612 return 1;
613 }
614
615 msr |= MSR_VSX;
616 }
617#endif /* CONFIG_VSX */
618#ifdef CONFIG_SPE
619 /* SPE regs are not checkpointed with TM, so this section is
620 * simply the same as in save_user_regs().
621 */
622 if (current->thread.used_spe) {
623 flush_spe_to_thread(current);
624 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
625 ELF_NEVRREG * sizeof(u32)))
626 return 1;
627 /* set MSR_SPE in the saved MSR value to indicate that
628 * frame->mc_vregs contains valid data */
629 msr |= MSR_SPE;
630 }
631
632 /* We always copy to/from spefscr */
633 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
634 return 1;
635#endif /* CONFIG_SPE */
636
637 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
638 return 1;
639 if (sigret) {
640 /* Set up the sigreturn trampoline: li r0,sigret; sc */
641 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
642 || __put_user(0x44000002UL, &frame->tramp[1]))
643 return 1;
644 flush_icache_range((unsigned long) &frame->tramp[0],
645 (unsigned long) &frame->tramp[2]);
646 }
647
648 return 0;
649}
650#endif
651
1da177e4
LT
652/*
653 * Restore the current user register values from the user stack,
654 * (except for MSR).
655 */
656static long restore_user_regs(struct pt_regs *regs,
81e7009e 657 struct mcontext __user *sr, int sig)
1da177e4 658{
81e7009e 659 long err;
1da177e4 660 unsigned int save_r2 = 0;
1da177e4 661 unsigned long msr;
c6e6771b 662#ifdef CONFIG_VSX
c6e6771b
MN
663 int i;
664#endif
1da177e4
LT
665
666 /*
667 * restore general registers but not including MSR or SOFTE. Also
668 * take care of keeping r2 (TLS) intact if not a signal
669 */
670 if (!sig)
671 save_r2 = (unsigned int)regs->gpr[2];
81e7009e 672 err = restore_general_regs(regs, sr);
9a81c16b 673 regs->trap = 0;
fab5db97 674 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
1da177e4
LT
675 if (!sig)
676 regs->gpr[2] = (unsigned long) save_r2;
677 if (err)
678 return 1;
679
fab5db97
PM
680 /* if doing signal return, restore the previous little-endian mode */
681 if (sig)
682 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
683
5388fb10
PM
684 /*
685 * Do this before updating the thread state in
686 * current->thread.fpr/vr/evr. That way, if we get preempted
687 * and another task grabs the FPU/Altivec/SPE, it won't be
688 * tempted to save the current CPU state into the thread_struct
689 * and corrupt what we are writing there.
690 */
691 discard_lazy_cpu_state();
692
1da177e4 693#ifdef CONFIG_ALTIVEC
c6e6771b
MN
694 /*
695 * Force the process to reload the altivec registers from
696 * current->thread when it next does altivec instructions
697 */
1da177e4 698 regs->msr &= ~MSR_VEC;
fab5db97 699 if (msr & MSR_VEC) {
1da177e4 700 /* restore altivec registers from the stack */
de79f7b9 701 if (__copy_from_user(&current->thread.vr_state, &sr->mc_vregs,
1da177e4
LT
702 sizeof(sr->mc_vregs)))
703 return 1;
704 } else if (current->thread.used_vr)
de79f7b9
PM
705 memset(&current->thread.vr_state, 0,
706 ELF_NVRREG * sizeof(vector128));
1da177e4
LT
707
708 /* Always get VRSAVE back */
709 if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
710 return 1;
408a7e08
PM
711 if (cpu_has_feature(CPU_FTR_ALTIVEC))
712 mtspr(SPRN_VRSAVE, current->thread.vrsave);
1da177e4 713#endif /* CONFIG_ALTIVEC */
6a274c08
MN
714 if (copy_fpr_from_user(current, &sr->mc_fregs))
715 return 1;
1da177e4 716
c6e6771b 717#ifdef CONFIG_VSX
ce48b210
MN
718 /*
719 * Force the process to reload the VSX registers from
720 * current->thread when it next does VSX instruction.
721 */
722 regs->msr &= ~MSR_VSX;
723 if (msr & MSR_VSX) {
724 /*
725 * Restore altivec registers from the stack to a local
726 * buffer, then write this out to the thread_struct
727 */
6a274c08 728 if (copy_vsx_from_user(current, &sr->mc_vsregs))
ce48b210 729 return 1;
ce48b210
MN
730 } else if (current->thread.used_vsr)
731 for (i = 0; i < 32 ; i++)
de79f7b9 732 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
c6e6771b
MN
733#endif /* CONFIG_VSX */
734 /*
735 * force the process to reload the FP registers from
736 * current->thread when it next does FP instructions
737 */
738 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
739
81e7009e
SR
740#ifdef CONFIG_SPE
741 /* force the process to reload the spe registers from
742 current->thread when it next does spe instructions */
743 regs->msr &= ~MSR_SPE;
fab5db97 744 if (msr & MSR_SPE) {
81e7009e
SR
745 /* restore spe registers from the stack */
746 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
747 ELF_NEVRREG * sizeof(u32)))
748 return 1;
749 } else if (current->thread.used_spe)
750 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
751
752 /* Always get SPEFSCR back */
753 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs + ELF_NEVRREG))
754 return 1;
755#endif /* CONFIG_SPE */
756
1da177e4
LT
757 return 0;
758}
759
2b0a576d
MN
760#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
761/*
762 * Restore the current user register values from the user stack, except for
763 * MSR, and recheckpoint the original checkpointed register state for processes
764 * in transactions.
765 */
766static long restore_tm_user_regs(struct pt_regs *regs,
767 struct mcontext __user *sr,
768 struct mcontext __user *tm_sr)
769{
770 long err;
2c27a18f 771 unsigned long msr, msr_hi;
2b0a576d
MN
772#ifdef CONFIG_VSX
773 int i;
774#endif
775
776 /*
777 * restore general registers but not including MSR or SOFTE. Also
778 * take care of keeping r2 (TLS) intact if not a signal.
779 * See comment in signal_64.c:restore_tm_sigcontexts();
780 * TFHAR is restored from the checkpointed NIP; TEXASR and TFIAR
781 * were set by the signal delivery.
782 */
783 err = restore_general_regs(regs, tm_sr);
784 err |= restore_general_regs(&current->thread.ckpt_regs, sr);
785
786 err |= __get_user(current->thread.tm_tfhar, &sr->mc_gregs[PT_NIP]);
787
788 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
789 if (err)
790 return 1;
791
792 /* Restore the previous little-endian mode */
793 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
794
795 /*
796 * Do this before updating the thread state in
797 * current->thread.fpr/vr/evr. That way, if we get preempted
798 * and another task grabs the FPU/Altivec/SPE, it won't be
799 * tempted to save the current CPU state into the thread_struct
800 * and corrupt what we are writing there.
801 */
802 discard_lazy_cpu_state();
803
804#ifdef CONFIG_ALTIVEC
805 regs->msr &= ~MSR_VEC;
806 if (msr & MSR_VEC) {
807 /* restore altivec registers from the stack */
de79f7b9 808 if (__copy_from_user(&current->thread.vr_state, &sr->mc_vregs,
2b0a576d 809 sizeof(sr->mc_vregs)) ||
de79f7b9 810 __copy_from_user(&current->thread.transact_vr,
2b0a576d
MN
811 &tm_sr->mc_vregs,
812 sizeof(sr->mc_vregs)))
813 return 1;
814 } else if (current->thread.used_vr) {
de79f7b9
PM
815 memset(&current->thread.vr_state, 0,
816 ELF_NVRREG * sizeof(vector128));
817 memset(&current->thread.transact_vr, 0,
2b0a576d
MN
818 ELF_NVRREG * sizeof(vector128));
819 }
820
821 /* Always get VRSAVE back */
822 if (__get_user(current->thread.vrsave,
823 (u32 __user *)&sr->mc_vregs[32]) ||
824 __get_user(current->thread.transact_vrsave,
825 (u32 __user *)&tm_sr->mc_vregs[32]))
826 return 1;
408a7e08
PM
827 if (cpu_has_feature(CPU_FTR_ALTIVEC))
828 mtspr(SPRN_VRSAVE, current->thread.vrsave);
2b0a576d
MN
829#endif /* CONFIG_ALTIVEC */
830
831 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
832
833 if (copy_fpr_from_user(current, &sr->mc_fregs) ||
834 copy_transact_fpr_from_user(current, &tm_sr->mc_fregs))
835 return 1;
836
837#ifdef CONFIG_VSX
838 regs->msr &= ~MSR_VSX;
839 if (msr & MSR_VSX) {
840 /*
841 * Restore altivec registers from the stack to a local
842 * buffer, then write this out to the thread_struct
843 */
844 if (copy_vsx_from_user(current, &sr->mc_vsregs) ||
845 copy_transact_vsx_from_user(current, &tm_sr->mc_vsregs))
846 return 1;
847 } else if (current->thread.used_vsr)
848 for (i = 0; i < 32 ; i++) {
de79f7b9
PM
849 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
850 current->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = 0;
2b0a576d
MN
851 }
852#endif /* CONFIG_VSX */
853
854#ifdef CONFIG_SPE
855 /* SPE regs are not checkpointed with TM, so this section is
856 * simply the same as in restore_user_regs().
857 */
858 regs->msr &= ~MSR_SPE;
859 if (msr & MSR_SPE) {
860 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
861 ELF_NEVRREG * sizeof(u32)))
862 return 1;
863 } else if (current->thread.used_spe)
864 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
865
866 /* Always get SPEFSCR back */
867 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs
868 + ELF_NEVRREG))
869 return 1;
870#endif /* CONFIG_SPE */
871
872 /* Now, recheckpoint. This loads up all of the checkpointed (older)
873 * registers, including FP and V[S]Rs. After recheckpointing, the
874 * transactional versions should be loaded.
875 */
876 tm_enable();
877 /* This loads the checkpointed FP/VEC state, if used */
878 tm_recheckpoint(&current->thread, msr);
2c27a18f
MN
879 /* Get the top half of the MSR */
880 if (__get_user(msr_hi, &tm_sr->mc_gregs[PT_MSR]))
881 return 1;
882 /* Pull in MSR TM from user context */
883 regs->msr = (regs->msr & ~MSR_TS_MASK) | ((msr_hi<<32) & MSR_TS_MASK);
2b0a576d
MN
884
885 /* This loads the speculative FP/VEC state, if used */
886 if (msr & MSR_FP) {
887 do_load_up_transact_fpu(&current->thread);
888 regs->msr |= (MSR_FP | current->thread.fpexc_mode);
889 }
f110c0c1 890#ifdef CONFIG_ALTIVEC
2b0a576d
MN
891 if (msr & MSR_VEC) {
892 do_load_up_transact_altivec(&current->thread);
893 regs->msr |= MSR_VEC;
894 }
f110c0c1 895#endif
2b0a576d
MN
896
897 return 0;
898}
899#endif
900
81e7009e 901#ifdef CONFIG_PPC64
ce395960 902int copy_siginfo_to_user32(struct compat_siginfo __user *d, const siginfo_t *s)
1da177e4
LT
903{
904 int err;
905
906 if (!access_ok (VERIFY_WRITE, d, sizeof(*d)))
907 return -EFAULT;
908
909 /* If you change siginfo_t structure, please be sure
910 * this code is fixed accordingly.
911 * It should never copy any pad contained in the structure
912 * to avoid security leaks, but must copy the generic
913 * 3 ints plus the relevant union member.
914 * This routine must convert siginfo from 64bit to 32bit as well
915 * at the same time.
916 */
917 err = __put_user(s->si_signo, &d->si_signo);
918 err |= __put_user(s->si_errno, &d->si_errno);
919 err |= __put_user((short)s->si_code, &d->si_code);
920 if (s->si_code < 0)
921 err |= __copy_to_user(&d->_sifields._pad, &s->_sifields._pad,
922 SI_PAD_SIZE32);
923 else switch(s->si_code >> 16) {
924 case __SI_CHLD >> 16:
925 err |= __put_user(s->si_pid, &d->si_pid);
926 err |= __put_user(s->si_uid, &d->si_uid);
927 err |= __put_user(s->si_utime, &d->si_utime);
928 err |= __put_user(s->si_stime, &d->si_stime);
929 err |= __put_user(s->si_status, &d->si_status);
930 break;
931 case __SI_FAULT >> 16:
932 err |= __put_user((unsigned int)(unsigned long)s->si_addr,
933 &d->si_addr);
934 break;
935 case __SI_POLL >> 16:
936 err |= __put_user(s->si_band, &d->si_band);
937 err |= __put_user(s->si_fd, &d->si_fd);
938 break;
939 case __SI_TIMER >> 16:
940 err |= __put_user(s->si_tid, &d->si_tid);
941 err |= __put_user(s->si_overrun, &d->si_overrun);
942 err |= __put_user(s->si_int, &d->si_int);
943 break;
944 case __SI_RT >> 16: /* This is not generated by the kernel as of now. */
945 case __SI_MESGQ >> 16:
946 err |= __put_user(s->si_int, &d->si_int);
947 /* fallthrough */
948 case __SI_KILL >> 16:
949 default:
950 err |= __put_user(s->si_pid, &d->si_pid);
951 err |= __put_user(s->si_uid, &d->si_uid);
952 break;
953 }
954 return err;
955}
956
81e7009e
SR
957#define copy_siginfo_to_user copy_siginfo_to_user32
958
9c0c44db
RM
959int copy_siginfo_from_user32(siginfo_t *to, struct compat_siginfo __user *from)
960{
961 memset(to, 0, sizeof *to);
962
963 if (copy_from_user(to, from, 3*sizeof(int)) ||
964 copy_from_user(to->_sifields._pad,
965 from->_sifields._pad, SI_PAD_SIZE32))
966 return -EFAULT;
967
968 return 0;
969}
81e7009e 970#endif /* CONFIG_PPC64 */
1da177e4 971
1da177e4
LT
972/*
973 * Set up a signal frame for a "real-time" signal handler
974 * (one which gets siginfo).
975 */
f478f543 976int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
81e7009e 977 siginfo_t *info, sigset_t *oldset,
a3f61dc0 978 struct pt_regs *regs)
1da177e4 979{
81e7009e
SR
980 struct rt_sigframe __user *rt_sf;
981 struct mcontext __user *frame;
1d25f11f 982 struct mcontext __user *tm_frame = NULL;
d0c3d534 983 void __user *addr;
a3f61dc0 984 unsigned long newsp = 0;
2b0a576d
MN
985 int sigret;
986 unsigned long tramp;
1da177e4
LT
987
988 /* Set up Signal Frame */
989 /* Put a Real Time Context onto stack */
2b3f8e87 990 rt_sf = get_sigframe(ka, get_tm_stackpointer(regs), sizeof(*rt_sf), 1);
d0c3d534 991 addr = rt_sf;
a3f61dc0 992 if (unlikely(rt_sf == NULL))
1da177e4
LT
993 goto badframe;
994
1da177e4 995 /* Put the siginfo & fill in most of the ucontext */
81e7009e 996 if (copy_siginfo_to_user(&rt_sf->info, info)
1da177e4 997 || __put_user(0, &rt_sf->uc.uc_flags)
7cce2465 998 || __save_altstack(&rt_sf->uc.uc_stack, regs->gpr[1])
81e7009e
SR
999 || __put_user(to_user_ptr(&rt_sf->uc.uc_mcontext),
1000 &rt_sf->uc.uc_regs)
1001 || put_sigset_t(&rt_sf->uc.uc_sigmask, oldset))
1da177e4
LT
1002 goto badframe;
1003
1004 /* Save user registers on the stack */
1005 frame = &rt_sf->uc.uc_mcontext;
d0c3d534 1006 addr = frame;
a5bba930 1007 if (vdso32_rt_sigtramp && current->mm->context.vdso_base) {
2b0a576d
MN
1008 sigret = 0;
1009 tramp = current->mm->context.vdso_base + vdso32_rt_sigtramp;
a7f290da 1010 } else {
2b0a576d
MN
1011 sigret = __NR_rt_sigreturn;
1012 tramp = (unsigned long) frame->tramp;
1013 }
1014
1015#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1d25f11f 1016 tm_frame = &rt_sf->uc_transact.uc_mcontext;
2b0a576d 1017 if (MSR_TM_ACTIVE(regs->msr)) {
1d25f11f 1018 if (save_tm_user_regs(regs, frame, tm_frame, sigret))
1da177e4 1019 goto badframe;
1da177e4 1020 }
2b0a576d
MN
1021 else
1022#endif
1d25f11f
MN
1023 {
1024 if (save_user_regs(regs, frame, tm_frame, sigret, 1))
2b0a576d 1025 goto badframe;
1d25f11f 1026 }
2b0a576d
MN
1027 regs->link = tramp;
1028
1029#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1030 if (MSR_TM_ACTIVE(regs->msr)) {
1031 if (__put_user((unsigned long)&rt_sf->uc_transact,
1032 &rt_sf->uc.uc_link)
1d25f11f 1033 || __put_user((unsigned long)tm_frame, &rt_sf->uc_transact.uc_regs))
2b0a576d
MN
1034 goto badframe;
1035 }
1036 else
1037#endif
1038 if (__put_user(0, &rt_sf->uc.uc_link))
1039 goto badframe;
cc657f53 1040
de79f7b9 1041 current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
cc657f53 1042
a3f61dc0
BH
1043 /* create a stack frame for the caller of the handler */
1044 newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16);
d0c3d534 1045 addr = (void __user *)regs->gpr[1];
e2b55306 1046 if (put_user(regs->gpr[1], (u32 __user *)newsp))
81e7009e 1047 goto badframe;
a3f61dc0
BH
1048
1049 /* Fill registers for signal handler */
81e7009e 1050 regs->gpr[1] = newsp;
1da177e4
LT
1051 regs->gpr[3] = sig;
1052 regs->gpr[4] = (unsigned long) &rt_sf->info;
1053 regs->gpr[5] = (unsigned long) &rt_sf->uc;
1054 regs->gpr[6] = (unsigned long) rt_sf;
1055 regs->nip = (unsigned long) ka->sa.sa_handler;
e871c6bb 1056 /* enter the signal handler in native-endian mode */
fab5db97 1057 regs->msr &= ~MSR_LE;
e871c6bb 1058 regs->msr |= (MSR_KERNEL & MSR_LE);
2b0a576d
MN
1059#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1060 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
1061 * just indicates to userland that we were doing a transaction, but we
1062 * don't want to return in transactional state:
1063 */
1064 regs->msr &= ~MSR_TS_MASK;
1065#endif
1da177e4
LT
1066 return 1;
1067
1068badframe:
81e7009e 1069#ifdef DEBUG_SIG
1da177e4
LT
1070 printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n",
1071 regs, frame, newsp);
1072#endif
76462232
CD
1073 if (show_unhandled_signals)
1074 printk_ratelimited(KERN_INFO
1075 "%s[%d]: bad frame in handle_rt_signal32: "
1076 "%p nip %08lx lr %08lx\n",
1077 current->comm, current->pid,
1078 addr, regs->nip, regs->link);
d0c3d534 1079
1da177e4
LT
1080 force_sigsegv(sig, current);
1081 return 0;
1082}
1083
81e7009e 1084static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig)
1da177e4 1085{
1da177e4 1086 sigset_t set;
81e7009e
SR
1087 struct mcontext __user *mcp;
1088
1089 if (get_sigset_t(&set, &ucp->uc_sigmask))
1090 return -EFAULT;
1091#ifdef CONFIG_PPC64
1092 {
1093 u32 cmcp;
1da177e4 1094
81e7009e
SR
1095 if (__get_user(cmcp, &ucp->uc_regs))
1096 return -EFAULT;
1097 mcp = (struct mcontext __user *)(u64)cmcp;
7c85d1f9 1098 /* no need to check access_ok(mcp), since mcp < 4GB */
81e7009e
SR
1099 }
1100#else
1101 if (__get_user(mcp, &ucp->uc_regs))
1da177e4 1102 return -EFAULT;
7c85d1f9
PM
1103 if (!access_ok(VERIFY_READ, mcp, sizeof(*mcp)))
1104 return -EFAULT;
81e7009e 1105#endif
17440f17 1106 set_current_blocked(&set);
81e7009e 1107 if (restore_user_regs(regs, mcp, sig))
1da177e4
LT
1108 return -EFAULT;
1109
1110 return 0;
1111}
1112
2b0a576d
MN
1113#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1114static int do_setcontext_tm(struct ucontext __user *ucp,
1115 struct ucontext __user *tm_ucp,
1116 struct pt_regs *regs)
1117{
1118 sigset_t set;
1119 struct mcontext __user *mcp;
1120 struct mcontext __user *tm_mcp;
1121 u32 cmcp;
1122 u32 tm_cmcp;
1123
1124 if (get_sigset_t(&set, &ucp->uc_sigmask))
1125 return -EFAULT;
1126
1127 if (__get_user(cmcp, &ucp->uc_regs) ||
1128 __get_user(tm_cmcp, &tm_ucp->uc_regs))
1129 return -EFAULT;
1130 mcp = (struct mcontext __user *)(u64)cmcp;
1131 tm_mcp = (struct mcontext __user *)(u64)tm_cmcp;
1132 /* no need to check access_ok(mcp), since mcp < 4GB */
1133
1134 set_current_blocked(&set);
1135 if (restore_tm_user_regs(regs, mcp, tm_mcp))
1136 return -EFAULT;
1137
1138 return 0;
1139}
1140#endif
1141
81e7009e 1142long sys_swapcontext(struct ucontext __user *old_ctx,
1bd79336
PM
1143 struct ucontext __user *new_ctx,
1144 int ctx_size, int r6, int r7, int r8, struct pt_regs *regs)
1da177e4
LT
1145{
1146 unsigned char tmp;
16c29d18 1147 int ctx_has_vsx_region = 0;
1da177e4 1148
c1cb299e
MN
1149#ifdef CONFIG_PPC64
1150 unsigned long new_msr = 0;
1151
77eb50ae
AS
1152 if (new_ctx) {
1153 struct mcontext __user *mcp;
1154 u32 cmcp;
1155
1156 /*
1157 * Get pointer to the real mcontext. No need for
1158 * access_ok since we are dealing with compat
1159 * pointers.
1160 */
1161 if (__get_user(cmcp, &new_ctx->uc_regs))
1162 return -EFAULT;
1163 mcp = (struct mcontext __user *)(u64)cmcp;
1164 if (__get_user(new_msr, &mcp->mc_gregs[PT_MSR]))
1165 return -EFAULT;
1166 }
c1cb299e
MN
1167 /*
1168 * Check that the context is not smaller than the original
1169 * size (with VMX but without VSX)
1170 */
1171 if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
1172 return -EINVAL;
1173 /*
1174 * If the new context state sets the MSR VSX bits but
1175 * it doesn't provide VSX state.
1176 */
1177 if ((ctx_size < sizeof(struct ucontext)) &&
1178 (new_msr & MSR_VSX))
1179 return -EINVAL;
16c29d18
MN
1180 /* Does the context have enough room to store VSX data? */
1181 if (ctx_size >= sizeof(struct ucontext))
1182 ctx_has_vsx_region = 1;
c1cb299e 1183#else
1da177e4
LT
1184 /* Context size is for future use. Right now, we only make sure
1185 * we are passed something we understand
1186 */
81e7009e 1187 if (ctx_size < sizeof(struct ucontext))
1da177e4 1188 return -EINVAL;
c1cb299e 1189#endif
1da177e4 1190 if (old_ctx != NULL) {
1c9bb1a0
PM
1191 struct mcontext __user *mctx;
1192
1193 /*
1194 * old_ctx might not be 16-byte aligned, in which
1195 * case old_ctx->uc_mcontext won't be either.
1196 * Because we have the old_ctx->uc_pad2 field
1197 * before old_ctx->uc_mcontext, we need to round down
1198 * from &old_ctx->uc_mcontext to a 16-byte boundary.
1199 */
1200 mctx = (struct mcontext __user *)
1201 ((unsigned long) &old_ctx->uc_mcontext & ~0xfUL);
16c29d18 1202 if (!access_ok(VERIFY_WRITE, old_ctx, ctx_size)
1d25f11f 1203 || save_user_regs(regs, mctx, NULL, 0, ctx_has_vsx_region)
81e7009e 1204 || put_sigset_t(&old_ctx->uc_sigmask, &current->blocked)
1c9bb1a0 1205 || __put_user(to_user_ptr(mctx), &old_ctx->uc_regs))
1da177e4
LT
1206 return -EFAULT;
1207 }
1208 if (new_ctx == NULL)
1209 return 0;
16c29d18 1210 if (!access_ok(VERIFY_READ, new_ctx, ctx_size)
1da177e4 1211 || __get_user(tmp, (u8 __user *) new_ctx)
16c29d18 1212 || __get_user(tmp, (u8 __user *) new_ctx + ctx_size - 1))
1da177e4
LT
1213 return -EFAULT;
1214
1215 /*
1216 * If we get a fault copying the context into the kernel's
1217 * image of the user's registers, we can't just return -EFAULT
1218 * because the user's registers will be corrupted. For instance
1219 * the NIP value may have been updated but not some of the
1220 * other registers. Given that we have done the access_ok
1221 * and successfully read the first and last bytes of the region
1222 * above, this should only happen in an out-of-memory situation
1223 * or if another thread unmaps the region containing the context.
1224 * We kill the task with a SIGSEGV in this situation.
1225 */
81e7009e 1226 if (do_setcontext(new_ctx, regs, 0))
1da177e4 1227 do_exit(SIGSEGV);
401d1f02
DW
1228
1229 set_thread_flag(TIF_RESTOREALL);
1da177e4
LT
1230 return 0;
1231}
1232
81e7009e 1233long sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1da177e4
LT
1234 struct pt_regs *regs)
1235{
81e7009e 1236 struct rt_sigframe __user *rt_sf;
2b0a576d
MN
1237#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1238 struct ucontext __user *uc_transact;
1239 unsigned long msr_hi;
1240 unsigned long tmp;
1241 int tm_restore = 0;
1242#endif
1da177e4
LT
1243 /* Always make any pending restarted system calls return -EINTR */
1244 current_thread_info()->restart_block.fn = do_no_restart_syscall;
1245
81e7009e
SR
1246 rt_sf = (struct rt_sigframe __user *)
1247 (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16);
1da177e4
LT
1248 if (!access_ok(VERIFY_READ, rt_sf, sizeof(*rt_sf)))
1249 goto bad;
2b0a576d
MN
1250#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1251 if (__get_user(tmp, &rt_sf->uc.uc_link))
1252 goto bad;
1253 uc_transact = (struct ucontext __user *)(uintptr_t)tmp;
1254 if (uc_transact) {
1255 u32 cmcp;
1256 struct mcontext __user *mcp;
1257
1258 if (__get_user(cmcp, &uc_transact->uc_regs))
1259 return -EFAULT;
1260 mcp = (struct mcontext __user *)(u64)cmcp;
1261 /* The top 32 bits of the MSR are stashed in the transactional
1262 * ucontext. */
1263 if (__get_user(msr_hi, &mcp->mc_gregs[PT_MSR]))
1264 goto bad;
1265
55e43418 1266 if (MSR_TM_ACTIVE(msr_hi<<32)) {
2b0a576d
MN
1267 /* We only recheckpoint on return if we're
1268 * transaction.
1269 */
1270 tm_restore = 1;
1271 if (do_setcontext_tm(&rt_sf->uc, uc_transact, regs))
1272 goto bad;
1273 }
1274 }
1275 if (!tm_restore)
1276 /* Fall through, for non-TM restore */
1277#endif
81e7009e 1278 if (do_setcontext(&rt_sf->uc, regs, 1))
1da177e4
LT
1279 goto bad;
1280
1281 /*
1282 * It's not clear whether or why it is desirable to save the
1283 * sigaltstack setting on signal delivery and restore it on
1284 * signal return. But other architectures do this and we have
1285 * always done it up until now so it is probably better not to
1286 * change it. -- paulus
81e7009e
SR
1287 */
1288#ifdef CONFIG_PPC64
7cce2465
AV
1289 if (compat_restore_altstack(&rt_sf->uc.uc_stack))
1290 goto bad;
81e7009e 1291#else
7cce2465
AV
1292 if (restore_altstack(&rt_sf->uc.uc_stack))
1293 goto bad;
81e7009e 1294#endif
401d1f02
DW
1295 set_thread_flag(TIF_RESTOREALL);
1296 return 0;
1da177e4
LT
1297
1298 bad:
76462232
CD
1299 if (show_unhandled_signals)
1300 printk_ratelimited(KERN_INFO
1301 "%s[%d]: bad frame in sys_rt_sigreturn: "
1302 "%p nip %08lx lr %08lx\n",
1303 current->comm, current->pid,
1304 rt_sf, regs->nip, regs->link);
d0c3d534 1305
1da177e4
LT
1306 force_sig(SIGSEGV, current);
1307 return 0;
1308}
1309
81e7009e
SR
1310#ifdef CONFIG_PPC32
1311int sys_debug_setcontext(struct ucontext __user *ctx,
1312 int ndbg, struct sig_dbg_op __user *dbg,
1313 int r6, int r7, int r8,
1314 struct pt_regs *regs)
1315{
1316 struct sig_dbg_op op;
1317 int i;
7c85d1f9 1318 unsigned char tmp;
81e7009e 1319 unsigned long new_msr = regs->msr;
172ae2e7 1320#ifdef CONFIG_PPC_ADV_DEBUG_REGS
51ae8d4a 1321 unsigned long new_dbcr0 = current->thread.debug.dbcr0;
81e7009e
SR
1322#endif
1323
1324 for (i=0; i<ndbg; i++) {
7c85d1f9 1325 if (copy_from_user(&op, dbg + i, sizeof(op)))
81e7009e
SR
1326 return -EFAULT;
1327 switch (op.dbg_type) {
1328 case SIG_DBG_SINGLE_STEPPING:
172ae2e7 1329#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1330 if (op.dbg_value) {
1331 new_msr |= MSR_DE;
1332 new_dbcr0 |= (DBCR0_IDM | DBCR0_IC);
1333 } else {
3bffb652
DK
1334 new_dbcr0 &= ~DBCR0_IC;
1335 if (!DBCR_ACTIVE_EVENTS(new_dbcr0,
51ae8d4a 1336 current->thread.debug.dbcr1)) {
3bffb652
DK
1337 new_msr &= ~MSR_DE;
1338 new_dbcr0 &= ~DBCR0_IDM;
1339 }
81e7009e
SR
1340 }
1341#else
1342 if (op.dbg_value)
1343 new_msr |= MSR_SE;
1344 else
1345 new_msr &= ~MSR_SE;
1346#endif
1347 break;
1348 case SIG_DBG_BRANCH_TRACING:
172ae2e7 1349#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1350 return -EINVAL;
1351#else
1352 if (op.dbg_value)
1353 new_msr |= MSR_BE;
1354 else
1355 new_msr &= ~MSR_BE;
1356#endif
1357 break;
1358
1359 default:
1360 return -EINVAL;
1361 }
1362 }
1363
1364 /* We wait until here to actually install the values in the
1365 registers so if we fail in the above loop, it will not
1366 affect the contents of these registers. After this point,
1367 failure is a problem, anyway, and it's very unlikely unless
1368 the user is really doing something wrong. */
1369 regs->msr = new_msr;
172ae2e7 1370#ifdef CONFIG_PPC_ADV_DEBUG_REGS
51ae8d4a 1371 current->thread.debug.dbcr0 = new_dbcr0;
81e7009e
SR
1372#endif
1373
7c85d1f9
PM
1374 if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx))
1375 || __get_user(tmp, (u8 __user *) ctx)
1376 || __get_user(tmp, (u8 __user *) (ctx + 1) - 1))
1377 return -EFAULT;
1378
81e7009e
SR
1379 /*
1380 * If we get a fault copying the context into the kernel's
1381 * image of the user's registers, we can't just return -EFAULT
1382 * because the user's registers will be corrupted. For instance
1383 * the NIP value may have been updated but not some of the
1384 * other registers. Given that we have done the access_ok
1385 * and successfully read the first and last bytes of the region
1386 * above, this should only happen in an out-of-memory situation
1387 * or if another thread unmaps the region containing the context.
1388 * We kill the task with a SIGSEGV in this situation.
1389 */
1390 if (do_setcontext(ctx, regs, 1)) {
76462232
CD
1391 if (show_unhandled_signals)
1392 printk_ratelimited(KERN_INFO "%s[%d]: bad frame in "
1393 "sys_debug_setcontext: %p nip %08lx "
1394 "lr %08lx\n",
1395 current->comm, current->pid,
1396 ctx, regs->nip, regs->link);
d0c3d534 1397
81e7009e
SR
1398 force_sig(SIGSEGV, current);
1399 goto out;
1400 }
1401
1402 /*
1403 * It's not clear whether or why it is desirable to save the
1404 * sigaltstack setting on signal delivery and restore it on
1405 * signal return. But other architectures do this and we have
1406 * always done it up until now so it is probably better not to
1407 * change it. -- paulus
1408 */
7cce2465 1409 restore_altstack(&ctx->uc_stack);
81e7009e 1410
401d1f02 1411 set_thread_flag(TIF_RESTOREALL);
81e7009e
SR
1412 out:
1413 return 0;
1414}
1415#endif
1da177e4
LT
1416
1417/*
1418 * OK, we're invoking a handler
1419 */
f478f543 1420int handle_signal32(unsigned long sig, struct k_sigaction *ka,
a3f61dc0 1421 siginfo_t *info, sigset_t *oldset, struct pt_regs *regs)
1da177e4 1422{
81e7009e 1423 struct sigcontext __user *sc;
a3f61dc0 1424 struct sigframe __user *frame;
1d25f11f 1425 struct mcontext __user *tm_mctx = NULL;
a3f61dc0 1426 unsigned long newsp = 0;
2b0a576d
MN
1427 int sigret;
1428 unsigned long tramp;
1da177e4
LT
1429
1430 /* Set up Signal Frame */
2b3f8e87 1431 frame = get_sigframe(ka, get_tm_stackpointer(regs), sizeof(*frame), 1);
a3f61dc0 1432 if (unlikely(frame == NULL))
1da177e4 1433 goto badframe;
a3f61dc0 1434 sc = (struct sigcontext __user *) &frame->sctx;
1da177e4
LT
1435
1436#if _NSIG != 64
81e7009e 1437#error "Please adjust handle_signal()"
1da177e4 1438#endif
81e7009e 1439 if (__put_user(to_user_ptr(ka->sa.sa_handler), &sc->handler)
1da177e4 1440 || __put_user(oldset->sig[0], &sc->oldmask)
81e7009e 1441#ifdef CONFIG_PPC64
1da177e4 1442 || __put_user((oldset->sig[0] >> 32), &sc->_unused[3])
81e7009e
SR
1443#else
1444 || __put_user(oldset->sig[1], &sc->_unused[3])
1445#endif
a3f61dc0 1446 || __put_user(to_user_ptr(&frame->mctx), &sc->regs)
1da177e4
LT
1447 || __put_user(sig, &sc->signal))
1448 goto badframe;
1449
a5bba930 1450 if (vdso32_sigtramp && current->mm->context.vdso_base) {
2b0a576d
MN
1451 sigret = 0;
1452 tramp = current->mm->context.vdso_base + vdso32_sigtramp;
a7f290da 1453 } else {
2b0a576d
MN
1454 sigret = __NR_sigreturn;
1455 tramp = (unsigned long) frame->mctx.tramp;
1456 }
1457
1458#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1d25f11f 1459 tm_mctx = &frame->mctx_transact;
2b0a576d
MN
1460 if (MSR_TM_ACTIVE(regs->msr)) {
1461 if (save_tm_user_regs(regs, &frame->mctx, &frame->mctx_transact,
1462 sigret))
1da177e4 1463 goto badframe;
1da177e4 1464 }
2b0a576d
MN
1465 else
1466#endif
1d25f11f
MN
1467 {
1468 if (save_user_regs(regs, &frame->mctx, tm_mctx, sigret, 1))
2b0a576d 1469 goto badframe;
1d25f11f 1470 }
2b0a576d
MN
1471
1472 regs->link = tramp;
1da177e4 1473
de79f7b9 1474 current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
cc657f53 1475
a3f61dc0
BH
1476 /* create a stack frame for the caller of the handler */
1477 newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE;
9747dd6f 1478 if (put_user(regs->gpr[1], (u32 __user *)newsp))
1da177e4 1479 goto badframe;
a3f61dc0 1480
81e7009e 1481 regs->gpr[1] = newsp;
1da177e4
LT
1482 regs->gpr[3] = sig;
1483 regs->gpr[4] = (unsigned long) sc;
1484 regs->nip = (unsigned long) ka->sa.sa_handler;
fab5db97
PM
1485 /* enter the signal handler in big-endian mode */
1486 regs->msr &= ~MSR_LE;
2b0a576d
MN
1487#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1488 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
1489 * just indicates to userland that we were doing a transaction, but we
1490 * don't want to return in transactional state:
1491 */
1492 regs->msr &= ~MSR_TS_MASK;
1493#endif
1da177e4
LT
1494 return 1;
1495
1496badframe:
81e7009e
SR
1497#ifdef DEBUG_SIG
1498 printk("badframe in handle_signal, regs=%p frame=%p newsp=%lx\n",
1499 regs, frame, newsp);
1da177e4 1500#endif
76462232
CD
1501 if (show_unhandled_signals)
1502 printk_ratelimited(KERN_INFO
1503 "%s[%d]: bad frame in handle_signal32: "
1504 "%p nip %08lx lr %08lx\n",
1505 current->comm, current->pid,
1506 frame, regs->nip, regs->link);
d0c3d534 1507
1da177e4
LT
1508 force_sigsegv(sig, current);
1509 return 0;
1510}
1511
1512/*
1513 * Do a signal return; undo the signal stack.
1514 */
81e7009e 1515long sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1da177e4
LT
1516 struct pt_regs *regs)
1517{
fee55450 1518 struct sigframe __user *sf;
81e7009e
SR
1519 struct sigcontext __user *sc;
1520 struct sigcontext sigctx;
1521 struct mcontext __user *sr;
d0c3d534 1522 void __user *addr;
1da177e4 1523 sigset_t set;
fee55450
MN
1524#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1525 struct mcontext __user *mcp, *tm_mcp;
1526 unsigned long msr_hi;
1527#endif
1da177e4
LT
1528
1529 /* Always make any pending restarted system calls return -EINTR */
1530 current_thread_info()->restart_block.fn = do_no_restart_syscall;
1531
fee55450
MN
1532 sf = (struct sigframe __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE);
1533 sc = &sf->sctx;
d0c3d534 1534 addr = sc;
1da177e4
LT
1535 if (copy_from_user(&sigctx, sc, sizeof(sigctx)))
1536 goto badframe;
1537
81e7009e 1538#ifdef CONFIG_PPC64
1da177e4
LT
1539 /*
1540 * Note that PPC32 puts the upper 32 bits of the sigmask in the
1541 * unused part of the signal stackframe
1542 */
1543 set.sig[0] = sigctx.oldmask + ((long)(sigctx._unused[3]) << 32);
81e7009e
SR
1544#else
1545 set.sig[0] = sigctx.oldmask;
1546 set.sig[1] = sigctx._unused[3];
1547#endif
17440f17 1548 set_current_blocked(&set);
1da177e4 1549
fee55450
MN
1550#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1551 mcp = (struct mcontext __user *)&sf->mctx;
1552 tm_mcp = (struct mcontext __user *)&sf->mctx_transact;
1553 if (__get_user(msr_hi, &tm_mcp->mc_gregs[PT_MSR]))
1da177e4 1554 goto badframe;
fee55450
MN
1555 if (MSR_TM_ACTIVE(msr_hi<<32)) {
1556 if (!cpu_has_feature(CPU_FTR_TM))
1557 goto badframe;
1558 if (restore_tm_user_regs(regs, mcp, tm_mcp))
1559 goto badframe;
1560 } else
1561#endif
1562 {
1563 sr = (struct mcontext __user *)from_user_ptr(sigctx.regs);
1564 addr = sr;
1565 if (!access_ok(VERIFY_READ, sr, sizeof(*sr))
1566 || restore_user_regs(regs, sr, 1))
1567 goto badframe;
1568 }
1da177e4 1569
401d1f02 1570 set_thread_flag(TIF_RESTOREALL);
81e7009e 1571 return 0;
1da177e4
LT
1572
1573badframe:
76462232
CD
1574 if (show_unhandled_signals)
1575 printk_ratelimited(KERN_INFO
1576 "%s[%d]: bad frame in sys_sigreturn: "
1577 "%p nip %08lx lr %08lx\n",
1578 current->comm, current->pid,
1579 addr, regs->nip, regs->link);
d0c3d534 1580
1da177e4
LT
1581 force_sig(SIGSEGV, current);
1582 return 0;
1583}