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1da177e4 1/*
81e7009e 2 * Signal handling for 32bit PPC and 32bit tasks on 64bit PPC
1da177e4 3 *
81e7009e
SR
4 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
1da177e4
LT
6 * Copyright (C) 2001 IBM
7 * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
9 *
81e7009e
SR
10 * Derived from "arch/i386/kernel/signal.c"
11 * Copyright (C) 1991, 1992 Linus Torvalds
12 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
1da177e4 13 *
81e7009e
SR
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version
17 * 2 of the License, or (at your option) any later version.
1da177e4
LT
18 */
19
1da177e4 20#include <linux/sched.h>
81e7009e 21#include <linux/mm.h>
1da177e4 22#include <linux/smp.h>
1da177e4
LT
23#include <linux/kernel.h>
24#include <linux/signal.h>
1da177e4
LT
25#include <linux/errno.h>
26#include <linux/elf.h>
05ead015 27#include <linux/ptrace.h>
76462232 28#include <linux/ratelimit.h>
81e7009e
SR
29#ifdef CONFIG_PPC64
30#include <linux/syscalls.h>
1da177e4 31#include <linux/compat.h>
81e7009e
SR
32#else
33#include <linux/wait.h>
81e7009e
SR
34#include <linux/unistd.h>
35#include <linux/stddef.h>
36#include <linux/tty.h>
37#include <linux/binfmts.h>
81e7009e
SR
38#endif
39
1da177e4 40#include <asm/uaccess.h>
81e7009e 41#include <asm/cacheflush.h>
a7f31841 42#include <asm/syscalls.h>
c5ff7001 43#include <asm/sigcontext.h>
a7f290da 44#include <asm/vdso.h>
ae3a197e 45#include <asm/switch_to.h>
2b0a576d 46#include <asm/tm.h>
81e7009e 47#ifdef CONFIG_PPC64
879168ee 48#include "ppc32.h"
1da177e4 49#include <asm/unistd.h>
81e7009e
SR
50#else
51#include <asm/ucontext.h>
52#include <asm/pgtable.h>
53#endif
1da177e4 54
22e38f29
BH
55#include "signal.h"
56
81e7009e 57#undef DEBUG_SIG
1da177e4 58
81e7009e 59#ifdef CONFIG_PPC64
b09a4913 60#define sys_rt_sigreturn compat_sys_rt_sigreturn
b09a4913
SR
61#define sys_swapcontext compat_sys_swapcontext
62#define sys_sigreturn compat_sys_sigreturn
81e7009e
SR
63
64#define old_sigaction old_sigaction32
65#define sigcontext sigcontext32
66#define mcontext mcontext32
67#define ucontext ucontext32
68
7cce2465
AV
69#define __save_altstack __compat_save_altstack
70
c1cb299e
MN
71/*
72 * Userspace code may pass a ucontext which doesn't include VSX added
73 * at the end. We need to check for this case.
74 */
75#define UCONTEXTSIZEWITHOUTVSX \
76 (sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32))
77
81e7009e
SR
78/*
79 * Returning 0 means we return to userspace via
80 * ret_from_except and thus restore all user
81 * registers from *regs. This is what we need
82 * to do when a signal has been delivered.
83 */
81e7009e
SR
84
85#define GP_REGS_SIZE min(sizeof(elf_gregset_t32), sizeof(struct pt_regs32))
86#undef __SIGNAL_FRAMESIZE
87#define __SIGNAL_FRAMESIZE __SIGNAL_FRAMESIZE32
88#undef ELF_NVRREG
89#define ELF_NVRREG ELF_NVRREG32
90
91/*
92 * Functions for flipping sigsets (thanks to brain dead generic
93 * implementation that makes things simple for little endian only)
94 */
95static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
96{
97 compat_sigset_t cset;
98
99 switch (_NSIG_WORDS) {
a313f4c5 100 case 4: cset.sig[6] = set->sig[3] & 0xffffffffull;
81e7009e
SR
101 cset.sig[7] = set->sig[3] >> 32;
102 case 3: cset.sig[4] = set->sig[2] & 0xffffffffull;
103 cset.sig[5] = set->sig[2] >> 32;
104 case 2: cset.sig[2] = set->sig[1] & 0xffffffffull;
105 cset.sig[3] = set->sig[1] >> 32;
106 case 1: cset.sig[0] = set->sig[0] & 0xffffffffull;
107 cset.sig[1] = set->sig[0] >> 32;
108 }
109 return copy_to_user(uset, &cset, sizeof(*uset));
110}
111
9b7cf8b4
PM
112static inline int get_sigset_t(sigset_t *set,
113 const compat_sigset_t __user *uset)
81e7009e
SR
114{
115 compat_sigset_t s32;
116
117 if (copy_from_user(&s32, uset, sizeof(*uset)))
118 return -EFAULT;
119
120 /*
121 * Swap the 2 words of the 64-bit sigset_t (they are stored
122 * in the "wrong" endian in 32-bit user storage).
123 */
124 switch (_NSIG_WORDS) {
125 case 4: set->sig[3] = s32.sig[6] | (((long)s32.sig[7]) << 32);
126 case 3: set->sig[2] = s32.sig[4] | (((long)s32.sig[5]) << 32);
127 case 2: set->sig[1] = s32.sig[2] | (((long)s32.sig[3]) << 32);
128 case 1: set->sig[0] = s32.sig[0] | (((long)s32.sig[1]) << 32);
129 }
130 return 0;
131}
132
29e646df 133#define to_user_ptr(p) ptr_to_compat(p)
81e7009e
SR
134#define from_user_ptr(p) compat_ptr(p)
135
136static inline int save_general_regs(struct pt_regs *regs,
137 struct mcontext __user *frame)
138{
139 elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
140 int i;
141
1bd79336 142 WARN_ON(!FULL_REGS(regs));
401d1f02
DW
143
144 for (i = 0; i <= PT_RESULT; i ++) {
145 if (i == 14 && !FULL_REGS(regs))
146 i = 32;
81e7009e
SR
147 if (__put_user((unsigned int)gregs[i], &frame->mc_gregs[i]))
148 return -EFAULT;
401d1f02 149 }
81e7009e
SR
150 return 0;
151}
152
153static inline int restore_general_regs(struct pt_regs *regs,
154 struct mcontext __user *sr)
155{
156 elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
157 int i;
158
159 for (i = 0; i <= PT_RESULT; i++) {
160 if ((i == PT_MSR) || (i == PT_SOFTE))
161 continue;
162 if (__get_user(gregs[i], &sr->mc_gregs[i]))
163 return -EFAULT;
164 }
165 return 0;
166}
167
168#else /* CONFIG_PPC64 */
169
81e7009e
SR
170#define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
171
172static inline int put_sigset_t(sigset_t __user *uset, sigset_t *set)
173{
174 return copy_to_user(uset, set, sizeof(*uset));
175}
176
9b7cf8b4 177static inline int get_sigset_t(sigset_t *set, const sigset_t __user *uset)
81e7009e
SR
178{
179 return copy_from_user(set, uset, sizeof(*uset));
180}
181
29e646df
AV
182#define to_user_ptr(p) ((unsigned long)(p))
183#define from_user_ptr(p) ((void __user *)(p))
81e7009e
SR
184
185static inline int save_general_regs(struct pt_regs *regs,
186 struct mcontext __user *frame)
187{
1bd79336 188 WARN_ON(!FULL_REGS(regs));
81e7009e
SR
189 return __copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE);
190}
191
192static inline int restore_general_regs(struct pt_regs *regs,
193 struct mcontext __user *sr)
194{
195 /* copy up to but not including MSR */
196 if (__copy_from_user(regs, &sr->mc_gregs,
197 PT_MSR * sizeof(elf_greg_t)))
198 return -EFAULT;
199 /* copy from orig_r3 (the word after the MSR) up to the end */
200 if (__copy_from_user(&regs->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3],
201 GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t)))
202 return -EFAULT;
203 return 0;
204}
81e7009e
SR
205#endif
206
1da177e4
LT
207/*
208 * When we have signals to deliver, we set up on the
209 * user stack, going down from the original stack pointer:
a3f61dc0
BH
210 * an ABI gap of 56 words
211 * an mcontext struct
81e7009e
SR
212 * a sigcontext struct
213 * a gap of __SIGNAL_FRAMESIZE bytes
1da177e4 214 *
a3f61dc0
BH
215 * Each of these things must be a multiple of 16 bytes in size. The following
216 * structure represent all of this except the __SIGNAL_FRAMESIZE gap
1da177e4
LT
217 *
218 */
a3f61dc0
BH
219struct sigframe {
220 struct sigcontext sctx; /* the sigcontext */
81e7009e 221 struct mcontext mctx; /* all the register values */
2b0a576d
MN
222#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
223 struct sigcontext sctx_transact;
224 struct mcontext mctx_transact;
225#endif
1da177e4
LT
226 /*
227 * Programs using the rs6000/xcoff abi can save up to 19 gp
228 * regs and 18 fp regs below sp before decrementing it.
229 */
230 int abigap[56];
231};
232
233/* We use the mc_pad field for the signal return trampoline. */
234#define tramp mc_pad
235
236/*
237 * When we have rt signals to deliver, we set up on the
238 * user stack, going down from the original stack pointer:
81e7009e
SR
239 * one rt_sigframe struct (siginfo + ucontext + ABI gap)
240 * a gap of __SIGNAL_FRAMESIZE+16 bytes
241 * (the +16 is to get the siginfo and ucontext in the same
1da177e4
LT
242 * positions as in older kernels).
243 *
244 * Each of these things must be a multiple of 16 bytes in size.
245 *
246 */
81e7009e
SR
247struct rt_sigframe {
248#ifdef CONFIG_PPC64
249 compat_siginfo_t info;
250#else
251 struct siginfo info;
252#endif
253 struct ucontext uc;
2b0a576d
MN
254#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
255 struct ucontext uc_transact;
256#endif
1da177e4
LT
257 /*
258 * Programs using the rs6000/xcoff abi can save up to 19 gp
259 * regs and 18 fp regs below sp before decrementing it.
260 */
261 int abigap[56];
262};
263
6a274c08
MN
264#ifdef CONFIG_VSX
265unsigned long copy_fpr_to_user(void __user *to,
266 struct task_struct *task)
267{
268 double buf[ELF_NFPREG];
269 int i;
270
271 /* save FPR copy to local buffer then write to the thread_struct */
272 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
273 buf[i] = task->thread.TS_FPR(i);
274 memcpy(&buf[i], &task->thread.fpscr, sizeof(double));
275 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
276}
277
278unsigned long copy_fpr_from_user(struct task_struct *task,
279 void __user *from)
280{
281 double buf[ELF_NFPREG];
282 int i;
283
284 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
285 return 1;
286 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
287 task->thread.TS_FPR(i) = buf[i];
288 memcpy(&task->thread.fpscr, &buf[i], sizeof(double));
289
290 return 0;
291}
292
293unsigned long copy_vsx_to_user(void __user *to,
294 struct task_struct *task)
295{
296 double buf[ELF_NVSRHALFREG];
297 int i;
298
299 /* save FPR copy to local buffer then write to the thread_struct */
300 for (i = 0; i < ELF_NVSRHALFREG; i++)
301 buf[i] = task->thread.fpr[i][TS_VSRLOWOFFSET];
302 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
303}
304
305unsigned long copy_vsx_from_user(struct task_struct *task,
306 void __user *from)
307{
308 double buf[ELF_NVSRHALFREG];
309 int i;
310
311 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
312 return 1;
313 for (i = 0; i < ELF_NVSRHALFREG ; i++)
314 task->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
315 return 0;
316}
2b0a576d
MN
317
318#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
319unsigned long copy_transact_fpr_to_user(void __user *to,
320 struct task_struct *task)
321{
322 double buf[ELF_NFPREG];
323 int i;
324
325 /* save FPR copy to local buffer then write to the thread_struct */
326 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
327 buf[i] = task->thread.TS_TRANS_FPR(i);
328 memcpy(&buf[i], &task->thread.transact_fpscr, sizeof(double));
329 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
330}
331
332unsigned long copy_transact_fpr_from_user(struct task_struct *task,
333 void __user *from)
334{
335 double buf[ELF_NFPREG];
336 int i;
337
338 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
339 return 1;
340 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
341 task->thread.TS_TRANS_FPR(i) = buf[i];
342 memcpy(&task->thread.transact_fpscr, &buf[i], sizeof(double));
343
344 return 0;
345}
346
347unsigned long copy_transact_vsx_to_user(void __user *to,
348 struct task_struct *task)
349{
350 double buf[ELF_NVSRHALFREG];
351 int i;
352
353 /* save FPR copy to local buffer then write to the thread_struct */
354 for (i = 0; i < ELF_NVSRHALFREG; i++)
355 buf[i] = task->thread.transact_fpr[i][TS_VSRLOWOFFSET];
356 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
357}
358
359unsigned long copy_transact_vsx_from_user(struct task_struct *task,
360 void __user *from)
361{
362 double buf[ELF_NVSRHALFREG];
363 int i;
364
365 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
366 return 1;
367 for (i = 0; i < ELF_NVSRHALFREG ; i++)
368 task->thread.transact_fpr[i][TS_VSRLOWOFFSET] = buf[i];
369 return 0;
370}
371#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
6a274c08
MN
372#else
373inline unsigned long copy_fpr_to_user(void __user *to,
374 struct task_struct *task)
375{
376 return __copy_to_user(to, task->thread.fpr,
377 ELF_NFPREG * sizeof(double));
378}
379
380inline unsigned long copy_fpr_from_user(struct task_struct *task,
381 void __user *from)
382{
383 return __copy_from_user(task->thread.fpr, from,
384 ELF_NFPREG * sizeof(double));
385}
2b0a576d
MN
386
387#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
388inline unsigned long copy_transact_fpr_to_user(void __user *to,
389 struct task_struct *task)
390{
391 return __copy_to_user(to, task->thread.transact_fpr,
392 ELF_NFPREG * sizeof(double));
393}
394
395inline unsigned long copy_transact_fpr_from_user(struct task_struct *task,
396 void __user *from)
397{
398 return __copy_from_user(task->thread.transact_fpr, from,
399 ELF_NFPREG * sizeof(double));
400}
401#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
6a274c08
MN
402#endif
403
1da177e4
LT
404/*
405 * Save the current user registers on the user stack.
81e7009e
SR
406 * We only save the altivec/spe registers if the process has used
407 * altivec/spe instructions at some point.
1da177e4 408 */
81e7009e 409static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
16c29d18 410 int sigret, int ctx_has_vsx_region)
1da177e4 411{
9e751186
MN
412 unsigned long msr = regs->msr;
413
1da177e4
LT
414 /* Make sure floating point registers are stored in regs */
415 flush_fp_to_thread(current);
416
c6e6771b
MN
417 /* save general registers */
418 if (save_general_regs(regs, frame))
1da177e4
LT
419 return 1;
420
1da177e4
LT
421#ifdef CONFIG_ALTIVEC
422 /* save altivec registers */
423 if (current->thread.used_vr) {
424 flush_altivec_to_thread(current);
425 if (__copy_to_user(&frame->mc_vregs, current->thread.vr,
81e7009e 426 ELF_NVRREG * sizeof(vector128)))
1da177e4
LT
427 return 1;
428 /* set MSR_VEC in the saved MSR value to indicate that
429 frame->mc_vregs contains valid data */
9e751186 430 msr |= MSR_VEC;
1da177e4
LT
431 }
432 /* else assert((regs->msr & MSR_VEC) == 0) */
433
434 /* We always copy to/from vrsave, it's 0 if we don't have or don't
435 * use altivec. Since VSCR only contains 32 bits saved in the least
436 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
437 * most significant bits of that same vector. --BenH
438 */
439 if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32]))
440 return 1;
441#endif /* CONFIG_ALTIVEC */
6a274c08 442 if (copy_fpr_to_user(&frame->mc_fregs, current))
c6e6771b 443 return 1;
6a274c08 444#ifdef CONFIG_VSX
ce48b210
MN
445 /*
446 * Copy VSR 0-31 upper half from thread_struct to local
447 * buffer, then write that to userspace. Also set MSR_VSX in
448 * the saved MSR value to indicate that frame->mc_vregs
449 * contains valid data
450 */
16c29d18 451 if (current->thread.used_vsr && ctx_has_vsx_region) {
7c292170 452 __giveup_vsx(current);
6a274c08 453 if (copy_vsx_to_user(&frame->mc_vsregs, current))
ce48b210
MN
454 return 1;
455 msr |= MSR_VSX;
456 }
c6e6771b 457#endif /* CONFIG_VSX */
81e7009e
SR
458#ifdef CONFIG_SPE
459 /* save spe registers */
460 if (current->thread.used_spe) {
461 flush_spe_to_thread(current);
462 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
463 ELF_NEVRREG * sizeof(u32)))
464 return 1;
465 /* set MSR_SPE in the saved MSR value to indicate that
466 frame->mc_vregs contains valid data */
9e751186 467 msr |= MSR_SPE;
81e7009e
SR
468 }
469 /* else assert((regs->msr & MSR_SPE) == 0) */
470
471 /* We always copy to/from spefscr */
472 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
473 return 1;
474#endif /* CONFIG_SPE */
475
9e751186
MN
476 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
477 return 1;
1da177e4
LT
478 if (sigret) {
479 /* Set up the sigreturn trampoline: li r0,sigret; sc */
480 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
481 || __put_user(0x44000002UL, &frame->tramp[1]))
482 return 1;
483 flush_icache_range((unsigned long) &frame->tramp[0],
484 (unsigned long) &frame->tramp[2]);
485 }
486
487 return 0;
488}
489
2b0a576d
MN
490#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
491/*
492 * Save the current user registers on the user stack.
493 * We only save the altivec/spe registers if the process has used
494 * altivec/spe instructions at some point.
495 * We also save the transactional registers to a second ucontext in the
496 * frame.
497 *
498 * See save_user_regs() and signal_64.c:setup_tm_sigcontexts().
499 */
500static int save_tm_user_regs(struct pt_regs *regs,
501 struct mcontext __user *frame,
502 struct mcontext __user *tm_frame, int sigret)
503{
504 unsigned long msr = regs->msr;
505
506 /* tm_reclaim rolls back all reg states, updating thread.ckpt_regs,
507 * thread.transact_fpr[], thread.transact_vr[], etc.
508 */
509 tm_enable();
510 tm_reclaim(&current->thread, msr, TM_CAUSE_SIGNAL);
511
512 /* Make sure floating point registers are stored in regs */
513 flush_fp_to_thread(current);
514
515 /* Save both sets of general registers */
516 if (save_general_regs(&current->thread.ckpt_regs, frame)
517 || save_general_regs(regs, tm_frame))
518 return 1;
519
520 /* Stash the top half of the 64bit MSR into the 32bit MSR word
521 * of the transactional mcontext. This way we have a backward-compatible
522 * MSR in the 'normal' (checkpointed) mcontext and additionally one can
523 * also look at what type of transaction (T or S) was active at the
524 * time of the signal.
525 */
526 if (__put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR]))
527 return 1;
528
529#ifdef CONFIG_ALTIVEC
530 /* save altivec registers */
531 if (current->thread.used_vr) {
532 flush_altivec_to_thread(current);
533 if (__copy_to_user(&frame->mc_vregs, current->thread.vr,
534 ELF_NVRREG * sizeof(vector128)))
535 return 1;
536 if (msr & MSR_VEC) {
537 if (__copy_to_user(&tm_frame->mc_vregs,
538 current->thread.transact_vr,
539 ELF_NVRREG * sizeof(vector128)))
540 return 1;
541 } else {
542 if (__copy_to_user(&tm_frame->mc_vregs,
543 current->thread.vr,
544 ELF_NVRREG * sizeof(vector128)))
545 return 1;
546 }
547
548 /* set MSR_VEC in the saved MSR value to indicate that
549 * frame->mc_vregs contains valid data
550 */
551 msr |= MSR_VEC;
552 }
553
554 /* We always copy to/from vrsave, it's 0 if we don't have or don't
555 * use altivec. Since VSCR only contains 32 bits saved in the least
556 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
557 * most significant bits of that same vector. --BenH
558 */
559 if (__put_user(current->thread.vrsave,
560 (u32 __user *)&frame->mc_vregs[32]))
561 return 1;
562 if (msr & MSR_VEC) {
563 if (__put_user(current->thread.transact_vrsave,
564 (u32 __user *)&tm_frame->mc_vregs[32]))
565 return 1;
566 } else {
567 if (__put_user(current->thread.vrsave,
568 (u32 __user *)&tm_frame->mc_vregs[32]))
569 return 1;
570 }
571#endif /* CONFIG_ALTIVEC */
572
573 if (copy_fpr_to_user(&frame->mc_fregs, current))
574 return 1;
575 if (msr & MSR_FP) {
576 if (copy_transact_fpr_to_user(&tm_frame->mc_fregs, current))
577 return 1;
578 } else {
579 if (copy_fpr_to_user(&tm_frame->mc_fregs, current))
580 return 1;
581 }
582
583#ifdef CONFIG_VSX
584 /*
585 * Copy VSR 0-31 upper half from thread_struct to local
586 * buffer, then write that to userspace. Also set MSR_VSX in
587 * the saved MSR value to indicate that frame->mc_vregs
588 * contains valid data
589 */
590 if (current->thread.used_vsr) {
591 __giveup_vsx(current);
592 if (copy_vsx_to_user(&frame->mc_vsregs, current))
593 return 1;
594 if (msr & MSR_VSX) {
595 if (copy_transact_vsx_to_user(&tm_frame->mc_vsregs,
596 current))
597 return 1;
598 } else {
599 if (copy_vsx_to_user(&tm_frame->mc_vsregs, current))
600 return 1;
601 }
602
603 msr |= MSR_VSX;
604 }
605#endif /* CONFIG_VSX */
606#ifdef CONFIG_SPE
607 /* SPE regs are not checkpointed with TM, so this section is
608 * simply the same as in save_user_regs().
609 */
610 if (current->thread.used_spe) {
611 flush_spe_to_thread(current);
612 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
613 ELF_NEVRREG * sizeof(u32)))
614 return 1;
615 /* set MSR_SPE in the saved MSR value to indicate that
616 * frame->mc_vregs contains valid data */
617 msr |= MSR_SPE;
618 }
619
620 /* We always copy to/from spefscr */
621 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
622 return 1;
623#endif /* CONFIG_SPE */
624
625 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
626 return 1;
627 if (sigret) {
628 /* Set up the sigreturn trampoline: li r0,sigret; sc */
629 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
630 || __put_user(0x44000002UL, &frame->tramp[1]))
631 return 1;
632 flush_icache_range((unsigned long) &frame->tramp[0],
633 (unsigned long) &frame->tramp[2]);
634 }
635
636 return 0;
637}
638#endif
639
1da177e4
LT
640/*
641 * Restore the current user register values from the user stack,
642 * (except for MSR).
643 */
644static long restore_user_regs(struct pt_regs *regs,
81e7009e 645 struct mcontext __user *sr, int sig)
1da177e4 646{
81e7009e 647 long err;
1da177e4 648 unsigned int save_r2 = 0;
1da177e4 649 unsigned long msr;
c6e6771b 650#ifdef CONFIG_VSX
c6e6771b
MN
651 int i;
652#endif
1da177e4
LT
653
654 /*
655 * restore general registers but not including MSR or SOFTE. Also
656 * take care of keeping r2 (TLS) intact if not a signal
657 */
658 if (!sig)
659 save_r2 = (unsigned int)regs->gpr[2];
81e7009e 660 err = restore_general_regs(regs, sr);
9a81c16b 661 regs->trap = 0;
fab5db97 662 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
1da177e4
LT
663 if (!sig)
664 regs->gpr[2] = (unsigned long) save_r2;
665 if (err)
666 return 1;
667
fab5db97
PM
668 /* if doing signal return, restore the previous little-endian mode */
669 if (sig)
670 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
671
5388fb10
PM
672 /*
673 * Do this before updating the thread state in
674 * current->thread.fpr/vr/evr. That way, if we get preempted
675 * and another task grabs the FPU/Altivec/SPE, it won't be
676 * tempted to save the current CPU state into the thread_struct
677 * and corrupt what we are writing there.
678 */
679 discard_lazy_cpu_state();
680
1da177e4 681#ifdef CONFIG_ALTIVEC
c6e6771b
MN
682 /*
683 * Force the process to reload the altivec registers from
684 * current->thread when it next does altivec instructions
685 */
1da177e4 686 regs->msr &= ~MSR_VEC;
fab5db97 687 if (msr & MSR_VEC) {
1da177e4
LT
688 /* restore altivec registers from the stack */
689 if (__copy_from_user(current->thread.vr, &sr->mc_vregs,
690 sizeof(sr->mc_vregs)))
691 return 1;
692 } else if (current->thread.used_vr)
81e7009e 693 memset(current->thread.vr, 0, ELF_NVRREG * sizeof(vector128));
1da177e4
LT
694
695 /* Always get VRSAVE back */
696 if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
697 return 1;
698#endif /* CONFIG_ALTIVEC */
6a274c08
MN
699 if (copy_fpr_from_user(current, &sr->mc_fregs))
700 return 1;
1da177e4 701
c6e6771b 702#ifdef CONFIG_VSX
ce48b210
MN
703 /*
704 * Force the process to reload the VSX registers from
705 * current->thread when it next does VSX instruction.
706 */
707 regs->msr &= ~MSR_VSX;
708 if (msr & MSR_VSX) {
709 /*
710 * Restore altivec registers from the stack to a local
711 * buffer, then write this out to the thread_struct
712 */
6a274c08 713 if (copy_vsx_from_user(current, &sr->mc_vsregs))
ce48b210 714 return 1;
ce48b210
MN
715 } else if (current->thread.used_vsr)
716 for (i = 0; i < 32 ; i++)
717 current->thread.fpr[i][TS_VSRLOWOFFSET] = 0;
c6e6771b
MN
718#endif /* CONFIG_VSX */
719 /*
720 * force the process to reload the FP registers from
721 * current->thread when it next does FP instructions
722 */
723 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
724
81e7009e
SR
725#ifdef CONFIG_SPE
726 /* force the process to reload the spe registers from
727 current->thread when it next does spe instructions */
728 regs->msr &= ~MSR_SPE;
fab5db97 729 if (msr & MSR_SPE) {
81e7009e
SR
730 /* restore spe registers from the stack */
731 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
732 ELF_NEVRREG * sizeof(u32)))
733 return 1;
734 } else if (current->thread.used_spe)
735 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
736
737 /* Always get SPEFSCR back */
738 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs + ELF_NEVRREG))
739 return 1;
740#endif /* CONFIG_SPE */
741
1da177e4
LT
742 return 0;
743}
744
2b0a576d
MN
745#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
746/*
747 * Restore the current user register values from the user stack, except for
748 * MSR, and recheckpoint the original checkpointed register state for processes
749 * in transactions.
750 */
751static long restore_tm_user_regs(struct pt_regs *regs,
752 struct mcontext __user *sr,
753 struct mcontext __user *tm_sr)
754{
755 long err;
756 unsigned long msr;
757#ifdef CONFIG_VSX
758 int i;
759#endif
760
761 /*
762 * restore general registers but not including MSR or SOFTE. Also
763 * take care of keeping r2 (TLS) intact if not a signal.
764 * See comment in signal_64.c:restore_tm_sigcontexts();
765 * TFHAR is restored from the checkpointed NIP; TEXASR and TFIAR
766 * were set by the signal delivery.
767 */
768 err = restore_general_regs(regs, tm_sr);
769 err |= restore_general_regs(&current->thread.ckpt_regs, sr);
770
771 err |= __get_user(current->thread.tm_tfhar, &sr->mc_gregs[PT_NIP]);
772
773 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
774 if (err)
775 return 1;
776
777 /* Restore the previous little-endian mode */
778 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
779
780 /*
781 * Do this before updating the thread state in
782 * current->thread.fpr/vr/evr. That way, if we get preempted
783 * and another task grabs the FPU/Altivec/SPE, it won't be
784 * tempted to save the current CPU state into the thread_struct
785 * and corrupt what we are writing there.
786 */
787 discard_lazy_cpu_state();
788
789#ifdef CONFIG_ALTIVEC
790 regs->msr &= ~MSR_VEC;
791 if (msr & MSR_VEC) {
792 /* restore altivec registers from the stack */
793 if (__copy_from_user(current->thread.vr, &sr->mc_vregs,
794 sizeof(sr->mc_vregs)) ||
795 __copy_from_user(current->thread.transact_vr,
796 &tm_sr->mc_vregs,
797 sizeof(sr->mc_vregs)))
798 return 1;
799 } else if (current->thread.used_vr) {
800 memset(current->thread.vr, 0, ELF_NVRREG * sizeof(vector128));
801 memset(current->thread.transact_vr, 0,
802 ELF_NVRREG * sizeof(vector128));
803 }
804
805 /* Always get VRSAVE back */
806 if (__get_user(current->thread.vrsave,
807 (u32 __user *)&sr->mc_vregs[32]) ||
808 __get_user(current->thread.transact_vrsave,
809 (u32 __user *)&tm_sr->mc_vregs[32]))
810 return 1;
811#endif /* CONFIG_ALTIVEC */
812
813 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
814
815 if (copy_fpr_from_user(current, &sr->mc_fregs) ||
816 copy_transact_fpr_from_user(current, &tm_sr->mc_fregs))
817 return 1;
818
819#ifdef CONFIG_VSX
820 regs->msr &= ~MSR_VSX;
821 if (msr & MSR_VSX) {
822 /*
823 * Restore altivec registers from the stack to a local
824 * buffer, then write this out to the thread_struct
825 */
826 if (copy_vsx_from_user(current, &sr->mc_vsregs) ||
827 copy_transact_vsx_from_user(current, &tm_sr->mc_vsregs))
828 return 1;
829 } else if (current->thread.used_vsr)
830 for (i = 0; i < 32 ; i++) {
831 current->thread.fpr[i][TS_VSRLOWOFFSET] = 0;
832 current->thread.transact_fpr[i][TS_VSRLOWOFFSET] = 0;
833 }
834#endif /* CONFIG_VSX */
835
836#ifdef CONFIG_SPE
837 /* SPE regs are not checkpointed with TM, so this section is
838 * simply the same as in restore_user_regs().
839 */
840 regs->msr &= ~MSR_SPE;
841 if (msr & MSR_SPE) {
842 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
843 ELF_NEVRREG * sizeof(u32)))
844 return 1;
845 } else if (current->thread.used_spe)
846 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
847
848 /* Always get SPEFSCR back */
849 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs
850 + ELF_NEVRREG))
851 return 1;
852#endif /* CONFIG_SPE */
853
854 /* Now, recheckpoint. This loads up all of the checkpointed (older)
855 * registers, including FP and V[S]Rs. After recheckpointing, the
856 * transactional versions should be loaded.
857 */
858 tm_enable();
859 /* This loads the checkpointed FP/VEC state, if used */
860 tm_recheckpoint(&current->thread, msr);
861 /* The task has moved into TM state S, so ensure MSR reflects this */
862 regs->msr = (regs->msr & ~MSR_TS_MASK) | MSR_TS_S;
863
864 /* This loads the speculative FP/VEC state, if used */
865 if (msr & MSR_FP) {
866 do_load_up_transact_fpu(&current->thread);
867 regs->msr |= (MSR_FP | current->thread.fpexc_mode);
868 }
869 if (msr & MSR_VEC) {
870 do_load_up_transact_altivec(&current->thread);
871 regs->msr |= MSR_VEC;
872 }
873
874 return 0;
875}
876#endif
877
81e7009e 878#ifdef CONFIG_PPC64
1da177e4
LT
879int copy_siginfo_to_user32(struct compat_siginfo __user *d, siginfo_t *s)
880{
881 int err;
882
883 if (!access_ok (VERIFY_WRITE, d, sizeof(*d)))
884 return -EFAULT;
885
886 /* If you change siginfo_t structure, please be sure
887 * this code is fixed accordingly.
888 * It should never copy any pad contained in the structure
889 * to avoid security leaks, but must copy the generic
890 * 3 ints plus the relevant union member.
891 * This routine must convert siginfo from 64bit to 32bit as well
892 * at the same time.
893 */
894 err = __put_user(s->si_signo, &d->si_signo);
895 err |= __put_user(s->si_errno, &d->si_errno);
896 err |= __put_user((short)s->si_code, &d->si_code);
897 if (s->si_code < 0)
898 err |= __copy_to_user(&d->_sifields._pad, &s->_sifields._pad,
899 SI_PAD_SIZE32);
900 else switch(s->si_code >> 16) {
901 case __SI_CHLD >> 16:
902 err |= __put_user(s->si_pid, &d->si_pid);
903 err |= __put_user(s->si_uid, &d->si_uid);
904 err |= __put_user(s->si_utime, &d->si_utime);
905 err |= __put_user(s->si_stime, &d->si_stime);
906 err |= __put_user(s->si_status, &d->si_status);
907 break;
908 case __SI_FAULT >> 16:
909 err |= __put_user((unsigned int)(unsigned long)s->si_addr,
910 &d->si_addr);
911 break;
912 case __SI_POLL >> 16:
913 err |= __put_user(s->si_band, &d->si_band);
914 err |= __put_user(s->si_fd, &d->si_fd);
915 break;
916 case __SI_TIMER >> 16:
917 err |= __put_user(s->si_tid, &d->si_tid);
918 err |= __put_user(s->si_overrun, &d->si_overrun);
919 err |= __put_user(s->si_int, &d->si_int);
920 break;
921 case __SI_RT >> 16: /* This is not generated by the kernel as of now. */
922 case __SI_MESGQ >> 16:
923 err |= __put_user(s->si_int, &d->si_int);
924 /* fallthrough */
925 case __SI_KILL >> 16:
926 default:
927 err |= __put_user(s->si_pid, &d->si_pid);
928 err |= __put_user(s->si_uid, &d->si_uid);
929 break;
930 }
931 return err;
932}
933
81e7009e
SR
934#define copy_siginfo_to_user copy_siginfo_to_user32
935
9c0c44db
RM
936int copy_siginfo_from_user32(siginfo_t *to, struct compat_siginfo __user *from)
937{
938 memset(to, 0, sizeof *to);
939
940 if (copy_from_user(to, from, 3*sizeof(int)) ||
941 copy_from_user(to->_sifields._pad,
942 from->_sifields._pad, SI_PAD_SIZE32))
943 return -EFAULT;
944
945 return 0;
946}
81e7009e 947#endif /* CONFIG_PPC64 */
1da177e4 948
1da177e4
LT
949/*
950 * Set up a signal frame for a "real-time" signal handler
951 * (one which gets siginfo).
952 */
f478f543 953int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
81e7009e 954 siginfo_t *info, sigset_t *oldset,
a3f61dc0 955 struct pt_regs *regs)
1da177e4 956{
81e7009e
SR
957 struct rt_sigframe __user *rt_sf;
958 struct mcontext __user *frame;
d0c3d534 959 void __user *addr;
a3f61dc0 960 unsigned long newsp = 0;
2b0a576d
MN
961 int sigret;
962 unsigned long tramp;
1da177e4
LT
963
964 /* Set up Signal Frame */
965 /* Put a Real Time Context onto stack */
efbda860 966 rt_sf = get_sigframe(ka, regs, sizeof(*rt_sf), 1);
d0c3d534 967 addr = rt_sf;
a3f61dc0 968 if (unlikely(rt_sf == NULL))
1da177e4
LT
969 goto badframe;
970
1da177e4 971 /* Put the siginfo & fill in most of the ucontext */
81e7009e 972 if (copy_siginfo_to_user(&rt_sf->info, info)
1da177e4 973 || __put_user(0, &rt_sf->uc.uc_flags)
7cce2465 974 || __save_altstack(&rt_sf->uc.uc_stack, regs->gpr[1])
81e7009e
SR
975 || __put_user(to_user_ptr(&rt_sf->uc.uc_mcontext),
976 &rt_sf->uc.uc_regs)
977 || put_sigset_t(&rt_sf->uc.uc_sigmask, oldset))
1da177e4
LT
978 goto badframe;
979
980 /* Save user registers on the stack */
981 frame = &rt_sf->uc.uc_mcontext;
d0c3d534 982 addr = frame;
a5bba930 983 if (vdso32_rt_sigtramp && current->mm->context.vdso_base) {
2b0a576d
MN
984 sigret = 0;
985 tramp = current->mm->context.vdso_base + vdso32_rt_sigtramp;
a7f290da 986 } else {
2b0a576d
MN
987 sigret = __NR_rt_sigreturn;
988 tramp = (unsigned long) frame->tramp;
989 }
990
991#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
992 if (MSR_TM_ACTIVE(regs->msr)) {
993 if (save_tm_user_regs(regs, &rt_sf->uc.uc_mcontext,
994 &rt_sf->uc_transact.uc_mcontext, sigret))
1da177e4 995 goto badframe;
1da177e4 996 }
2b0a576d
MN
997 else
998#endif
999 if (save_user_regs(regs, frame, sigret, 1))
1000 goto badframe;
1001 regs->link = tramp;
1002
1003#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1004 if (MSR_TM_ACTIVE(regs->msr)) {
1005 if (__put_user((unsigned long)&rt_sf->uc_transact,
1006 &rt_sf->uc.uc_link)
1007 || __put_user(to_user_ptr(&rt_sf->uc_transact.uc_mcontext),
1008 &rt_sf->uc_transact.uc_regs))
1009 goto badframe;
1010 }
1011 else
1012#endif
1013 if (__put_user(0, &rt_sf->uc.uc_link))
1014 goto badframe;
cc657f53
PM
1015
1016 current->thread.fpscr.val = 0; /* turn off all fp exceptions */
1017
a3f61dc0
BH
1018 /* create a stack frame for the caller of the handler */
1019 newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16);
d0c3d534 1020 addr = (void __user *)regs->gpr[1];
e2b55306 1021 if (put_user(regs->gpr[1], (u32 __user *)newsp))
81e7009e 1022 goto badframe;
a3f61dc0
BH
1023
1024 /* Fill registers for signal handler */
81e7009e 1025 regs->gpr[1] = newsp;
1da177e4
LT
1026 regs->gpr[3] = sig;
1027 regs->gpr[4] = (unsigned long) &rt_sf->info;
1028 regs->gpr[5] = (unsigned long) &rt_sf->uc;
1029 regs->gpr[6] = (unsigned long) rt_sf;
1030 regs->nip = (unsigned long) ka->sa.sa_handler;
fab5db97
PM
1031 /* enter the signal handler in big-endian mode */
1032 regs->msr &= ~MSR_LE;
2b0a576d
MN
1033#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1034 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
1035 * just indicates to userland that we were doing a transaction, but we
1036 * don't want to return in transactional state:
1037 */
1038 regs->msr &= ~MSR_TS_MASK;
1039#endif
1da177e4
LT
1040 return 1;
1041
1042badframe:
81e7009e 1043#ifdef DEBUG_SIG
1da177e4
LT
1044 printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n",
1045 regs, frame, newsp);
1046#endif
76462232
CD
1047 if (show_unhandled_signals)
1048 printk_ratelimited(KERN_INFO
1049 "%s[%d]: bad frame in handle_rt_signal32: "
1050 "%p nip %08lx lr %08lx\n",
1051 current->comm, current->pid,
1052 addr, regs->nip, regs->link);
d0c3d534 1053
1da177e4
LT
1054 force_sigsegv(sig, current);
1055 return 0;
1056}
1057
81e7009e 1058static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig)
1da177e4 1059{
1da177e4 1060 sigset_t set;
81e7009e
SR
1061 struct mcontext __user *mcp;
1062
1063 if (get_sigset_t(&set, &ucp->uc_sigmask))
1064 return -EFAULT;
1065#ifdef CONFIG_PPC64
1066 {
1067 u32 cmcp;
1da177e4 1068
81e7009e
SR
1069 if (__get_user(cmcp, &ucp->uc_regs))
1070 return -EFAULT;
1071 mcp = (struct mcontext __user *)(u64)cmcp;
7c85d1f9 1072 /* no need to check access_ok(mcp), since mcp < 4GB */
81e7009e
SR
1073 }
1074#else
1075 if (__get_user(mcp, &ucp->uc_regs))
1da177e4 1076 return -EFAULT;
7c85d1f9
PM
1077 if (!access_ok(VERIFY_READ, mcp, sizeof(*mcp)))
1078 return -EFAULT;
81e7009e 1079#endif
17440f17 1080 set_current_blocked(&set);
81e7009e 1081 if (restore_user_regs(regs, mcp, sig))
1da177e4
LT
1082 return -EFAULT;
1083
1084 return 0;
1085}
1086
2b0a576d
MN
1087#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1088static int do_setcontext_tm(struct ucontext __user *ucp,
1089 struct ucontext __user *tm_ucp,
1090 struct pt_regs *regs)
1091{
1092 sigset_t set;
1093 struct mcontext __user *mcp;
1094 struct mcontext __user *tm_mcp;
1095 u32 cmcp;
1096 u32 tm_cmcp;
1097
1098 if (get_sigset_t(&set, &ucp->uc_sigmask))
1099 return -EFAULT;
1100
1101 if (__get_user(cmcp, &ucp->uc_regs) ||
1102 __get_user(tm_cmcp, &tm_ucp->uc_regs))
1103 return -EFAULT;
1104 mcp = (struct mcontext __user *)(u64)cmcp;
1105 tm_mcp = (struct mcontext __user *)(u64)tm_cmcp;
1106 /* no need to check access_ok(mcp), since mcp < 4GB */
1107
1108 set_current_blocked(&set);
1109 if (restore_tm_user_regs(regs, mcp, tm_mcp))
1110 return -EFAULT;
1111
1112 return 0;
1113}
1114#endif
1115
81e7009e 1116long sys_swapcontext(struct ucontext __user *old_ctx,
1bd79336
PM
1117 struct ucontext __user *new_ctx,
1118 int ctx_size, int r6, int r7, int r8, struct pt_regs *regs)
1da177e4
LT
1119{
1120 unsigned char tmp;
16c29d18 1121 int ctx_has_vsx_region = 0;
1da177e4 1122
c1cb299e
MN
1123#ifdef CONFIG_PPC64
1124 unsigned long new_msr = 0;
1125
77eb50ae
AS
1126 if (new_ctx) {
1127 struct mcontext __user *mcp;
1128 u32 cmcp;
1129
1130 /*
1131 * Get pointer to the real mcontext. No need for
1132 * access_ok since we are dealing with compat
1133 * pointers.
1134 */
1135 if (__get_user(cmcp, &new_ctx->uc_regs))
1136 return -EFAULT;
1137 mcp = (struct mcontext __user *)(u64)cmcp;
1138 if (__get_user(new_msr, &mcp->mc_gregs[PT_MSR]))
1139 return -EFAULT;
1140 }
c1cb299e
MN
1141 /*
1142 * Check that the context is not smaller than the original
1143 * size (with VMX but without VSX)
1144 */
1145 if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
1146 return -EINVAL;
1147 /*
1148 * If the new context state sets the MSR VSX bits but
1149 * it doesn't provide VSX state.
1150 */
1151 if ((ctx_size < sizeof(struct ucontext)) &&
1152 (new_msr & MSR_VSX))
1153 return -EINVAL;
16c29d18
MN
1154 /* Does the context have enough room to store VSX data? */
1155 if (ctx_size >= sizeof(struct ucontext))
1156 ctx_has_vsx_region = 1;
c1cb299e 1157#else
1da177e4
LT
1158 /* Context size is for future use. Right now, we only make sure
1159 * we are passed something we understand
1160 */
81e7009e 1161 if (ctx_size < sizeof(struct ucontext))
1da177e4 1162 return -EINVAL;
c1cb299e 1163#endif
1da177e4 1164 if (old_ctx != NULL) {
1c9bb1a0
PM
1165 struct mcontext __user *mctx;
1166
1167 /*
1168 * old_ctx might not be 16-byte aligned, in which
1169 * case old_ctx->uc_mcontext won't be either.
1170 * Because we have the old_ctx->uc_pad2 field
1171 * before old_ctx->uc_mcontext, we need to round down
1172 * from &old_ctx->uc_mcontext to a 16-byte boundary.
1173 */
1174 mctx = (struct mcontext __user *)
1175 ((unsigned long) &old_ctx->uc_mcontext & ~0xfUL);
16c29d18
MN
1176 if (!access_ok(VERIFY_WRITE, old_ctx, ctx_size)
1177 || save_user_regs(regs, mctx, 0, ctx_has_vsx_region)
81e7009e 1178 || put_sigset_t(&old_ctx->uc_sigmask, &current->blocked)
1c9bb1a0 1179 || __put_user(to_user_ptr(mctx), &old_ctx->uc_regs))
1da177e4
LT
1180 return -EFAULT;
1181 }
1182 if (new_ctx == NULL)
1183 return 0;
16c29d18 1184 if (!access_ok(VERIFY_READ, new_ctx, ctx_size)
1da177e4 1185 || __get_user(tmp, (u8 __user *) new_ctx)
16c29d18 1186 || __get_user(tmp, (u8 __user *) new_ctx + ctx_size - 1))
1da177e4
LT
1187 return -EFAULT;
1188
1189 /*
1190 * If we get a fault copying the context into the kernel's
1191 * image of the user's registers, we can't just return -EFAULT
1192 * because the user's registers will be corrupted. For instance
1193 * the NIP value may have been updated but not some of the
1194 * other registers. Given that we have done the access_ok
1195 * and successfully read the first and last bytes of the region
1196 * above, this should only happen in an out-of-memory situation
1197 * or if another thread unmaps the region containing the context.
1198 * We kill the task with a SIGSEGV in this situation.
1199 */
81e7009e 1200 if (do_setcontext(new_ctx, regs, 0))
1da177e4 1201 do_exit(SIGSEGV);
401d1f02
DW
1202
1203 set_thread_flag(TIF_RESTOREALL);
1da177e4
LT
1204 return 0;
1205}
1206
81e7009e 1207long sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1da177e4
LT
1208 struct pt_regs *regs)
1209{
81e7009e 1210 struct rt_sigframe __user *rt_sf;
2b0a576d
MN
1211#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1212 struct ucontext __user *uc_transact;
1213 unsigned long msr_hi;
1214 unsigned long tmp;
1215 int tm_restore = 0;
1216#endif
1da177e4
LT
1217 /* Always make any pending restarted system calls return -EINTR */
1218 current_thread_info()->restart_block.fn = do_no_restart_syscall;
1219
81e7009e
SR
1220 rt_sf = (struct rt_sigframe __user *)
1221 (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16);
1da177e4
LT
1222 if (!access_ok(VERIFY_READ, rt_sf, sizeof(*rt_sf)))
1223 goto bad;
2b0a576d
MN
1224#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1225 if (__get_user(tmp, &rt_sf->uc.uc_link))
1226 goto bad;
1227 uc_transact = (struct ucontext __user *)(uintptr_t)tmp;
1228 if (uc_transact) {
1229 u32 cmcp;
1230 struct mcontext __user *mcp;
1231
1232 if (__get_user(cmcp, &uc_transact->uc_regs))
1233 return -EFAULT;
1234 mcp = (struct mcontext __user *)(u64)cmcp;
1235 /* The top 32 bits of the MSR are stashed in the transactional
1236 * ucontext. */
1237 if (__get_user(msr_hi, &mcp->mc_gregs[PT_MSR]))
1238 goto bad;
1239
1240 if (MSR_TM_SUSPENDED(msr_hi<<32)) {
1241 /* We only recheckpoint on return if we're
1242 * transaction.
1243 */
1244 tm_restore = 1;
1245 if (do_setcontext_tm(&rt_sf->uc, uc_transact, regs))
1246 goto bad;
1247 }
1248 }
1249 if (!tm_restore)
1250 /* Fall through, for non-TM restore */
1251#endif
81e7009e 1252 if (do_setcontext(&rt_sf->uc, regs, 1))
1da177e4
LT
1253 goto bad;
1254
1255 /*
1256 * It's not clear whether or why it is desirable to save the
1257 * sigaltstack setting on signal delivery and restore it on
1258 * signal return. But other architectures do this and we have
1259 * always done it up until now so it is probably better not to
1260 * change it. -- paulus
81e7009e
SR
1261 */
1262#ifdef CONFIG_PPC64
7cce2465
AV
1263 if (compat_restore_altstack(&rt_sf->uc.uc_stack))
1264 goto bad;
81e7009e 1265#else
7cce2465
AV
1266 if (restore_altstack(&rt_sf->uc.uc_stack))
1267 goto bad;
81e7009e 1268#endif
401d1f02
DW
1269 set_thread_flag(TIF_RESTOREALL);
1270 return 0;
1da177e4
LT
1271
1272 bad:
76462232
CD
1273 if (show_unhandled_signals)
1274 printk_ratelimited(KERN_INFO
1275 "%s[%d]: bad frame in sys_rt_sigreturn: "
1276 "%p nip %08lx lr %08lx\n",
1277 current->comm, current->pid,
1278 rt_sf, regs->nip, regs->link);
d0c3d534 1279
1da177e4
LT
1280 force_sig(SIGSEGV, current);
1281 return 0;
1282}
1283
81e7009e
SR
1284#ifdef CONFIG_PPC32
1285int sys_debug_setcontext(struct ucontext __user *ctx,
1286 int ndbg, struct sig_dbg_op __user *dbg,
1287 int r6, int r7, int r8,
1288 struct pt_regs *regs)
1289{
1290 struct sig_dbg_op op;
1291 int i;
7c85d1f9 1292 unsigned char tmp;
81e7009e 1293 unsigned long new_msr = regs->msr;
172ae2e7 1294#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1295 unsigned long new_dbcr0 = current->thread.dbcr0;
1296#endif
1297
1298 for (i=0; i<ndbg; i++) {
7c85d1f9 1299 if (copy_from_user(&op, dbg + i, sizeof(op)))
81e7009e
SR
1300 return -EFAULT;
1301 switch (op.dbg_type) {
1302 case SIG_DBG_SINGLE_STEPPING:
172ae2e7 1303#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1304 if (op.dbg_value) {
1305 new_msr |= MSR_DE;
1306 new_dbcr0 |= (DBCR0_IDM | DBCR0_IC);
1307 } else {
3bffb652
DK
1308 new_dbcr0 &= ~DBCR0_IC;
1309 if (!DBCR_ACTIVE_EVENTS(new_dbcr0,
1310 current->thread.dbcr1)) {
1311 new_msr &= ~MSR_DE;
1312 new_dbcr0 &= ~DBCR0_IDM;
1313 }
81e7009e
SR
1314 }
1315#else
1316 if (op.dbg_value)
1317 new_msr |= MSR_SE;
1318 else
1319 new_msr &= ~MSR_SE;
1320#endif
1321 break;
1322 case SIG_DBG_BRANCH_TRACING:
172ae2e7 1323#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1324 return -EINVAL;
1325#else
1326 if (op.dbg_value)
1327 new_msr |= MSR_BE;
1328 else
1329 new_msr &= ~MSR_BE;
1330#endif
1331 break;
1332
1333 default:
1334 return -EINVAL;
1335 }
1336 }
1337
1338 /* We wait until here to actually install the values in the
1339 registers so if we fail in the above loop, it will not
1340 affect the contents of these registers. After this point,
1341 failure is a problem, anyway, and it's very unlikely unless
1342 the user is really doing something wrong. */
1343 regs->msr = new_msr;
172ae2e7 1344#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1345 current->thread.dbcr0 = new_dbcr0;
1346#endif
1347
7c85d1f9
PM
1348 if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx))
1349 || __get_user(tmp, (u8 __user *) ctx)
1350 || __get_user(tmp, (u8 __user *) (ctx + 1) - 1))
1351 return -EFAULT;
1352
81e7009e
SR
1353 /*
1354 * If we get a fault copying the context into the kernel's
1355 * image of the user's registers, we can't just return -EFAULT
1356 * because the user's registers will be corrupted. For instance
1357 * the NIP value may have been updated but not some of the
1358 * other registers. Given that we have done the access_ok
1359 * and successfully read the first and last bytes of the region
1360 * above, this should only happen in an out-of-memory situation
1361 * or if another thread unmaps the region containing the context.
1362 * We kill the task with a SIGSEGV in this situation.
1363 */
1364 if (do_setcontext(ctx, regs, 1)) {
76462232
CD
1365 if (show_unhandled_signals)
1366 printk_ratelimited(KERN_INFO "%s[%d]: bad frame in "
1367 "sys_debug_setcontext: %p nip %08lx "
1368 "lr %08lx\n",
1369 current->comm, current->pid,
1370 ctx, regs->nip, regs->link);
d0c3d534 1371
81e7009e
SR
1372 force_sig(SIGSEGV, current);
1373 goto out;
1374 }
1375
1376 /*
1377 * It's not clear whether or why it is desirable to save the
1378 * sigaltstack setting on signal delivery and restore it on
1379 * signal return. But other architectures do this and we have
1380 * always done it up until now so it is probably better not to
1381 * change it. -- paulus
1382 */
7cce2465 1383 restore_altstack(&ctx->uc_stack);
81e7009e 1384
401d1f02 1385 set_thread_flag(TIF_RESTOREALL);
81e7009e
SR
1386 out:
1387 return 0;
1388}
1389#endif
1da177e4
LT
1390
1391/*
1392 * OK, we're invoking a handler
1393 */
f478f543 1394int handle_signal32(unsigned long sig, struct k_sigaction *ka,
a3f61dc0 1395 siginfo_t *info, sigset_t *oldset, struct pt_regs *regs)
1da177e4 1396{
81e7009e 1397 struct sigcontext __user *sc;
a3f61dc0
BH
1398 struct sigframe __user *frame;
1399 unsigned long newsp = 0;
2b0a576d
MN
1400 int sigret;
1401 unsigned long tramp;
1da177e4
LT
1402
1403 /* Set up Signal Frame */
efbda860 1404 frame = get_sigframe(ka, regs, sizeof(*frame), 1);
a3f61dc0 1405 if (unlikely(frame == NULL))
1da177e4 1406 goto badframe;
a3f61dc0 1407 sc = (struct sigcontext __user *) &frame->sctx;
1da177e4
LT
1408
1409#if _NSIG != 64
81e7009e 1410#error "Please adjust handle_signal()"
1da177e4 1411#endif
81e7009e 1412 if (__put_user(to_user_ptr(ka->sa.sa_handler), &sc->handler)
1da177e4 1413 || __put_user(oldset->sig[0], &sc->oldmask)
81e7009e 1414#ifdef CONFIG_PPC64
1da177e4 1415 || __put_user((oldset->sig[0] >> 32), &sc->_unused[3])
81e7009e
SR
1416#else
1417 || __put_user(oldset->sig[1], &sc->_unused[3])
1418#endif
a3f61dc0 1419 || __put_user(to_user_ptr(&frame->mctx), &sc->regs)
1da177e4
LT
1420 || __put_user(sig, &sc->signal))
1421 goto badframe;
1422
a5bba930 1423 if (vdso32_sigtramp && current->mm->context.vdso_base) {
2b0a576d
MN
1424 sigret = 0;
1425 tramp = current->mm->context.vdso_base + vdso32_sigtramp;
a7f290da 1426 } else {
2b0a576d
MN
1427 sigret = __NR_sigreturn;
1428 tramp = (unsigned long) frame->mctx.tramp;
1429 }
1430
1431#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1432 if (MSR_TM_ACTIVE(regs->msr)) {
1433 if (save_tm_user_regs(regs, &frame->mctx, &frame->mctx_transact,
1434 sigret))
1da177e4 1435 goto badframe;
1da177e4 1436 }
2b0a576d
MN
1437 else
1438#endif
1439 if (save_user_regs(regs, &frame->mctx, sigret, 1))
1440 goto badframe;
1441
1442 regs->link = tramp;
1da177e4 1443
cc657f53
PM
1444 current->thread.fpscr.val = 0; /* turn off all fp exceptions */
1445
a3f61dc0
BH
1446 /* create a stack frame for the caller of the handler */
1447 newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE;
9747dd6f 1448 if (put_user(regs->gpr[1], (u32 __user *)newsp))
1da177e4 1449 goto badframe;
a3f61dc0 1450
81e7009e 1451 regs->gpr[1] = newsp;
1da177e4
LT
1452 regs->gpr[3] = sig;
1453 regs->gpr[4] = (unsigned long) sc;
1454 regs->nip = (unsigned long) ka->sa.sa_handler;
fab5db97
PM
1455 /* enter the signal handler in big-endian mode */
1456 regs->msr &= ~MSR_LE;
2b0a576d
MN
1457#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1458 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
1459 * just indicates to userland that we were doing a transaction, but we
1460 * don't want to return in transactional state:
1461 */
1462 regs->msr &= ~MSR_TS_MASK;
1463#endif
1da177e4
LT
1464 return 1;
1465
1466badframe:
81e7009e
SR
1467#ifdef DEBUG_SIG
1468 printk("badframe in handle_signal, regs=%p frame=%p newsp=%lx\n",
1469 regs, frame, newsp);
1da177e4 1470#endif
76462232
CD
1471 if (show_unhandled_signals)
1472 printk_ratelimited(KERN_INFO
1473 "%s[%d]: bad frame in handle_signal32: "
1474 "%p nip %08lx lr %08lx\n",
1475 current->comm, current->pid,
1476 frame, regs->nip, regs->link);
d0c3d534 1477
1da177e4
LT
1478 force_sigsegv(sig, current);
1479 return 0;
1480}
1481
1482/*
1483 * Do a signal return; undo the signal stack.
1484 */
81e7009e 1485long sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1da177e4
LT
1486 struct pt_regs *regs)
1487{
81e7009e
SR
1488 struct sigcontext __user *sc;
1489 struct sigcontext sigctx;
1490 struct mcontext __user *sr;
d0c3d534 1491 void __user *addr;
1da177e4 1492 sigset_t set;
1da177e4
LT
1493
1494 /* Always make any pending restarted system calls return -EINTR */
1495 current_thread_info()->restart_block.fn = do_no_restart_syscall;
1496
81e7009e 1497 sc = (struct sigcontext __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE);
d0c3d534 1498 addr = sc;
1da177e4
LT
1499 if (copy_from_user(&sigctx, sc, sizeof(sigctx)))
1500 goto badframe;
1501
81e7009e 1502#ifdef CONFIG_PPC64
1da177e4
LT
1503 /*
1504 * Note that PPC32 puts the upper 32 bits of the sigmask in the
1505 * unused part of the signal stackframe
1506 */
1507 set.sig[0] = sigctx.oldmask + ((long)(sigctx._unused[3]) << 32);
81e7009e
SR
1508#else
1509 set.sig[0] = sigctx.oldmask;
1510 set.sig[1] = sigctx._unused[3];
1511#endif
17440f17 1512 set_current_blocked(&set);
1da177e4 1513
81e7009e 1514 sr = (struct mcontext __user *)from_user_ptr(sigctx.regs);
d0c3d534 1515 addr = sr;
1da177e4
LT
1516 if (!access_ok(VERIFY_READ, sr, sizeof(*sr))
1517 || restore_user_regs(regs, sr, 1))
1518 goto badframe;
1519
401d1f02 1520 set_thread_flag(TIF_RESTOREALL);
81e7009e 1521 return 0;
1da177e4
LT
1522
1523badframe:
76462232
CD
1524 if (show_unhandled_signals)
1525 printk_ratelimited(KERN_INFO
1526 "%s[%d]: bad frame in sys_sigreturn: "
1527 "%p nip %08lx lr %08lx\n",
1528 current->comm, current->pid,
1529 addr, regs->nip, regs->link);
d0c3d534 1530
1da177e4
LT
1531 force_sig(SIGSEGV, current);
1532 return 0;
1533}