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1da177e4 1/*
81e7009e 2 * Signal handling for 32bit PPC and 32bit tasks on 64bit PPC
1da177e4 3 *
81e7009e
SR
4 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
1da177e4
LT
6 * Copyright (C) 2001 IBM
7 * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
9 *
81e7009e
SR
10 * Derived from "arch/i386/kernel/signal.c"
11 * Copyright (C) 1991, 1992 Linus Torvalds
12 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
1da177e4 13 *
81e7009e
SR
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version
17 * 2 of the License, or (at your option) any later version.
1da177e4
LT
18 */
19
1da177e4 20#include <linux/sched.h>
81e7009e 21#include <linux/mm.h>
1da177e4 22#include <linux/smp.h>
1da177e4
LT
23#include <linux/kernel.h>
24#include <linux/signal.h>
1da177e4
LT
25#include <linux/errno.h>
26#include <linux/elf.h>
05ead015 27#include <linux/ptrace.h>
76462232 28#include <linux/ratelimit.h>
81e7009e
SR
29#ifdef CONFIG_PPC64
30#include <linux/syscalls.h>
1da177e4 31#include <linux/compat.h>
81e7009e
SR
32#else
33#include <linux/wait.h>
81e7009e
SR
34#include <linux/unistd.h>
35#include <linux/stddef.h>
36#include <linux/tty.h>
37#include <linux/binfmts.h>
81e7009e
SR
38#endif
39
1da177e4 40#include <asm/uaccess.h>
81e7009e 41#include <asm/cacheflush.h>
a7f31841 42#include <asm/syscalls.h>
c5ff7001 43#include <asm/sigcontext.h>
a7f290da 44#include <asm/vdso.h>
ae3a197e 45#include <asm/switch_to.h>
2b0a576d 46#include <asm/tm.h>
81e7009e 47#ifdef CONFIG_PPC64
879168ee 48#include "ppc32.h"
1da177e4 49#include <asm/unistd.h>
81e7009e
SR
50#else
51#include <asm/ucontext.h>
52#include <asm/pgtable.h>
53#endif
1da177e4 54
22e38f29
BH
55#include "signal.h"
56
81e7009e 57#undef DEBUG_SIG
1da177e4 58
81e7009e 59#ifdef CONFIG_PPC64
b09a4913 60#define sys_rt_sigreturn compat_sys_rt_sigreturn
b09a4913
SR
61#define sys_swapcontext compat_sys_swapcontext
62#define sys_sigreturn compat_sys_sigreturn
81e7009e
SR
63
64#define old_sigaction old_sigaction32
65#define sigcontext sigcontext32
66#define mcontext mcontext32
67#define ucontext ucontext32
68
7cce2465
AV
69#define __save_altstack __compat_save_altstack
70
c1cb299e
MN
71/*
72 * Userspace code may pass a ucontext which doesn't include VSX added
73 * at the end. We need to check for this case.
74 */
75#define UCONTEXTSIZEWITHOUTVSX \
76 (sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32))
77
81e7009e
SR
78/*
79 * Returning 0 means we return to userspace via
80 * ret_from_except and thus restore all user
81 * registers from *regs. This is what we need
82 * to do when a signal has been delivered.
83 */
81e7009e
SR
84
85#define GP_REGS_SIZE min(sizeof(elf_gregset_t32), sizeof(struct pt_regs32))
86#undef __SIGNAL_FRAMESIZE
87#define __SIGNAL_FRAMESIZE __SIGNAL_FRAMESIZE32
88#undef ELF_NVRREG
89#define ELF_NVRREG ELF_NVRREG32
90
91/*
92 * Functions for flipping sigsets (thanks to brain dead generic
93 * implementation that makes things simple for little endian only)
94 */
95static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
96{
97 compat_sigset_t cset;
98
99 switch (_NSIG_WORDS) {
a313f4c5 100 case 4: cset.sig[6] = set->sig[3] & 0xffffffffull;
81e7009e
SR
101 cset.sig[7] = set->sig[3] >> 32;
102 case 3: cset.sig[4] = set->sig[2] & 0xffffffffull;
103 cset.sig[5] = set->sig[2] >> 32;
104 case 2: cset.sig[2] = set->sig[1] & 0xffffffffull;
105 cset.sig[3] = set->sig[1] >> 32;
106 case 1: cset.sig[0] = set->sig[0] & 0xffffffffull;
107 cset.sig[1] = set->sig[0] >> 32;
108 }
109 return copy_to_user(uset, &cset, sizeof(*uset));
110}
111
9b7cf8b4
PM
112static inline int get_sigset_t(sigset_t *set,
113 const compat_sigset_t __user *uset)
81e7009e
SR
114{
115 compat_sigset_t s32;
116
117 if (copy_from_user(&s32, uset, sizeof(*uset)))
118 return -EFAULT;
119
120 /*
121 * Swap the 2 words of the 64-bit sigset_t (they are stored
122 * in the "wrong" endian in 32-bit user storage).
123 */
124 switch (_NSIG_WORDS) {
125 case 4: set->sig[3] = s32.sig[6] | (((long)s32.sig[7]) << 32);
126 case 3: set->sig[2] = s32.sig[4] | (((long)s32.sig[5]) << 32);
127 case 2: set->sig[1] = s32.sig[2] | (((long)s32.sig[3]) << 32);
128 case 1: set->sig[0] = s32.sig[0] | (((long)s32.sig[1]) << 32);
129 }
130 return 0;
131}
132
29e646df 133#define to_user_ptr(p) ptr_to_compat(p)
81e7009e
SR
134#define from_user_ptr(p) compat_ptr(p)
135
136static inline int save_general_regs(struct pt_regs *regs,
137 struct mcontext __user *frame)
138{
139 elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
140 int i;
141
1bd79336 142 WARN_ON(!FULL_REGS(regs));
401d1f02
DW
143
144 for (i = 0; i <= PT_RESULT; i ++) {
145 if (i == 14 && !FULL_REGS(regs))
146 i = 32;
81e7009e
SR
147 if (__put_user((unsigned int)gregs[i], &frame->mc_gregs[i]))
148 return -EFAULT;
401d1f02 149 }
81e7009e
SR
150 return 0;
151}
152
153static inline int restore_general_regs(struct pt_regs *regs,
154 struct mcontext __user *sr)
155{
156 elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
157 int i;
158
159 for (i = 0; i <= PT_RESULT; i++) {
160 if ((i == PT_MSR) || (i == PT_SOFTE))
161 continue;
162 if (__get_user(gregs[i], &sr->mc_gregs[i]))
163 return -EFAULT;
164 }
165 return 0;
166}
167
168#else /* CONFIG_PPC64 */
169
81e7009e
SR
170#define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
171
172static inline int put_sigset_t(sigset_t __user *uset, sigset_t *set)
173{
174 return copy_to_user(uset, set, sizeof(*uset));
175}
176
9b7cf8b4 177static inline int get_sigset_t(sigset_t *set, const sigset_t __user *uset)
81e7009e
SR
178{
179 return copy_from_user(set, uset, sizeof(*uset));
180}
181
29e646df
AV
182#define to_user_ptr(p) ((unsigned long)(p))
183#define from_user_ptr(p) ((void __user *)(p))
81e7009e
SR
184
185static inline int save_general_regs(struct pt_regs *regs,
186 struct mcontext __user *frame)
187{
1bd79336 188 WARN_ON(!FULL_REGS(regs));
81e7009e
SR
189 return __copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE);
190}
191
192static inline int restore_general_regs(struct pt_regs *regs,
193 struct mcontext __user *sr)
194{
195 /* copy up to but not including MSR */
196 if (__copy_from_user(regs, &sr->mc_gregs,
197 PT_MSR * sizeof(elf_greg_t)))
198 return -EFAULT;
199 /* copy from orig_r3 (the word after the MSR) up to the end */
200 if (__copy_from_user(&regs->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3],
201 GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t)))
202 return -EFAULT;
203 return 0;
204}
81e7009e
SR
205#endif
206
1da177e4
LT
207/*
208 * When we have signals to deliver, we set up on the
209 * user stack, going down from the original stack pointer:
a3f61dc0
BH
210 * an ABI gap of 56 words
211 * an mcontext struct
81e7009e
SR
212 * a sigcontext struct
213 * a gap of __SIGNAL_FRAMESIZE bytes
1da177e4 214 *
a3f61dc0
BH
215 * Each of these things must be a multiple of 16 bytes in size. The following
216 * structure represent all of this except the __SIGNAL_FRAMESIZE gap
1da177e4
LT
217 *
218 */
a3f61dc0
BH
219struct sigframe {
220 struct sigcontext sctx; /* the sigcontext */
81e7009e 221 struct mcontext mctx; /* all the register values */
2b0a576d
MN
222#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
223 struct sigcontext sctx_transact;
224 struct mcontext mctx_transact;
225#endif
1da177e4
LT
226 /*
227 * Programs using the rs6000/xcoff abi can save up to 19 gp
228 * regs and 18 fp regs below sp before decrementing it.
229 */
230 int abigap[56];
231};
232
233/* We use the mc_pad field for the signal return trampoline. */
234#define tramp mc_pad
235
236/*
237 * When we have rt signals to deliver, we set up on the
238 * user stack, going down from the original stack pointer:
81e7009e
SR
239 * one rt_sigframe struct (siginfo + ucontext + ABI gap)
240 * a gap of __SIGNAL_FRAMESIZE+16 bytes
241 * (the +16 is to get the siginfo and ucontext in the same
1da177e4
LT
242 * positions as in older kernels).
243 *
244 * Each of these things must be a multiple of 16 bytes in size.
245 *
246 */
81e7009e
SR
247struct rt_sigframe {
248#ifdef CONFIG_PPC64
249 compat_siginfo_t info;
250#else
251 struct siginfo info;
252#endif
253 struct ucontext uc;
2b0a576d
MN
254#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
255 struct ucontext uc_transact;
256#endif
1da177e4
LT
257 /*
258 * Programs using the rs6000/xcoff abi can save up to 19 gp
259 * regs and 18 fp regs below sp before decrementing it.
260 */
261 int abigap[56];
262};
263
6a274c08
MN
264#ifdef CONFIG_VSX
265unsigned long copy_fpr_to_user(void __user *to,
266 struct task_struct *task)
267{
de79f7b9 268 u64 buf[ELF_NFPREG];
6a274c08
MN
269 int i;
270
271 /* save FPR copy to local buffer then write to the thread_struct */
272 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
273 buf[i] = task->thread.TS_FPR(i);
de79f7b9 274 buf[i] = task->thread.fp_state.fpscr;
6a274c08
MN
275 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
276}
277
278unsigned long copy_fpr_from_user(struct task_struct *task,
279 void __user *from)
280{
de79f7b9 281 u64 buf[ELF_NFPREG];
6a274c08
MN
282 int i;
283
284 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
285 return 1;
286 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
287 task->thread.TS_FPR(i) = buf[i];
de79f7b9 288 task->thread.fp_state.fpscr = buf[i];
6a274c08
MN
289
290 return 0;
291}
292
293unsigned long copy_vsx_to_user(void __user *to,
294 struct task_struct *task)
295{
de79f7b9 296 u64 buf[ELF_NVSRHALFREG];
6a274c08
MN
297 int i;
298
299 /* save FPR copy to local buffer then write to the thread_struct */
300 for (i = 0; i < ELF_NVSRHALFREG; i++)
de79f7b9 301 buf[i] = task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
6a274c08
MN
302 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
303}
304
305unsigned long copy_vsx_from_user(struct task_struct *task,
306 void __user *from)
307{
de79f7b9 308 u64 buf[ELF_NVSRHALFREG];
6a274c08
MN
309 int i;
310
311 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
312 return 1;
313 for (i = 0; i < ELF_NVSRHALFREG ; i++)
de79f7b9 314 task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
6a274c08
MN
315 return 0;
316}
2b0a576d
MN
317
318#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
319unsigned long copy_transact_fpr_to_user(void __user *to,
320 struct task_struct *task)
321{
de79f7b9 322 u64 buf[ELF_NFPREG];
2b0a576d
MN
323 int i;
324
325 /* save FPR copy to local buffer then write to the thread_struct */
326 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
327 buf[i] = task->thread.TS_TRANS_FPR(i);
de79f7b9 328 buf[i] = task->thread.transact_fp.fpscr;
2b0a576d
MN
329 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
330}
331
332unsigned long copy_transact_fpr_from_user(struct task_struct *task,
333 void __user *from)
334{
de79f7b9 335 u64 buf[ELF_NFPREG];
2b0a576d
MN
336 int i;
337
338 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
339 return 1;
340 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
341 task->thread.TS_TRANS_FPR(i) = buf[i];
de79f7b9 342 task->thread.transact_fp.fpscr = buf[i];
2b0a576d
MN
343
344 return 0;
345}
346
347unsigned long copy_transact_vsx_to_user(void __user *to,
348 struct task_struct *task)
349{
de79f7b9 350 u64 buf[ELF_NVSRHALFREG];
2b0a576d
MN
351 int i;
352
353 /* save FPR copy to local buffer then write to the thread_struct */
354 for (i = 0; i < ELF_NVSRHALFREG; i++)
de79f7b9 355 buf[i] = task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET];
2b0a576d
MN
356 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
357}
358
359unsigned long copy_transact_vsx_from_user(struct task_struct *task,
360 void __user *from)
361{
de79f7b9 362 u64 buf[ELF_NVSRHALFREG];
2b0a576d
MN
363 int i;
364
365 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
366 return 1;
367 for (i = 0; i < ELF_NVSRHALFREG ; i++)
de79f7b9 368 task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = buf[i];
2b0a576d
MN
369 return 0;
370}
371#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
6a274c08
MN
372#else
373inline unsigned long copy_fpr_to_user(void __user *to,
374 struct task_struct *task)
375{
de79f7b9 376 return __copy_to_user(to, task->thread.fp_state.fpr,
6a274c08
MN
377 ELF_NFPREG * sizeof(double));
378}
379
380inline unsigned long copy_fpr_from_user(struct task_struct *task,
381 void __user *from)
382{
de79f7b9 383 return __copy_from_user(task->thread.fp_state.fpr, from,
6a274c08
MN
384 ELF_NFPREG * sizeof(double));
385}
2b0a576d
MN
386
387#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
388inline unsigned long copy_transact_fpr_to_user(void __user *to,
389 struct task_struct *task)
390{
de79f7b9 391 return __copy_to_user(to, task->thread.transact_fp.fpr,
2b0a576d
MN
392 ELF_NFPREG * sizeof(double));
393}
394
395inline unsigned long copy_transact_fpr_from_user(struct task_struct *task,
396 void __user *from)
397{
de79f7b9 398 return __copy_from_user(task->thread.transact_fp.fpr, from,
2b0a576d
MN
399 ELF_NFPREG * sizeof(double));
400}
401#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
6a274c08
MN
402#endif
403
1da177e4
LT
404/*
405 * Save the current user registers on the user stack.
81e7009e
SR
406 * We only save the altivec/spe registers if the process has used
407 * altivec/spe instructions at some point.
1da177e4 408 */
81e7009e 409static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
1d25f11f
MN
410 struct mcontext __user *tm_frame, int sigret,
411 int ctx_has_vsx_region)
1da177e4 412{
9e751186
MN
413 unsigned long msr = regs->msr;
414
1da177e4
LT
415 /* Make sure floating point registers are stored in regs */
416 flush_fp_to_thread(current);
417
c6e6771b
MN
418 /* save general registers */
419 if (save_general_regs(regs, frame))
1da177e4
LT
420 return 1;
421
1da177e4
LT
422#ifdef CONFIG_ALTIVEC
423 /* save altivec registers */
424 if (current->thread.used_vr) {
425 flush_altivec_to_thread(current);
de79f7b9 426 if (__copy_to_user(&frame->mc_vregs, &current->thread.vr_state,
81e7009e 427 ELF_NVRREG * sizeof(vector128)))
1da177e4
LT
428 return 1;
429 /* set MSR_VEC in the saved MSR value to indicate that
430 frame->mc_vregs contains valid data */
9e751186 431 msr |= MSR_VEC;
1da177e4
LT
432 }
433 /* else assert((regs->msr & MSR_VEC) == 0) */
434
435 /* We always copy to/from vrsave, it's 0 if we don't have or don't
436 * use altivec. Since VSCR only contains 32 bits saved in the least
437 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
438 * most significant bits of that same vector. --BenH
408a7e08 439 * Note that the current VRSAVE value is in the SPR at this point.
1da177e4 440 */
408a7e08
PM
441 if (cpu_has_feature(CPU_FTR_ALTIVEC))
442 current->thread.vrsave = mfspr(SPRN_VRSAVE);
1da177e4
LT
443 if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32]))
444 return 1;
445#endif /* CONFIG_ALTIVEC */
6a274c08 446 if (copy_fpr_to_user(&frame->mc_fregs, current))
c6e6771b 447 return 1;
ec67ad82
MN
448
449 /*
450 * Clear the MSR VSX bit to indicate there is no valid state attached
451 * to this context, except in the specific case below where we set it.
452 */
453 msr &= ~MSR_VSX;
6a274c08 454#ifdef CONFIG_VSX
ce48b210
MN
455 /*
456 * Copy VSR 0-31 upper half from thread_struct to local
457 * buffer, then write that to userspace. Also set MSR_VSX in
458 * the saved MSR value to indicate that frame->mc_vregs
459 * contains valid data
460 */
16c29d18 461 if (current->thread.used_vsr && ctx_has_vsx_region) {
7c292170 462 __giveup_vsx(current);
6a274c08 463 if (copy_vsx_to_user(&frame->mc_vsregs, current))
ce48b210
MN
464 return 1;
465 msr |= MSR_VSX;
ec67ad82 466 }
c6e6771b 467#endif /* CONFIG_VSX */
81e7009e
SR
468#ifdef CONFIG_SPE
469 /* save spe registers */
470 if (current->thread.used_spe) {
471 flush_spe_to_thread(current);
472 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
473 ELF_NEVRREG * sizeof(u32)))
474 return 1;
475 /* set MSR_SPE in the saved MSR value to indicate that
476 frame->mc_vregs contains valid data */
9e751186 477 msr |= MSR_SPE;
81e7009e
SR
478 }
479 /* else assert((regs->msr & MSR_SPE) == 0) */
480
481 /* We always copy to/from spefscr */
482 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
483 return 1;
484#endif /* CONFIG_SPE */
485
9e751186
MN
486 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
487 return 1;
1d25f11f
MN
488 /* We need to write 0 the MSR top 32 bits in the tm frame so that we
489 * can check it on the restore to see if TM is active
490 */
491 if (tm_frame && __put_user(0, &tm_frame->mc_gregs[PT_MSR]))
492 return 1;
493
1da177e4
LT
494 if (sigret) {
495 /* Set up the sigreturn trampoline: li r0,sigret; sc */
496 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
497 || __put_user(0x44000002UL, &frame->tramp[1]))
498 return 1;
499 flush_icache_range((unsigned long) &frame->tramp[0],
500 (unsigned long) &frame->tramp[2]);
501 }
502
503 return 0;
504}
505
2b0a576d
MN
506#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
507/*
508 * Save the current user registers on the user stack.
509 * We only save the altivec/spe registers if the process has used
510 * altivec/spe instructions at some point.
511 * We also save the transactional registers to a second ucontext in the
512 * frame.
513 *
514 * See save_user_regs() and signal_64.c:setup_tm_sigcontexts().
515 */
516static int save_tm_user_regs(struct pt_regs *regs,
517 struct mcontext __user *frame,
518 struct mcontext __user *tm_frame, int sigret)
519{
520 unsigned long msr = regs->msr;
521
d31626f7
PM
522 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
523 * just indicates to userland that we were doing a transaction, but we
524 * don't want to return in transactional state. This also ensures
525 * that flush_fp_to_thread won't set TIF_RESTORE_TM again.
526 */
527 regs->msr &= ~MSR_TS_MASK;
528
2b0a576d
MN
529 /* Make sure floating point registers are stored in regs */
530 flush_fp_to_thread(current);
531
532 /* Save both sets of general registers */
533 if (save_general_regs(&current->thread.ckpt_regs, frame)
534 || save_general_regs(regs, tm_frame))
535 return 1;
536
537 /* Stash the top half of the 64bit MSR into the 32bit MSR word
538 * of the transactional mcontext. This way we have a backward-compatible
539 * MSR in the 'normal' (checkpointed) mcontext and additionally one can
540 * also look at what type of transaction (T or S) was active at the
541 * time of the signal.
542 */
543 if (__put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR]))
544 return 1;
545
546#ifdef CONFIG_ALTIVEC
547 /* save altivec registers */
548 if (current->thread.used_vr) {
549 flush_altivec_to_thread(current);
de79f7b9 550 if (__copy_to_user(&frame->mc_vregs, &current->thread.vr_state,
2b0a576d
MN
551 ELF_NVRREG * sizeof(vector128)))
552 return 1;
553 if (msr & MSR_VEC) {
554 if (__copy_to_user(&tm_frame->mc_vregs,
de79f7b9 555 &current->thread.transact_vr,
2b0a576d
MN
556 ELF_NVRREG * sizeof(vector128)))
557 return 1;
558 } else {
559 if (__copy_to_user(&tm_frame->mc_vregs,
de79f7b9 560 &current->thread.vr_state,
2b0a576d
MN
561 ELF_NVRREG * sizeof(vector128)))
562 return 1;
563 }
564
565 /* set MSR_VEC in the saved MSR value to indicate that
566 * frame->mc_vregs contains valid data
567 */
568 msr |= MSR_VEC;
569 }
570
571 /* We always copy to/from vrsave, it's 0 if we don't have or don't
572 * use altivec. Since VSCR only contains 32 bits saved in the least
573 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
574 * most significant bits of that same vector. --BenH
575 */
408a7e08
PM
576 if (cpu_has_feature(CPU_FTR_ALTIVEC))
577 current->thread.vrsave = mfspr(SPRN_VRSAVE);
2b0a576d
MN
578 if (__put_user(current->thread.vrsave,
579 (u32 __user *)&frame->mc_vregs[32]))
580 return 1;
581 if (msr & MSR_VEC) {
582 if (__put_user(current->thread.transact_vrsave,
583 (u32 __user *)&tm_frame->mc_vregs[32]))
584 return 1;
585 } else {
586 if (__put_user(current->thread.vrsave,
587 (u32 __user *)&tm_frame->mc_vregs[32]))
588 return 1;
589 }
590#endif /* CONFIG_ALTIVEC */
591
592 if (copy_fpr_to_user(&frame->mc_fregs, current))
593 return 1;
594 if (msr & MSR_FP) {
595 if (copy_transact_fpr_to_user(&tm_frame->mc_fregs, current))
596 return 1;
597 } else {
598 if (copy_fpr_to_user(&tm_frame->mc_fregs, current))
599 return 1;
600 }
601
602#ifdef CONFIG_VSX
603 /*
604 * Copy VSR 0-31 upper half from thread_struct to local
605 * buffer, then write that to userspace. Also set MSR_VSX in
606 * the saved MSR value to indicate that frame->mc_vregs
607 * contains valid data
608 */
609 if (current->thread.used_vsr) {
610 __giveup_vsx(current);
611 if (copy_vsx_to_user(&frame->mc_vsregs, current))
612 return 1;
613 if (msr & MSR_VSX) {
614 if (copy_transact_vsx_to_user(&tm_frame->mc_vsregs,
615 current))
616 return 1;
617 } else {
618 if (copy_vsx_to_user(&tm_frame->mc_vsregs, current))
619 return 1;
620 }
621
622 msr |= MSR_VSX;
623 }
624#endif /* CONFIG_VSX */
625#ifdef CONFIG_SPE
626 /* SPE regs are not checkpointed with TM, so this section is
627 * simply the same as in save_user_regs().
628 */
629 if (current->thread.used_spe) {
630 flush_spe_to_thread(current);
631 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
632 ELF_NEVRREG * sizeof(u32)))
633 return 1;
634 /* set MSR_SPE in the saved MSR value to indicate that
635 * frame->mc_vregs contains valid data */
636 msr |= MSR_SPE;
637 }
638
639 /* We always copy to/from spefscr */
640 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
641 return 1;
642#endif /* CONFIG_SPE */
643
644 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
645 return 1;
646 if (sigret) {
647 /* Set up the sigreturn trampoline: li r0,sigret; sc */
648 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
649 || __put_user(0x44000002UL, &frame->tramp[1]))
650 return 1;
651 flush_icache_range((unsigned long) &frame->tramp[0],
652 (unsigned long) &frame->tramp[2]);
653 }
654
655 return 0;
656}
657#endif
658
1da177e4
LT
659/*
660 * Restore the current user register values from the user stack,
661 * (except for MSR).
662 */
663static long restore_user_regs(struct pt_regs *regs,
81e7009e 664 struct mcontext __user *sr, int sig)
1da177e4 665{
81e7009e 666 long err;
1da177e4 667 unsigned int save_r2 = 0;
1da177e4 668 unsigned long msr;
c6e6771b 669#ifdef CONFIG_VSX
c6e6771b
MN
670 int i;
671#endif
1da177e4
LT
672
673 /*
674 * restore general registers but not including MSR or SOFTE. Also
675 * take care of keeping r2 (TLS) intact if not a signal
676 */
677 if (!sig)
678 save_r2 = (unsigned int)regs->gpr[2];
81e7009e 679 err = restore_general_regs(regs, sr);
9a81c16b 680 regs->trap = 0;
fab5db97 681 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
1da177e4
LT
682 if (!sig)
683 regs->gpr[2] = (unsigned long) save_r2;
684 if (err)
685 return 1;
686
fab5db97
PM
687 /* if doing signal return, restore the previous little-endian mode */
688 if (sig)
689 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
690
5388fb10
PM
691 /*
692 * Do this before updating the thread state in
693 * current->thread.fpr/vr/evr. That way, if we get preempted
694 * and another task grabs the FPU/Altivec/SPE, it won't be
695 * tempted to save the current CPU state into the thread_struct
696 * and corrupt what we are writing there.
697 */
698 discard_lazy_cpu_state();
699
1da177e4 700#ifdef CONFIG_ALTIVEC
c6e6771b
MN
701 /*
702 * Force the process to reload the altivec registers from
703 * current->thread when it next does altivec instructions
704 */
1da177e4 705 regs->msr &= ~MSR_VEC;
fab5db97 706 if (msr & MSR_VEC) {
1da177e4 707 /* restore altivec registers from the stack */
de79f7b9 708 if (__copy_from_user(&current->thread.vr_state, &sr->mc_vregs,
1da177e4
LT
709 sizeof(sr->mc_vregs)))
710 return 1;
711 } else if (current->thread.used_vr)
de79f7b9
PM
712 memset(&current->thread.vr_state, 0,
713 ELF_NVRREG * sizeof(vector128));
1da177e4
LT
714
715 /* Always get VRSAVE back */
716 if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
717 return 1;
408a7e08
PM
718 if (cpu_has_feature(CPU_FTR_ALTIVEC))
719 mtspr(SPRN_VRSAVE, current->thread.vrsave);
1da177e4 720#endif /* CONFIG_ALTIVEC */
6a274c08
MN
721 if (copy_fpr_from_user(current, &sr->mc_fregs))
722 return 1;
1da177e4 723
c6e6771b 724#ifdef CONFIG_VSX
ce48b210
MN
725 /*
726 * Force the process to reload the VSX registers from
727 * current->thread when it next does VSX instruction.
728 */
729 regs->msr &= ~MSR_VSX;
730 if (msr & MSR_VSX) {
731 /*
732 * Restore altivec registers from the stack to a local
733 * buffer, then write this out to the thread_struct
734 */
6a274c08 735 if (copy_vsx_from_user(current, &sr->mc_vsregs))
ce48b210 736 return 1;
ce48b210
MN
737 } else if (current->thread.used_vsr)
738 for (i = 0; i < 32 ; i++)
de79f7b9 739 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
c6e6771b
MN
740#endif /* CONFIG_VSX */
741 /*
742 * force the process to reload the FP registers from
743 * current->thread when it next does FP instructions
744 */
745 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
746
81e7009e
SR
747#ifdef CONFIG_SPE
748 /* force the process to reload the spe registers from
749 current->thread when it next does spe instructions */
750 regs->msr &= ~MSR_SPE;
fab5db97 751 if (msr & MSR_SPE) {
81e7009e
SR
752 /* restore spe registers from the stack */
753 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
754 ELF_NEVRREG * sizeof(u32)))
755 return 1;
756 } else if (current->thread.used_spe)
757 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
758
759 /* Always get SPEFSCR back */
760 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs + ELF_NEVRREG))
761 return 1;
762#endif /* CONFIG_SPE */
763
1da177e4
LT
764 return 0;
765}
766
2b0a576d
MN
767#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
768/*
769 * Restore the current user register values from the user stack, except for
770 * MSR, and recheckpoint the original checkpointed register state for processes
771 * in transactions.
772 */
773static long restore_tm_user_regs(struct pt_regs *regs,
774 struct mcontext __user *sr,
775 struct mcontext __user *tm_sr)
776{
777 long err;
2c27a18f 778 unsigned long msr, msr_hi;
2b0a576d
MN
779#ifdef CONFIG_VSX
780 int i;
781#endif
782
783 /*
784 * restore general registers but not including MSR or SOFTE. Also
785 * take care of keeping r2 (TLS) intact if not a signal.
786 * See comment in signal_64.c:restore_tm_sigcontexts();
787 * TFHAR is restored from the checkpointed NIP; TEXASR and TFIAR
788 * were set by the signal delivery.
789 */
790 err = restore_general_regs(regs, tm_sr);
791 err |= restore_general_regs(&current->thread.ckpt_regs, sr);
792
793 err |= __get_user(current->thread.tm_tfhar, &sr->mc_gregs[PT_NIP]);
794
795 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
796 if (err)
797 return 1;
798
799 /* Restore the previous little-endian mode */
800 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
801
802 /*
803 * Do this before updating the thread state in
804 * current->thread.fpr/vr/evr. That way, if we get preempted
805 * and another task grabs the FPU/Altivec/SPE, it won't be
806 * tempted to save the current CPU state into the thread_struct
807 * and corrupt what we are writing there.
808 */
809 discard_lazy_cpu_state();
810
811#ifdef CONFIG_ALTIVEC
812 regs->msr &= ~MSR_VEC;
813 if (msr & MSR_VEC) {
814 /* restore altivec registers from the stack */
de79f7b9 815 if (__copy_from_user(&current->thread.vr_state, &sr->mc_vregs,
2b0a576d 816 sizeof(sr->mc_vregs)) ||
de79f7b9 817 __copy_from_user(&current->thread.transact_vr,
2b0a576d
MN
818 &tm_sr->mc_vregs,
819 sizeof(sr->mc_vregs)))
820 return 1;
821 } else if (current->thread.used_vr) {
de79f7b9
PM
822 memset(&current->thread.vr_state, 0,
823 ELF_NVRREG * sizeof(vector128));
824 memset(&current->thread.transact_vr, 0,
2b0a576d
MN
825 ELF_NVRREG * sizeof(vector128));
826 }
827
828 /* Always get VRSAVE back */
829 if (__get_user(current->thread.vrsave,
830 (u32 __user *)&sr->mc_vregs[32]) ||
831 __get_user(current->thread.transact_vrsave,
832 (u32 __user *)&tm_sr->mc_vregs[32]))
833 return 1;
408a7e08
PM
834 if (cpu_has_feature(CPU_FTR_ALTIVEC))
835 mtspr(SPRN_VRSAVE, current->thread.vrsave);
2b0a576d
MN
836#endif /* CONFIG_ALTIVEC */
837
838 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
839
840 if (copy_fpr_from_user(current, &sr->mc_fregs) ||
841 copy_transact_fpr_from_user(current, &tm_sr->mc_fregs))
842 return 1;
843
844#ifdef CONFIG_VSX
845 regs->msr &= ~MSR_VSX;
846 if (msr & MSR_VSX) {
847 /*
848 * Restore altivec registers from the stack to a local
849 * buffer, then write this out to the thread_struct
850 */
851 if (copy_vsx_from_user(current, &sr->mc_vsregs) ||
852 copy_transact_vsx_from_user(current, &tm_sr->mc_vsregs))
853 return 1;
854 } else if (current->thread.used_vsr)
855 for (i = 0; i < 32 ; i++) {
de79f7b9
PM
856 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
857 current->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = 0;
2b0a576d
MN
858 }
859#endif /* CONFIG_VSX */
860
861#ifdef CONFIG_SPE
862 /* SPE regs are not checkpointed with TM, so this section is
863 * simply the same as in restore_user_regs().
864 */
865 regs->msr &= ~MSR_SPE;
866 if (msr & MSR_SPE) {
867 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
868 ELF_NEVRREG * sizeof(u32)))
869 return 1;
870 } else if (current->thread.used_spe)
871 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
872
873 /* Always get SPEFSCR back */
874 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs
875 + ELF_NEVRREG))
876 return 1;
877#endif /* CONFIG_SPE */
878
879 /* Now, recheckpoint. This loads up all of the checkpointed (older)
880 * registers, including FP and V[S]Rs. After recheckpointing, the
881 * transactional versions should be loaded.
882 */
883 tm_enable();
e6b8fd02
MN
884 /* Make sure the transaction is marked as failed */
885 current->thread.tm_texasr |= TEXASR_FS;
2b0a576d
MN
886 /* This loads the checkpointed FP/VEC state, if used */
887 tm_recheckpoint(&current->thread, msr);
2c27a18f
MN
888 /* Get the top half of the MSR */
889 if (__get_user(msr_hi, &tm_sr->mc_gregs[PT_MSR]))
890 return 1;
891 /* Pull in MSR TM from user context */
892 regs->msr = (regs->msr & ~MSR_TS_MASK) | ((msr_hi<<32) & MSR_TS_MASK);
2b0a576d
MN
893
894 /* This loads the speculative FP/VEC state, if used */
895 if (msr & MSR_FP) {
896 do_load_up_transact_fpu(&current->thread);
897 regs->msr |= (MSR_FP | current->thread.fpexc_mode);
898 }
f110c0c1 899#ifdef CONFIG_ALTIVEC
2b0a576d
MN
900 if (msr & MSR_VEC) {
901 do_load_up_transact_altivec(&current->thread);
902 regs->msr |= MSR_VEC;
903 }
f110c0c1 904#endif
2b0a576d
MN
905
906 return 0;
907}
908#endif
909
81e7009e 910#ifdef CONFIG_PPC64
ce395960 911int copy_siginfo_to_user32(struct compat_siginfo __user *d, const siginfo_t *s)
1da177e4
LT
912{
913 int err;
914
915 if (!access_ok (VERIFY_WRITE, d, sizeof(*d)))
916 return -EFAULT;
917
918 /* If you change siginfo_t structure, please be sure
919 * this code is fixed accordingly.
920 * It should never copy any pad contained in the structure
921 * to avoid security leaks, but must copy the generic
922 * 3 ints plus the relevant union member.
923 * This routine must convert siginfo from 64bit to 32bit as well
924 * at the same time.
925 */
926 err = __put_user(s->si_signo, &d->si_signo);
927 err |= __put_user(s->si_errno, &d->si_errno);
928 err |= __put_user((short)s->si_code, &d->si_code);
929 if (s->si_code < 0)
930 err |= __copy_to_user(&d->_sifields._pad, &s->_sifields._pad,
931 SI_PAD_SIZE32);
932 else switch(s->si_code >> 16) {
933 case __SI_CHLD >> 16:
934 err |= __put_user(s->si_pid, &d->si_pid);
935 err |= __put_user(s->si_uid, &d->si_uid);
936 err |= __put_user(s->si_utime, &d->si_utime);
937 err |= __put_user(s->si_stime, &d->si_stime);
938 err |= __put_user(s->si_status, &d->si_status);
939 break;
940 case __SI_FAULT >> 16:
941 err |= __put_user((unsigned int)(unsigned long)s->si_addr,
942 &d->si_addr);
943 break;
944 case __SI_POLL >> 16:
945 err |= __put_user(s->si_band, &d->si_band);
946 err |= __put_user(s->si_fd, &d->si_fd);
947 break;
948 case __SI_TIMER >> 16:
949 err |= __put_user(s->si_tid, &d->si_tid);
950 err |= __put_user(s->si_overrun, &d->si_overrun);
951 err |= __put_user(s->si_int, &d->si_int);
952 break;
953 case __SI_RT >> 16: /* This is not generated by the kernel as of now. */
954 case __SI_MESGQ >> 16:
955 err |= __put_user(s->si_int, &d->si_int);
956 /* fallthrough */
957 case __SI_KILL >> 16:
958 default:
959 err |= __put_user(s->si_pid, &d->si_pid);
960 err |= __put_user(s->si_uid, &d->si_uid);
961 break;
962 }
963 return err;
964}
965
81e7009e
SR
966#define copy_siginfo_to_user copy_siginfo_to_user32
967
9c0c44db
RM
968int copy_siginfo_from_user32(siginfo_t *to, struct compat_siginfo __user *from)
969{
970 memset(to, 0, sizeof *to);
971
972 if (copy_from_user(to, from, 3*sizeof(int)) ||
973 copy_from_user(to->_sifields._pad,
974 from->_sifields._pad, SI_PAD_SIZE32))
975 return -EFAULT;
976
977 return 0;
978}
81e7009e 979#endif /* CONFIG_PPC64 */
1da177e4 980
1da177e4
LT
981/*
982 * Set up a signal frame for a "real-time" signal handler
983 * (one which gets siginfo).
984 */
f478f543 985int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
81e7009e 986 siginfo_t *info, sigset_t *oldset,
a3f61dc0 987 struct pt_regs *regs)
1da177e4 988{
81e7009e
SR
989 struct rt_sigframe __user *rt_sf;
990 struct mcontext __user *frame;
1d25f11f 991 struct mcontext __user *tm_frame = NULL;
d0c3d534 992 void __user *addr;
a3f61dc0 993 unsigned long newsp = 0;
2b0a576d
MN
994 int sigret;
995 unsigned long tramp;
1da177e4
LT
996
997 /* Set up Signal Frame */
998 /* Put a Real Time Context onto stack */
2b3f8e87 999 rt_sf = get_sigframe(ka, get_tm_stackpointer(regs), sizeof(*rt_sf), 1);
d0c3d534 1000 addr = rt_sf;
a3f61dc0 1001 if (unlikely(rt_sf == NULL))
1da177e4
LT
1002 goto badframe;
1003
1da177e4 1004 /* Put the siginfo & fill in most of the ucontext */
81e7009e 1005 if (copy_siginfo_to_user(&rt_sf->info, info)
1da177e4 1006 || __put_user(0, &rt_sf->uc.uc_flags)
7cce2465 1007 || __save_altstack(&rt_sf->uc.uc_stack, regs->gpr[1])
81e7009e
SR
1008 || __put_user(to_user_ptr(&rt_sf->uc.uc_mcontext),
1009 &rt_sf->uc.uc_regs)
1010 || put_sigset_t(&rt_sf->uc.uc_sigmask, oldset))
1da177e4
LT
1011 goto badframe;
1012
1013 /* Save user registers on the stack */
1014 frame = &rt_sf->uc.uc_mcontext;
d0c3d534 1015 addr = frame;
a5bba930 1016 if (vdso32_rt_sigtramp && current->mm->context.vdso_base) {
2b0a576d
MN
1017 sigret = 0;
1018 tramp = current->mm->context.vdso_base + vdso32_rt_sigtramp;
a7f290da 1019 } else {
2b0a576d
MN
1020 sigret = __NR_rt_sigreturn;
1021 tramp = (unsigned long) frame->tramp;
1022 }
1023
1024#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1d25f11f 1025 tm_frame = &rt_sf->uc_transact.uc_mcontext;
2b0a576d 1026 if (MSR_TM_ACTIVE(regs->msr)) {
d765ff23
PM
1027 if (__put_user((unsigned long)&rt_sf->uc_transact,
1028 &rt_sf->uc.uc_link) ||
1029 __put_user((unsigned long)tm_frame,
1030 &rt_sf->uc_transact.uc_regs))
1031 goto badframe;
1d25f11f 1032 if (save_tm_user_regs(regs, frame, tm_frame, sigret))
1da177e4 1033 goto badframe;
1da177e4 1034 }
2b0a576d
MN
1035 else
1036#endif
1d25f11f 1037 {
d765ff23
PM
1038 if (__put_user(0, &rt_sf->uc.uc_link))
1039 goto badframe;
1d25f11f 1040 if (save_user_regs(regs, frame, tm_frame, sigret, 1))
2b0a576d 1041 goto badframe;
1d25f11f 1042 }
2b0a576d
MN
1043 regs->link = tramp;
1044
de79f7b9 1045 current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
cc657f53 1046
a3f61dc0
BH
1047 /* create a stack frame for the caller of the handler */
1048 newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16);
d0c3d534 1049 addr = (void __user *)regs->gpr[1];
e2b55306 1050 if (put_user(regs->gpr[1], (u32 __user *)newsp))
81e7009e 1051 goto badframe;
a3f61dc0
BH
1052
1053 /* Fill registers for signal handler */
81e7009e 1054 regs->gpr[1] = newsp;
1da177e4
LT
1055 regs->gpr[3] = sig;
1056 regs->gpr[4] = (unsigned long) &rt_sf->info;
1057 regs->gpr[5] = (unsigned long) &rt_sf->uc;
1058 regs->gpr[6] = (unsigned long) rt_sf;
1059 regs->nip = (unsigned long) ka->sa.sa_handler;
e871c6bb 1060 /* enter the signal handler in native-endian mode */
fab5db97 1061 regs->msr &= ~MSR_LE;
e871c6bb 1062 regs->msr |= (MSR_KERNEL & MSR_LE);
1da177e4
LT
1063 return 1;
1064
1065badframe:
81e7009e 1066#ifdef DEBUG_SIG
1da177e4
LT
1067 printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n",
1068 regs, frame, newsp);
1069#endif
76462232
CD
1070 if (show_unhandled_signals)
1071 printk_ratelimited(KERN_INFO
1072 "%s[%d]: bad frame in handle_rt_signal32: "
1073 "%p nip %08lx lr %08lx\n",
1074 current->comm, current->pid,
1075 addr, regs->nip, regs->link);
d0c3d534 1076
1da177e4
LT
1077 force_sigsegv(sig, current);
1078 return 0;
1079}
1080
81e7009e 1081static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig)
1da177e4 1082{
1da177e4 1083 sigset_t set;
81e7009e
SR
1084 struct mcontext __user *mcp;
1085
1086 if (get_sigset_t(&set, &ucp->uc_sigmask))
1087 return -EFAULT;
1088#ifdef CONFIG_PPC64
1089 {
1090 u32 cmcp;
1da177e4 1091
81e7009e
SR
1092 if (__get_user(cmcp, &ucp->uc_regs))
1093 return -EFAULT;
1094 mcp = (struct mcontext __user *)(u64)cmcp;
7c85d1f9 1095 /* no need to check access_ok(mcp), since mcp < 4GB */
81e7009e
SR
1096 }
1097#else
1098 if (__get_user(mcp, &ucp->uc_regs))
1da177e4 1099 return -EFAULT;
7c85d1f9
PM
1100 if (!access_ok(VERIFY_READ, mcp, sizeof(*mcp)))
1101 return -EFAULT;
81e7009e 1102#endif
17440f17 1103 set_current_blocked(&set);
81e7009e 1104 if (restore_user_regs(regs, mcp, sig))
1da177e4
LT
1105 return -EFAULT;
1106
1107 return 0;
1108}
1109
2b0a576d
MN
1110#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1111static int do_setcontext_tm(struct ucontext __user *ucp,
1112 struct ucontext __user *tm_ucp,
1113 struct pt_regs *regs)
1114{
1115 sigset_t set;
1116 struct mcontext __user *mcp;
1117 struct mcontext __user *tm_mcp;
1118 u32 cmcp;
1119 u32 tm_cmcp;
1120
1121 if (get_sigset_t(&set, &ucp->uc_sigmask))
1122 return -EFAULT;
1123
1124 if (__get_user(cmcp, &ucp->uc_regs) ||
1125 __get_user(tm_cmcp, &tm_ucp->uc_regs))
1126 return -EFAULT;
1127 mcp = (struct mcontext __user *)(u64)cmcp;
1128 tm_mcp = (struct mcontext __user *)(u64)tm_cmcp;
1129 /* no need to check access_ok(mcp), since mcp < 4GB */
1130
1131 set_current_blocked(&set);
1132 if (restore_tm_user_regs(regs, mcp, tm_mcp))
1133 return -EFAULT;
1134
1135 return 0;
1136}
1137#endif
1138
81e7009e 1139long sys_swapcontext(struct ucontext __user *old_ctx,
1bd79336
PM
1140 struct ucontext __user *new_ctx,
1141 int ctx_size, int r6, int r7, int r8, struct pt_regs *regs)
1da177e4
LT
1142{
1143 unsigned char tmp;
16c29d18 1144 int ctx_has_vsx_region = 0;
1da177e4 1145
c1cb299e
MN
1146#ifdef CONFIG_PPC64
1147 unsigned long new_msr = 0;
1148
77eb50ae
AS
1149 if (new_ctx) {
1150 struct mcontext __user *mcp;
1151 u32 cmcp;
1152
1153 /*
1154 * Get pointer to the real mcontext. No need for
1155 * access_ok since we are dealing with compat
1156 * pointers.
1157 */
1158 if (__get_user(cmcp, &new_ctx->uc_regs))
1159 return -EFAULT;
1160 mcp = (struct mcontext __user *)(u64)cmcp;
1161 if (__get_user(new_msr, &mcp->mc_gregs[PT_MSR]))
1162 return -EFAULT;
1163 }
c1cb299e
MN
1164 /*
1165 * Check that the context is not smaller than the original
1166 * size (with VMX but without VSX)
1167 */
1168 if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
1169 return -EINVAL;
1170 /*
1171 * If the new context state sets the MSR VSX bits but
1172 * it doesn't provide VSX state.
1173 */
1174 if ((ctx_size < sizeof(struct ucontext)) &&
1175 (new_msr & MSR_VSX))
1176 return -EINVAL;
16c29d18
MN
1177 /* Does the context have enough room to store VSX data? */
1178 if (ctx_size >= sizeof(struct ucontext))
1179 ctx_has_vsx_region = 1;
c1cb299e 1180#else
1da177e4
LT
1181 /* Context size is for future use. Right now, we only make sure
1182 * we are passed something we understand
1183 */
81e7009e 1184 if (ctx_size < sizeof(struct ucontext))
1da177e4 1185 return -EINVAL;
c1cb299e 1186#endif
1da177e4 1187 if (old_ctx != NULL) {
1c9bb1a0
PM
1188 struct mcontext __user *mctx;
1189
1190 /*
1191 * old_ctx might not be 16-byte aligned, in which
1192 * case old_ctx->uc_mcontext won't be either.
1193 * Because we have the old_ctx->uc_pad2 field
1194 * before old_ctx->uc_mcontext, we need to round down
1195 * from &old_ctx->uc_mcontext to a 16-byte boundary.
1196 */
1197 mctx = (struct mcontext __user *)
1198 ((unsigned long) &old_ctx->uc_mcontext & ~0xfUL);
16c29d18 1199 if (!access_ok(VERIFY_WRITE, old_ctx, ctx_size)
1d25f11f 1200 || save_user_regs(regs, mctx, NULL, 0, ctx_has_vsx_region)
81e7009e 1201 || put_sigset_t(&old_ctx->uc_sigmask, &current->blocked)
1c9bb1a0 1202 || __put_user(to_user_ptr(mctx), &old_ctx->uc_regs))
1da177e4
LT
1203 return -EFAULT;
1204 }
1205 if (new_ctx == NULL)
1206 return 0;
16c29d18 1207 if (!access_ok(VERIFY_READ, new_ctx, ctx_size)
1da177e4 1208 || __get_user(tmp, (u8 __user *) new_ctx)
16c29d18 1209 || __get_user(tmp, (u8 __user *) new_ctx + ctx_size - 1))
1da177e4
LT
1210 return -EFAULT;
1211
1212 /*
1213 * If we get a fault copying the context into the kernel's
1214 * image of the user's registers, we can't just return -EFAULT
1215 * because the user's registers will be corrupted. For instance
1216 * the NIP value may have been updated but not some of the
1217 * other registers. Given that we have done the access_ok
1218 * and successfully read the first and last bytes of the region
1219 * above, this should only happen in an out-of-memory situation
1220 * or if another thread unmaps the region containing the context.
1221 * We kill the task with a SIGSEGV in this situation.
1222 */
81e7009e 1223 if (do_setcontext(new_ctx, regs, 0))
1da177e4 1224 do_exit(SIGSEGV);
401d1f02
DW
1225
1226 set_thread_flag(TIF_RESTOREALL);
1da177e4
LT
1227 return 0;
1228}
1229
81e7009e 1230long sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1da177e4
LT
1231 struct pt_regs *regs)
1232{
81e7009e 1233 struct rt_sigframe __user *rt_sf;
2b0a576d
MN
1234#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1235 struct ucontext __user *uc_transact;
1236 unsigned long msr_hi;
1237 unsigned long tmp;
1238 int tm_restore = 0;
1239#endif
1da177e4
LT
1240 /* Always make any pending restarted system calls return -EINTR */
1241 current_thread_info()->restart_block.fn = do_no_restart_syscall;
1242
81e7009e
SR
1243 rt_sf = (struct rt_sigframe __user *)
1244 (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16);
1da177e4
LT
1245 if (!access_ok(VERIFY_READ, rt_sf, sizeof(*rt_sf)))
1246 goto bad;
2b0a576d
MN
1247#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1248 if (__get_user(tmp, &rt_sf->uc.uc_link))
1249 goto bad;
1250 uc_transact = (struct ucontext __user *)(uintptr_t)tmp;
1251 if (uc_transact) {
1252 u32 cmcp;
1253 struct mcontext __user *mcp;
1254
1255 if (__get_user(cmcp, &uc_transact->uc_regs))
1256 return -EFAULT;
1257 mcp = (struct mcontext __user *)(u64)cmcp;
1258 /* The top 32 bits of the MSR are stashed in the transactional
1259 * ucontext. */
1260 if (__get_user(msr_hi, &mcp->mc_gregs[PT_MSR]))
1261 goto bad;
1262
55e43418 1263 if (MSR_TM_ACTIVE(msr_hi<<32)) {
2b0a576d
MN
1264 /* We only recheckpoint on return if we're
1265 * transaction.
1266 */
1267 tm_restore = 1;
1268 if (do_setcontext_tm(&rt_sf->uc, uc_transact, regs))
1269 goto bad;
1270 }
1271 }
1272 if (!tm_restore)
1273 /* Fall through, for non-TM restore */
1274#endif
81e7009e 1275 if (do_setcontext(&rt_sf->uc, regs, 1))
1da177e4
LT
1276 goto bad;
1277
1278 /*
1279 * It's not clear whether or why it is desirable to save the
1280 * sigaltstack setting on signal delivery and restore it on
1281 * signal return. But other architectures do this and we have
1282 * always done it up until now so it is probably better not to
1283 * change it. -- paulus
81e7009e
SR
1284 */
1285#ifdef CONFIG_PPC64
7cce2465
AV
1286 if (compat_restore_altstack(&rt_sf->uc.uc_stack))
1287 goto bad;
81e7009e 1288#else
7cce2465
AV
1289 if (restore_altstack(&rt_sf->uc.uc_stack))
1290 goto bad;
81e7009e 1291#endif
401d1f02
DW
1292 set_thread_flag(TIF_RESTOREALL);
1293 return 0;
1da177e4
LT
1294
1295 bad:
76462232
CD
1296 if (show_unhandled_signals)
1297 printk_ratelimited(KERN_INFO
1298 "%s[%d]: bad frame in sys_rt_sigreturn: "
1299 "%p nip %08lx lr %08lx\n",
1300 current->comm, current->pid,
1301 rt_sf, regs->nip, regs->link);
d0c3d534 1302
1da177e4
LT
1303 force_sig(SIGSEGV, current);
1304 return 0;
1305}
1306
81e7009e
SR
1307#ifdef CONFIG_PPC32
1308int sys_debug_setcontext(struct ucontext __user *ctx,
1309 int ndbg, struct sig_dbg_op __user *dbg,
1310 int r6, int r7, int r8,
1311 struct pt_regs *regs)
1312{
1313 struct sig_dbg_op op;
1314 int i;
7c85d1f9 1315 unsigned char tmp;
81e7009e 1316 unsigned long new_msr = regs->msr;
172ae2e7 1317#ifdef CONFIG_PPC_ADV_DEBUG_REGS
51ae8d4a 1318 unsigned long new_dbcr0 = current->thread.debug.dbcr0;
81e7009e
SR
1319#endif
1320
1321 for (i=0; i<ndbg; i++) {
7c85d1f9 1322 if (copy_from_user(&op, dbg + i, sizeof(op)))
81e7009e
SR
1323 return -EFAULT;
1324 switch (op.dbg_type) {
1325 case SIG_DBG_SINGLE_STEPPING:
172ae2e7 1326#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1327 if (op.dbg_value) {
1328 new_msr |= MSR_DE;
1329 new_dbcr0 |= (DBCR0_IDM | DBCR0_IC);
1330 } else {
3bffb652
DK
1331 new_dbcr0 &= ~DBCR0_IC;
1332 if (!DBCR_ACTIVE_EVENTS(new_dbcr0,
51ae8d4a 1333 current->thread.debug.dbcr1)) {
3bffb652
DK
1334 new_msr &= ~MSR_DE;
1335 new_dbcr0 &= ~DBCR0_IDM;
1336 }
81e7009e
SR
1337 }
1338#else
1339 if (op.dbg_value)
1340 new_msr |= MSR_SE;
1341 else
1342 new_msr &= ~MSR_SE;
1343#endif
1344 break;
1345 case SIG_DBG_BRANCH_TRACING:
172ae2e7 1346#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1347 return -EINVAL;
1348#else
1349 if (op.dbg_value)
1350 new_msr |= MSR_BE;
1351 else
1352 new_msr &= ~MSR_BE;
1353#endif
1354 break;
1355
1356 default:
1357 return -EINVAL;
1358 }
1359 }
1360
1361 /* We wait until here to actually install the values in the
1362 registers so if we fail in the above loop, it will not
1363 affect the contents of these registers. After this point,
1364 failure is a problem, anyway, and it's very unlikely unless
1365 the user is really doing something wrong. */
1366 regs->msr = new_msr;
172ae2e7 1367#ifdef CONFIG_PPC_ADV_DEBUG_REGS
51ae8d4a 1368 current->thread.debug.dbcr0 = new_dbcr0;
81e7009e
SR
1369#endif
1370
7c85d1f9
PM
1371 if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx))
1372 || __get_user(tmp, (u8 __user *) ctx)
1373 || __get_user(tmp, (u8 __user *) (ctx + 1) - 1))
1374 return -EFAULT;
1375
81e7009e
SR
1376 /*
1377 * If we get a fault copying the context into the kernel's
1378 * image of the user's registers, we can't just return -EFAULT
1379 * because the user's registers will be corrupted. For instance
1380 * the NIP value may have been updated but not some of the
1381 * other registers. Given that we have done the access_ok
1382 * and successfully read the first and last bytes of the region
1383 * above, this should only happen in an out-of-memory situation
1384 * or if another thread unmaps the region containing the context.
1385 * We kill the task with a SIGSEGV in this situation.
1386 */
1387 if (do_setcontext(ctx, regs, 1)) {
76462232
CD
1388 if (show_unhandled_signals)
1389 printk_ratelimited(KERN_INFO "%s[%d]: bad frame in "
1390 "sys_debug_setcontext: %p nip %08lx "
1391 "lr %08lx\n",
1392 current->comm, current->pid,
1393 ctx, regs->nip, regs->link);
d0c3d534 1394
81e7009e
SR
1395 force_sig(SIGSEGV, current);
1396 goto out;
1397 }
1398
1399 /*
1400 * It's not clear whether or why it is desirable to save the
1401 * sigaltstack setting on signal delivery and restore it on
1402 * signal return. But other architectures do this and we have
1403 * always done it up until now so it is probably better not to
1404 * change it. -- paulus
1405 */
7cce2465 1406 restore_altstack(&ctx->uc_stack);
81e7009e 1407
401d1f02 1408 set_thread_flag(TIF_RESTOREALL);
81e7009e
SR
1409 out:
1410 return 0;
1411}
1412#endif
1da177e4
LT
1413
1414/*
1415 * OK, we're invoking a handler
1416 */
f478f543 1417int handle_signal32(unsigned long sig, struct k_sigaction *ka,
a3f61dc0 1418 siginfo_t *info, sigset_t *oldset, struct pt_regs *regs)
1da177e4 1419{
81e7009e 1420 struct sigcontext __user *sc;
a3f61dc0 1421 struct sigframe __user *frame;
1d25f11f 1422 struct mcontext __user *tm_mctx = NULL;
a3f61dc0 1423 unsigned long newsp = 0;
2b0a576d
MN
1424 int sigret;
1425 unsigned long tramp;
1da177e4
LT
1426
1427 /* Set up Signal Frame */
2b3f8e87 1428 frame = get_sigframe(ka, get_tm_stackpointer(regs), sizeof(*frame), 1);
a3f61dc0 1429 if (unlikely(frame == NULL))
1da177e4 1430 goto badframe;
a3f61dc0 1431 sc = (struct sigcontext __user *) &frame->sctx;
1da177e4
LT
1432
1433#if _NSIG != 64
81e7009e 1434#error "Please adjust handle_signal()"
1da177e4 1435#endif
81e7009e 1436 if (__put_user(to_user_ptr(ka->sa.sa_handler), &sc->handler)
1da177e4 1437 || __put_user(oldset->sig[0], &sc->oldmask)
81e7009e 1438#ifdef CONFIG_PPC64
1da177e4 1439 || __put_user((oldset->sig[0] >> 32), &sc->_unused[3])
81e7009e
SR
1440#else
1441 || __put_user(oldset->sig[1], &sc->_unused[3])
1442#endif
a3f61dc0 1443 || __put_user(to_user_ptr(&frame->mctx), &sc->regs)
1da177e4
LT
1444 || __put_user(sig, &sc->signal))
1445 goto badframe;
1446
a5bba930 1447 if (vdso32_sigtramp && current->mm->context.vdso_base) {
2b0a576d
MN
1448 sigret = 0;
1449 tramp = current->mm->context.vdso_base + vdso32_sigtramp;
a7f290da 1450 } else {
2b0a576d
MN
1451 sigret = __NR_sigreturn;
1452 tramp = (unsigned long) frame->mctx.tramp;
1453 }
1454
1455#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1d25f11f 1456 tm_mctx = &frame->mctx_transact;
2b0a576d
MN
1457 if (MSR_TM_ACTIVE(regs->msr)) {
1458 if (save_tm_user_regs(regs, &frame->mctx, &frame->mctx_transact,
1459 sigret))
1da177e4 1460 goto badframe;
1da177e4 1461 }
2b0a576d
MN
1462 else
1463#endif
1d25f11f
MN
1464 {
1465 if (save_user_regs(regs, &frame->mctx, tm_mctx, sigret, 1))
2b0a576d 1466 goto badframe;
1d25f11f 1467 }
2b0a576d
MN
1468
1469 regs->link = tramp;
1da177e4 1470
de79f7b9 1471 current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
cc657f53 1472
a3f61dc0
BH
1473 /* create a stack frame for the caller of the handler */
1474 newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE;
9747dd6f 1475 if (put_user(regs->gpr[1], (u32 __user *)newsp))
1da177e4 1476 goto badframe;
a3f61dc0 1477
81e7009e 1478 regs->gpr[1] = newsp;
1da177e4
LT
1479 regs->gpr[3] = sig;
1480 regs->gpr[4] = (unsigned long) sc;
1481 regs->nip = (unsigned long) ka->sa.sa_handler;
fab5db97
PM
1482 /* enter the signal handler in big-endian mode */
1483 regs->msr &= ~MSR_LE;
1da177e4
LT
1484 return 1;
1485
1486badframe:
81e7009e
SR
1487#ifdef DEBUG_SIG
1488 printk("badframe in handle_signal, regs=%p frame=%p newsp=%lx\n",
1489 regs, frame, newsp);
1da177e4 1490#endif
76462232
CD
1491 if (show_unhandled_signals)
1492 printk_ratelimited(KERN_INFO
1493 "%s[%d]: bad frame in handle_signal32: "
1494 "%p nip %08lx lr %08lx\n",
1495 current->comm, current->pid,
1496 frame, regs->nip, regs->link);
d0c3d534 1497
1da177e4
LT
1498 force_sigsegv(sig, current);
1499 return 0;
1500}
1501
1502/*
1503 * Do a signal return; undo the signal stack.
1504 */
81e7009e 1505long sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1da177e4
LT
1506 struct pt_regs *regs)
1507{
fee55450 1508 struct sigframe __user *sf;
81e7009e
SR
1509 struct sigcontext __user *sc;
1510 struct sigcontext sigctx;
1511 struct mcontext __user *sr;
d0c3d534 1512 void __user *addr;
1da177e4 1513 sigset_t set;
fee55450
MN
1514#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1515 struct mcontext __user *mcp, *tm_mcp;
1516 unsigned long msr_hi;
1517#endif
1da177e4
LT
1518
1519 /* Always make any pending restarted system calls return -EINTR */
1520 current_thread_info()->restart_block.fn = do_no_restart_syscall;
1521
fee55450
MN
1522 sf = (struct sigframe __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE);
1523 sc = &sf->sctx;
d0c3d534 1524 addr = sc;
1da177e4
LT
1525 if (copy_from_user(&sigctx, sc, sizeof(sigctx)))
1526 goto badframe;
1527
81e7009e 1528#ifdef CONFIG_PPC64
1da177e4
LT
1529 /*
1530 * Note that PPC32 puts the upper 32 bits of the sigmask in the
1531 * unused part of the signal stackframe
1532 */
1533 set.sig[0] = sigctx.oldmask + ((long)(sigctx._unused[3]) << 32);
81e7009e
SR
1534#else
1535 set.sig[0] = sigctx.oldmask;
1536 set.sig[1] = sigctx._unused[3];
1537#endif
17440f17 1538 set_current_blocked(&set);
1da177e4 1539
fee55450
MN
1540#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1541 mcp = (struct mcontext __user *)&sf->mctx;
1542 tm_mcp = (struct mcontext __user *)&sf->mctx_transact;
1543 if (__get_user(msr_hi, &tm_mcp->mc_gregs[PT_MSR]))
1da177e4 1544 goto badframe;
fee55450
MN
1545 if (MSR_TM_ACTIVE(msr_hi<<32)) {
1546 if (!cpu_has_feature(CPU_FTR_TM))
1547 goto badframe;
1548 if (restore_tm_user_regs(regs, mcp, tm_mcp))
1549 goto badframe;
1550 } else
1551#endif
1552 {
1553 sr = (struct mcontext __user *)from_user_ptr(sigctx.regs);
1554 addr = sr;
1555 if (!access_ok(VERIFY_READ, sr, sizeof(*sr))
1556 || restore_user_regs(regs, sr, 1))
1557 goto badframe;
1558 }
1da177e4 1559
401d1f02 1560 set_thread_flag(TIF_RESTOREALL);
81e7009e 1561 return 0;
1da177e4
LT
1562
1563badframe:
76462232
CD
1564 if (show_unhandled_signals)
1565 printk_ratelimited(KERN_INFO
1566 "%s[%d]: bad frame in sys_sigreturn: "
1567 "%p nip %08lx lr %08lx\n",
1568 current->comm, current->pid,
1569 addr, regs->nip, regs->link);
d0c3d534 1570
1da177e4
LT
1571 force_sig(SIGSEGV, current);
1572 return 0;
1573}