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1da177e4 1/*
1da177e4
LT
2 * PowerPC version
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Derived from "arch/i386/kernel/signal.c"
6 * Copyright (C) 1991, 1992 Linus Torvalds
7 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
1da177e4
LT
15#include <linux/sched.h>
16#include <linux/mm.h>
17#include <linux/smp.h>
1da177e4
LT
18#include <linux/kernel.h>
19#include <linux/signal.h>
20#include <linux/errno.h>
21#include <linux/wait.h>
22#include <linux/unistd.h>
23#include <linux/stddef.h>
24#include <linux/elf.h>
25#include <linux/ptrace.h>
76462232 26#include <linux/ratelimit.h>
1da177e4
LT
27
28#include <asm/sigcontext.h>
29#include <asm/ucontext.h>
30#include <asm/uaccess.h>
31#include <asm/pgtable.h>
1da177e4
LT
32#include <asm/unistd.h>
33#include <asm/cacheflush.h>
a7f31841 34#include <asm/syscalls.h>
1da177e4 35#include <asm/vdso.h>
ae3a197e 36#include <asm/switch_to.h>
2b0a576d 37#include <asm/tm.h>
1da177e4 38
22e38f29 39#include "signal.h"
1da177e4 40
1da177e4 41
6741f3a7 42#define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
1da177e4
LT
43#define FP_REGS_SIZE sizeof(elf_fpregset_t)
44
45#define TRAMP_TRACEBACK 3
46#define TRAMP_SIZE 6
47
48/*
49 * When we have signals to deliver, we set up on the user stack,
50 * going down from the original stack pointer:
51 * 1) a rt_sigframe struct which contains the ucontext
52 * 2) a gap of __SIGNAL_FRAMESIZE bytes which acts as a dummy caller
53 * frame for the signal handler.
54 */
55
56struct rt_sigframe {
57 /* sys_rt_sigreturn requires the ucontext be the first field */
58 struct ucontext uc;
2b0a576d
MN
59#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
60 struct ucontext uc_transact;
61#endif
1da177e4
LT
62 unsigned long _unused[2];
63 unsigned int tramp[TRAMP_SIZE];
29e646df
AV
64 struct siginfo __user *pinfo;
65 void __user *puc;
1da177e4 66 struct siginfo info;
573ebfa6
PM
67 /* New 64 bit little-endian ABI allows redzone of 512 bytes below sp */
68 char abigap[USER_REDZONE_SIZE];
1da177e4
LT
69} __attribute__ ((aligned (16)));
70
d0c3d534
OJ
71static const char fmt32[] = KERN_INFO \
72 "%s[%d]: bad frame in %s: %08lx nip %08lx lr %08lx\n";
73static const char fmt64[] = KERN_INFO \
74 "%s[%d]: bad frame in %s: %016lx nip %016lx lr %016lx\n";
75
2476c09f
AK
76/*
77 * This computes a quad word aligned pointer inside the vmx_reserve array
78 * element. For historical reasons sigcontext might not be quad word aligned,
79 * but the location we write the VMX regs to must be. See the comment in
80 * sigcontext for more detail.
81 */
82#ifdef CONFIG_ALTIVEC
83static elf_vrreg_t __user *sigcontext_vmx_regs(struct sigcontext __user *sc)
84{
85 return (elf_vrreg_t __user *) (((unsigned long)sc->vmx_reserve + 15) & ~0xful);
86}
87#endif
88
1da177e4
LT
89/*
90 * Set up the sigcontext for the signal frame.
91 */
92
93static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
16c29d18
MN
94 int signr, sigset_t *set, unsigned long handler,
95 int ctx_has_vsx_region)
1da177e4
LT
96{
97 /* When CONFIG_ALTIVEC is set, we _always_ setup v_regs even if the
98 * process never used altivec yet (MSR_VEC is zero in pt_regs of
99 * the context). This is very important because we must ensure we
100 * don't lose the VRSAVE content that may have been set prior to
101 * the process doing its first vector operation
48fc7f7e 102 * Userland shall check AT_HWCAP to know whether it can rely on the
1da177e4
LT
103 * v_regs pointer or not
104 */
105#ifdef CONFIG_ALTIVEC
2476c09f 106 elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc);
1da177e4 107#endif
0be234a4 108 unsigned long msr = regs->msr;
1da177e4
LT
109 long err = 0;
110
1da177e4
LT
111#ifdef CONFIG_ALTIVEC
112 err |= __put_user(v_regs, &sc->v_regs);
113
114 /* save altivec registers */
115 if (current->thread.used_vr) {
116 flush_altivec_to_thread(current);
117 /* Copy 33 vec registers (vr0..31 and vscr) to the stack */
de79f7b9
PM
118 err |= __copy_to_user(v_regs, &current->thread.vr_state,
119 33 * sizeof(vector128));
1da177e4
LT
120 /* set MSR_VEC in the MSR value in the frame to indicate that sc->v_reg)
121 * contains valid data.
122 */
0be234a4 123 msr |= MSR_VEC;
1da177e4
LT
124 }
125 /* We always copy to/from vrsave, it's 0 if we don't have or don't
126 * use altivec.
127 */
408a7e08
PM
128 if (cpu_has_feature(CPU_FTR_ALTIVEC))
129 current->thread.vrsave = mfspr(SPRN_VRSAVE);
1da177e4
LT
130 err |= __put_user(current->thread.vrsave, (u32 __user *)&v_regs[33]);
131#else /* CONFIG_ALTIVEC */
132 err |= __put_user(0, &sc->v_regs);
133#endif /* CONFIG_ALTIVEC */
c6e6771b 134 flush_fp_to_thread(current);
6a274c08
MN
135 /* copy fpr regs and fpscr */
136 err |= copy_fpr_to_user(&sc->fp_regs, current);
ec67ad82
MN
137
138 /*
139 * Clear the MSR VSX bit to indicate there is no valid state attached
140 * to this context, except in the specific case below where we set it.
141 */
142 msr &= ~MSR_VSX;
c6e6771b 143#ifdef CONFIG_VSX
ce48b210
MN
144 /*
145 * Copy VSX low doubleword to local buffer for formatting,
146 * then out to userspace. Update v_regs to point after the
147 * VMX data.
148 */
16c29d18 149 if (current->thread.used_vsr && ctx_has_vsx_region) {
7c292170 150 __giveup_vsx(current);
ce48b210 151 v_regs += ELF_NVRREG;
6a274c08 152 err |= copy_vsx_to_user(v_regs, current);
ce48b210
MN
153 /* set MSR_VSX in the MSR value in the frame to
154 * indicate that sc->vs_reg) contains valid data.
155 */
156 msr |= MSR_VSX;
157 }
c6e6771b 158#endif /* CONFIG_VSX */
1da177e4 159 err |= __put_user(&sc->gp_regs, &sc->regs);
1bd79336 160 WARN_ON(!FULL_REGS(regs));
1da177e4 161 err |= __copy_to_user(&sc->gp_regs, regs, GP_REGS_SIZE);
0be234a4 162 err |= __put_user(msr, &sc->gp_regs[PT_MSR]);
1da177e4
LT
163 err |= __put_user(signr, &sc->signal);
164 err |= __put_user(handler, &sc->handler);
165 if (set != NULL)
166 err |= __put_user(set->sig[0], &sc->oldmask);
167
168 return err;
169}
170
2b0a576d
MN
171#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
172/*
173 * As above, but Transactional Memory is in use, so deliver sigcontexts
174 * containing checkpointed and transactional register states.
175 *
2b3f8e87
MN
176 * To do this, we treclaim (done before entering here) to gather both sets of
177 * registers and set up the 'normal' sigcontext registers with rolled-back
178 * register values such that a simple signal handler sees a correct
179 * checkpointed register state. If interested, a TM-aware sighandler can
180 * examine the transactional registers in the 2nd sigcontext to determine the
181 * real origin of the signal.
2b0a576d
MN
182 */
183static long setup_tm_sigcontexts(struct sigcontext __user *sc,
184 struct sigcontext __user *tm_sc,
185 struct pt_regs *regs,
186 int signr, sigset_t *set, unsigned long handler)
187{
188 /* When CONFIG_ALTIVEC is set, we _always_ setup v_regs even if the
189 * process never used altivec yet (MSR_VEC is zero in pt_regs of
190 * the context). This is very important because we must ensure we
191 * don't lose the VRSAVE content that may have been set prior to
192 * the process doing its first vector operation
193 * Userland shall check AT_HWCAP to know wether it can rely on the
194 * v_regs pointer or not.
195 */
196#ifdef CONFIG_ALTIVEC
2476c09f
AK
197 elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc);
198 elf_vrreg_t __user *tm_v_regs = sigcontext_vmx_regs(tm_sc);
2b0a576d
MN
199#endif
200 unsigned long msr = regs->msr;
201 long err = 0;
202
203 BUG_ON(!MSR_TM_ACTIVE(regs->msr));
204
d31626f7
PM
205 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
206 * just indicates to userland that we were doing a transaction, but we
207 * don't want to return in transactional state. This also ensures
208 * that flush_fp_to_thread won't set TIF_RESTORE_TM again.
209 */
210 regs->msr &= ~MSR_TS_MASK;
211
2b0a576d
MN
212 flush_fp_to_thread(current);
213
214#ifdef CONFIG_ALTIVEC
215 err |= __put_user(v_regs, &sc->v_regs);
216 err |= __put_user(tm_v_regs, &tm_sc->v_regs);
217
218 /* save altivec registers */
219 if (current->thread.used_vr) {
220 flush_altivec_to_thread(current);
221 /* Copy 33 vec registers (vr0..31 and vscr) to the stack */
de79f7b9 222 err |= __copy_to_user(v_regs, &current->thread.vr_state,
2b0a576d
MN
223 33 * sizeof(vector128));
224 /* If VEC was enabled there are transactional VRs valid too,
225 * else they're a copy of the checkpointed VRs.
226 */
227 if (msr & MSR_VEC)
228 err |= __copy_to_user(tm_v_regs,
de79f7b9 229 &current->thread.transact_vr,
2b0a576d
MN
230 33 * sizeof(vector128));
231 else
232 err |= __copy_to_user(tm_v_regs,
de79f7b9 233 &current->thread.vr_state,
2b0a576d
MN
234 33 * sizeof(vector128));
235
236 /* set MSR_VEC in the MSR value in the frame to indicate
237 * that sc->v_reg contains valid data.
238 */
239 msr |= MSR_VEC;
240 }
241 /* We always copy to/from vrsave, it's 0 if we don't have or don't
242 * use altivec.
243 */
408a7e08
PM
244 if (cpu_has_feature(CPU_FTR_ALTIVEC))
245 current->thread.vrsave = mfspr(SPRN_VRSAVE);
2b0a576d
MN
246 err |= __put_user(current->thread.vrsave, (u32 __user *)&v_regs[33]);
247 if (msr & MSR_VEC)
248 err |= __put_user(current->thread.transact_vrsave,
249 (u32 __user *)&tm_v_regs[33]);
250 else
251 err |= __put_user(current->thread.vrsave,
252 (u32 __user *)&tm_v_regs[33]);
253
254#else /* CONFIG_ALTIVEC */
255 err |= __put_user(0, &sc->v_regs);
256 err |= __put_user(0, &tm_sc->v_regs);
257#endif /* CONFIG_ALTIVEC */
258
259 /* copy fpr regs and fpscr */
260 err |= copy_fpr_to_user(&sc->fp_regs, current);
261 if (msr & MSR_FP)
262 err |= copy_transact_fpr_to_user(&tm_sc->fp_regs, current);
263 else
264 err |= copy_fpr_to_user(&tm_sc->fp_regs, current);
265
266#ifdef CONFIG_VSX
267 /*
268 * Copy VSX low doubleword to local buffer for formatting,
269 * then out to userspace. Update v_regs to point after the
270 * VMX data.
271 */
272 if (current->thread.used_vsr) {
273 __giveup_vsx(current);
274 v_regs += ELF_NVRREG;
275 tm_v_regs += ELF_NVRREG;
276
277 err |= copy_vsx_to_user(v_regs, current);
278
279 if (msr & MSR_VSX)
280 err |= copy_transact_vsx_to_user(tm_v_regs, current);
281 else
282 err |= copy_vsx_to_user(tm_v_regs, current);
283
284 /* set MSR_VSX in the MSR value in the frame to
285 * indicate that sc->vs_reg) contains valid data.
286 */
287 msr |= MSR_VSX;
288 }
289#endif /* CONFIG_VSX */
290
291 err |= __put_user(&sc->gp_regs, &sc->regs);
292 err |= __put_user(&tm_sc->gp_regs, &tm_sc->regs);
293 WARN_ON(!FULL_REGS(regs));
294 err |= __copy_to_user(&tm_sc->gp_regs, regs, GP_REGS_SIZE);
295 err |= __copy_to_user(&sc->gp_regs,
296 &current->thread.ckpt_regs, GP_REGS_SIZE);
297 err |= __put_user(msr, &tm_sc->gp_regs[PT_MSR]);
298 err |= __put_user(msr, &sc->gp_regs[PT_MSR]);
299 err |= __put_user(signr, &sc->signal);
300 err |= __put_user(handler, &sc->handler);
301 if (set != NULL)
302 err |= __put_user(set->sig[0], &sc->oldmask);
303
304 return err;
305}
306#endif
307
1da177e4
LT
308/*
309 * Restore the sigcontext from the signal frame.
310 */
311
312static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig,
313 struct sigcontext __user *sc)
314{
315#ifdef CONFIG_ALTIVEC
316 elf_vrreg_t __user *v_regs;
317#endif
318 unsigned long err = 0;
319 unsigned long save_r13 = 0;
1da177e4 320 unsigned long msr;
6a274c08
MN
321#ifdef CONFIG_VSX
322 int i;
323#endif
1da177e4
LT
324
325 /* If this is not a signal return, we preserve the TLS in r13 */
326 if (!sig)
327 save_r13 = regs->gpr[13];
328
fcbc5a97
SR
329 /* copy the GPRs */
330 err |= __copy_from_user(regs->gpr, sc->gp_regs, sizeof(regs->gpr));
331 err |= __get_user(regs->nip, &sc->gp_regs[PT_NIP]);
fab5db97
PM
332 /* get MSR separately, transfer the LE bit if doing signal return */
333 err |= __get_user(msr, &sc->gp_regs[PT_MSR]);
334 if (sig)
335 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
fcbc5a97
SR
336 err |= __get_user(regs->orig_gpr3, &sc->gp_regs[PT_ORIG_R3]);
337 err |= __get_user(regs->ctr, &sc->gp_regs[PT_CTR]);
338 err |= __get_user(regs->link, &sc->gp_regs[PT_LNK]);
339 err |= __get_user(regs->xer, &sc->gp_regs[PT_XER]);
340 err |= __get_user(regs->ccr, &sc->gp_regs[PT_CCR]);
fab5db97 341 /* skip SOFTE */
9a81c16b 342 regs->trap = 0;
fcbc5a97
SR
343 err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]);
344 err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]);
345 err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]);
1da177e4
LT
346
347 if (!sig)
348 regs->gpr[13] = save_r13;
1da177e4
LT
349 if (set != NULL)
350 err |= __get_user(set->sig[0], &sc->oldmask);
351
5388fb10
PM
352 /*
353 * Do this before updating the thread state in
354 * current->thread.fpr/vr. That way, if we get preempted
355 * and another task grabs the FPU/Altivec, it won't be
356 * tempted to save the current CPU state into the thread_struct
357 * and corrupt what we are writing there.
358 */
359 discard_lazy_cpu_state();
360
ae62fbb5
PM
361 /*
362 * Force reload of FP/VEC.
363 * This has to be done before copying stuff into current->thread.fpr/vr
364 * for the reasons explained in the previous comment.
365 */
ce48b210 366 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX);
ae62fbb5 367
1da177e4
LT
368#ifdef CONFIG_ALTIVEC
369 err |= __get_user(v_regs, &sc->v_regs);
1da177e4
LT
370 if (err)
371 return err;
7c85d1f9
PM
372 if (v_regs && !access_ok(VERIFY_READ, v_regs, 34 * sizeof(vector128)))
373 return -EFAULT;
1da177e4 374 /* Copy 33 vec registers (vr0..31 and vscr) from the stack */
b0d436c7 375 if (v_regs != NULL && (msr & MSR_VEC) != 0)
de79f7b9 376 err |= __copy_from_user(&current->thread.vr_state, v_regs,
1da177e4
LT
377 33 * sizeof(vector128));
378 else if (current->thread.used_vr)
de79f7b9 379 memset(&current->thread.vr_state, 0, 33 * sizeof(vector128));
1da177e4 380 /* Always get VRSAVE back */
b0d436c7 381 if (v_regs != NULL)
1da177e4
LT
382 err |= __get_user(current->thread.vrsave, (u32 __user *)&v_regs[33]);
383 else
384 current->thread.vrsave = 0;
408a7e08
PM
385 if (cpu_has_feature(CPU_FTR_ALTIVEC))
386 mtspr(SPRN_VRSAVE, current->thread.vrsave);
1da177e4 387#endif /* CONFIG_ALTIVEC */
c6e6771b 388 /* restore floating point */
6a274c08
MN
389 err |= copy_fpr_from_user(current, &sc->fp_regs);
390#ifdef CONFIG_VSX
ce48b210
MN
391 /*
392 * Get additional VSX data. Update v_regs to point after the
393 * VMX data. Copy VSX low doubleword from userspace to local
394 * buffer for formatting, then into the taskstruct.
395 */
396 v_regs += ELF_NVRREG;
397 if ((msr & MSR_VSX) != 0)
6a274c08 398 err |= copy_vsx_from_user(current, v_regs);
ce48b210 399 else
6a274c08 400 for (i = 0; i < 32 ; i++)
de79f7b9 401 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
c6e6771b 402#endif
1da177e4
LT
403 return err;
404}
405
2b0a576d
MN
406#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
407/*
408 * Restore the two sigcontexts from the frame of a transactional processes.
409 */
410
411static long restore_tm_sigcontexts(struct pt_regs *regs,
412 struct sigcontext __user *sc,
413 struct sigcontext __user *tm_sc)
414{
415#ifdef CONFIG_ALTIVEC
416 elf_vrreg_t __user *v_regs, *tm_v_regs;
417#endif
418 unsigned long err = 0;
419 unsigned long msr;
420#ifdef CONFIG_VSX
421 int i;
422#endif
423 /* copy the GPRs */
424 err |= __copy_from_user(regs->gpr, tm_sc->gp_regs, sizeof(regs->gpr));
425 err |= __copy_from_user(&current->thread.ckpt_regs, sc->gp_regs,
426 sizeof(regs->gpr));
427
428 /*
429 * TFHAR is restored from the checkpointed 'wound-back' ucontext's NIP.
430 * TEXASR was set by the signal delivery reclaim, as was TFIAR.
431 * Users doing anything abhorrent like thread-switching w/ signals for
432 * TM-Suspended code will have to back TEXASR/TFIAR up themselves.
433 * For the case of getting a signal and simply returning from it,
434 * we don't need to re-copy them here.
435 */
436 err |= __get_user(regs->nip, &tm_sc->gp_regs[PT_NIP]);
437 err |= __get_user(current->thread.tm_tfhar, &sc->gp_regs[PT_NIP]);
438
439 /* get MSR separately, transfer the LE bit if doing signal return */
440 err |= __get_user(msr, &sc->gp_regs[PT_MSR]);
87b4e539
MN
441 /* pull in MSR TM from user context */
442 regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr & MSR_TS_MASK);
443
444 /* pull in MSR LE from user context */
2b0a576d
MN
445 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
446
447 /* The following non-GPR non-FPR non-VR state is also checkpointed: */
448 err |= __get_user(regs->ctr, &tm_sc->gp_regs[PT_CTR]);
449 err |= __get_user(regs->link, &tm_sc->gp_regs[PT_LNK]);
450 err |= __get_user(regs->xer, &tm_sc->gp_regs[PT_XER]);
451 err |= __get_user(regs->ccr, &tm_sc->gp_regs[PT_CCR]);
452 err |= __get_user(current->thread.ckpt_regs.ctr,
453 &sc->gp_regs[PT_CTR]);
454 err |= __get_user(current->thread.ckpt_regs.link,
455 &sc->gp_regs[PT_LNK]);
456 err |= __get_user(current->thread.ckpt_regs.xer,
457 &sc->gp_regs[PT_XER]);
458 err |= __get_user(current->thread.ckpt_regs.ccr,
459 &sc->gp_regs[PT_CCR]);
460
461 /* These regs are not checkpointed; they can go in 'regs'. */
462 err |= __get_user(regs->trap, &sc->gp_regs[PT_TRAP]);
463 err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]);
464 err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]);
465 err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]);
466
467 /*
468 * Do this before updating the thread state in
469 * current->thread.fpr/vr. That way, if we get preempted
470 * and another task grabs the FPU/Altivec, it won't be
471 * tempted to save the current CPU state into the thread_struct
472 * and corrupt what we are writing there.
473 */
474 discard_lazy_cpu_state();
475
476 /*
477 * Force reload of FP/VEC.
478 * This has to be done before copying stuff into current->thread.fpr/vr
479 * for the reasons explained in the previous comment.
480 */
481 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX);
482
483#ifdef CONFIG_ALTIVEC
484 err |= __get_user(v_regs, &sc->v_regs);
485 err |= __get_user(tm_v_regs, &tm_sc->v_regs);
486 if (err)
487 return err;
488 if (v_regs && !access_ok(VERIFY_READ, v_regs, 34 * sizeof(vector128)))
489 return -EFAULT;
490 if (tm_v_regs && !access_ok(VERIFY_READ,
491 tm_v_regs, 34 * sizeof(vector128)))
492 return -EFAULT;
493 /* Copy 33 vec registers (vr0..31 and vscr) from the stack */
b0d436c7 494 if (v_regs != NULL && tm_v_regs != NULL && (msr & MSR_VEC) != 0) {
de79f7b9 495 err |= __copy_from_user(&current->thread.vr_state, v_regs,
2b0a576d 496 33 * sizeof(vector128));
de79f7b9 497 err |= __copy_from_user(&current->thread.transact_vr, tm_v_regs,
2b0a576d
MN
498 33 * sizeof(vector128));
499 }
500 else if (current->thread.used_vr) {
de79f7b9
PM
501 memset(&current->thread.vr_state, 0, 33 * sizeof(vector128));
502 memset(&current->thread.transact_vr, 0, 33 * sizeof(vector128));
2b0a576d
MN
503 }
504 /* Always get VRSAVE back */
b0d436c7 505 if (v_regs != NULL && tm_v_regs != NULL) {
2b0a576d
MN
506 err |= __get_user(current->thread.vrsave,
507 (u32 __user *)&v_regs[33]);
508 err |= __get_user(current->thread.transact_vrsave,
509 (u32 __user *)&tm_v_regs[33]);
510 }
511 else {
512 current->thread.vrsave = 0;
513 current->thread.transact_vrsave = 0;
514 }
408a7e08
PM
515 if (cpu_has_feature(CPU_FTR_ALTIVEC))
516 mtspr(SPRN_VRSAVE, current->thread.vrsave);
2b0a576d
MN
517#endif /* CONFIG_ALTIVEC */
518 /* restore floating point */
519 err |= copy_fpr_from_user(current, &sc->fp_regs);
520 err |= copy_transact_fpr_from_user(current, &tm_sc->fp_regs);
521#ifdef CONFIG_VSX
522 /*
523 * Get additional VSX data. Update v_regs to point after the
524 * VMX data. Copy VSX low doubleword from userspace to local
525 * buffer for formatting, then into the taskstruct.
526 */
527 if (v_regs && ((msr & MSR_VSX) != 0)) {
528 v_regs += ELF_NVRREG;
529 tm_v_regs += ELF_NVRREG;
530 err |= copy_vsx_from_user(current, v_regs);
531 err |= copy_transact_vsx_from_user(current, tm_v_regs);
532 } else {
533 for (i = 0; i < 32 ; i++) {
de79f7b9
PM
534 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
535 current->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = 0;
2b0a576d
MN
536 }
537 }
538#endif
539 tm_enable();
e6b8fd02
MN
540 /* Make sure the transaction is marked as failed */
541 current->thread.tm_texasr |= TEXASR_FS;
2b0a576d
MN
542 /* This loads the checkpointed FP/VEC state, if used */
543 tm_recheckpoint(&current->thread, msr);
2b0a576d
MN
544
545 /* This loads the speculative FP/VEC state, if used */
546 if (msr & MSR_FP) {
547 do_load_up_transact_fpu(&current->thread);
548 regs->msr |= (MSR_FP | current->thread.fpexc_mode);
549 }
f110c0c1 550#ifdef CONFIG_ALTIVEC
2b0a576d
MN
551 if (msr & MSR_VEC) {
552 do_load_up_transact_altivec(&current->thread);
553 regs->msr |= MSR_VEC;
554 }
f110c0c1 555#endif
2b0a576d
MN
556
557 return err;
558}
559#endif
560
1da177e4
LT
561/*
562 * Setup the trampoline code on the stack
563 */
564static long setup_trampoline(unsigned int syscall, unsigned int __user *tramp)
565{
566 int i;
567 long err = 0;
568
569 /* addi r1, r1, __SIGNAL_FRAMESIZE # Pop the dummy stackframe */
570 err |= __put_user(0x38210000UL | (__SIGNAL_FRAMESIZE & 0xffff), &tramp[0]);
571 /* li r0, __NR_[rt_]sigreturn| */
572 err |= __put_user(0x38000000UL | (syscall & 0xffff), &tramp[1]);
573 /* sc */
574 err |= __put_user(0x44000002UL, &tramp[2]);
575
576 /* Minimal traceback info */
577 for (i=TRAMP_TRACEBACK; i < TRAMP_SIZE ;i++)
578 err |= __put_user(0, &tramp[i]);
579
580 if (!err)
581 flush_icache_range((unsigned long) &tramp[0],
582 (unsigned long) &tramp[TRAMP_SIZE]);
583
584 return err;
585}
586
c1cb299e
MN
587/*
588 * Userspace code may pass a ucontext which doesn't include VSX added
589 * at the end. We need to check for this case.
590 */
591#define UCONTEXTSIZEWITHOUTVSX \
592 (sizeof(struct ucontext) - 32*sizeof(long))
593
1da177e4
LT
594/*
595 * Handle {get,set,swap}_context operations
596 */
597int sys_swapcontext(struct ucontext __user *old_ctx,
598 struct ucontext __user *new_ctx,
599 long ctx_size, long r6, long r7, long r8, struct pt_regs *regs)
600{
601 unsigned char tmp;
602 sigset_t set;
c1cb299e 603 unsigned long new_msr = 0;
16c29d18 604 int ctx_has_vsx_region = 0;
1da177e4 605
c1cb299e 606 if (new_ctx &&
16c29d18 607 get_user(new_msr, &new_ctx->uc_mcontext.gp_regs[PT_MSR]))
c1cb299e
MN
608 return -EFAULT;
609 /*
610 * Check that the context is not smaller than the original
611 * size (with VMX but without VSX)
1da177e4 612 */
c1cb299e 613 if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
1da177e4 614 return -EINVAL;
c1cb299e
MN
615 /*
616 * If the new context state sets the MSR VSX bits but
617 * it doesn't provide VSX state.
618 */
619 if ((ctx_size < sizeof(struct ucontext)) &&
620 (new_msr & MSR_VSX))
621 return -EINVAL;
16c29d18
MN
622 /* Does the context have enough room to store VSX data? */
623 if (ctx_size >= sizeof(struct ucontext))
624 ctx_has_vsx_region = 1;
625
1da177e4 626 if (old_ctx != NULL) {
16c29d18
MN
627 if (!access_ok(VERIFY_WRITE, old_ctx, ctx_size)
628 || setup_sigcontext(&old_ctx->uc_mcontext, regs, 0, NULL, 0,
629 ctx_has_vsx_region)
1da177e4
LT
630 || __copy_to_user(&old_ctx->uc_sigmask,
631 &current->blocked, sizeof(sigset_t)))
632 return -EFAULT;
633 }
634 if (new_ctx == NULL)
635 return 0;
16c29d18 636 if (!access_ok(VERIFY_READ, new_ctx, ctx_size)
1da177e4 637 || __get_user(tmp, (u8 __user *) new_ctx)
16c29d18 638 || __get_user(tmp, (u8 __user *) new_ctx + ctx_size - 1))
1da177e4
LT
639 return -EFAULT;
640
641 /*
642 * If we get a fault copying the context into the kernel's
643 * image of the user's registers, we can't just return -EFAULT
644 * because the user's registers will be corrupted. For instance
645 * the NIP value may have been updated but not some of the
646 * other registers. Given that we have done the access_ok
647 * and successfully read the first and last bytes of the region
648 * above, this should only happen in an out-of-memory situation
649 * or if another thread unmaps the region containing the context.
650 * We kill the task with a SIGSEGV in this situation.
651 */
652
653 if (__copy_from_user(&set, &new_ctx->uc_sigmask, sizeof(set)))
654 do_exit(SIGSEGV);
17440f17 655 set_current_blocked(&set);
1da177e4
LT
656 if (restore_sigcontext(regs, NULL, 0, &new_ctx->uc_mcontext))
657 do_exit(SIGSEGV);
658
659 /* This returns like rt_sigreturn */
401d1f02 660 set_thread_flag(TIF_RESTOREALL);
1da177e4
LT
661 return 0;
662}
663
664
665/*
666 * Do a signal return; undo the signal stack.
667 */
668
669int sys_rt_sigreturn(unsigned long r3, unsigned long r4, unsigned long r5,
670 unsigned long r6, unsigned long r7, unsigned long r8,
671 struct pt_regs *regs)
672{
673 struct ucontext __user *uc = (struct ucontext __user *)regs->gpr[1];
674 sigset_t set;
2b0a576d
MN
675#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
676 unsigned long msr;
677#endif
1da177e4
LT
678
679 /* Always make any pending restarted system calls return -EINTR */
f56141e3 680 current->restart_block.fn = do_no_restart_syscall;
1da177e4
LT
681
682 if (!access_ok(VERIFY_READ, uc, sizeof(*uc)))
683 goto badframe;
684
685 if (__copy_from_user(&set, &uc->uc_sigmask, sizeof(set)))
686 goto badframe;
17440f17 687 set_current_blocked(&set);
2b0a576d
MN
688#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
689 if (__get_user(msr, &uc->uc_mcontext.gp_regs[PT_MSR]))
690 goto badframe;
87b4e539 691 if (MSR_TM_ACTIVE(msr)) {
2b0a576d
MN
692 /* We recheckpoint on return. */
693 struct ucontext __user *uc_transact;
694 if (__get_user(uc_transact, &uc->uc_link))
695 goto badframe;
696 if (restore_tm_sigcontexts(regs, &uc->uc_mcontext,
697 &uc_transact->uc_mcontext))
698 goto badframe;
699 }
700 else
701 /* Fall through, for non-TM restore */
702#endif
1da177e4
LT
703 if (restore_sigcontext(regs, NULL, 1, &uc->uc_mcontext))
704 goto badframe;
705
7cce2465
AV
706 if (restore_altstack(&uc->uc_stack))
707 goto badframe;
1da177e4 708
401d1f02
DW
709 set_thread_flag(TIF_RESTOREALL);
710 return 0;
1da177e4
LT
711
712badframe:
76462232
CD
713 if (show_unhandled_signals)
714 printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
715 current->comm, current->pid, "rt_sigreturn",
716 (long)uc, regs->nip, regs->link);
d0c3d534 717
1da177e4
LT
718 force_sig(SIGSEGV, current);
719 return 0;
720}
721
129b69df 722int handle_rt_signal64(struct ksignal *ksig, sigset_t *set, struct pt_regs *regs)
1da177e4 723{
1da177e4
LT
724 struct rt_sigframe __user *frame;
725 unsigned long newsp = 0;
726 long err = 0;
727
059ade65 728 frame = get_sigframe(ksig, get_tm_stackpointer(regs), sizeof(*frame), 0);
a3f61dc0 729 if (unlikely(frame == NULL))
1da177e4
LT
730 goto badframe;
731
732 err |= __put_user(&frame->info, &frame->pinfo);
733 err |= __put_user(&frame->uc, &frame->puc);
129b69df 734 err |= copy_siginfo_to_user(&frame->info, &ksig->info);
1da177e4
LT
735 if (err)
736 goto badframe;
737
738 /* Create the ucontext. */
739 err |= __put_user(0, &frame->uc.uc_flags);
7cce2465 740 err |= __save_altstack(&frame->uc.uc_stack, regs->gpr[1]);
2b0a576d
MN
741#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
742 if (MSR_TM_ACTIVE(regs->msr)) {
743 /* The ucontext_t passed to userland points to the second
744 * ucontext_t (for transactional state) with its uc_link ptr.
745 */
746 err |= __put_user(&frame->uc_transact, &frame->uc.uc_link);
747 err |= setup_tm_sigcontexts(&frame->uc.uc_mcontext,
748 &frame->uc_transact.uc_mcontext,
129b69df 749 regs, ksig->sig,
2b0a576d 750 NULL,
129b69df 751 (unsigned long)ksig->ka.sa.sa_handler);
2b0a576d
MN
752 } else
753#endif
754 {
755 err |= __put_user(0, &frame->uc.uc_link);
129b69df
RW
756 err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, ksig->sig,
757 NULL, (unsigned long)ksig->ka.sa.sa_handler,
2b0a576d
MN
758 1);
759 }
1da177e4
LT
760 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
761 if (err)
762 goto badframe;
763
cc657f53 764 /* Make sure signal handler doesn't get spurious FP exceptions */
de79f7b9 765 current->thread.fp_state.fpscr = 0;
cc657f53 766
1da177e4 767 /* Set up to return from userspace. */
a5bba930
BH
768 if (vdso64_rt_sigtramp && current->mm->context.vdso_base) {
769 regs->link = current->mm->context.vdso_base + vdso64_rt_sigtramp;
1da177e4
LT
770 } else {
771 err |= setup_trampoline(__NR_rt_sigreturn, &frame->tramp[0]);
772 if (err)
773 goto badframe;
774 regs->link = (unsigned long) &frame->tramp[0];
775 }
1da177e4
LT
776
777 /* Allocate a dummy caller frame for the signal handler. */
a3f61dc0 778 newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE;
1da177e4
LT
779 err |= put_user(regs->gpr[1], (unsigned long __user *)newsp);
780
781 /* Set up "regs" so we "return" to the signal handler. */
d606b92a 782 if (is_elf2_task()) {
129b69df 783 regs->nip = (unsigned long) ksig->ka.sa.sa_handler;
d606b92a
RR
784 regs->gpr[12] = regs->nip;
785 } else {
786 /* Handler is *really* a pointer to the function descriptor for
787 * the signal routine. The first entry in the function
788 * descriptor is the entry address of signal and the second
789 * entry is the TOC value we need to use.
790 */
791 func_descr_t __user *funct_desc_ptr =
129b69df 792 (func_descr_t __user *) ksig->ka.sa.sa_handler;
d606b92a
RR
793
794 err |= get_user(regs->nip, &funct_desc_ptr->entry);
795 err |= get_user(regs->gpr[2], &funct_desc_ptr->toc);
796 }
797
e871c6bb 798 /* enter the signal handler in native-endian mode */
fab5db97 799 regs->msr &= ~MSR_LE;
e871c6bb 800 regs->msr |= (MSR_KERNEL & MSR_LE);
1da177e4 801 regs->gpr[1] = newsp;
129b69df 802 regs->gpr[3] = ksig->sig;
1da177e4 803 regs->result = 0;
129b69df 804 if (ksig->ka.sa.sa_flags & SA_SIGINFO) {
1da177e4
LT
805 err |= get_user(regs->gpr[4], (unsigned long __user *)&frame->pinfo);
806 err |= get_user(regs->gpr[5], (unsigned long __user *)&frame->puc);
807 regs->gpr[6] = (unsigned long) frame;
808 } else {
809 regs->gpr[4] = (unsigned long)&frame->uc.uc_mcontext;
810 }
811 if (err)
812 goto badframe;
813
129b69df 814 return 0;
1da177e4
LT
815
816badframe:
76462232
CD
817 if (show_unhandled_signals)
818 printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
819 current->comm, current->pid, "setup_rt_frame",
820 (long)frame, regs->nip, regs->link);
d0c3d534 821
129b69df 822 return 1;
1da177e4 823}