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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 | 2 | /* |
1da177e4 LT |
3 | * PowerPC version |
4 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
5 | * | |
6 | * Derived from "arch/i386/kernel/signal.c" | |
7 | * Copyright (C) 1991, 1992 Linus Torvalds | |
8 | * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson | |
1da177e4 LT |
9 | */ |
10 | ||
1da177e4 LT |
11 | #include <linux/sched.h> |
12 | #include <linux/mm.h> | |
13 | #include <linux/smp.h> | |
1da177e4 LT |
14 | #include <linux/kernel.h> |
15 | #include <linux/signal.h> | |
16 | #include <linux/errno.h> | |
17 | #include <linux/wait.h> | |
18 | #include <linux/unistd.h> | |
19 | #include <linux/stddef.h> | |
20 | #include <linux/elf.h> | |
21 | #include <linux/ptrace.h> | |
76462232 | 22 | #include <linux/ratelimit.h> |
f3675644 | 23 | #include <linux/syscalls.h> |
1da177e4 LT |
24 | |
25 | #include <asm/sigcontext.h> | |
26 | #include <asm/ucontext.h> | |
7c0f6ba6 | 27 | #include <linux/uaccess.h> |
1da177e4 | 28 | #include <asm/pgtable.h> |
1da177e4 LT |
29 | #include <asm/unistd.h> |
30 | #include <asm/cacheflush.h> | |
a7f31841 | 31 | #include <asm/syscalls.h> |
1da177e4 | 32 | #include <asm/vdso.h> |
ae3a197e | 33 | #include <asm/switch_to.h> |
2b0a576d | 34 | #include <asm/tm.h> |
0545d543 | 35 | #include <asm/asm-prototypes.h> |
1da177e4 | 36 | |
22e38f29 | 37 | #include "signal.h" |
1da177e4 | 38 | |
1da177e4 | 39 | |
6741f3a7 | 40 | #define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs)) |
1da177e4 LT |
41 | #define FP_REGS_SIZE sizeof(elf_fpregset_t) |
42 | ||
43 | #define TRAMP_TRACEBACK 3 | |
44 | #define TRAMP_SIZE 6 | |
45 | ||
46 | /* | |
47 | * When we have signals to deliver, we set up on the user stack, | |
48 | * going down from the original stack pointer: | |
49 | * 1) a rt_sigframe struct which contains the ucontext | |
50 | * 2) a gap of __SIGNAL_FRAMESIZE bytes which acts as a dummy caller | |
51 | * frame for the signal handler. | |
52 | */ | |
53 | ||
54 | struct rt_sigframe { | |
55 | /* sys_rt_sigreturn requires the ucontext be the first field */ | |
56 | struct ucontext uc; | |
2b0a576d MN |
57 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
58 | struct ucontext uc_transact; | |
59 | #endif | |
1da177e4 LT |
60 | unsigned long _unused[2]; |
61 | unsigned int tramp[TRAMP_SIZE]; | |
29e646df AV |
62 | struct siginfo __user *pinfo; |
63 | void __user *puc; | |
1da177e4 | 64 | struct siginfo info; |
573ebfa6 PM |
65 | /* New 64 bit little-endian ABI allows redzone of 512 bytes below sp */ |
66 | char abigap[USER_REDZONE_SIZE]; | |
1da177e4 LT |
67 | } __attribute__ ((aligned (16))); |
68 | ||
d0c3d534 OJ |
69 | static const char fmt32[] = KERN_INFO \ |
70 | "%s[%d]: bad frame in %s: %08lx nip %08lx lr %08lx\n"; | |
71 | static const char fmt64[] = KERN_INFO \ | |
72 | "%s[%d]: bad frame in %s: %016lx nip %016lx lr %016lx\n"; | |
73 | ||
2476c09f AK |
74 | /* |
75 | * This computes a quad word aligned pointer inside the vmx_reserve array | |
76 | * element. For historical reasons sigcontext might not be quad word aligned, | |
77 | * but the location we write the VMX regs to must be. See the comment in | |
78 | * sigcontext for more detail. | |
79 | */ | |
80 | #ifdef CONFIG_ALTIVEC | |
81 | static elf_vrreg_t __user *sigcontext_vmx_regs(struct sigcontext __user *sc) | |
82 | { | |
83 | return (elf_vrreg_t __user *) (((unsigned long)sc->vmx_reserve + 15) & ~0xful); | |
84 | } | |
85 | #endif | |
86 | ||
1da177e4 LT |
87 | /* |
88 | * Set up the sigcontext for the signal frame. | |
89 | */ | |
90 | ||
d1199431 CB |
91 | static long setup_sigcontext(struct sigcontext __user *sc, |
92 | struct task_struct *tsk, int signr, sigset_t *set, | |
93 | unsigned long handler, int ctx_has_vsx_region) | |
1da177e4 LT |
94 | { |
95 | /* When CONFIG_ALTIVEC is set, we _always_ setup v_regs even if the | |
96 | * process never used altivec yet (MSR_VEC is zero in pt_regs of | |
97 | * the context). This is very important because we must ensure we | |
98 | * don't lose the VRSAVE content that may have been set prior to | |
99 | * the process doing its first vector operation | |
48fc7f7e | 100 | * Userland shall check AT_HWCAP to know whether it can rely on the |
1da177e4 LT |
101 | * v_regs pointer or not |
102 | */ | |
103 | #ifdef CONFIG_ALTIVEC | |
2476c09f | 104 | elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc); |
d96f234f | 105 | unsigned long vrsave; |
1da177e4 | 106 | #endif |
d1199431 | 107 | struct pt_regs *regs = tsk->thread.regs; |
0be234a4 | 108 | unsigned long msr = regs->msr; |
1da177e4 | 109 | long err = 0; |
a8a4b03a MS |
110 | /* Force usr to alway see softe as 1 (interrupts enabled) */ |
111 | unsigned long softe = 0x1; | |
1da177e4 | 112 | |
d1199431 CB |
113 | BUG_ON(tsk != current); |
114 | ||
1da177e4 LT |
115 | #ifdef CONFIG_ALTIVEC |
116 | err |= __put_user(v_regs, &sc->v_regs); | |
117 | ||
118 | /* save altivec registers */ | |
d1199431 CB |
119 | if (tsk->thread.used_vr) { |
120 | flush_altivec_to_thread(tsk); | |
1da177e4 | 121 | /* Copy 33 vec registers (vr0..31 and vscr) to the stack */ |
d1199431 | 122 | err |= __copy_to_user(v_regs, &tsk->thread.vr_state, |
de79f7b9 | 123 | 33 * sizeof(vector128)); |
1da177e4 LT |
124 | /* set MSR_VEC in the MSR value in the frame to indicate that sc->v_reg) |
125 | * contains valid data. | |
126 | */ | |
0be234a4 | 127 | msr |= MSR_VEC; |
1da177e4 LT |
128 | } |
129 | /* We always copy to/from vrsave, it's 0 if we don't have or don't | |
130 | * use altivec. | |
131 | */ | |
d96f234f AB |
132 | vrsave = 0; |
133 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
134 | vrsave = mfspr(SPRN_VRSAVE); | |
d1199431 | 135 | tsk->thread.vrsave = vrsave; |
d96f234f AB |
136 | } |
137 | ||
138 | err |= __put_user(vrsave, (u32 __user *)&v_regs[33]); | |
1da177e4 LT |
139 | #else /* CONFIG_ALTIVEC */ |
140 | err |= __put_user(0, &sc->v_regs); | |
141 | #endif /* CONFIG_ALTIVEC */ | |
d1199431 | 142 | flush_fp_to_thread(tsk); |
6a274c08 | 143 | /* copy fpr regs and fpscr */ |
d1199431 | 144 | err |= copy_fpr_to_user(&sc->fp_regs, tsk); |
ec67ad82 MN |
145 | |
146 | /* | |
147 | * Clear the MSR VSX bit to indicate there is no valid state attached | |
148 | * to this context, except in the specific case below where we set it. | |
149 | */ | |
150 | msr &= ~MSR_VSX; | |
c6e6771b | 151 | #ifdef CONFIG_VSX |
ce48b210 MN |
152 | /* |
153 | * Copy VSX low doubleword to local buffer for formatting, | |
154 | * then out to userspace. Update v_regs to point after the | |
155 | * VMX data. | |
156 | */ | |
d1199431 CB |
157 | if (tsk->thread.used_vsr && ctx_has_vsx_region) { |
158 | flush_vsx_to_thread(tsk); | |
ce48b210 | 159 | v_regs += ELF_NVRREG; |
d1199431 | 160 | err |= copy_vsx_to_user(v_regs, tsk); |
ce48b210 MN |
161 | /* set MSR_VSX in the MSR value in the frame to |
162 | * indicate that sc->vs_reg) contains valid data. | |
163 | */ | |
164 | msr |= MSR_VSX; | |
165 | } | |
c6e6771b | 166 | #endif /* CONFIG_VSX */ |
1da177e4 | 167 | err |= __put_user(&sc->gp_regs, &sc->regs); |
1bd79336 | 168 | WARN_ON(!FULL_REGS(regs)); |
1da177e4 | 169 | err |= __copy_to_user(&sc->gp_regs, regs, GP_REGS_SIZE); |
0be234a4 | 170 | err |= __put_user(msr, &sc->gp_regs[PT_MSR]); |
a8a4b03a | 171 | err |= __put_user(softe, &sc->gp_regs[PT_SOFTE]); |
1da177e4 LT |
172 | err |= __put_user(signr, &sc->signal); |
173 | err |= __put_user(handler, &sc->handler); | |
174 | if (set != NULL) | |
175 | err |= __put_user(set->sig[0], &sc->oldmask); | |
176 | ||
177 | return err; | |
178 | } | |
179 | ||
2b0a576d MN |
180 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
181 | /* | |
182 | * As above, but Transactional Memory is in use, so deliver sigcontexts | |
183 | * containing checkpointed and transactional register states. | |
184 | * | |
2b3f8e87 MN |
185 | * To do this, we treclaim (done before entering here) to gather both sets of |
186 | * registers and set up the 'normal' sigcontext registers with rolled-back | |
187 | * register values such that a simple signal handler sees a correct | |
188 | * checkpointed register state. If interested, a TM-aware sighandler can | |
189 | * examine the transactional registers in the 2nd sigcontext to determine the | |
190 | * real origin of the signal. | |
2b0a576d MN |
191 | */ |
192 | static long setup_tm_sigcontexts(struct sigcontext __user *sc, | |
193 | struct sigcontext __user *tm_sc, | |
d1199431 | 194 | struct task_struct *tsk, |
2b0a576d MN |
195 | int signr, sigset_t *set, unsigned long handler) |
196 | { | |
197 | /* When CONFIG_ALTIVEC is set, we _always_ setup v_regs even if the | |
198 | * process never used altivec yet (MSR_VEC is zero in pt_regs of | |
199 | * the context). This is very important because we must ensure we | |
200 | * don't lose the VRSAVE content that may have been set prior to | |
201 | * the process doing its first vector operation | |
202 | * Userland shall check AT_HWCAP to know wether it can rely on the | |
203 | * v_regs pointer or not. | |
204 | */ | |
205 | #ifdef CONFIG_ALTIVEC | |
2476c09f AK |
206 | elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc); |
207 | elf_vrreg_t __user *tm_v_regs = sigcontext_vmx_regs(tm_sc); | |
2b0a576d | 208 | #endif |
d1199431 | 209 | struct pt_regs *regs = tsk->thread.regs; |
1c200e63 | 210 | unsigned long msr = tsk->thread.regs->msr; |
2b0a576d MN |
211 | long err = 0; |
212 | ||
d1199431 CB |
213 | BUG_ON(tsk != current); |
214 | ||
2b0a576d MN |
215 | BUG_ON(!MSR_TM_ACTIVE(regs->msr)); |
216 | ||
92fb8690 MN |
217 | WARN_ON(tm_suspend_disabled); |
218 | ||
1c200e63 GR |
219 | /* Restore checkpointed FP, VEC, and VSX bits from ckpt_regs as |
220 | * it contains the correct FP, VEC, VSX state after we treclaimed | |
221 | * the transaction and giveup_all() was called on reclaiming. | |
222 | */ | |
223 | msr |= tsk->thread.ckpt_regs.msr & (MSR_FP | MSR_VEC | MSR_VSX); | |
224 | ||
d31626f7 PM |
225 | /* Remove TM bits from thread's MSR. The MSR in the sigcontext |
226 | * just indicates to userland that we were doing a transaction, but we | |
227 | * don't want to return in transactional state. This also ensures | |
228 | * that flush_fp_to_thread won't set TIF_RESTORE_TM again. | |
229 | */ | |
230 | regs->msr &= ~MSR_TS_MASK; | |
231 | ||
2b0a576d MN |
232 | #ifdef CONFIG_ALTIVEC |
233 | err |= __put_user(v_regs, &sc->v_regs); | |
234 | err |= __put_user(tm_v_regs, &tm_sc->v_regs); | |
235 | ||
236 | /* save altivec registers */ | |
d1199431 | 237 | if (tsk->thread.used_vr) { |
2b0a576d | 238 | /* Copy 33 vec registers (vr0..31 and vscr) to the stack */ |
000ec280 | 239 | err |= __copy_to_user(v_regs, &tsk->thread.ckvr_state, |
2b0a576d MN |
240 | 33 * sizeof(vector128)); |
241 | /* If VEC was enabled there are transactional VRs valid too, | |
242 | * else they're a copy of the checkpointed VRs. | |
243 | */ | |
244 | if (msr & MSR_VEC) | |
245 | err |= __copy_to_user(tm_v_regs, | |
dc310669 | 246 | &tsk->thread.vr_state, |
2b0a576d MN |
247 | 33 * sizeof(vector128)); |
248 | else | |
249 | err |= __copy_to_user(tm_v_regs, | |
000ec280 | 250 | &tsk->thread.ckvr_state, |
2b0a576d MN |
251 | 33 * sizeof(vector128)); |
252 | ||
253 | /* set MSR_VEC in the MSR value in the frame to indicate | |
254 | * that sc->v_reg contains valid data. | |
255 | */ | |
256 | msr |= MSR_VEC; | |
257 | } | |
258 | /* We always copy to/from vrsave, it's 0 if we don't have or don't | |
259 | * use altivec. | |
260 | */ | |
408a7e08 | 261 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
000ec280 CB |
262 | tsk->thread.ckvrsave = mfspr(SPRN_VRSAVE); |
263 | err |= __put_user(tsk->thread.ckvrsave, (u32 __user *)&v_regs[33]); | |
2b0a576d | 264 | if (msr & MSR_VEC) |
dc310669 | 265 | err |= __put_user(tsk->thread.vrsave, |
2b0a576d MN |
266 | (u32 __user *)&tm_v_regs[33]); |
267 | else | |
000ec280 | 268 | err |= __put_user(tsk->thread.ckvrsave, |
2b0a576d MN |
269 | (u32 __user *)&tm_v_regs[33]); |
270 | ||
271 | #else /* CONFIG_ALTIVEC */ | |
272 | err |= __put_user(0, &sc->v_regs); | |
273 | err |= __put_user(0, &tm_sc->v_regs); | |
274 | #endif /* CONFIG_ALTIVEC */ | |
275 | ||
276 | /* copy fpr regs and fpscr */ | |
000ec280 | 277 | err |= copy_ckfpr_to_user(&sc->fp_regs, tsk); |
2b0a576d | 278 | if (msr & MSR_FP) |
d1199431 | 279 | err |= copy_fpr_to_user(&tm_sc->fp_regs, tsk); |
dc310669 | 280 | else |
000ec280 | 281 | err |= copy_ckfpr_to_user(&tm_sc->fp_regs, tsk); |
2b0a576d MN |
282 | |
283 | #ifdef CONFIG_VSX | |
284 | /* | |
285 | * Copy VSX low doubleword to local buffer for formatting, | |
286 | * then out to userspace. Update v_regs to point after the | |
287 | * VMX data. | |
288 | */ | |
d1199431 | 289 | if (tsk->thread.used_vsr) { |
2b0a576d MN |
290 | v_regs += ELF_NVRREG; |
291 | tm_v_regs += ELF_NVRREG; | |
292 | ||
000ec280 | 293 | err |= copy_ckvsx_to_user(v_regs, tsk); |
2b0a576d MN |
294 | |
295 | if (msr & MSR_VSX) | |
d1199431 | 296 | err |= copy_vsx_to_user(tm_v_regs, tsk); |
dc310669 | 297 | else |
000ec280 | 298 | err |= copy_ckvsx_to_user(tm_v_regs, tsk); |
2b0a576d MN |
299 | |
300 | /* set MSR_VSX in the MSR value in the frame to | |
301 | * indicate that sc->vs_reg) contains valid data. | |
302 | */ | |
303 | msr |= MSR_VSX; | |
304 | } | |
305 | #endif /* CONFIG_VSX */ | |
306 | ||
307 | err |= __put_user(&sc->gp_regs, &sc->regs); | |
308 | err |= __put_user(&tm_sc->gp_regs, &tm_sc->regs); | |
309 | WARN_ON(!FULL_REGS(regs)); | |
310 | err |= __copy_to_user(&tm_sc->gp_regs, regs, GP_REGS_SIZE); | |
311 | err |= __copy_to_user(&sc->gp_regs, | |
d1199431 | 312 | &tsk->thread.ckpt_regs, GP_REGS_SIZE); |
2b0a576d MN |
313 | err |= __put_user(msr, &tm_sc->gp_regs[PT_MSR]); |
314 | err |= __put_user(msr, &sc->gp_regs[PT_MSR]); | |
315 | err |= __put_user(signr, &sc->signal); | |
316 | err |= __put_user(handler, &sc->handler); | |
317 | if (set != NULL) | |
318 | err |= __put_user(set->sig[0], &sc->oldmask); | |
319 | ||
320 | return err; | |
321 | } | |
322 | #endif | |
323 | ||
1da177e4 LT |
324 | /* |
325 | * Restore the sigcontext from the signal frame. | |
326 | */ | |
327 | ||
d1199431 | 328 | static long restore_sigcontext(struct task_struct *tsk, sigset_t *set, int sig, |
1da177e4 LT |
329 | struct sigcontext __user *sc) |
330 | { | |
331 | #ifdef CONFIG_ALTIVEC | |
332 | elf_vrreg_t __user *v_regs; | |
333 | #endif | |
334 | unsigned long err = 0; | |
335 | unsigned long save_r13 = 0; | |
1da177e4 | 336 | unsigned long msr; |
d1199431 | 337 | struct pt_regs *regs = tsk->thread.regs; |
6a274c08 MN |
338 | #ifdef CONFIG_VSX |
339 | int i; | |
340 | #endif | |
1da177e4 | 341 | |
d1199431 CB |
342 | BUG_ON(tsk != current); |
343 | ||
1da177e4 LT |
344 | /* If this is not a signal return, we preserve the TLS in r13 */ |
345 | if (!sig) | |
346 | save_r13 = regs->gpr[13]; | |
347 | ||
fcbc5a97 SR |
348 | /* copy the GPRs */ |
349 | err |= __copy_from_user(regs->gpr, sc->gp_regs, sizeof(regs->gpr)); | |
350 | err |= __get_user(regs->nip, &sc->gp_regs[PT_NIP]); | |
fab5db97 PM |
351 | /* get MSR separately, transfer the LE bit if doing signal return */ |
352 | err |= __get_user(msr, &sc->gp_regs[PT_MSR]); | |
353 | if (sig) | |
354 | regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); | |
fcbc5a97 SR |
355 | err |= __get_user(regs->orig_gpr3, &sc->gp_regs[PT_ORIG_R3]); |
356 | err |= __get_user(regs->ctr, &sc->gp_regs[PT_CTR]); | |
357 | err |= __get_user(regs->link, &sc->gp_regs[PT_LNK]); | |
358 | err |= __get_user(regs->xer, &sc->gp_regs[PT_XER]); | |
359 | err |= __get_user(regs->ccr, &sc->gp_regs[PT_CCR]); | |
fab5db97 | 360 | /* skip SOFTE */ |
9a81c16b | 361 | regs->trap = 0; |
fcbc5a97 SR |
362 | err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]); |
363 | err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]); | |
364 | err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]); | |
1da177e4 LT |
365 | |
366 | if (!sig) | |
367 | regs->gpr[13] = save_r13; | |
1da177e4 LT |
368 | if (set != NULL) |
369 | err |= __get_user(set->sig[0], &sc->oldmask); | |
370 | ||
ae62fbb5 PM |
371 | /* |
372 | * Force reload of FP/VEC. | |
d1199431 | 373 | * This has to be done before copying stuff into tsk->thread.fpr/vr |
ae62fbb5 PM |
374 | * for the reasons explained in the previous comment. |
375 | */ | |
ce48b210 | 376 | regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX); |
ae62fbb5 | 377 | |
1da177e4 LT |
378 | #ifdef CONFIG_ALTIVEC |
379 | err |= __get_user(v_regs, &sc->v_regs); | |
1da177e4 LT |
380 | if (err) |
381 | return err; | |
96d4f267 | 382 | if (v_regs && !access_ok(v_regs, 34 * sizeof(vector128))) |
7c85d1f9 | 383 | return -EFAULT; |
1da177e4 | 384 | /* Copy 33 vec registers (vr0..31 and vscr) from the stack */ |
e1c0d66f | 385 | if (v_regs != NULL && (msr & MSR_VEC) != 0) { |
d1199431 | 386 | err |= __copy_from_user(&tsk->thread.vr_state, v_regs, |
1da177e4 | 387 | 33 * sizeof(vector128)); |
d1199431 CB |
388 | tsk->thread.used_vr = true; |
389 | } else if (tsk->thread.used_vr) { | |
390 | memset(&tsk->thread.vr_state, 0, 33 * sizeof(vector128)); | |
e1c0d66f | 391 | } |
1da177e4 | 392 | /* Always get VRSAVE back */ |
b0d436c7 | 393 | if (v_regs != NULL) |
d1199431 | 394 | err |= __get_user(tsk->thread.vrsave, (u32 __user *)&v_regs[33]); |
1da177e4 | 395 | else |
d1199431 | 396 | tsk->thread.vrsave = 0; |
408a7e08 | 397 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
d1199431 | 398 | mtspr(SPRN_VRSAVE, tsk->thread.vrsave); |
1da177e4 | 399 | #endif /* CONFIG_ALTIVEC */ |
c6e6771b | 400 | /* restore floating point */ |
d1199431 | 401 | err |= copy_fpr_from_user(tsk, &sc->fp_regs); |
6a274c08 | 402 | #ifdef CONFIG_VSX |
ce48b210 MN |
403 | /* |
404 | * Get additional VSX data. Update v_regs to point after the | |
405 | * VMX data. Copy VSX low doubleword from userspace to local | |
406 | * buffer for formatting, then into the taskstruct. | |
407 | */ | |
408 | v_regs += ELF_NVRREG; | |
e1c0d66f | 409 | if ((msr & MSR_VSX) != 0) { |
d1199431 CB |
410 | err |= copy_vsx_from_user(tsk, v_regs); |
411 | tsk->thread.used_vsr = true; | |
412 | } else { | |
6a274c08 | 413 | for (i = 0; i < 32 ; i++) |
d1199431 CB |
414 | tsk->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
415 | } | |
c6e6771b | 416 | #endif |
1da177e4 LT |
417 | return err; |
418 | } | |
419 | ||
2b0a576d MN |
420 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
421 | /* | |
422 | * Restore the two sigcontexts from the frame of a transactional processes. | |
423 | */ | |
424 | ||
d1199431 | 425 | static long restore_tm_sigcontexts(struct task_struct *tsk, |
2b0a576d MN |
426 | struct sigcontext __user *sc, |
427 | struct sigcontext __user *tm_sc) | |
428 | { | |
429 | #ifdef CONFIG_ALTIVEC | |
430 | elf_vrreg_t __user *v_regs, *tm_v_regs; | |
431 | #endif | |
432 | unsigned long err = 0; | |
433 | unsigned long msr; | |
d1199431 | 434 | struct pt_regs *regs = tsk->thread.regs; |
2b0a576d MN |
435 | #ifdef CONFIG_VSX |
436 | int i; | |
437 | #endif | |
d1199431 CB |
438 | |
439 | BUG_ON(tsk != current); | |
440 | ||
92fb8690 MN |
441 | if (tm_suspend_disabled) |
442 | return -EINVAL; | |
443 | ||
2b0a576d MN |
444 | /* copy the GPRs */ |
445 | err |= __copy_from_user(regs->gpr, tm_sc->gp_regs, sizeof(regs->gpr)); | |
d1199431 | 446 | err |= __copy_from_user(&tsk->thread.ckpt_regs, sc->gp_regs, |
2b0a576d MN |
447 | sizeof(regs->gpr)); |
448 | ||
449 | /* | |
450 | * TFHAR is restored from the checkpointed 'wound-back' ucontext's NIP. | |
451 | * TEXASR was set by the signal delivery reclaim, as was TFIAR. | |
452 | * Users doing anything abhorrent like thread-switching w/ signals for | |
453 | * TM-Suspended code will have to back TEXASR/TFIAR up themselves. | |
454 | * For the case of getting a signal and simply returning from it, | |
455 | * we don't need to re-copy them here. | |
456 | */ | |
457 | err |= __get_user(regs->nip, &tm_sc->gp_regs[PT_NIP]); | |
d1199431 | 458 | err |= __get_user(tsk->thread.tm_tfhar, &sc->gp_regs[PT_NIP]); |
2b0a576d MN |
459 | |
460 | /* get MSR separately, transfer the LE bit if doing signal return */ | |
461 | err |= __get_user(msr, &sc->gp_regs[PT_MSR]); | |
d2b9d2a5 MN |
462 | /* Don't allow reserved mode. */ |
463 | if (MSR_TM_RESV(msr)) | |
464 | return -EINVAL; | |
465 | ||
87b4e539 | 466 | /* pull in MSR LE from user context */ |
2b0a576d MN |
467 | regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); |
468 | ||
469 | /* The following non-GPR non-FPR non-VR state is also checkpointed: */ | |
470 | err |= __get_user(regs->ctr, &tm_sc->gp_regs[PT_CTR]); | |
471 | err |= __get_user(regs->link, &tm_sc->gp_regs[PT_LNK]); | |
472 | err |= __get_user(regs->xer, &tm_sc->gp_regs[PT_XER]); | |
473 | err |= __get_user(regs->ccr, &tm_sc->gp_regs[PT_CCR]); | |
d1199431 | 474 | err |= __get_user(tsk->thread.ckpt_regs.ctr, |
2b0a576d | 475 | &sc->gp_regs[PT_CTR]); |
d1199431 | 476 | err |= __get_user(tsk->thread.ckpt_regs.link, |
2b0a576d | 477 | &sc->gp_regs[PT_LNK]); |
d1199431 | 478 | err |= __get_user(tsk->thread.ckpt_regs.xer, |
2b0a576d | 479 | &sc->gp_regs[PT_XER]); |
d1199431 | 480 | err |= __get_user(tsk->thread.ckpt_regs.ccr, |
2b0a576d MN |
481 | &sc->gp_regs[PT_CCR]); |
482 | ||
483 | /* These regs are not checkpointed; they can go in 'regs'. */ | |
484 | err |= __get_user(regs->trap, &sc->gp_regs[PT_TRAP]); | |
485 | err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]); | |
486 | err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]); | |
487 | err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]); | |
488 | ||
2b0a576d MN |
489 | /* |
490 | * Force reload of FP/VEC. | |
d1199431 | 491 | * This has to be done before copying stuff into tsk->thread.fpr/vr |
2b0a576d MN |
492 | * for the reasons explained in the previous comment. |
493 | */ | |
494 | regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX); | |
495 | ||
496 | #ifdef CONFIG_ALTIVEC | |
497 | err |= __get_user(v_regs, &sc->v_regs); | |
498 | err |= __get_user(tm_v_regs, &tm_sc->v_regs); | |
499 | if (err) | |
500 | return err; | |
96d4f267 | 501 | if (v_regs && !access_ok(v_regs, 34 * sizeof(vector128))) |
2b0a576d | 502 | return -EFAULT; |
96d4f267 | 503 | if (tm_v_regs && !access_ok(tm_v_regs, 34 * sizeof(vector128))) |
2b0a576d MN |
504 | return -EFAULT; |
505 | /* Copy 33 vec registers (vr0..31 and vscr) from the stack */ | |
b0d436c7 | 506 | if (v_regs != NULL && tm_v_regs != NULL && (msr & MSR_VEC) != 0) { |
000ec280 | 507 | err |= __copy_from_user(&tsk->thread.ckvr_state, v_regs, |
2b0a576d | 508 | 33 * sizeof(vector128)); |
dc310669 | 509 | err |= __copy_from_user(&tsk->thread.vr_state, tm_v_regs, |
2b0a576d | 510 | 33 * sizeof(vector128)); |
e1c0d66f | 511 | current->thread.used_vr = true; |
2b0a576d | 512 | } |
d1199431 CB |
513 | else if (tsk->thread.used_vr) { |
514 | memset(&tsk->thread.vr_state, 0, 33 * sizeof(vector128)); | |
000ec280 | 515 | memset(&tsk->thread.ckvr_state, 0, 33 * sizeof(vector128)); |
2b0a576d MN |
516 | } |
517 | /* Always get VRSAVE back */ | |
b0d436c7 | 518 | if (v_regs != NULL && tm_v_regs != NULL) { |
000ec280 | 519 | err |= __get_user(tsk->thread.ckvrsave, |
dc310669 CB |
520 | (u32 __user *)&v_regs[33]); |
521 | err |= __get_user(tsk->thread.vrsave, | |
2b0a576d MN |
522 | (u32 __user *)&tm_v_regs[33]); |
523 | } | |
524 | else { | |
d1199431 | 525 | tsk->thread.vrsave = 0; |
000ec280 | 526 | tsk->thread.ckvrsave = 0; |
2b0a576d | 527 | } |
408a7e08 | 528 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
d1199431 | 529 | mtspr(SPRN_VRSAVE, tsk->thread.vrsave); |
2b0a576d MN |
530 | #endif /* CONFIG_ALTIVEC */ |
531 | /* restore floating point */ | |
dc310669 | 532 | err |= copy_fpr_from_user(tsk, &tm_sc->fp_regs); |
000ec280 | 533 | err |= copy_ckfpr_from_user(tsk, &sc->fp_regs); |
2b0a576d MN |
534 | #ifdef CONFIG_VSX |
535 | /* | |
536 | * Get additional VSX data. Update v_regs to point after the | |
537 | * VMX data. Copy VSX low doubleword from userspace to local | |
538 | * buffer for formatting, then into the taskstruct. | |
539 | */ | |
540 | if (v_regs && ((msr & MSR_VSX) != 0)) { | |
541 | v_regs += ELF_NVRREG; | |
542 | tm_v_regs += ELF_NVRREG; | |
dc310669 | 543 | err |= copy_vsx_from_user(tsk, tm_v_regs); |
000ec280 | 544 | err |= copy_ckvsx_from_user(tsk, v_regs); |
d1199431 | 545 | tsk->thread.used_vsr = true; |
2b0a576d MN |
546 | } else { |
547 | for (i = 0; i < 32 ; i++) { | |
d1199431 | 548 | tsk->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
000ec280 | 549 | tsk->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
2b0a576d MN |
550 | } |
551 | } | |
552 | #endif | |
553 | tm_enable(); | |
e6b8fd02 | 554 | /* Make sure the transaction is marked as failed */ |
d1199431 | 555 | tsk->thread.tm_texasr |= TEXASR_FS; |
e1c3743e BL |
556 | |
557 | /* | |
558 | * Disabling preemption, since it is unsafe to be preempted | |
559 | * with MSR[TS] set without recheckpointing. | |
560 | */ | |
561 | preempt_disable(); | |
562 | ||
563 | /* pull in MSR TS bits from user context */ | |
e620d450 | 564 | regs->msr |= msr & MSR_TS_MASK; |
e1c3743e BL |
565 | |
566 | /* | |
567 | * Ensure that TM is enabled in regs->msr before we leave the signal | |
568 | * handler. It could be the case that (a) user disabled the TM bit | |
569 | * through the manipulation of the MSR bits in uc_mcontext or (b) the | |
570 | * TM bit was disabled because a sufficient number of context switches | |
571 | * happened whilst in the signal handler and load_tm overflowed, | |
572 | * disabling the TM bit. In either case we can end up with an illegal | |
573 | * TM state leading to a TM Bad Thing when we return to userspace. | |
574 | * | |
575 | * CAUTION: | |
576 | * After regs->MSR[TS] being updated, make sure that get_user(), | |
577 | * put_user() or similar functions are *not* called. These | |
578 | * functions can generate page faults which will cause the process | |
579 | * to be de-scheduled with MSR[TS] set but without calling | |
580 | * tm_recheckpoint(). This can cause a bug. | |
581 | */ | |
582 | regs->msr |= MSR_TM; | |
583 | ||
2b0a576d | 584 | /* This loads the checkpointed FP/VEC state, if used */ |
eb5c3f1c | 585 | tm_recheckpoint(&tsk->thread); |
2b0a576d | 586 | |
dc310669 | 587 | msr_check_and_set(msr & (MSR_FP | MSR_VEC)); |
2b0a576d | 588 | if (msr & MSR_FP) { |
dc310669 | 589 | load_fp_state(&tsk->thread.fp_state); |
d1199431 | 590 | regs->msr |= (MSR_FP | tsk->thread.fpexc_mode); |
2b0a576d MN |
591 | } |
592 | if (msr & MSR_VEC) { | |
dc310669 | 593 | load_vr_state(&tsk->thread.vr_state); |
2b0a576d MN |
594 | regs->msr |= MSR_VEC; |
595 | } | |
596 | ||
e1c3743e BL |
597 | preempt_enable(); |
598 | ||
2b0a576d MN |
599 | return err; |
600 | } | |
601 | #endif | |
602 | ||
1da177e4 LT |
603 | /* |
604 | * Setup the trampoline code on the stack | |
605 | */ | |
606 | static long setup_trampoline(unsigned int syscall, unsigned int __user *tramp) | |
607 | { | |
608 | int i; | |
609 | long err = 0; | |
610 | ||
611 | /* addi r1, r1, __SIGNAL_FRAMESIZE # Pop the dummy stackframe */ | |
d16952a6 CL |
612 | err |= __put_user(PPC_INST_ADDI | __PPC_RT(R1) | __PPC_RA(R1) | |
613 | (__SIGNAL_FRAMESIZE & 0xffff), &tramp[0]); | |
1da177e4 | 614 | /* li r0, __NR_[rt_]sigreturn| */ |
d16952a6 | 615 | err |= __put_user(PPC_INST_ADDI | (syscall & 0xffff), &tramp[1]); |
1da177e4 | 616 | /* sc */ |
d16952a6 | 617 | err |= __put_user(PPC_INST_SC, &tramp[2]); |
1da177e4 LT |
618 | |
619 | /* Minimal traceback info */ | |
620 | for (i=TRAMP_TRACEBACK; i < TRAMP_SIZE ;i++) | |
621 | err |= __put_user(0, &tramp[i]); | |
622 | ||
623 | if (!err) | |
624 | flush_icache_range((unsigned long) &tramp[0], | |
625 | (unsigned long) &tramp[TRAMP_SIZE]); | |
626 | ||
627 | return err; | |
628 | } | |
629 | ||
c1cb299e MN |
630 | /* |
631 | * Userspace code may pass a ucontext which doesn't include VSX added | |
632 | * at the end. We need to check for this case. | |
633 | */ | |
634 | #define UCONTEXTSIZEWITHOUTVSX \ | |
635 | (sizeof(struct ucontext) - 32*sizeof(long)) | |
636 | ||
1da177e4 LT |
637 | /* |
638 | * Handle {get,set,swap}_context operations | |
639 | */ | |
f3675644 AV |
640 | SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx, |
641 | struct ucontext __user *, new_ctx, long, ctx_size) | |
1da177e4 LT |
642 | { |
643 | unsigned char tmp; | |
644 | sigset_t set; | |
c1cb299e | 645 | unsigned long new_msr = 0; |
16c29d18 | 646 | int ctx_has_vsx_region = 0; |
1da177e4 | 647 | |
c1cb299e | 648 | if (new_ctx && |
16c29d18 | 649 | get_user(new_msr, &new_ctx->uc_mcontext.gp_regs[PT_MSR])) |
c1cb299e MN |
650 | return -EFAULT; |
651 | /* | |
652 | * Check that the context is not smaller than the original | |
653 | * size (with VMX but without VSX) | |
1da177e4 | 654 | */ |
c1cb299e | 655 | if (ctx_size < UCONTEXTSIZEWITHOUTVSX) |
1da177e4 | 656 | return -EINVAL; |
c1cb299e MN |
657 | /* |
658 | * If the new context state sets the MSR VSX bits but | |
659 | * it doesn't provide VSX state. | |
660 | */ | |
661 | if ((ctx_size < sizeof(struct ucontext)) && | |
662 | (new_msr & MSR_VSX)) | |
663 | return -EINVAL; | |
16c29d18 MN |
664 | /* Does the context have enough room to store VSX data? */ |
665 | if (ctx_size >= sizeof(struct ucontext)) | |
666 | ctx_has_vsx_region = 1; | |
667 | ||
1da177e4 | 668 | if (old_ctx != NULL) { |
96d4f267 | 669 | if (!access_ok(old_ctx, ctx_size) |
d1199431 | 670 | || setup_sigcontext(&old_ctx->uc_mcontext, current, 0, NULL, 0, |
16c29d18 | 671 | ctx_has_vsx_region) |
1da177e4 LT |
672 | || __copy_to_user(&old_ctx->uc_sigmask, |
673 | ¤t->blocked, sizeof(sigset_t))) | |
674 | return -EFAULT; | |
675 | } | |
676 | if (new_ctx == NULL) | |
677 | return 0; | |
96d4f267 | 678 | if (!access_ok(new_ctx, ctx_size) |
1da177e4 | 679 | || __get_user(tmp, (u8 __user *) new_ctx) |
16c29d18 | 680 | || __get_user(tmp, (u8 __user *) new_ctx + ctx_size - 1)) |
1da177e4 LT |
681 | return -EFAULT; |
682 | ||
683 | /* | |
684 | * If we get a fault copying the context into the kernel's | |
685 | * image of the user's registers, we can't just return -EFAULT | |
686 | * because the user's registers will be corrupted. For instance | |
687 | * the NIP value may have been updated but not some of the | |
688 | * other registers. Given that we have done the access_ok | |
689 | * and successfully read the first and last bytes of the region | |
690 | * above, this should only happen in an out-of-memory situation | |
691 | * or if another thread unmaps the region containing the context. | |
692 | * We kill the task with a SIGSEGV in this situation. | |
693 | */ | |
694 | ||
695 | if (__copy_from_user(&set, &new_ctx->uc_sigmask, sizeof(set))) | |
696 | do_exit(SIGSEGV); | |
17440f17 | 697 | set_current_blocked(&set); |
d1199431 | 698 | if (restore_sigcontext(current, NULL, 0, &new_ctx->uc_mcontext)) |
1da177e4 LT |
699 | do_exit(SIGSEGV); |
700 | ||
701 | /* This returns like rt_sigreturn */ | |
401d1f02 | 702 | set_thread_flag(TIF_RESTOREALL); |
1da177e4 LT |
703 | return 0; |
704 | } | |
705 | ||
706 | ||
707 | /* | |
708 | * Do a signal return; undo the signal stack. | |
709 | */ | |
710 | ||
f3675644 | 711 | SYSCALL_DEFINE0(rt_sigreturn) |
1da177e4 | 712 | { |
f3675644 | 713 | struct pt_regs *regs = current_pt_regs(); |
1da177e4 LT |
714 | struct ucontext __user *uc = (struct ucontext __user *)regs->gpr[1]; |
715 | sigset_t set; | |
2b0a576d MN |
716 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
717 | unsigned long msr; | |
718 | #endif | |
1da177e4 LT |
719 | |
720 | /* Always make any pending restarted system calls return -EINTR */ | |
f56141e3 | 721 | current->restart_block.fn = do_no_restart_syscall; |
1da177e4 | 722 | |
96d4f267 | 723 | if (!access_ok(uc, sizeof(*uc))) |
1da177e4 LT |
724 | goto badframe; |
725 | ||
726 | if (__copy_from_user(&set, &uc->uc_sigmask, sizeof(set))) | |
727 | goto badframe; | |
17440f17 | 728 | set_current_blocked(&set); |
78a3e888 | 729 | |
2b0a576d | 730 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
78a3e888 CB |
731 | /* |
732 | * If there is a transactional state then throw it away. | |
733 | * The purpose of a sigreturn is to destroy all traces of the | |
734 | * signal frame, this includes any transactional state created | |
735 | * within in. We only check for suspended as we can never be | |
736 | * active in the kernel, we are active, there is nothing better to | |
737 | * do than go ahead and Bad Thing later. | |
738 | * The cause is not important as there will never be a | |
739 | * recheckpoint so it's not user visible. | |
740 | */ | |
741 | if (MSR_TM_SUSPENDED(mfmsr())) | |
742 | tm_reclaim_current(0); | |
743 | ||
e620d450 BL |
744 | /* |
745 | * Disable MSR[TS] bit also, so, if there is an exception in the | |
746 | * code below (as a page fault in copy_ckvsx_to_user()), it does | |
747 | * not recheckpoint this task if there was a context switch inside | |
748 | * the exception. | |
749 | * | |
750 | * A major page fault can indirectly call schedule(). A reschedule | |
751 | * process in the middle of an exception can have a side effect | |
752 | * (Changing the CPU MSR[TS] state), since schedule() is called | |
753 | * with the CPU MSR[TS] disable and returns with MSR[TS]=Suspended | |
754 | * (switch_to() calls tm_recheckpoint() for the 'new' process). In | |
755 | * this case, the process continues to be the same in the CPU, but | |
756 | * the CPU state just changed. | |
757 | * | |
758 | * This can cause a TM Bad Thing, since the MSR in the stack will | |
759 | * have the MSR[TS]=0, and this is what will be used to RFID. | |
760 | * | |
761 | * Clearing MSR[TS] state here will avoid a recheckpoint if there | |
762 | * is any process reschedule in kernel space. The MSR[TS] state | |
763 | * does not need to be saved also, since it will be replaced with | |
764 | * the MSR[TS] that came from user context later, at | |
765 | * restore_tm_sigcontexts. | |
766 | */ | |
767 | regs->msr &= ~MSR_TS_MASK; | |
768 | ||
2b0a576d MN |
769 | if (__get_user(msr, &uc->uc_mcontext.gp_regs[PT_MSR])) |
770 | goto badframe; | |
87b4e539 | 771 | if (MSR_TM_ACTIVE(msr)) { |
2b0a576d MN |
772 | /* We recheckpoint on return. */ |
773 | struct ucontext __user *uc_transact; | |
774 | if (__get_user(uc_transact, &uc->uc_link)) | |
775 | goto badframe; | |
d1199431 | 776 | if (restore_tm_sigcontexts(current, &uc->uc_mcontext, |
2b0a576d MN |
777 | &uc_transact->uc_mcontext)) |
778 | goto badframe; | |
897bc3df | 779 | } else |
2b0a576d | 780 | #endif |
897bc3df | 781 | { |
6f5b9f01 | 782 | /* |
897bc3df BL |
783 | * Fall through, for non-TM restore |
784 | * | |
6f5b9f01 BL |
785 | * Unset MSR[TS] on the thread regs since MSR from user |
786 | * context does not have MSR active, and recheckpoint was | |
787 | * not called since restore_tm_sigcontexts() was not called | |
788 | * also. | |
789 | * | |
790 | * If not unsetting it, the code can RFID to userspace with | |
791 | * MSR[TS] set, but without CPU in the proper state, | |
792 | * causing a TM bad thing. | |
793 | */ | |
794 | current->thread.regs->msr &= ~MSR_TS_MASK; | |
795 | if (restore_sigcontext(current, NULL, 1, &uc->uc_mcontext)) | |
796 | goto badframe; | |
797 | } | |
1da177e4 | 798 | |
7cce2465 AV |
799 | if (restore_altstack(&uc->uc_stack)) |
800 | goto badframe; | |
1da177e4 | 801 | |
401d1f02 DW |
802 | set_thread_flag(TIF_RESTOREALL); |
803 | return 0; | |
1da177e4 LT |
804 | |
805 | badframe: | |
76462232 CD |
806 | if (show_unhandled_signals) |
807 | printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32, | |
808 | current->comm, current->pid, "rt_sigreturn", | |
809 | (long)uc, regs->nip, regs->link); | |
d0c3d534 | 810 | |
1da177e4 LT |
811 | force_sig(SIGSEGV, current); |
812 | return 0; | |
813 | } | |
814 | ||
d1199431 CB |
815 | int handle_rt_signal64(struct ksignal *ksig, sigset_t *set, |
816 | struct task_struct *tsk) | |
1da177e4 | 817 | { |
1da177e4 LT |
818 | struct rt_sigframe __user *frame; |
819 | unsigned long newsp = 0; | |
820 | long err = 0; | |
d1199431 CB |
821 | struct pt_regs *regs = tsk->thread.regs; |
822 | ||
823 | BUG_ON(tsk != current); | |
1da177e4 | 824 | |
d1199431 | 825 | frame = get_sigframe(ksig, get_tm_stackpointer(tsk), sizeof(*frame), 0); |
a3f61dc0 | 826 | if (unlikely(frame == NULL)) |
1da177e4 LT |
827 | goto badframe; |
828 | ||
829 | err |= __put_user(&frame->info, &frame->pinfo); | |
830 | err |= __put_user(&frame->uc, &frame->puc); | |
129b69df | 831 | err |= copy_siginfo_to_user(&frame->info, &ksig->info); |
1da177e4 LT |
832 | if (err) |
833 | goto badframe; | |
834 | ||
835 | /* Create the ucontext. */ | |
836 | err |= __put_user(0, &frame->uc.uc_flags); | |
7cce2465 | 837 | err |= __save_altstack(&frame->uc.uc_stack, regs->gpr[1]); |
2b0a576d MN |
838 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
839 | if (MSR_TM_ACTIVE(regs->msr)) { | |
840 | /* The ucontext_t passed to userland points to the second | |
841 | * ucontext_t (for transactional state) with its uc_link ptr. | |
842 | */ | |
843 | err |= __put_user(&frame->uc_transact, &frame->uc.uc_link); | |
844 | err |= setup_tm_sigcontexts(&frame->uc.uc_mcontext, | |
845 | &frame->uc_transact.uc_mcontext, | |
d1199431 | 846 | tsk, ksig->sig, NULL, |
129b69df | 847 | (unsigned long)ksig->ka.sa.sa_handler); |
2b0a576d MN |
848 | } else |
849 | #endif | |
850 | { | |
851 | err |= __put_user(0, &frame->uc.uc_link); | |
d1199431 | 852 | err |= setup_sigcontext(&frame->uc.uc_mcontext, tsk, ksig->sig, |
129b69df | 853 | NULL, (unsigned long)ksig->ka.sa.sa_handler, |
2b0a576d MN |
854 | 1); |
855 | } | |
1da177e4 LT |
856 | err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); |
857 | if (err) | |
858 | goto badframe; | |
859 | ||
cc657f53 | 860 | /* Make sure signal handler doesn't get spurious FP exceptions */ |
d1199431 | 861 | tsk->thread.fp_state.fpscr = 0; |
cc657f53 | 862 | |
1da177e4 | 863 | /* Set up to return from userspace. */ |
d1199431 CB |
864 | if (vdso64_rt_sigtramp && tsk->mm->context.vdso_base) { |
865 | regs->link = tsk->mm->context.vdso_base + vdso64_rt_sigtramp; | |
1da177e4 LT |
866 | } else { |
867 | err |= setup_trampoline(__NR_rt_sigreturn, &frame->tramp[0]); | |
868 | if (err) | |
869 | goto badframe; | |
870 | regs->link = (unsigned long) &frame->tramp[0]; | |
871 | } | |
1da177e4 LT |
872 | |
873 | /* Allocate a dummy caller frame for the signal handler. */ | |
a3f61dc0 | 874 | newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE; |
1da177e4 LT |
875 | err |= put_user(regs->gpr[1], (unsigned long __user *)newsp); |
876 | ||
877 | /* Set up "regs" so we "return" to the signal handler. */ | |
d606b92a | 878 | if (is_elf2_task()) { |
129b69df | 879 | regs->nip = (unsigned long) ksig->ka.sa.sa_handler; |
d606b92a RR |
880 | regs->gpr[12] = regs->nip; |
881 | } else { | |
882 | /* Handler is *really* a pointer to the function descriptor for | |
883 | * the signal routine. The first entry in the function | |
884 | * descriptor is the entry address of signal and the second | |
885 | * entry is the TOC value we need to use. | |
886 | */ | |
887 | func_descr_t __user *funct_desc_ptr = | |
129b69df | 888 | (func_descr_t __user *) ksig->ka.sa.sa_handler; |
d606b92a RR |
889 | |
890 | err |= get_user(regs->nip, &funct_desc_ptr->entry); | |
891 | err |= get_user(regs->gpr[2], &funct_desc_ptr->toc); | |
892 | } | |
893 | ||
e871c6bb | 894 | /* enter the signal handler in native-endian mode */ |
fab5db97 | 895 | regs->msr &= ~MSR_LE; |
e871c6bb | 896 | regs->msr |= (MSR_KERNEL & MSR_LE); |
1da177e4 | 897 | regs->gpr[1] = newsp; |
129b69df | 898 | regs->gpr[3] = ksig->sig; |
1da177e4 | 899 | regs->result = 0; |
129b69df | 900 | if (ksig->ka.sa.sa_flags & SA_SIGINFO) { |
1da177e4 LT |
901 | err |= get_user(regs->gpr[4], (unsigned long __user *)&frame->pinfo); |
902 | err |= get_user(regs->gpr[5], (unsigned long __user *)&frame->puc); | |
903 | regs->gpr[6] = (unsigned long) frame; | |
904 | } else { | |
905 | regs->gpr[4] = (unsigned long)&frame->uc.uc_mcontext; | |
906 | } | |
907 | if (err) | |
908 | goto badframe; | |
909 | ||
129b69df | 910 | return 0; |
1da177e4 LT |
911 | |
912 | badframe: | |
76462232 CD |
913 | if (show_unhandled_signals) |
914 | printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32, | |
d1199431 | 915 | tsk->comm, tsk->pid, "setup_rt_frame", |
76462232 | 916 | (long)frame, regs->nip, regs->link); |
d0c3d534 | 917 | |
129b69df | 918 | return 1; |
1da177e4 | 919 | } |