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CommitLineData
1da177e4
LT
1/*
2 * SMP support for ppc.
3 *
4 * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
5 * deal of code from the sparc and intel versions.
6 *
7 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
8 *
9 * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and
10 * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18#undef DEBUG
19
1da177e4 20#include <linux/kernel.h>
4b16f8e2 21#include <linux/export.h>
1da177e4
LT
22#include <linux/sched.h>
23#include <linux/smp.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26#include <linux/init.h>
27#include <linux/spinlock.h>
28#include <linux/cache.h>
29#include <linux/err.h>
8a25a2fd 30#include <linux/device.h>
1da177e4
LT
31#include <linux/cpu.h>
32#include <linux/notifier.h>
4b703a23 33#include <linux/topology.h>
1da177e4
LT
34
35#include <asm/ptrace.h>
60063497 36#include <linux/atomic.h>
1da177e4 37#include <asm/irq.h>
1b67bee1 38#include <asm/hw_irq.h>
441c19c8 39#include <asm/kvm_ppc.h>
1da177e4
LT
40#include <asm/page.h>
41#include <asm/pgtable.h>
42#include <asm/prom.h>
43#include <asm/smp.h>
1da177e4
LT
44#include <asm/time.h>
45#include <asm/machdep.h>
e2075f79 46#include <asm/cputhreads.h>
1da177e4 47#include <asm/cputable.h>
bbeb3f4c 48#include <asm/mpic.h>
a7f290da 49#include <asm/vdso_datapage.h>
5ad57078
PM
50#ifdef CONFIG_PPC64
51#include <asm/paca.h>
52#endif
18ad51dd 53#include <asm/vdso.h>
ae3a197e 54#include <asm/debug.h>
1217d34b 55#include <asm/kexec.h>
5ad57078 56
1da177e4 57#ifdef DEBUG
f9e4ec57 58#include <asm/udbg.h>
1da177e4
LT
59#define DBG(fmt...) udbg_printf(fmt)
60#else
61#define DBG(fmt...)
62#endif
63
c56e5853 64#ifdef CONFIG_HOTPLUG_CPU
fb82b839
BH
65/* State of each CPU during hotplug phases */
66static DEFINE_PER_CPU(int, cpu_state) = { 0 };
c56e5853
BH
67#endif
68
f9e4ec57
ME
69struct thread_info *secondary_ti;
70
cc1ba8ea
AB
71DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map);
72DEFINE_PER_CPU(cpumask_var_t, cpu_core_map);
1da177e4 73
d5a7430d 74EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
440a0857 75EXPORT_PER_CPU_SYMBOL(cpu_core_map);
1da177e4 76
5ad57078 77/* SMP operations for this machine */
1da177e4
LT
78struct smp_ops_t *smp_ops;
79
7ccbe504
BH
80/* Can't be static due to PowerMac hackery */
81volatile unsigned int cpu_callin_map[NR_CPUS];
1da177e4 82
1da177e4
LT
83int smt_enabled_at_boot = 1;
84
cc532915
ME
85static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL;
86
3cd85250
AF
87/*
88 * Returns 1 if the specified cpu should be brought up during boot.
89 * Used to inhibit booting threads if they've been disabled or
90 * limited on the command line
91 */
92int smp_generic_cpu_bootable(unsigned int nr)
93{
94 /* Special case - we inhibit secondary thread startup
95 * during boot if the user requests it.
96 */
97 if (system_state == SYSTEM_BOOTING && cpu_has_feature(CPU_FTR_SMT)) {
98 if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
99 return 0;
100 if (smt_enabled_at_boot
101 && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
102 return 0;
103 }
104
105 return 1;
106}
107
108
5ad57078 109#ifdef CONFIG_PPC64
cad5cef6 110int smp_generic_kick_cpu(int nr)
1da177e4
LT
111{
112 BUG_ON(nr < 0 || nr >= NR_CPUS);
113
114 /*
115 * The processor is currently spinning, waiting for the
116 * cpu_start field to become non-zero After we set cpu_start,
117 * the processor will continue on to secondary_start
118 */
fb82b839
BH
119 if (!paca[nr].cpu_start) {
120 paca[nr].cpu_start = 1;
121 smp_mb();
122 return 0;
123 }
124
125#ifdef CONFIG_HOTPLUG_CPU
126 /*
127 * Ok it's not there, so it might be soft-unplugged, let's
128 * try to bring it back
129 */
ae5cab47 130 generic_set_cpu_up(nr);
fb82b839
BH
131 smp_wmb();
132 smp_send_reschedule(nr);
133#endif /* CONFIG_HOTPLUG_CPU */
de300974
ME
134
135 return 0;
1da177e4 136}
fb82b839 137#endif /* CONFIG_PPC64 */
1da177e4 138
25ddd738
MM
139static irqreturn_t call_function_action(int irq, void *data)
140{
141 generic_smp_call_function_interrupt();
142 return IRQ_HANDLED;
143}
144
145static irqreturn_t reschedule_action(int irq, void *data)
146{
184748cc 147 scheduler_ipi();
25ddd738
MM
148 return IRQ_HANDLED;
149}
150
1b67bee1 151static irqreturn_t tick_broadcast_ipi_action(int irq, void *data)
25ddd738 152{
1b67bee1 153 tick_broadcast_ipi_handler();
25ddd738
MM
154 return IRQ_HANDLED;
155}
156
7ef71d75 157static irqreturn_t debug_ipi_action(int irq, void *data)
25ddd738 158{
23d72bfd
MM
159 if (crash_ipi_function_ptr) {
160 crash_ipi_function_ptr(get_irq_regs());
161 return IRQ_HANDLED;
162 }
163
164#ifdef CONFIG_DEBUGGER
165 debugger_ipi(get_irq_regs());
166#endif /* CONFIG_DEBUGGER */
167
25ddd738
MM
168 return IRQ_HANDLED;
169}
170
171static irq_handler_t smp_ipi_action[] = {
172 [PPC_MSG_CALL_FUNCTION] = call_function_action,
173 [PPC_MSG_RESCHEDULE] = reschedule_action,
1b67bee1 174 [PPC_MSG_TICK_BROADCAST] = tick_broadcast_ipi_action,
25ddd738
MM
175 [PPC_MSG_DEBUGGER_BREAK] = debug_ipi_action,
176};
177
178const char *smp_ipi_name[] = {
179 [PPC_MSG_CALL_FUNCTION] = "ipi call function",
180 [PPC_MSG_RESCHEDULE] = "ipi reschedule",
1b67bee1 181 [PPC_MSG_TICK_BROADCAST] = "ipi tick-broadcast",
25ddd738
MM
182 [PPC_MSG_DEBUGGER_BREAK] = "ipi debugger",
183};
184
185/* optional function to request ipi, for controllers with >= 4 ipis */
186int smp_request_message_ipi(int virq, int msg)
187{
188 int err;
189
190 if (msg < 0 || msg > PPC_MSG_DEBUGGER_BREAK) {
191 return -EINVAL;
192 }
193#if !defined(CONFIG_DEBUGGER) && !defined(CONFIG_KEXEC)
194 if (msg == PPC_MSG_DEBUGGER_BREAK) {
195 return 1;
196 }
197#endif
3b5e16d7 198 err = request_irq(virq, smp_ipi_action[msg],
e6651de9 199 IRQF_PERCPU | IRQF_NO_THREAD | IRQF_NO_SUSPEND,
b0d436c7 200 smp_ipi_name[msg], NULL);
25ddd738
MM
201 WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
202 virq, smp_ipi_name[msg], err);
203
204 return err;
205}
206
1ece355b 207#ifdef CONFIG_PPC_SMP_MUXED_IPI
23d72bfd 208struct cpu_messages {
71454272 209 int messages; /* current messages */
23d72bfd
MM
210 unsigned long data; /* data for cause ipi */
211};
212static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_messages, ipi_message);
213
214void smp_muxed_ipi_set_data(int cpu, unsigned long data)
215{
216 struct cpu_messages *info = &per_cpu(ipi_message, cpu);
217
218 info->data = data;
219}
220
221void smp_muxed_ipi_message_pass(int cpu, int msg)
222{
223 struct cpu_messages *info = &per_cpu(ipi_message, cpu);
71454272 224 char *message = (char *)&info->messages;
23d72bfd 225
9fb1b36c
PM
226 /*
227 * Order previous accesses before accesses in the IPI handler.
228 */
229 smp_mb();
71454272 230 message[msg] = 1;
9fb1b36c
PM
231 /*
232 * cause_ipi functions are required to include a full barrier
233 * before doing whatever causes the IPI.
234 */
23d72bfd
MM
235 smp_ops->cause_ipi(cpu, info->data);
236}
237
0654de1c
AB
238#ifdef __BIG_ENDIAN__
239#define IPI_MESSAGE(A) (1 << (24 - 8 * (A)))
240#else
241#define IPI_MESSAGE(A) (1 << (8 * (A)))
242#endif
243
23d72bfd
MM
244irqreturn_t smp_ipi_demux(void)
245{
246 struct cpu_messages *info = &__get_cpu_var(ipi_message);
71454272 247 unsigned int all;
23d72bfd
MM
248
249 mb(); /* order any irq clear */
71454272
MM
250
251 do {
9fb1b36c 252 all = xchg(&info->messages, 0);
0654de1c 253 if (all & IPI_MESSAGE(PPC_MSG_CALL_FUNCTION))
23d72bfd 254 generic_smp_call_function_interrupt();
0654de1c 255 if (all & IPI_MESSAGE(PPC_MSG_RESCHEDULE))
880102e7 256 scheduler_ipi();
1b67bee1
SB
257 if (all & IPI_MESSAGE(PPC_MSG_TICK_BROADCAST))
258 tick_broadcast_ipi_handler();
0654de1c 259 if (all & IPI_MESSAGE(PPC_MSG_DEBUGGER_BREAK))
23d72bfd 260 debug_ipi_action(0, NULL);
71454272
MM
261 } while (info->messages);
262
23d72bfd
MM
263 return IRQ_HANDLED;
264}
1ece355b 265#endif /* CONFIG_PPC_SMP_MUXED_IPI */
23d72bfd 266
9ca980dc
PM
267static inline void do_message_pass(int cpu, int msg)
268{
269 if (smp_ops->message_pass)
270 smp_ops->message_pass(cpu, msg);
271#ifdef CONFIG_PPC_SMP_MUXED_IPI
272 else
273 smp_muxed_ipi_message_pass(cpu, msg);
274#endif
275}
276
1da177e4
LT
277void smp_send_reschedule(int cpu)
278{
8cffc6ac 279 if (likely(smp_ops))
9ca980dc 280 do_message_pass(cpu, PPC_MSG_RESCHEDULE);
1da177e4 281}
de56a948 282EXPORT_SYMBOL_GPL(smp_send_reschedule);
1da177e4 283
b7d7a240
JA
284void arch_send_call_function_single_ipi(int cpu)
285{
402d9a1e 286 do_message_pass(cpu, PPC_MSG_CALL_FUNCTION);
b7d7a240
JA
287}
288
f063ea02 289void arch_send_call_function_ipi_mask(const struct cpumask *mask)
b7d7a240
JA
290{
291 unsigned int cpu;
292
f063ea02 293 for_each_cpu(cpu, mask)
9ca980dc 294 do_message_pass(cpu, PPC_MSG_CALL_FUNCTION);
b7d7a240
JA
295}
296
1b67bee1
SB
297#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
298void tick_broadcast(const struct cpumask *mask)
299{
300 unsigned int cpu;
301
302 for_each_cpu(cpu, mask)
303 do_message_pass(cpu, PPC_MSG_TICK_BROADCAST);
304}
305#endif
306
e0476371
MM
307#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
308void smp_send_debugger_break(void)
1da177e4 309{
e0476371
MM
310 int cpu;
311 int me = raw_smp_processor_id();
312
313 if (unlikely(!smp_ops))
314 return;
315
316 for_each_online_cpu(cpu)
317 if (cpu != me)
9ca980dc 318 do_message_pass(cpu, PPC_MSG_DEBUGGER_BREAK);
1da177e4
LT
319}
320#endif
321
cc532915
ME
322#ifdef CONFIG_KEXEC
323void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *))
324{
325 crash_ipi_function_ptr = crash_ipi_callback;
e0476371 326 if (crash_ipi_callback) {
cc532915 327 mb();
e0476371 328 smp_send_debugger_break();
cc532915
ME
329 }
330}
331#endif
332
1da177e4
LT
333static void stop_this_cpu(void *dummy)
334{
8389b37d
VB
335 /* Remove this CPU */
336 set_cpu_online(smp_processor_id(), false);
337
1da177e4
LT
338 local_irq_disable();
339 while (1)
340 ;
341}
342
8fd7675c
SS
343void smp_send_stop(void)
344{
8691e5a8 345 smp_call_function(stop_this_cpu, NULL, 0);
1da177e4
LT
346}
347
1da177e4
LT
348struct thread_info *current_set[NR_CPUS];
349
cad5cef6 350static void smp_store_cpu_info(int id)
1da177e4 351{
6b7487fc 352 per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR);
3160b097
BB
353#ifdef CONFIG_PPC_FSL_BOOK3E
354 per_cpu(next_tlbcam_idx, id)
355 = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1;
356#endif
1da177e4
LT
357}
358
1da177e4
LT
359void __init smp_prepare_cpus(unsigned int max_cpus)
360{
361 unsigned int cpu;
362
363 DBG("smp_prepare_cpus\n");
364
365 /*
366 * setup_cpu may need to be called on the boot cpu. We havent
367 * spun any cpus up but lets be paranoid.
368 */
369 BUG_ON(boot_cpuid != smp_processor_id());
370
371 /* Fixup boot cpu */
372 smp_store_cpu_info(boot_cpuid);
373 cpu_callin_map[boot_cpuid] = 1;
374
cc1ba8ea
AB
375 for_each_possible_cpu(cpu) {
376 zalloc_cpumask_var_node(&per_cpu(cpu_sibling_map, cpu),
377 GFP_KERNEL, cpu_to_node(cpu));
378 zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu),
379 GFP_KERNEL, cpu_to_node(cpu));
2fabf084
NA
380 /*
381 * numa_node_id() works after this.
382 */
383 set_cpu_numa_node(cpu, numa_cpu_lookup_table[cpu]);
384 set_cpu_numa_mem(cpu, local_memory_node(numa_cpu_lookup_table[cpu]));
cc1ba8ea
AB
385 }
386
387 cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid));
388 cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid));
389
dfee0efe
CG
390 if (smp_ops && smp_ops->probe)
391 smp_ops->probe();
1da177e4
LT
392}
393
cad5cef6 394void smp_prepare_boot_cpu(void)
1da177e4
LT
395{
396 BUG_ON(smp_processor_id() != boot_cpuid);
5ad57078 397#ifdef CONFIG_PPC64
1da177e4 398 paca[boot_cpuid].__current = current;
5ad57078 399#endif
8c272261 400 set_numa_node(numa_cpu_lookup_table[boot_cpuid]);
b5e2fc1c 401 current_set[boot_cpuid] = task_thread_info(current);
1da177e4
LT
402}
403
404#ifdef CONFIG_HOTPLUG_CPU
1da177e4
LT
405
406int generic_cpu_disable(void)
407{
408 unsigned int cpu = smp_processor_id();
409
410 if (cpu == boot_cpuid)
411 return -EBUSY;
412
ea0f1cab 413 set_cpu_online(cpu, false);
799d6046 414#ifdef CONFIG_PPC64
a7f290da 415 vdso_data->processorCount--;
094fe2e7 416#endif
1c91cc57 417 migrate_irqs();
1da177e4
LT
418 return 0;
419}
420
1da177e4
LT
421void generic_cpu_die(unsigned int cpu)
422{
423 int i;
424
425 for (i = 0; i < 100; i++) {
0d8d4d42 426 smp_rmb();
1da177e4
LT
427 if (per_cpu(cpu_state, cpu) == CPU_DEAD)
428 return;
429 msleep(100);
430 }
431 printk(KERN_ERR "CPU%d didn't die...\n", cpu);
432}
433
434void generic_mach_cpu_die(void)
435{
436 unsigned int cpu;
437
438 local_irq_disable();
4fcb8833 439 idle_task_exit();
1da177e4
LT
440 cpu = smp_processor_id();
441 printk(KERN_DEBUG "CPU%d offline\n", cpu);
442 __get_cpu_var(cpu_state) = CPU_DEAD;
0d8d4d42 443 smp_wmb();
1da177e4
LT
444 while (__get_cpu_var(cpu_state) != CPU_UP_PREPARE)
445 cpu_relax();
1da177e4 446}
105765f4
BH
447
448void generic_set_cpu_dead(unsigned int cpu)
449{
450 per_cpu(cpu_state, cpu) = CPU_DEAD;
451}
fb82b839 452
ae5cab47
ZC
453/*
454 * The cpu_state should be set to CPU_UP_PREPARE in kick_cpu(), otherwise
455 * the cpu_state is always CPU_DEAD after calling generic_set_cpu_dead(),
456 * which makes the delay in generic_cpu_die() not happen.
457 */
458void generic_set_cpu_up(unsigned int cpu)
459{
460 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
461}
462
fb82b839
BH
463int generic_check_cpu_restart(unsigned int cpu)
464{
465 return per_cpu(cpu_state, cpu) == CPU_UP_PREPARE;
466}
512691d4 467
441c19c8 468static bool secondaries_inhibited(void)
512691d4 469{
441c19c8 470 return kvm_hv_mode_active();
512691d4
PM
471}
472
473#else /* HOTPLUG_CPU */
474
475#define secondaries_inhibited() 0
476
1da177e4
LT
477#endif
478
17e32eac 479static void cpu_idle_thread_init(unsigned int cpu, struct task_struct *idle)
c56e5853 480{
17e32eac 481 struct thread_info *ti = task_thread_info(idle);
c56e5853
BH
482
483#ifdef CONFIG_PPC64
17e32eac 484 paca[cpu].__current = idle;
c56e5853
BH
485 paca[cpu].kstack = (unsigned long)ti + THREAD_SIZE - STACK_FRAME_OVERHEAD;
486#endif
487 ti->cpu = cpu;
17e32eac 488 secondary_ti = current_set[cpu] = ti;
c56e5853
BH
489}
490
061d19f2 491int __cpu_up(unsigned int cpu, struct task_struct *tidle)
1da177e4 492{
c56e5853 493 int rc, c;
1da177e4 494
512691d4
PM
495 /*
496 * Don't allow secondary threads to come online if inhibited
497 */
498 if (threads_per_core > 1 && secondaries_inhibited() &&
6f5e40a3 499 cpu_thread_in_subcore(cpu))
512691d4
PM
500 return -EBUSY;
501
8cffc6ac
BH
502 if (smp_ops == NULL ||
503 (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu)))
1da177e4
LT
504 return -EINVAL;
505
17e32eac 506 cpu_idle_thread_init(cpu, tidle);
c560bbce 507
1da177e4
LT
508 /* Make sure callin-map entry is 0 (can be leftover a CPU
509 * hotplug
510 */
511 cpu_callin_map[cpu] = 0;
512
513 /* The information for processor bringup must
514 * be written out to main store before we release
515 * the processor.
516 */
0d8d4d42 517 smp_mb();
1da177e4
LT
518
519 /* wake up cpus */
520 DBG("smp: kicking cpu %d\n", cpu);
de300974
ME
521 rc = smp_ops->kick_cpu(cpu);
522 if (rc) {
523 pr_err("smp: failed starting cpu %d (rc %d)\n", cpu, rc);
524 return rc;
525 }
1da177e4
LT
526
527 /*
528 * wait to see if the cpu made a callin (is actually up).
529 * use this value that I found through experimentation.
530 * -- Cort
531 */
532 if (system_state < SYSTEM_RUNNING)
ee0339f2 533 for (c = 50000; c && !cpu_callin_map[cpu]; c--)
1da177e4
LT
534 udelay(100);
535#ifdef CONFIG_HOTPLUG_CPU
536 else
537 /*
538 * CPUs can take much longer to come up in the
539 * hotplug case. Wait five seconds.
540 */
67764263
GS
541 for (c = 5000; c && !cpu_callin_map[cpu]; c--)
542 msleep(1);
1da177e4
LT
543#endif
544
545 if (!cpu_callin_map[cpu]) {
6685a477 546 printk(KERN_ERR "Processor %u is stuck.\n", cpu);
1da177e4
LT
547 return -ENOENT;
548 }
549
6685a477 550 DBG("Processor %u found.\n", cpu);
1da177e4
LT
551
552 if (smp_ops->give_timebase)
553 smp_ops->give_timebase();
554
555 /* Wait until cpu puts itself in the online map */
556 while (!cpu_online(cpu))
557 cpu_relax();
558
559 return 0;
560}
561
e9efed3b
NL
562/* Return the value of the reg property corresponding to the given
563 * logical cpu.
564 */
565int cpu_to_core_id(int cpu)
566{
567 struct device_node *np;
f8a1883a 568 const __be32 *reg;
e9efed3b
NL
569 int id = -1;
570
571 np = of_get_cpu_node(cpu, NULL);
572 if (!np)
573 goto out;
574
575 reg = of_get_property(np, "reg", NULL);
576 if (!reg)
577 goto out;
578
f8a1883a 579 id = be32_to_cpup(reg);
e9efed3b
NL
580out:
581 of_node_put(np);
582 return id;
583}
584
99d86705
VS
585/* Helper routines for cpu to core mapping */
586int cpu_core_index_of_thread(int cpu)
587{
588 return cpu >> threads_shift;
589}
590EXPORT_SYMBOL_GPL(cpu_core_index_of_thread);
591
592int cpu_first_thread_of_core(int core)
593{
594 return core << threads_shift;
595}
596EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);
597
256f2d4b
PM
598static void traverse_siblings_chip_id(int cpu, bool add, int chipid)
599{
600 const struct cpumask *mask;
601 struct device_node *np;
602 int i, plen;
603 const __be32 *prop;
604
605 mask = add ? cpu_online_mask : cpu_present_mask;
606 for_each_cpu(i, mask) {
607 np = of_get_cpu_node(i, NULL);
608 if (!np)
609 continue;
610 prop = of_get_property(np, "ibm,chip-id", &plen);
611 if (prop && plen == sizeof(int) &&
612 of_read_number(prop, 1) == chipid) {
613 if (add) {
614 cpumask_set_cpu(cpu, cpu_core_mask(i));
615 cpumask_set_cpu(i, cpu_core_mask(cpu));
616 } else {
617 cpumask_clear_cpu(cpu, cpu_core_mask(i));
618 cpumask_clear_cpu(i, cpu_core_mask(cpu));
619 }
620 }
621 of_node_put(np);
622 }
623}
624
104699c0 625/* Must be called when no change can occur to cpu_present_mask,
440a0857
NL
626 * i.e. during cpu online or offline.
627 */
628static struct device_node *cpu_to_l2cache(int cpu)
629{
630 struct device_node *np;
b2ea25b9 631 struct device_node *cache;
440a0857
NL
632
633 if (!cpu_present(cpu))
634 return NULL;
635
636 np = of_get_cpu_node(cpu, NULL);
637 if (np == NULL)
638 return NULL;
639
b2ea25b9
NL
640 cache = of_find_next_cache_node(np);
641
440a0857
NL
642 of_node_put(np);
643
b2ea25b9 644 return cache;
440a0857 645}
1da177e4 646
a8a5356c
PM
647static void traverse_core_siblings(int cpu, bool add)
648{
256f2d4b 649 struct device_node *l2_cache, *np;
a8a5356c 650 const struct cpumask *mask;
256f2d4b
PM
651 int i, chip, plen;
652 const __be32 *prop;
653
654 /* First see if we have ibm,chip-id properties in cpu nodes */
655 np = of_get_cpu_node(cpu, NULL);
656 if (np) {
657 chip = -1;
658 prop = of_get_property(np, "ibm,chip-id", &plen);
659 if (prop && plen == sizeof(int))
660 chip = of_read_number(prop, 1);
661 of_node_put(np);
662 if (chip >= 0) {
663 traverse_siblings_chip_id(cpu, add, chip);
664 return;
665 }
666 }
a8a5356c
PM
667
668 l2_cache = cpu_to_l2cache(cpu);
669 mask = add ? cpu_online_mask : cpu_present_mask;
670 for_each_cpu(i, mask) {
256f2d4b 671 np = cpu_to_l2cache(i);
a8a5356c
PM
672 if (!np)
673 continue;
674 if (np == l2_cache) {
675 if (add) {
676 cpumask_set_cpu(cpu, cpu_core_mask(i));
677 cpumask_set_cpu(i, cpu_core_mask(cpu));
678 } else {
679 cpumask_clear_cpu(cpu, cpu_core_mask(i));
680 cpumask_clear_cpu(i, cpu_core_mask(cpu));
681 }
682 }
683 of_node_put(np);
684 }
685 of_node_put(l2_cache);
686}
687
1da177e4 688/* Activate a secondary processor. */
061d19f2 689void start_secondary(void *unused)
1da177e4
LT
690{
691 unsigned int cpu = smp_processor_id();
e2075f79 692 int i, base;
1da177e4
LT
693
694 atomic_inc(&init_mm.mm_count);
695 current->active_mm = &init_mm;
696
697 smp_store_cpu_info(cpu);
5ad57078 698 set_dec(tb_ticks_per_jiffy);
e4d76e1c 699 preempt_disable();
1da177e4
LT
700 cpu_callin_map[cpu] = 1;
701
757cbd46
KG
702 if (smp_ops->setup_cpu)
703 smp_ops->setup_cpu(cpu);
1da177e4
LT
704 if (smp_ops->take_timebase)
705 smp_ops->take_timebase();
706
d831d0b8
TB
707 secondary_cpu_time_init();
708
aeeafbfa
BH
709#ifdef CONFIG_PPC64
710 if (system_state == SYSTEM_RUNNING)
711 vdso_data->processorCount++;
18ad51dd
AB
712
713 vdso_getcpu_init();
aeeafbfa 714#endif
e2075f79 715 /* Update sibling maps */
99d86705 716 base = cpu_first_thread_sibling(cpu);
e2075f79 717 for (i = 0; i < threads_per_core; i++) {
cce606fe 718 if (cpu_is_offline(base + i) && (cpu != base + i))
e2075f79 719 continue;
cc1ba8ea
AB
720 cpumask_set_cpu(cpu, cpu_sibling_mask(base + i));
721 cpumask_set_cpu(base + i, cpu_sibling_mask(cpu));
440a0857
NL
722
723 /* cpu_core_map should be a superset of
724 * cpu_sibling_map even if we don't have cache
725 * information, so update the former here, too.
726 */
cc1ba8ea
AB
727 cpumask_set_cpu(cpu, cpu_core_mask(base + i));
728 cpumask_set_cpu(base + i, cpu_core_mask(cpu));
e2075f79 729 }
a8a5356c 730 traverse_core_siblings(cpu, true);
1da177e4 731
cce606fe
LZ
732 smp_wmb();
733 notify_cpu_starting(cpu);
734 set_cpu_online(cpu, true);
735
1da177e4
LT
736 local_irq_enable();
737
799fef06 738 cpu_startup_entry(CPUHP_ONLINE);
fa3f82c8
BH
739
740 BUG();
1da177e4
LT
741}
742
743int setup_profiling_timer(unsigned int multiplier)
744{
745 return 0;
746}
747
607b45e9
VG
748#ifdef CONFIG_SCHED_SMT
749/* cpumask of CPUs with asymetric SMT dependancy */
b6220ad6 750static int powerpc_smt_flags(void)
607b45e9 751{
5d4dfddd 752 int flags = SD_SHARE_CPUCAPACITY | SD_SHARE_PKG_RESOURCES;
607b45e9
VG
753
754 if (cpu_has_feature(CPU_FTR_ASYM_SMT)) {
755 printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n");
756 flags |= SD_ASYM_PACKING;
757 }
758 return flags;
759}
760#endif
761
762static struct sched_domain_topology_level powerpc_topology[] = {
763#ifdef CONFIG_SCHED_SMT
764 { cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT) },
765#endif
766 { cpu_cpu_mask, SD_INIT_NAME(DIE) },
767 { NULL, },
768};
769
1da177e4
LT
770void __init smp_cpus_done(unsigned int max_cpus)
771{
bfb9126d 772 cpumask_var_t old_mask;
1da177e4
LT
773
774 /* We want the setup_cpu() here to be called from CPU 0, but our
775 * init thread may have been "borrowed" by another CPU in the meantime
776 * se we pin us down to CPU 0 for a short while
777 */
bfb9126d 778 alloc_cpumask_var(&old_mask, GFP_NOWAIT);
104699c0 779 cpumask_copy(old_mask, tsk_cpus_allowed(current));
21dbeb91 780 set_cpus_allowed_ptr(current, cpumask_of(boot_cpuid));
1da177e4 781
757cbd46 782 if (smp_ops && smp_ops->setup_cpu)
8cffc6ac 783 smp_ops->setup_cpu(boot_cpuid);
1da177e4 784
bfb9126d
AB
785 set_cpus_allowed_ptr(current, old_mask);
786
787 free_cpumask_var(old_mask);
4b703a23 788
d7294445
BH
789 if (smp_ops && smp_ops->bringup_done)
790 smp_ops->bringup_done();
791
4b703a23 792 dump_numa_cpu_topology();
d7294445 793
607b45e9 794 set_sched_topology(powerpc_topology);
1da177e4 795
e1f0ece1
MN
796}
797
1da177e4
LT
798#ifdef CONFIG_HOTPLUG_CPU
799int __cpu_disable(void)
800{
e2075f79
NL
801 int cpu = smp_processor_id();
802 int base, i;
803 int err;
1da177e4 804
e2075f79
NL
805 if (!smp_ops->cpu_disable)
806 return -ENOSYS;
807
808 err = smp_ops->cpu_disable();
809 if (err)
810 return err;
811
812 /* Update sibling maps */
99d86705 813 base = cpu_first_thread_sibling(cpu);
e2075f79 814 for (i = 0; i < threads_per_core; i++) {
cc1ba8ea
AB
815 cpumask_clear_cpu(cpu, cpu_sibling_mask(base + i));
816 cpumask_clear_cpu(base + i, cpu_sibling_mask(cpu));
817 cpumask_clear_cpu(cpu, cpu_core_mask(base + i));
818 cpumask_clear_cpu(base + i, cpu_core_mask(cpu));
440a0857 819 }
a8a5356c 820 traverse_core_siblings(cpu, false);
e2075f79
NL
821
822 return 0;
1da177e4
LT
823}
824
825void __cpu_die(unsigned int cpu)
826{
827 if (smp_ops->cpu_die)
828 smp_ops->cpu_die(cpu);
829}
d0174c72 830
abb17f9c
MM
831void cpu_die(void)
832{
833 if (ppc_md.cpu_die)
834 ppc_md.cpu_die();
fa3f82c8
BH
835
836 /* If we return, we re-enter start_secondary */
837 start_secondary_resume();
abb17f9c 838}
fa3f82c8 839
1da177e4 840#endif