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2f4cf5e4 AG |
1 | /* |
2 | * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. | |
3 | * | |
4 | * Authors: | |
5 | * Alexander Graf <agraf@suse.de> | |
6 | * Kevin Wolf <mail@kevin-wolf.de> | |
7 | * | |
8 | * Description: | |
9 | * This file is derived from arch/powerpc/kvm/44x.c, | |
10 | * by Hollis Blanchard <hollisb@us.ibm.com>. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License, version 2, as | |
14 | * published by the Free Software Foundation. | |
15 | */ | |
16 | ||
17 | #include <linux/kvm_host.h> | |
18 | #include <linux/err.h> | |
66b15db6 | 19 | #include <linux/export.h> |
329d20ba | 20 | #include <linux/slab.h> |
2f4cf5e4 AG |
21 | |
22 | #include <asm/reg.h> | |
23 | #include <asm/cputable.h> | |
24 | #include <asm/cacheflush.h> | |
25 | #include <asm/tlbflush.h> | |
26 | #include <asm/uaccess.h> | |
27 | #include <asm/io.h> | |
28 | #include <asm/kvm_ppc.h> | |
29 | #include <asm/kvm_book3s.h> | |
30 | #include <asm/mmu_context.h> | |
149dbdb1 | 31 | #include <asm/page.h> |
5a0e3ad6 | 32 | #include <linux/gfp.h> |
2f4cf5e4 AG |
33 | #include <linux/sched.h> |
34 | #include <linux/vmalloc.h> | |
9fb244a2 | 35 | #include <linux/highmem.h> |
2f4cf5e4 | 36 | |
c4befc58 PM |
37 | #include "trace.h" |
38 | ||
2f4cf5e4 AG |
39 | #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU |
40 | ||
41 | /* #define EXIT_DEBUG */ | |
07b0907d | 42 | |
2f4cf5e4 AG |
43 | struct kvm_stats_debugfs_item debugfs_entries[] = { |
44 | { "exits", VCPU_STAT(sum_exits) }, | |
45 | { "mmio", VCPU_STAT(mmio_exits) }, | |
46 | { "sig", VCPU_STAT(signal_exits) }, | |
47 | { "sysc", VCPU_STAT(syscall_exits) }, | |
48 | { "inst_emu", VCPU_STAT(emulated_inst_exits) }, | |
49 | { "dec", VCPU_STAT(dec_exits) }, | |
50 | { "ext_intr", VCPU_STAT(ext_intr_exits) }, | |
51 | { "queue_intr", VCPU_STAT(queue_intr) }, | |
52 | { "halt_wakeup", VCPU_STAT(halt_wakeup) }, | |
53 | { "pf_storage", VCPU_STAT(pf_storage) }, | |
54 | { "sp_storage", VCPU_STAT(sp_storage) }, | |
55 | { "pf_instruc", VCPU_STAT(pf_instruc) }, | |
56 | { "sp_instruc", VCPU_STAT(sp_instruc) }, | |
57 | { "ld", VCPU_STAT(ld) }, | |
58 | { "ld_slow", VCPU_STAT(ld_slow) }, | |
59 | { "st", VCPU_STAT(st) }, | |
60 | { "st_slow", VCPU_STAT(st_slow) }, | |
61 | { NULL } | |
62 | }; | |
63 | ||
64 | void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu) | |
65 | { | |
66 | } | |
67 | ||
68 | void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu) | |
69 | { | |
70 | } | |
71 | ||
699cc876 AK |
72 | static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu) |
73 | { | |
74 | if (!kvmppc_ops->is_hv_enabled) | |
75 | return to_book3s(vcpu)->hior; | |
76 | return 0; | |
77 | } | |
78 | ||
79 | static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu, | |
80 | unsigned long pending_now, unsigned long old_pending) | |
81 | { | |
82 | if (kvmppc_ops->is_hv_enabled) | |
83 | return; | |
84 | if (pending_now) | |
85 | vcpu->arch.shared->int_pending = 1; | |
86 | else if (old_pending) | |
87 | vcpu->arch.shared->int_pending = 0; | |
88 | } | |
89 | ||
90 | static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu) | |
91 | { | |
92 | ulong crit_raw; | |
93 | ulong crit_r1; | |
94 | bool crit; | |
95 | ||
96 | if (kvmppc_ops->is_hv_enabled) | |
97 | return false; | |
98 | ||
99 | crit_raw = vcpu->arch.shared->critical; | |
100 | crit_r1 = kvmppc_get_gpr(vcpu, 1); | |
101 | ||
102 | /* Truncate crit indicators in 32 bit mode */ | |
103 | if (!(vcpu->arch.shared->msr & MSR_SF)) { | |
104 | crit_raw &= 0xffffffff; | |
105 | crit_r1 &= 0xffffffff; | |
106 | } | |
107 | ||
108 | /* Critical section when crit == r1 */ | |
109 | crit = (crit_raw == crit_r1); | |
110 | /* ... and we're in supervisor mode */ | |
111 | crit = crit && !(vcpu->arch.shared->msr & MSR_PR); | |
112 | ||
113 | return crit; | |
114 | } | |
115 | ||
2f4cf5e4 AG |
116 | void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags) |
117 | { | |
de7906c3 AG |
118 | vcpu->arch.shared->srr0 = kvmppc_get_pc(vcpu); |
119 | vcpu->arch.shared->srr1 = vcpu->arch.shared->msr | flags; | |
f05ed4d5 | 120 | kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec); |
2f4cf5e4 AG |
121 | vcpu->arch.mmu.reset_msr(vcpu); |
122 | } | |
123 | ||
583617b7 | 124 | static int kvmppc_book3s_vec2irqprio(unsigned int vec) |
2f4cf5e4 AG |
125 | { |
126 | unsigned int prio; | |
127 | ||
2f4cf5e4 AG |
128 | switch (vec) { |
129 | case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break; | |
130 | case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break; | |
131 | case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break; | |
132 | case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break; | |
133 | case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break; | |
134 | case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break; | |
135 | case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break; | |
17bd1580 | 136 | case 0x501: prio = BOOK3S_IRQPRIO_EXTERNAL_LEVEL; break; |
2f4cf5e4 AG |
137 | case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break; |
138 | case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break; | |
139 | case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break; | |
140 | case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break; | |
141 | case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break; | |
142 | case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break; | |
143 | case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break; | |
144 | case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break; | |
145 | default: prio = BOOK3S_IRQPRIO_MAX; break; | |
146 | } | |
147 | ||
583617b7 AG |
148 | return prio; |
149 | } | |
150 | ||
bc5ad3f3 | 151 | void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu, |
7706664d AG |
152 | unsigned int vec) |
153 | { | |
f05ed4d5 PM |
154 | unsigned long old_pending = vcpu->arch.pending_exceptions; |
155 | ||
7706664d AG |
156 | clear_bit(kvmppc_book3s_vec2irqprio(vec), |
157 | &vcpu->arch.pending_exceptions); | |
9ee18b1e | 158 | |
f05ed4d5 PM |
159 | kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions, |
160 | old_pending); | |
7706664d AG |
161 | } |
162 | ||
583617b7 AG |
163 | void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec) |
164 | { | |
165 | vcpu->stat.queue_intr++; | |
166 | ||
167 | set_bit(kvmppc_book3s_vec2irqprio(vec), | |
168 | &vcpu->arch.pending_exceptions); | |
2f4cf5e4 AG |
169 | #ifdef EXIT_DEBUG |
170 | printk(KERN_INFO "Queueing interrupt %x\n", vec); | |
171 | #endif | |
172 | } | |
2ba9f0d8 | 173 | EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio); |
2f4cf5e4 | 174 | |
25a8a02d | 175 | void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags) |
2f4cf5e4 | 176 | { |
3cf658b6 PM |
177 | /* might as well deliver this straight away */ |
178 | kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags); | |
2f4cf5e4 | 179 | } |
2ba9f0d8 | 180 | EXPORT_SYMBOL_GPL(kvmppc_core_queue_program); |
2f4cf5e4 AG |
181 | |
182 | void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) | |
183 | { | |
184 | kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); | |
185 | } | |
2ba9f0d8 | 186 | EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec); |
2f4cf5e4 AG |
187 | |
188 | int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) | |
189 | { | |
44075d95 | 190 | return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); |
2f4cf5e4 | 191 | } |
2ba9f0d8 | 192 | EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec); |
2f4cf5e4 | 193 | |
7706664d AG |
194 | void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) |
195 | { | |
196 | kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); | |
197 | } | |
2ba9f0d8 | 198 | EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec); |
7706664d | 199 | |
2f4cf5e4 AG |
200 | void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, |
201 | struct kvm_interrupt *irq) | |
202 | { | |
17bd1580 AG |
203 | unsigned int vec = BOOK3S_INTERRUPT_EXTERNAL; |
204 | ||
205 | if (irq->irq == KVM_INTERRUPT_SET_LEVEL) | |
206 | vec = BOOK3S_INTERRUPT_EXTERNAL_LEVEL; | |
207 | ||
208 | kvmppc_book3s_queue_irqprio(vcpu, vec); | |
2f4cf5e4 AG |
209 | } |
210 | ||
4fe27d2a | 211 | void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) |
18978768 AG |
212 | { |
213 | kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); | |
17bd1580 | 214 | kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL_LEVEL); |
18978768 AG |
215 | } |
216 | ||
2f4cf5e4 AG |
217 | int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, unsigned int priority) |
218 | { | |
219 | int deliver = 1; | |
220 | int vec = 0; | |
f05ed4d5 | 221 | bool crit = kvmppc_critical_section(vcpu); |
2f4cf5e4 AG |
222 | |
223 | switch (priority) { | |
224 | case BOOK3S_IRQPRIO_DECREMENTER: | |
5c6cedf4 | 225 | deliver = (vcpu->arch.shared->msr & MSR_EE) && !crit; |
2f4cf5e4 AG |
226 | vec = BOOK3S_INTERRUPT_DECREMENTER; |
227 | break; | |
228 | case BOOK3S_IRQPRIO_EXTERNAL: | |
17bd1580 | 229 | case BOOK3S_IRQPRIO_EXTERNAL_LEVEL: |
5c6cedf4 | 230 | deliver = (vcpu->arch.shared->msr & MSR_EE) && !crit; |
2f4cf5e4 AG |
231 | vec = BOOK3S_INTERRUPT_EXTERNAL; |
232 | break; | |
233 | case BOOK3S_IRQPRIO_SYSTEM_RESET: | |
234 | vec = BOOK3S_INTERRUPT_SYSTEM_RESET; | |
235 | break; | |
236 | case BOOK3S_IRQPRIO_MACHINE_CHECK: | |
237 | vec = BOOK3S_INTERRUPT_MACHINE_CHECK; | |
238 | break; | |
239 | case BOOK3S_IRQPRIO_DATA_STORAGE: | |
240 | vec = BOOK3S_INTERRUPT_DATA_STORAGE; | |
241 | break; | |
242 | case BOOK3S_IRQPRIO_INST_STORAGE: | |
243 | vec = BOOK3S_INTERRUPT_INST_STORAGE; | |
244 | break; | |
245 | case BOOK3S_IRQPRIO_DATA_SEGMENT: | |
246 | vec = BOOK3S_INTERRUPT_DATA_SEGMENT; | |
247 | break; | |
248 | case BOOK3S_IRQPRIO_INST_SEGMENT: | |
249 | vec = BOOK3S_INTERRUPT_INST_SEGMENT; | |
250 | break; | |
251 | case BOOK3S_IRQPRIO_ALIGNMENT: | |
252 | vec = BOOK3S_INTERRUPT_ALIGNMENT; | |
253 | break; | |
254 | case BOOK3S_IRQPRIO_PROGRAM: | |
255 | vec = BOOK3S_INTERRUPT_PROGRAM; | |
256 | break; | |
257 | case BOOK3S_IRQPRIO_VSX: | |
258 | vec = BOOK3S_INTERRUPT_VSX; | |
259 | break; | |
260 | case BOOK3S_IRQPRIO_ALTIVEC: | |
261 | vec = BOOK3S_INTERRUPT_ALTIVEC; | |
262 | break; | |
263 | case BOOK3S_IRQPRIO_FP_UNAVAIL: | |
264 | vec = BOOK3S_INTERRUPT_FP_UNAVAIL; | |
265 | break; | |
266 | case BOOK3S_IRQPRIO_SYSCALL: | |
267 | vec = BOOK3S_INTERRUPT_SYSCALL; | |
268 | break; | |
269 | case BOOK3S_IRQPRIO_DEBUG: | |
270 | vec = BOOK3S_INTERRUPT_TRACE; | |
271 | break; | |
272 | case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR: | |
273 | vec = BOOK3S_INTERRUPT_PERFMON; | |
274 | break; | |
275 | default: | |
276 | deliver = 0; | |
277 | printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority); | |
278 | break; | |
279 | } | |
280 | ||
281 | #if 0 | |
282 | printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver); | |
283 | #endif | |
284 | ||
285 | if (deliver) | |
3cf658b6 | 286 | kvmppc_inject_interrupt(vcpu, vec, 0); |
2f4cf5e4 AG |
287 | |
288 | return deliver; | |
289 | } | |
290 | ||
17bd1580 AG |
291 | /* |
292 | * This function determines if an irqprio should be cleared once issued. | |
293 | */ | |
294 | static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority) | |
295 | { | |
296 | switch (priority) { | |
297 | case BOOK3S_IRQPRIO_DECREMENTER: | |
298 | /* DEC interrupts get cleared by mtdec */ | |
299 | return false; | |
300 | case BOOK3S_IRQPRIO_EXTERNAL_LEVEL: | |
301 | /* External interrupts get cleared by userspace */ | |
302 | return false; | |
303 | } | |
304 | ||
305 | return true; | |
306 | } | |
307 | ||
a8e4ef84 | 308 | int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) |
2f4cf5e4 AG |
309 | { |
310 | unsigned long *pending = &vcpu->arch.pending_exceptions; | |
90bba358 | 311 | unsigned long old_pending = vcpu->arch.pending_exceptions; |
2f4cf5e4 AG |
312 | unsigned int priority; |
313 | ||
2f4cf5e4 AG |
314 | #ifdef EXIT_DEBUG |
315 | if (vcpu->arch.pending_exceptions) | |
316 | printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions); | |
317 | #endif | |
318 | priority = __ffs(*pending); | |
ada7ba17 | 319 | while (priority < BOOK3S_IRQPRIO_MAX) { |
7706664d | 320 | if (kvmppc_book3s_irqprio_deliver(vcpu, priority) && |
17bd1580 | 321 | clear_irqprio(vcpu, priority)) { |
2f4cf5e4 AG |
322 | clear_bit(priority, &vcpu->arch.pending_exceptions); |
323 | break; | |
324 | } | |
325 | ||
326 | priority = find_next_bit(pending, | |
327 | BITS_PER_BYTE * sizeof(*pending), | |
328 | priority + 1); | |
329 | } | |
90bba358 AG |
330 | |
331 | /* Tell the guest about our interrupt status */ | |
f05ed4d5 | 332 | kvmppc_update_int_pending(vcpu, *pending, old_pending); |
a8e4ef84 AG |
333 | |
334 | return 0; | |
2f4cf5e4 | 335 | } |
2ba9f0d8 | 336 | EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter); |
2f4cf5e4 | 337 | |
93b159b4 PM |
338 | pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, bool writing, |
339 | bool *writable) | |
e8508940 AG |
340 | { |
341 | ulong mp_pa = vcpu->arch.magic_page_pa; | |
342 | ||
bbcc9c06 BH |
343 | if (!(vcpu->arch.shared->msr & MSR_SF)) |
344 | mp_pa = (uint32_t)mp_pa; | |
345 | ||
e8508940 AG |
346 | /* Magic page override */ |
347 | if (unlikely(mp_pa) && | |
348 | unlikely(((gfn << PAGE_SHIFT) & KVM_PAM) == | |
349 | ((mp_pa & PAGE_MASK) & KVM_PAM))) { | |
350 | ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK; | |
351 | pfn_t pfn; | |
352 | ||
353 | pfn = (pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT; | |
354 | get_page(pfn_to_page(pfn)); | |
93b159b4 PM |
355 | if (writable) |
356 | *writable = true; | |
e8508940 AG |
357 | return pfn; |
358 | } | |
359 | ||
93b159b4 | 360 | return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable); |
e8508940 | 361 | } |
2ba9f0d8 | 362 | EXPORT_SYMBOL_GPL(kvmppc_gfn_to_pfn); |
e8508940 | 363 | |
2f4cf5e4 | 364 | static int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, bool data, |
93b159b4 | 365 | bool iswrite, struct kvmppc_pte *pte) |
2f4cf5e4 | 366 | { |
666e7252 | 367 | int relocated = (vcpu->arch.shared->msr & (data ? MSR_DR : MSR_IR)); |
2f4cf5e4 AG |
368 | int r; |
369 | ||
370 | if (relocated) { | |
93b159b4 | 371 | r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite); |
2f4cf5e4 AG |
372 | } else { |
373 | pte->eaddr = eaddr; | |
28e83b4f | 374 | pte->raddr = eaddr & KVM_PAM; |
3eeafd7d | 375 | pte->vpage = VSID_REAL | eaddr >> 12; |
2f4cf5e4 AG |
376 | pte->may_read = true; |
377 | pte->may_write = true; | |
378 | pte->may_execute = true; | |
379 | r = 0; | |
380 | } | |
381 | ||
382 | return r; | |
383 | } | |
384 | ||
385 | static hva_t kvmppc_bad_hva(void) | |
386 | { | |
387 | return PAGE_OFFSET; | |
388 | } | |
389 | ||
390 | static hva_t kvmppc_pte_to_hva(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte, | |
391 | bool read) | |
392 | { | |
393 | hva_t hpage; | |
394 | ||
395 | if (read && !pte->may_read) | |
396 | goto err; | |
397 | ||
398 | if (!read && !pte->may_write) | |
399 | goto err; | |
400 | ||
401 | hpage = gfn_to_hva(vcpu->kvm, pte->raddr >> PAGE_SHIFT); | |
402 | if (kvm_is_error_hva(hpage)) | |
403 | goto err; | |
404 | ||
405 | return hpage | (pte->raddr & ~PAGE_MASK); | |
406 | err: | |
407 | return kvmppc_bad_hva(); | |
408 | } | |
409 | ||
5467a97d AG |
410 | int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, |
411 | bool data) | |
2f4cf5e4 AG |
412 | { |
413 | struct kvmppc_pte pte; | |
2f4cf5e4 AG |
414 | |
415 | vcpu->stat.st++; | |
416 | ||
93b159b4 | 417 | if (kvmppc_xlate(vcpu, *eaddr, data, true, &pte)) |
9fb244a2 | 418 | return -ENOENT; |
5467a97d AG |
419 | |
420 | *eaddr = pte.raddr; | |
2f4cf5e4 | 421 | |
9fb244a2 AG |
422 | if (!pte.may_write) |
423 | return -EPERM; | |
2f4cf5e4 | 424 | |
9fb244a2 AG |
425 | if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size)) |
426 | return EMULATE_DO_MMIO; | |
2f4cf5e4 | 427 | |
5467a97d | 428 | return EMULATE_DONE; |
2f4cf5e4 | 429 | } |
2ba9f0d8 | 430 | EXPORT_SYMBOL_GPL(kvmppc_st); |
2f4cf5e4 | 431 | |
5467a97d | 432 | int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, |
2f4cf5e4 AG |
433 | bool data) |
434 | { | |
435 | struct kvmppc_pte pte; | |
5467a97d | 436 | hva_t hva = *eaddr; |
2f4cf5e4 AG |
437 | |
438 | vcpu->stat.ld++; | |
439 | ||
93b159b4 | 440 | if (kvmppc_xlate(vcpu, *eaddr, data, false, &pte)) |
5467a97d AG |
441 | goto nopte; |
442 | ||
443 | *eaddr = pte.raddr; | |
2f4cf5e4 AG |
444 | |
445 | hva = kvmppc_pte_to_hva(vcpu, &pte, true); | |
446 | if (kvm_is_error_hva(hva)) | |
5467a97d | 447 | goto mmio; |
2f4cf5e4 AG |
448 | |
449 | if (copy_from_user(ptr, (void __user *)hva, size)) { | |
450 | printk(KERN_INFO "kvmppc_ld at 0x%lx failed\n", hva); | |
5467a97d | 451 | goto mmio; |
2f4cf5e4 AG |
452 | } |
453 | ||
5467a97d | 454 | return EMULATE_DONE; |
2f4cf5e4 | 455 | |
5467a97d | 456 | nopte: |
2f4cf5e4 | 457 | return -ENOENT; |
5467a97d AG |
458 | mmio: |
459 | return EMULATE_DO_MMIO; | |
2f4cf5e4 | 460 | } |
2ba9f0d8 | 461 | EXPORT_SYMBOL_GPL(kvmppc_ld); |
2f4cf5e4 | 462 | |
2f4cf5e4 AG |
463 | int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) |
464 | { | |
465 | return 0; | |
466 | } | |
467 | ||
f61c94bb BB |
468 | int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) |
469 | { | |
470 | return 0; | |
471 | } | |
472 | ||
473 | void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) | |
474 | { | |
475 | } | |
476 | ||
3a167bea AK |
477 | int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, |
478 | struct kvm_sregs *sregs) | |
479 | { | |
480 | return kvmppc_ops->get_sregs(vcpu, sregs); | |
481 | } | |
482 | ||
483 | int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, | |
484 | struct kvm_sregs *sregs) | |
485 | { | |
486 | return kvmppc_ops->set_sregs(vcpu, sregs); | |
487 | } | |
488 | ||
2f4cf5e4 AG |
489 | int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) |
490 | { | |
491 | int i; | |
492 | ||
c7f38f46 | 493 | regs->pc = kvmppc_get_pc(vcpu); |
992b5b29 | 494 | regs->cr = kvmppc_get_cr(vcpu); |
c7f38f46 AG |
495 | regs->ctr = kvmppc_get_ctr(vcpu); |
496 | regs->lr = kvmppc_get_lr(vcpu); | |
992b5b29 | 497 | regs->xer = kvmppc_get_xer(vcpu); |
666e7252 | 498 | regs->msr = vcpu->arch.shared->msr; |
de7906c3 AG |
499 | regs->srr0 = vcpu->arch.shared->srr0; |
500 | regs->srr1 = vcpu->arch.shared->srr1; | |
2f4cf5e4 | 501 | regs->pid = vcpu->arch.pid; |
a73a9599 AG |
502 | regs->sprg0 = vcpu->arch.shared->sprg0; |
503 | regs->sprg1 = vcpu->arch.shared->sprg1; | |
504 | regs->sprg2 = vcpu->arch.shared->sprg2; | |
505 | regs->sprg3 = vcpu->arch.shared->sprg3; | |
b5904972 SW |
506 | regs->sprg4 = vcpu->arch.shared->sprg4; |
507 | regs->sprg5 = vcpu->arch.shared->sprg5; | |
508 | regs->sprg6 = vcpu->arch.shared->sprg6; | |
509 | regs->sprg7 = vcpu->arch.shared->sprg7; | |
2f4cf5e4 AG |
510 | |
511 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) | |
8e5b26b5 | 512 | regs->gpr[i] = kvmppc_get_gpr(vcpu, i); |
2f4cf5e4 AG |
513 | |
514 | return 0; | |
515 | } | |
516 | ||
517 | int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |
518 | { | |
519 | int i; | |
520 | ||
c7f38f46 | 521 | kvmppc_set_pc(vcpu, regs->pc); |
992b5b29 | 522 | kvmppc_set_cr(vcpu, regs->cr); |
c7f38f46 AG |
523 | kvmppc_set_ctr(vcpu, regs->ctr); |
524 | kvmppc_set_lr(vcpu, regs->lr); | |
992b5b29 | 525 | kvmppc_set_xer(vcpu, regs->xer); |
2f4cf5e4 | 526 | kvmppc_set_msr(vcpu, regs->msr); |
de7906c3 AG |
527 | vcpu->arch.shared->srr0 = regs->srr0; |
528 | vcpu->arch.shared->srr1 = regs->srr1; | |
a73a9599 AG |
529 | vcpu->arch.shared->sprg0 = regs->sprg0; |
530 | vcpu->arch.shared->sprg1 = regs->sprg1; | |
531 | vcpu->arch.shared->sprg2 = regs->sprg2; | |
532 | vcpu->arch.shared->sprg3 = regs->sprg3; | |
b5904972 SW |
533 | vcpu->arch.shared->sprg4 = regs->sprg4; |
534 | vcpu->arch.shared->sprg5 = regs->sprg5; | |
535 | vcpu->arch.shared->sprg6 = regs->sprg6; | |
536 | vcpu->arch.shared->sprg7 = regs->sprg7; | |
2f4cf5e4 | 537 | |
8e5b26b5 AG |
538 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) |
539 | kvmppc_set_gpr(vcpu, i, regs->gpr[i]); | |
2f4cf5e4 AG |
540 | |
541 | return 0; | |
542 | } | |
543 | ||
2f4cf5e4 AG |
544 | int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) |
545 | { | |
546 | return -ENOTSUPP; | |
547 | } | |
548 | ||
549 | int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) | |
550 | { | |
551 | return -ENOTSUPP; | |
552 | } | |
553 | ||
a136a8bd PM |
554 | int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) |
555 | { | |
556 | int r; | |
557 | union kvmppc_one_reg val; | |
558 | int size; | |
a8bd19ef | 559 | long int i; |
a136a8bd PM |
560 | |
561 | size = one_reg_size(reg->id); | |
562 | if (size > sizeof(val)) | |
563 | return -EINVAL; | |
564 | ||
3a167bea | 565 | r = kvmppc_ops->get_one_reg(vcpu, reg->id, &val); |
a136a8bd PM |
566 | if (r == -EINVAL) { |
567 | r = 0; | |
568 | switch (reg->id) { | |
569 | case KVM_REG_PPC_DAR: | |
570 | val = get_reg_val(reg->id, vcpu->arch.shared->dar); | |
571 | break; | |
572 | case KVM_REG_PPC_DSISR: | |
573 | val = get_reg_val(reg->id, vcpu->arch.shared->dsisr); | |
574 | break; | |
a8bd19ef PM |
575 | case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: |
576 | i = reg->id - KVM_REG_PPC_FPR0; | |
577 | val = get_reg_val(reg->id, vcpu->arch.fpr[i]); | |
578 | break; | |
579 | case KVM_REG_PPC_FPSCR: | |
580 | val = get_reg_val(reg->id, vcpu->arch.fpscr); | |
581 | break; | |
582 | #ifdef CONFIG_ALTIVEC | |
583 | case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31: | |
584 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
585 | r = -ENXIO; | |
586 | break; | |
587 | } | |
588 | val.vval = vcpu->arch.vr[reg->id - KVM_REG_PPC_VR0]; | |
589 | break; | |
590 | case KVM_REG_PPC_VSCR: | |
591 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
592 | r = -ENXIO; | |
593 | break; | |
594 | } | |
595 | val = get_reg_val(reg->id, vcpu->arch.vscr.u[3]); | |
596 | break; | |
c0867fd5 PM |
597 | case KVM_REG_PPC_VRSAVE: |
598 | val = get_reg_val(reg->id, vcpu->arch.vrsave); | |
599 | break; | |
a8bd19ef | 600 | #endif /* CONFIG_ALTIVEC */ |
8c32a2ea BB |
601 | case KVM_REG_PPC_DEBUG_INST: { |
602 | u32 opcode = INS_TW; | |
603 | r = copy_to_user((u32 __user *)(long)reg->addr, | |
604 | &opcode, sizeof(u32)); | |
605 | break; | |
606 | } | |
8b78645c PM |
607 | #ifdef CONFIG_KVM_XICS |
608 | case KVM_REG_PPC_ICP_STATE: | |
609 | if (!vcpu->arch.icp) { | |
610 | r = -ENXIO; | |
611 | break; | |
612 | } | |
613 | val = get_reg_val(reg->id, kvmppc_xics_get_icp(vcpu)); | |
614 | break; | |
615 | #endif /* CONFIG_KVM_XICS */ | |
a136a8bd PM |
616 | default: |
617 | r = -EINVAL; | |
618 | break; | |
619 | } | |
620 | } | |
621 | if (r) | |
622 | return r; | |
623 | ||
624 | if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size)) | |
625 | r = -EFAULT; | |
626 | ||
627 | return r; | |
628 | } | |
629 | ||
630 | int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) | |
631 | { | |
632 | int r; | |
633 | union kvmppc_one_reg val; | |
634 | int size; | |
a8bd19ef | 635 | long int i; |
a136a8bd PM |
636 | |
637 | size = one_reg_size(reg->id); | |
638 | if (size > sizeof(val)) | |
639 | return -EINVAL; | |
640 | ||
641 | if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size)) | |
642 | return -EFAULT; | |
643 | ||
3a167bea | 644 | r = kvmppc_ops->set_one_reg(vcpu, reg->id, &val); |
a136a8bd PM |
645 | if (r == -EINVAL) { |
646 | r = 0; | |
647 | switch (reg->id) { | |
648 | case KVM_REG_PPC_DAR: | |
649 | vcpu->arch.shared->dar = set_reg_val(reg->id, val); | |
650 | break; | |
651 | case KVM_REG_PPC_DSISR: | |
652 | vcpu->arch.shared->dsisr = set_reg_val(reg->id, val); | |
653 | break; | |
a8bd19ef PM |
654 | case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: |
655 | i = reg->id - KVM_REG_PPC_FPR0; | |
656 | vcpu->arch.fpr[i] = set_reg_val(reg->id, val); | |
657 | break; | |
658 | case KVM_REG_PPC_FPSCR: | |
659 | vcpu->arch.fpscr = set_reg_val(reg->id, val); | |
660 | break; | |
661 | #ifdef CONFIG_ALTIVEC | |
662 | case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31: | |
663 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
664 | r = -ENXIO; | |
665 | break; | |
666 | } | |
667 | vcpu->arch.vr[reg->id - KVM_REG_PPC_VR0] = val.vval; | |
668 | break; | |
669 | case KVM_REG_PPC_VSCR: | |
670 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
671 | r = -ENXIO; | |
672 | break; | |
673 | } | |
674 | vcpu->arch.vscr.u[3] = set_reg_val(reg->id, val); | |
675 | break; | |
c0867fd5 PM |
676 | case KVM_REG_PPC_VRSAVE: |
677 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
678 | r = -ENXIO; | |
679 | break; | |
680 | } | |
681 | vcpu->arch.vrsave = set_reg_val(reg->id, val); | |
682 | break; | |
a8bd19ef | 683 | #endif /* CONFIG_ALTIVEC */ |
8b78645c PM |
684 | #ifdef CONFIG_KVM_XICS |
685 | case KVM_REG_PPC_ICP_STATE: | |
686 | if (!vcpu->arch.icp) { | |
687 | r = -ENXIO; | |
688 | break; | |
689 | } | |
690 | r = kvmppc_xics_set_icp(vcpu, | |
691 | set_reg_val(reg->id, val)); | |
692 | break; | |
693 | #endif /* CONFIG_KVM_XICS */ | |
a136a8bd PM |
694 | default: |
695 | r = -EINVAL; | |
696 | break; | |
697 | } | |
698 | } | |
699 | ||
700 | return r; | |
701 | } | |
702 | ||
3a167bea AK |
703 | void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) |
704 | { | |
705 | kvmppc_ops->vcpu_load(vcpu, cpu); | |
706 | } | |
707 | ||
708 | void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) | |
709 | { | |
710 | kvmppc_ops->vcpu_put(vcpu); | |
711 | } | |
712 | ||
713 | void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) | |
714 | { | |
715 | kvmppc_ops->set_msr(vcpu, msr); | |
716 | } | |
2ba9f0d8 | 717 | EXPORT_SYMBOL_GPL(kvmppc_set_msr); |
3a167bea AK |
718 | |
719 | int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) | |
720 | { | |
721 | return kvmppc_ops->vcpu_run(kvm_run, vcpu); | |
722 | } | |
723 | ||
2f4cf5e4 AG |
724 | int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, |
725 | struct kvm_translation *tr) | |
726 | { | |
727 | return 0; | |
728 | } | |
729 | ||
092d62ee BB |
730 | int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, |
731 | struct kvm_guest_debug *dbg) | |
732 | { | |
733 | return -EINVAL; | |
734 | } | |
735 | ||
dfd4d47e SW |
736 | void kvmppc_decrementer_func(unsigned long data) |
737 | { | |
738 | struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; | |
739 | ||
740 | kvmppc_core_queue_dec(vcpu); | |
741 | kvm_vcpu_kick(vcpu); | |
742 | } | |
3a167bea AK |
743 | |
744 | struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) | |
745 | { | |
746 | return kvmppc_ops->vcpu_create(kvm, id); | |
747 | } | |
748 | ||
749 | void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) | |
750 | { | |
751 | kvmppc_ops->vcpu_free(vcpu); | |
752 | } | |
753 | ||
754 | int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) | |
755 | { | |
756 | return kvmppc_ops->check_requests(vcpu); | |
757 | } | |
758 | ||
759 | int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) | |
760 | { | |
761 | return kvmppc_ops->get_dirty_log(kvm, log); | |
762 | } | |
763 | ||
764 | void kvmppc_core_free_memslot(struct kvm_memory_slot *free, | |
765 | struct kvm_memory_slot *dont) | |
766 | { | |
767 | kvmppc_ops->free_memslot(free, dont); | |
768 | } | |
769 | ||
770 | int kvmppc_core_create_memslot(struct kvm_memory_slot *slot, | |
771 | unsigned long npages) | |
772 | { | |
773 | return kvmppc_ops->create_memslot(slot, npages); | |
774 | } | |
775 | ||
776 | void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) | |
777 | { | |
778 | kvmppc_ops->flush_memslot(kvm, memslot); | |
779 | } | |
780 | ||
781 | int kvmppc_core_prepare_memory_region(struct kvm *kvm, | |
782 | struct kvm_memory_slot *memslot, | |
783 | struct kvm_userspace_memory_region *mem) | |
784 | { | |
785 | return kvmppc_ops->prepare_memory_region(kvm, memslot, mem); | |
786 | } | |
787 | ||
788 | void kvmppc_core_commit_memory_region(struct kvm *kvm, | |
789 | struct kvm_userspace_memory_region *mem, | |
790 | const struct kvm_memory_slot *old) | |
791 | { | |
792 | kvmppc_ops->commit_memory_region(kvm, mem, old); | |
793 | } | |
794 | ||
795 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) | |
796 | { | |
797 | return kvmppc_ops->unmap_hva(kvm, hva); | |
798 | } | |
2ba9f0d8 | 799 | EXPORT_SYMBOL_GPL(kvm_unmap_hva); |
3a167bea AK |
800 | |
801 | int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) | |
802 | { | |
803 | return kvmppc_ops->unmap_hva_range(kvm, start, end); | |
804 | } | |
805 | ||
806 | int kvm_age_hva(struct kvm *kvm, unsigned long hva) | |
807 | { | |
808 | return kvmppc_ops->age_hva(kvm, hva); | |
809 | } | |
810 | ||
811 | int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) | |
812 | { | |
813 | return kvmppc_ops->test_age_hva(kvm, hva); | |
814 | } | |
815 | ||
816 | void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) | |
817 | { | |
818 | kvmppc_ops->set_spte_hva(kvm, hva, pte); | |
819 | } | |
820 | ||
821 | void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) | |
822 | { | |
823 | kvmppc_ops->mmu_destroy(vcpu); | |
824 | } | |
825 | ||
826 | int kvmppc_core_init_vm(struct kvm *kvm) | |
827 | { | |
828 | ||
829 | #ifdef CONFIG_PPC64 | |
830 | INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables); | |
831 | INIT_LIST_HEAD(&kvm->arch.rtas_tokens); | |
832 | #endif | |
833 | ||
834 | return kvmppc_ops->init_vm(kvm); | |
835 | } | |
836 | ||
837 | void kvmppc_core_destroy_vm(struct kvm *kvm) | |
838 | { | |
839 | kvmppc_ops->destroy_vm(kvm); | |
840 | ||
841 | #ifdef CONFIG_PPC64 | |
842 | kvmppc_rtas_tokens_free(kvm); | |
843 | WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); | |
844 | #endif | |
845 | } | |
846 | ||
847 | int kvmppc_core_check_processor_compat(void) | |
848 | { | |
849 | return kvmppc_ops->check_processor_compat(); | |
850 | } |