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2f4cf5e4 AG |
1 | /* |
2 | * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. | |
3 | * | |
4 | * Authors: | |
5 | * Alexander Graf <agraf@suse.de> | |
6 | * Kevin Wolf <mail@kevin-wolf.de> | |
7 | * | |
8 | * Description: | |
9 | * This file is derived from arch/powerpc/kvm/44x.c, | |
10 | * by Hollis Blanchard <hollisb@us.ibm.com>. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License, version 2, as | |
14 | * published by the Free Software Foundation. | |
15 | */ | |
16 | ||
17 | #include <linux/kvm_host.h> | |
18 | #include <linux/err.h> | |
329d20ba | 19 | #include <linux/slab.h> |
2f4cf5e4 AG |
20 | |
21 | #include <asm/reg.h> | |
22 | #include <asm/cputable.h> | |
23 | #include <asm/cacheflush.h> | |
24 | #include <asm/tlbflush.h> | |
25 | #include <asm/uaccess.h> | |
26 | #include <asm/io.h> | |
27 | #include <asm/kvm_ppc.h> | |
28 | #include <asm/kvm_book3s.h> | |
29 | #include <asm/mmu_context.h> | |
5a0e3ad6 | 30 | #include <linux/gfp.h> |
2f4cf5e4 AG |
31 | #include <linux/sched.h> |
32 | #include <linux/vmalloc.h> | |
9fb244a2 | 33 | #include <linux/highmem.h> |
2f4cf5e4 AG |
34 | |
35 | #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU | |
36 | ||
37 | /* #define EXIT_DEBUG */ | |
38 | /* #define EXIT_DEBUG_SIMPLE */ | |
180a34d2 AG |
39 | /* #define DEBUG_EXT */ |
40 | ||
c8c0b6f2 AG |
41 | static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, |
42 | ulong msr); | |
2f4cf5e4 | 43 | |
07b0907d AG |
44 | /* Some compatibility defines */ |
45 | #ifdef CONFIG_PPC_BOOK3S_32 | |
46 | #define MSR_USER32 MSR_USER | |
47 | #define MSR_USER64 MSR_USER | |
48 | #define HW_PAGE_SIZE PAGE_SIZE | |
49 | #endif | |
50 | ||
2f4cf5e4 AG |
51 | struct kvm_stats_debugfs_item debugfs_entries[] = { |
52 | { "exits", VCPU_STAT(sum_exits) }, | |
53 | { "mmio", VCPU_STAT(mmio_exits) }, | |
54 | { "sig", VCPU_STAT(signal_exits) }, | |
55 | { "sysc", VCPU_STAT(syscall_exits) }, | |
56 | { "inst_emu", VCPU_STAT(emulated_inst_exits) }, | |
57 | { "dec", VCPU_STAT(dec_exits) }, | |
58 | { "ext_intr", VCPU_STAT(ext_intr_exits) }, | |
59 | { "queue_intr", VCPU_STAT(queue_intr) }, | |
60 | { "halt_wakeup", VCPU_STAT(halt_wakeup) }, | |
61 | { "pf_storage", VCPU_STAT(pf_storage) }, | |
62 | { "sp_storage", VCPU_STAT(sp_storage) }, | |
63 | { "pf_instruc", VCPU_STAT(pf_instruc) }, | |
64 | { "sp_instruc", VCPU_STAT(sp_instruc) }, | |
65 | { "ld", VCPU_STAT(ld) }, | |
66 | { "ld_slow", VCPU_STAT(ld_slow) }, | |
67 | { "st", VCPU_STAT(st) }, | |
68 | { "st_slow", VCPU_STAT(st_slow) }, | |
69 | { NULL } | |
70 | }; | |
71 | ||
72 | void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu) | |
73 | { | |
74 | } | |
75 | ||
76 | void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu) | |
77 | { | |
78 | } | |
79 | ||
80 | void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) | |
81 | { | |
c7f38f46 AG |
82 | #ifdef CONFIG_PPC_BOOK3S_64 |
83 | memcpy(to_svcpu(vcpu)->slb, to_book3s(vcpu)->slb_shadow, sizeof(to_svcpu(vcpu)->slb)); | |
84 | memcpy(&get_paca()->shadow_vcpu, to_book3s(vcpu)->shadow_vcpu, | |
7e57cba0 | 85 | sizeof(get_paca()->shadow_vcpu)); |
c7f38f46 AG |
86 | to_svcpu(vcpu)->slb_max = to_book3s(vcpu)->slb_shadow_max; |
87 | #endif | |
88 | ||
89 | #ifdef CONFIG_PPC_BOOK3S_32 | |
90 | current->thread.kvm_shadow_vcpu = to_book3s(vcpu)->shadow_vcpu; | |
91 | #endif | |
2f4cf5e4 AG |
92 | } |
93 | ||
94 | void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) | |
95 | { | |
c7f38f46 AG |
96 | #ifdef CONFIG_PPC_BOOK3S_64 |
97 | memcpy(to_book3s(vcpu)->slb_shadow, to_svcpu(vcpu)->slb, sizeof(to_svcpu(vcpu)->slb)); | |
98 | memcpy(to_book3s(vcpu)->shadow_vcpu, &get_paca()->shadow_vcpu, | |
7e57cba0 | 99 | sizeof(get_paca()->shadow_vcpu)); |
c7f38f46 AG |
100 | to_book3s(vcpu)->slb_shadow_max = to_svcpu(vcpu)->slb_max; |
101 | #endif | |
180a34d2 AG |
102 | |
103 | kvmppc_giveup_ext(vcpu, MSR_FP); | |
104 | kvmppc_giveup_ext(vcpu, MSR_VEC); | |
105 | kvmppc_giveup_ext(vcpu, MSR_VSX); | |
2f4cf5e4 AG |
106 | } |
107 | ||
0bb1fb71 | 108 | #if defined(EXIT_DEBUG) |
2f4cf5e4 AG |
109 | static u32 kvmppc_get_dec(struct kvm_vcpu *vcpu) |
110 | { | |
111 | u64 jd = mftb() - vcpu->arch.dec_jiffies; | |
112 | return vcpu->arch.dec - jd; | |
113 | } | |
114 | #endif | |
115 | ||
a76f8497 AG |
116 | static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu) |
117 | { | |
666e7252 AG |
118 | ulong smsr = vcpu->arch.shared->msr; |
119 | ||
a76f8497 | 120 | /* Guest MSR values */ |
666e7252 | 121 | smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_DE; |
a76f8497 | 122 | /* Process MSR values */ |
666e7252 | 123 | smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE; |
a76f8497 | 124 | /* External providers the guest reserved */ |
666e7252 | 125 | smsr |= (vcpu->arch.shared->msr & vcpu->arch.guest_owned_ext); |
a76f8497 AG |
126 | /* 64-bit Process MSR values */ |
127 | #ifdef CONFIG_PPC_BOOK3S_64 | |
666e7252 | 128 | smsr |= MSR_ISF | MSR_HV; |
a76f8497 | 129 | #endif |
666e7252 | 130 | vcpu->arch.shadow_msr = smsr; |
a76f8497 AG |
131 | } |
132 | ||
2f4cf5e4 AG |
133 | void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) |
134 | { | |
666e7252 | 135 | ulong old_msr = vcpu->arch.shared->msr; |
2f4cf5e4 AG |
136 | |
137 | #ifdef EXIT_DEBUG | |
138 | printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr); | |
139 | #endif | |
a76f8497 | 140 | |
2f4cf5e4 | 141 | msr &= to_book3s(vcpu)->msr_mask; |
666e7252 | 142 | vcpu->arch.shared->msr = msr; |
a76f8497 | 143 | kvmppc_recalc_shadow_msr(vcpu); |
2f4cf5e4 AG |
144 | |
145 | if (msr & (MSR_WE|MSR_POW)) { | |
146 | if (!vcpu->arch.pending_exceptions) { | |
147 | kvm_vcpu_block(vcpu); | |
148 | vcpu->stat.halt_wakeup++; | |
149 | } | |
150 | } | |
151 | ||
666e7252 | 152 | if ((vcpu->arch.shared->msr & (MSR_PR|MSR_IR|MSR_DR)) != |
f7bc74e1 | 153 | (old_msr & (MSR_PR|MSR_IR|MSR_DR))) { |
2f4cf5e4 | 154 | kvmppc_mmu_flush_segments(vcpu); |
c7f38f46 | 155 | kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); |
2f4cf5e4 | 156 | } |
d1bab74c AG |
157 | |
158 | /* Preload FPU if it's enabled */ | |
666e7252 | 159 | if (vcpu->arch.shared->msr & MSR_FP) |
d1bab74c | 160 | kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); |
2f4cf5e4 AG |
161 | } |
162 | ||
163 | void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags) | |
164 | { | |
de7906c3 AG |
165 | vcpu->arch.shared->srr0 = kvmppc_get_pc(vcpu); |
166 | vcpu->arch.shared->srr1 = vcpu->arch.shared->msr | flags; | |
c7f38f46 | 167 | kvmppc_set_pc(vcpu, to_book3s(vcpu)->hior + vec); |
2f4cf5e4 AG |
168 | vcpu->arch.mmu.reset_msr(vcpu); |
169 | } | |
170 | ||
583617b7 | 171 | static int kvmppc_book3s_vec2irqprio(unsigned int vec) |
2f4cf5e4 AG |
172 | { |
173 | unsigned int prio; | |
174 | ||
2f4cf5e4 AG |
175 | switch (vec) { |
176 | case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break; | |
177 | case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break; | |
178 | case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break; | |
179 | case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break; | |
180 | case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break; | |
181 | case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break; | |
182 | case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break; | |
183 | case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break; | |
184 | case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break; | |
185 | case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break; | |
186 | case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break; | |
187 | case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break; | |
188 | case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break; | |
189 | case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break; | |
190 | case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break; | |
191 | default: prio = BOOK3S_IRQPRIO_MAX; break; | |
192 | } | |
193 | ||
583617b7 AG |
194 | return prio; |
195 | } | |
196 | ||
7706664d AG |
197 | static void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu, |
198 | unsigned int vec) | |
199 | { | |
200 | clear_bit(kvmppc_book3s_vec2irqprio(vec), | |
201 | &vcpu->arch.pending_exceptions); | |
202 | } | |
203 | ||
583617b7 AG |
204 | void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec) |
205 | { | |
206 | vcpu->stat.queue_intr++; | |
207 | ||
208 | set_bit(kvmppc_book3s_vec2irqprio(vec), | |
209 | &vcpu->arch.pending_exceptions); | |
2f4cf5e4 AG |
210 | #ifdef EXIT_DEBUG |
211 | printk(KERN_INFO "Queueing interrupt %x\n", vec); | |
212 | #endif | |
213 | } | |
214 | ||
215 | ||
25a8a02d | 216 | void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags) |
2f4cf5e4 | 217 | { |
25a8a02d | 218 | to_book3s(vcpu)->prog_flags = flags; |
2f4cf5e4 AG |
219 | kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_PROGRAM); |
220 | } | |
221 | ||
222 | void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) | |
223 | { | |
224 | kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); | |
225 | } | |
226 | ||
227 | int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) | |
228 | { | |
229 | return test_bit(BOOK3S_INTERRUPT_DECREMENTER >> 7, &vcpu->arch.pending_exceptions); | |
230 | } | |
231 | ||
7706664d AG |
232 | void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) |
233 | { | |
234 | kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); | |
235 | } | |
236 | ||
2f4cf5e4 AG |
237 | void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, |
238 | struct kvm_interrupt *irq) | |
239 | { | |
240 | kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); | |
241 | } | |
242 | ||
18978768 AG |
243 | void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu, |
244 | struct kvm_interrupt *irq) | |
245 | { | |
246 | kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); | |
247 | } | |
248 | ||
2f4cf5e4 AG |
249 | int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, unsigned int priority) |
250 | { | |
251 | int deliver = 1; | |
252 | int vec = 0; | |
25a8a02d | 253 | ulong flags = 0ULL; |
5c6cedf4 AG |
254 | ulong crit_raw = vcpu->arch.shared->critical; |
255 | ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); | |
256 | bool crit; | |
257 | ||
258 | /* Truncate crit indicators in 32 bit mode */ | |
259 | if (!(vcpu->arch.shared->msr & MSR_SF)) { | |
260 | crit_raw &= 0xffffffff; | |
261 | crit_r1 &= 0xffffffff; | |
262 | } | |
263 | ||
264 | /* Critical section when crit == r1 */ | |
265 | crit = (crit_raw == crit_r1); | |
266 | /* ... and we're in supervisor mode */ | |
267 | crit = crit && !(vcpu->arch.shared->msr & MSR_PR); | |
2f4cf5e4 AG |
268 | |
269 | switch (priority) { | |
270 | case BOOK3S_IRQPRIO_DECREMENTER: | |
5c6cedf4 | 271 | deliver = (vcpu->arch.shared->msr & MSR_EE) && !crit; |
2f4cf5e4 AG |
272 | vec = BOOK3S_INTERRUPT_DECREMENTER; |
273 | break; | |
274 | case BOOK3S_IRQPRIO_EXTERNAL: | |
5c6cedf4 | 275 | deliver = (vcpu->arch.shared->msr & MSR_EE) && !crit; |
2f4cf5e4 AG |
276 | vec = BOOK3S_INTERRUPT_EXTERNAL; |
277 | break; | |
278 | case BOOK3S_IRQPRIO_SYSTEM_RESET: | |
279 | vec = BOOK3S_INTERRUPT_SYSTEM_RESET; | |
280 | break; | |
281 | case BOOK3S_IRQPRIO_MACHINE_CHECK: | |
282 | vec = BOOK3S_INTERRUPT_MACHINE_CHECK; | |
283 | break; | |
284 | case BOOK3S_IRQPRIO_DATA_STORAGE: | |
285 | vec = BOOK3S_INTERRUPT_DATA_STORAGE; | |
286 | break; | |
287 | case BOOK3S_IRQPRIO_INST_STORAGE: | |
288 | vec = BOOK3S_INTERRUPT_INST_STORAGE; | |
289 | break; | |
290 | case BOOK3S_IRQPRIO_DATA_SEGMENT: | |
291 | vec = BOOK3S_INTERRUPT_DATA_SEGMENT; | |
292 | break; | |
293 | case BOOK3S_IRQPRIO_INST_SEGMENT: | |
294 | vec = BOOK3S_INTERRUPT_INST_SEGMENT; | |
295 | break; | |
296 | case BOOK3S_IRQPRIO_ALIGNMENT: | |
297 | vec = BOOK3S_INTERRUPT_ALIGNMENT; | |
298 | break; | |
299 | case BOOK3S_IRQPRIO_PROGRAM: | |
300 | vec = BOOK3S_INTERRUPT_PROGRAM; | |
25a8a02d | 301 | flags = to_book3s(vcpu)->prog_flags; |
2f4cf5e4 AG |
302 | break; |
303 | case BOOK3S_IRQPRIO_VSX: | |
304 | vec = BOOK3S_INTERRUPT_VSX; | |
305 | break; | |
306 | case BOOK3S_IRQPRIO_ALTIVEC: | |
307 | vec = BOOK3S_INTERRUPT_ALTIVEC; | |
308 | break; | |
309 | case BOOK3S_IRQPRIO_FP_UNAVAIL: | |
310 | vec = BOOK3S_INTERRUPT_FP_UNAVAIL; | |
311 | break; | |
312 | case BOOK3S_IRQPRIO_SYSCALL: | |
313 | vec = BOOK3S_INTERRUPT_SYSCALL; | |
314 | break; | |
315 | case BOOK3S_IRQPRIO_DEBUG: | |
316 | vec = BOOK3S_INTERRUPT_TRACE; | |
317 | break; | |
318 | case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR: | |
319 | vec = BOOK3S_INTERRUPT_PERFMON; | |
320 | break; | |
321 | default: | |
322 | deliver = 0; | |
323 | printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority); | |
324 | break; | |
325 | } | |
326 | ||
327 | #if 0 | |
328 | printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver); | |
329 | #endif | |
330 | ||
331 | if (deliver) | |
25a8a02d | 332 | kvmppc_inject_interrupt(vcpu, vec, flags); |
2f4cf5e4 AG |
333 | |
334 | return deliver; | |
335 | } | |
336 | ||
337 | void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu) | |
338 | { | |
339 | unsigned long *pending = &vcpu->arch.pending_exceptions; | |
90bba358 | 340 | unsigned long old_pending = vcpu->arch.pending_exceptions; |
2f4cf5e4 AG |
341 | unsigned int priority; |
342 | ||
2f4cf5e4 AG |
343 | #ifdef EXIT_DEBUG |
344 | if (vcpu->arch.pending_exceptions) | |
345 | printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions); | |
346 | #endif | |
347 | priority = __ffs(*pending); | |
ada7ba17 | 348 | while (priority < BOOK3S_IRQPRIO_MAX) { |
7706664d AG |
349 | if (kvmppc_book3s_irqprio_deliver(vcpu, priority) && |
350 | (priority != BOOK3S_IRQPRIO_DECREMENTER)) { | |
351 | /* DEC interrupts get cleared by mtdec */ | |
2f4cf5e4 AG |
352 | clear_bit(priority, &vcpu->arch.pending_exceptions); |
353 | break; | |
354 | } | |
355 | ||
356 | priority = find_next_bit(pending, | |
357 | BITS_PER_BYTE * sizeof(*pending), | |
358 | priority + 1); | |
359 | } | |
90bba358 AG |
360 | |
361 | /* Tell the guest about our interrupt status */ | |
362 | if (*pending) | |
363 | vcpu->arch.shared->int_pending = 1; | |
364 | else if (old_pending) | |
365 | vcpu->arch.shared->int_pending = 0; | |
2f4cf5e4 AG |
366 | } |
367 | ||
368 | void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr) | |
369 | { | |
b83d4a9c AG |
370 | u32 host_pvr; |
371 | ||
e15a1137 | 372 | vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB; |
2f4cf5e4 | 373 | vcpu->arch.pvr = pvr; |
07b0907d | 374 | #ifdef CONFIG_PPC_BOOK3S_64 |
2f4cf5e4 AG |
375 | if ((pvr >= 0x330000) && (pvr < 0x70330000)) { |
376 | kvmppc_mmu_book3s_64_init(vcpu); | |
377 | to_book3s(vcpu)->hior = 0xfff00000; | |
378 | to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL; | |
07b0907d AG |
379 | } else |
380 | #endif | |
381 | { | |
2f4cf5e4 AG |
382 | kvmppc_mmu_book3s_32_init(vcpu); |
383 | to_book3s(vcpu)->hior = 0; | |
384 | to_book3s(vcpu)->msr_mask = 0xffffffffULL; | |
385 | } | |
386 | ||
387 | /* If we are in hypervisor level on 970, we can tell the CPU to | |
388 | * treat DCBZ as 32 bytes store */ | |
389 | vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32; | |
390 | if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) && | |
391 | !strcmp(cur_cpu_spec->platform, "ppc970")) | |
392 | vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; | |
393 | ||
05b0ab1c AG |
394 | /* Cell performs badly if MSR_FEx are set. So let's hope nobody |
395 | really needs them in a VM on Cell and force disable them. */ | |
396 | if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be")) | |
397 | to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1); | |
07b0907d AG |
398 | |
399 | #ifdef CONFIG_PPC_BOOK3S_32 | |
400 | /* 32 bit Book3S always has 32 byte dcbz */ | |
401 | vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; | |
402 | #endif | |
b83d4a9c AG |
403 | |
404 | /* On some CPUs we can execute paired single operations natively */ | |
405 | asm ( "mfpvr %0" : "=r"(host_pvr)); | |
406 | switch (host_pvr) { | |
407 | case 0x00080200: /* lonestar 2.0 */ | |
408 | case 0x00088202: /* lonestar 2.2 */ | |
409 | case 0x70000100: /* gekko 1.0 */ | |
410 | case 0x00080100: /* gekko 2.0 */ | |
411 | case 0x00083203: /* gekko 2.3a */ | |
412 | case 0x00083213: /* gekko 2.3b */ | |
413 | case 0x00083204: /* gekko 2.4 */ | |
414 | case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */ | |
415 | case 0x00087200: /* broadway */ | |
416 | vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS; | |
417 | /* Enable HID2.PSE - in case we need it later */ | |
418 | mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29)); | |
419 | } | |
2f4cf5e4 AG |
420 | } |
421 | ||
422 | /* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To | |
423 | * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to | |
424 | * emulate 32 bytes dcbz length. | |
425 | * | |
426 | * The Book3s_64 inventors also realized this case and implemented a special bit | |
427 | * in the HID5 register, which is a hypervisor ressource. Thus we can't use it. | |
428 | * | |
429 | * My approach here is to patch the dcbz instruction on executing pages. | |
430 | */ | |
431 | static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte) | |
432 | { | |
9fb244a2 AG |
433 | struct page *hpage; |
434 | u64 hpage_offset; | |
2f4cf5e4 AG |
435 | u32 *page; |
436 | int i; | |
437 | ||
9fb244a2 AG |
438 | hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT); |
439 | if (is_error_page(hpage)) | |
2f4cf5e4 AG |
440 | return; |
441 | ||
9fb244a2 AG |
442 | hpage_offset = pte->raddr & ~PAGE_MASK; |
443 | hpage_offset &= ~0xFFFULL; | |
444 | hpage_offset /= 4; | |
2f4cf5e4 | 445 | |
9fb244a2 AG |
446 | get_page(hpage); |
447 | page = kmap_atomic(hpage, KM_USER0); | |
2f4cf5e4 | 448 | |
9fb244a2 AG |
449 | /* patch dcbz into reserved instruction, so we trap */ |
450 | for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++) | |
451 | if ((page[i] & 0xff0007ff) == INS_DCBZ) | |
452 | page[i] &= 0xfffffff7; | |
2f4cf5e4 | 453 | |
9fb244a2 AG |
454 | kunmap_atomic(page, KM_USER0); |
455 | put_page(hpage); | |
2f4cf5e4 AG |
456 | } |
457 | ||
458 | static int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, bool data, | |
459 | struct kvmppc_pte *pte) | |
460 | { | |
666e7252 | 461 | int relocated = (vcpu->arch.shared->msr & (data ? MSR_DR : MSR_IR)); |
2f4cf5e4 AG |
462 | int r; |
463 | ||
464 | if (relocated) { | |
465 | r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data); | |
466 | } else { | |
467 | pte->eaddr = eaddr; | |
468 | pte->raddr = eaddr & 0xffffffff; | |
3eeafd7d | 469 | pte->vpage = VSID_REAL | eaddr >> 12; |
2f4cf5e4 AG |
470 | pte->may_read = true; |
471 | pte->may_write = true; | |
472 | pte->may_execute = true; | |
473 | r = 0; | |
474 | } | |
475 | ||
476 | return r; | |
477 | } | |
478 | ||
479 | static hva_t kvmppc_bad_hva(void) | |
480 | { | |
481 | return PAGE_OFFSET; | |
482 | } | |
483 | ||
484 | static hva_t kvmppc_pte_to_hva(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte, | |
485 | bool read) | |
486 | { | |
487 | hva_t hpage; | |
488 | ||
489 | if (read && !pte->may_read) | |
490 | goto err; | |
491 | ||
492 | if (!read && !pte->may_write) | |
493 | goto err; | |
494 | ||
495 | hpage = gfn_to_hva(vcpu->kvm, pte->raddr >> PAGE_SHIFT); | |
496 | if (kvm_is_error_hva(hpage)) | |
497 | goto err; | |
498 | ||
499 | return hpage | (pte->raddr & ~PAGE_MASK); | |
500 | err: | |
501 | return kvmppc_bad_hva(); | |
502 | } | |
503 | ||
5467a97d AG |
504 | int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, |
505 | bool data) | |
2f4cf5e4 AG |
506 | { |
507 | struct kvmppc_pte pte; | |
2f4cf5e4 AG |
508 | |
509 | vcpu->stat.st++; | |
510 | ||
5467a97d | 511 | if (kvmppc_xlate(vcpu, *eaddr, data, &pte)) |
9fb244a2 | 512 | return -ENOENT; |
5467a97d AG |
513 | |
514 | *eaddr = pte.raddr; | |
2f4cf5e4 | 515 | |
9fb244a2 AG |
516 | if (!pte.may_write) |
517 | return -EPERM; | |
2f4cf5e4 | 518 | |
9fb244a2 AG |
519 | if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size)) |
520 | return EMULATE_DO_MMIO; | |
2f4cf5e4 | 521 | |
5467a97d | 522 | return EMULATE_DONE; |
2f4cf5e4 AG |
523 | } |
524 | ||
5467a97d | 525 | int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, |
2f4cf5e4 AG |
526 | bool data) |
527 | { | |
528 | struct kvmppc_pte pte; | |
5467a97d | 529 | hva_t hva = *eaddr; |
2f4cf5e4 AG |
530 | |
531 | vcpu->stat.ld++; | |
532 | ||
5467a97d AG |
533 | if (kvmppc_xlate(vcpu, *eaddr, data, &pte)) |
534 | goto nopte; | |
535 | ||
536 | *eaddr = pte.raddr; | |
2f4cf5e4 AG |
537 | |
538 | hva = kvmppc_pte_to_hva(vcpu, &pte, true); | |
539 | if (kvm_is_error_hva(hva)) | |
5467a97d | 540 | goto mmio; |
2f4cf5e4 AG |
541 | |
542 | if (copy_from_user(ptr, (void __user *)hva, size)) { | |
543 | printk(KERN_INFO "kvmppc_ld at 0x%lx failed\n", hva); | |
5467a97d | 544 | goto mmio; |
2f4cf5e4 AG |
545 | } |
546 | ||
5467a97d | 547 | return EMULATE_DONE; |
2f4cf5e4 | 548 | |
5467a97d | 549 | nopte: |
2f4cf5e4 | 550 | return -ENOENT; |
5467a97d AG |
551 | mmio: |
552 | return EMULATE_DO_MMIO; | |
2f4cf5e4 AG |
553 | } |
554 | ||
555 | static int kvmppc_visible_gfn(struct kvm_vcpu *vcpu, gfn_t gfn) | |
556 | { | |
557 | return kvm_is_visible_gfn(vcpu->kvm, gfn); | |
558 | } | |
559 | ||
560 | int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu, | |
561 | ulong eaddr, int vec) | |
562 | { | |
563 | bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE); | |
564 | int r = RESUME_GUEST; | |
565 | int relocated; | |
566 | int page_found = 0; | |
567 | struct kvmppc_pte pte; | |
568 | bool is_mmio = false; | |
666e7252 AG |
569 | bool dr = (vcpu->arch.shared->msr & MSR_DR) ? true : false; |
570 | bool ir = (vcpu->arch.shared->msr & MSR_IR) ? true : false; | |
f7bc74e1 | 571 | u64 vsid; |
2f4cf5e4 | 572 | |
3eeafd7d | 573 | relocated = data ? dr : ir; |
2f4cf5e4 AG |
574 | |
575 | /* Resolve real address if translation turned on */ | |
576 | if (relocated) { | |
577 | page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data); | |
578 | } else { | |
579 | pte.may_execute = true; | |
580 | pte.may_read = true; | |
581 | pte.may_write = true; | |
582 | pte.raddr = eaddr & 0xffffffff; | |
583 | pte.eaddr = eaddr; | |
584 | pte.vpage = eaddr >> 12; | |
3eeafd7d AG |
585 | } |
586 | ||
666e7252 | 587 | switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) { |
3eeafd7d | 588 | case 0: |
f7bc74e1 | 589 | pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12)); |
3eeafd7d AG |
590 | break; |
591 | case MSR_DR: | |
3eeafd7d | 592 | case MSR_IR: |
f7bc74e1 AG |
593 | vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid); |
594 | ||
666e7252 | 595 | if ((vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) == MSR_DR) |
f7bc74e1 AG |
596 | pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12)); |
597 | else | |
598 | pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12)); | |
599 | pte.vpage |= vsid; | |
600 | ||
601 | if (vsid == -1) | |
602 | page_found = -EINVAL; | |
3eeafd7d | 603 | break; |
2f4cf5e4 AG |
604 | } |
605 | ||
606 | if (vcpu->arch.mmu.is_dcbz32(vcpu) && | |
607 | (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) { | |
608 | /* | |
609 | * If we do the dcbz hack, we have to NX on every execution, | |
610 | * so we can patch the executing code. This renders our guest | |
611 | * NX-less. | |
612 | */ | |
613 | pte.may_execute = !data; | |
614 | } | |
615 | ||
616 | if (page_found == -ENOENT) { | |
617 | /* Page not found in guest PTE entries */ | |
5e030186 | 618 | vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); |
d562de48 | 619 | vcpu->arch.shared->dsisr = to_svcpu(vcpu)->fault_dsisr; |
666e7252 AG |
620 | vcpu->arch.shared->msr |= |
621 | (to_svcpu(vcpu)->shadow_srr1 & 0x00000000f8000000ULL); | |
2f4cf5e4 AG |
622 | kvmppc_book3s_queue_irqprio(vcpu, vec); |
623 | } else if (page_found == -EPERM) { | |
624 | /* Storage protection */ | |
5e030186 | 625 | vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); |
d562de48 AG |
626 | vcpu->arch.shared->dsisr = |
627 | to_svcpu(vcpu)->fault_dsisr & ~DSISR_NOHPTE; | |
628 | vcpu->arch.shared->dsisr |= DSISR_PROTFAULT; | |
666e7252 AG |
629 | vcpu->arch.shared->msr |= |
630 | (to_svcpu(vcpu)->shadow_srr1 & 0x00000000f8000000ULL); | |
2f4cf5e4 AG |
631 | kvmppc_book3s_queue_irqprio(vcpu, vec); |
632 | } else if (page_found == -EINVAL) { | |
633 | /* Page not found in guest SLB */ | |
5e030186 | 634 | vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); |
2f4cf5e4 AG |
635 | kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80); |
636 | } else if (!is_mmio && | |
637 | kvmppc_visible_gfn(vcpu, pte.raddr >> PAGE_SHIFT)) { | |
638 | /* The guest's PTE is not mapped yet. Map on the host */ | |
639 | kvmppc_mmu_map_page(vcpu, &pte); | |
640 | if (data) | |
641 | vcpu->stat.sp_storage++; | |
642 | else if (vcpu->arch.mmu.is_dcbz32(vcpu) && | |
643 | (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) | |
644 | kvmppc_patch_dcbz(vcpu, &pte); | |
645 | } else { | |
646 | /* MMIO */ | |
647 | vcpu->stat.mmio_exits++; | |
648 | vcpu->arch.paddr_accessed = pte.raddr; | |
649 | r = kvmppc_emulate_mmio(run, vcpu); | |
650 | if ( r == RESUME_HOST_NV ) | |
651 | r = RESUME_HOST; | |
2f4cf5e4 AG |
652 | } |
653 | ||
654 | return r; | |
655 | } | |
656 | ||
180a34d2 AG |
657 | static inline int get_fpr_index(int i) |
658 | { | |
659 | #ifdef CONFIG_VSX | |
660 | i *= 2; | |
661 | #endif | |
662 | return i; | |
663 | } | |
664 | ||
665 | /* Give up external provider (FPU, Altivec, VSX) */ | |
aba3bd7f | 666 | void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr) |
180a34d2 AG |
667 | { |
668 | struct thread_struct *t = ¤t->thread; | |
669 | u64 *vcpu_fpr = vcpu->arch.fpr; | |
a2b07664 | 670 | #ifdef CONFIG_VSX |
180a34d2 | 671 | u64 *vcpu_vsx = vcpu->arch.vsr; |
a2b07664 | 672 | #endif |
180a34d2 AG |
673 | u64 *thread_fpr = (u64*)t->fpr; |
674 | int i; | |
675 | ||
676 | if (!(vcpu->arch.guest_owned_ext & msr)) | |
677 | return; | |
678 | ||
679 | #ifdef DEBUG_EXT | |
680 | printk(KERN_INFO "Giving up ext 0x%lx\n", msr); | |
681 | #endif | |
682 | ||
683 | switch (msr) { | |
684 | case MSR_FP: | |
685 | giveup_fpu(current); | |
686 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) | |
687 | vcpu_fpr[i] = thread_fpr[get_fpr_index(i)]; | |
688 | ||
689 | vcpu->arch.fpscr = t->fpscr.val; | |
690 | break; | |
691 | case MSR_VEC: | |
692 | #ifdef CONFIG_ALTIVEC | |
693 | giveup_altivec(current); | |
694 | memcpy(vcpu->arch.vr, t->vr, sizeof(vcpu->arch.vr)); | |
695 | vcpu->arch.vscr = t->vscr; | |
696 | #endif | |
697 | break; | |
698 | case MSR_VSX: | |
699 | #ifdef CONFIG_VSX | |
700 | __giveup_vsx(current); | |
701 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr); i++) | |
702 | vcpu_vsx[i] = thread_fpr[get_fpr_index(i) + 1]; | |
703 | #endif | |
704 | break; | |
705 | default: | |
706 | BUG(); | |
707 | } | |
708 | ||
709 | vcpu->arch.guest_owned_ext &= ~msr; | |
710 | current->thread.regs->msr &= ~msr; | |
a76f8497 | 711 | kvmppc_recalc_shadow_msr(vcpu); |
180a34d2 AG |
712 | } |
713 | ||
8963221d | 714 | static int kvmppc_read_inst(struct kvm_vcpu *vcpu) |
c8c0b6f2 | 715 | { |
c7f38f46 AG |
716 | ulong srr0 = kvmppc_get_pc(vcpu); |
717 | u32 last_inst = kvmppc_get_last_inst(vcpu); | |
c8c0b6f2 AG |
718 | int ret; |
719 | ||
c7f38f46 | 720 | ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false); |
c8c0b6f2 | 721 | if (ret == -ENOENT) { |
666e7252 AG |
722 | ulong msr = vcpu->arch.shared->msr; |
723 | ||
724 | msr = kvmppc_set_field(msr, 33, 33, 1); | |
725 | msr = kvmppc_set_field(msr, 34, 36, 0); | |
726 | vcpu->arch.shared->msr = kvmppc_set_field(msr, 42, 47, 0); | |
c8c0b6f2 | 727 | kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE); |
8963221d AG |
728 | return EMULATE_AGAIN; |
729 | } | |
730 | ||
731 | return EMULATE_DONE; | |
732 | } | |
733 | ||
734 | static int kvmppc_check_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr) | |
735 | { | |
736 | ||
737 | /* Need to do paired single emulation? */ | |
738 | if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)) | |
739 | return EMULATE_DONE; | |
740 | ||
741 | /* Read out the instruction */ | |
742 | if (kvmppc_read_inst(vcpu) == EMULATE_DONE) | |
c8c0b6f2 AG |
743 | /* Need to emulate */ |
744 | return EMULATE_FAIL; | |
c8c0b6f2 AG |
745 | |
746 | return EMULATE_AGAIN; | |
747 | } | |
748 | ||
180a34d2 AG |
749 | /* Handle external providers (FPU, Altivec, VSX) */ |
750 | static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, | |
751 | ulong msr) | |
752 | { | |
753 | struct thread_struct *t = ¤t->thread; | |
754 | u64 *vcpu_fpr = vcpu->arch.fpr; | |
a2b07664 | 755 | #ifdef CONFIG_VSX |
180a34d2 | 756 | u64 *vcpu_vsx = vcpu->arch.vsr; |
a2b07664 | 757 | #endif |
180a34d2 AG |
758 | u64 *thread_fpr = (u64*)t->fpr; |
759 | int i; | |
760 | ||
3c402a75 AG |
761 | /* When we have paired singles, we emulate in software */ |
762 | if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) | |
763 | return RESUME_GUEST; | |
764 | ||
666e7252 | 765 | if (!(vcpu->arch.shared->msr & msr)) { |
180a34d2 AG |
766 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); |
767 | return RESUME_GUEST; | |
768 | } | |
769 | ||
c2453693 AG |
770 | /* We already own the ext */ |
771 | if (vcpu->arch.guest_owned_ext & msr) { | |
772 | return RESUME_GUEST; | |
773 | } | |
774 | ||
180a34d2 AG |
775 | #ifdef DEBUG_EXT |
776 | printk(KERN_INFO "Loading up ext 0x%lx\n", msr); | |
777 | #endif | |
778 | ||
779 | current->thread.regs->msr |= msr; | |
780 | ||
781 | switch (msr) { | |
782 | case MSR_FP: | |
783 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) | |
784 | thread_fpr[get_fpr_index(i)] = vcpu_fpr[i]; | |
785 | ||
786 | t->fpscr.val = vcpu->arch.fpscr; | |
787 | t->fpexc_mode = 0; | |
788 | kvmppc_load_up_fpu(); | |
789 | break; | |
790 | case MSR_VEC: | |
791 | #ifdef CONFIG_ALTIVEC | |
792 | memcpy(t->vr, vcpu->arch.vr, sizeof(vcpu->arch.vr)); | |
793 | t->vscr = vcpu->arch.vscr; | |
794 | t->vrsave = -1; | |
795 | kvmppc_load_up_altivec(); | |
796 | #endif | |
797 | break; | |
798 | case MSR_VSX: | |
799 | #ifdef CONFIG_VSX | |
800 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr); i++) | |
801 | thread_fpr[get_fpr_index(i) + 1] = vcpu_vsx[i]; | |
802 | kvmppc_load_up_vsx(); | |
803 | #endif | |
804 | break; | |
805 | default: | |
806 | BUG(); | |
807 | } | |
808 | ||
809 | vcpu->arch.guest_owned_ext |= msr; | |
810 | ||
a76f8497 | 811 | kvmppc_recalc_shadow_msr(vcpu); |
180a34d2 AG |
812 | |
813 | return RESUME_GUEST; | |
814 | } | |
815 | ||
2f4cf5e4 AG |
816 | int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, |
817 | unsigned int exit_nr) | |
818 | { | |
819 | int r = RESUME_HOST; | |
820 | ||
821 | vcpu->stat.sum_exits++; | |
822 | ||
823 | run->exit_reason = KVM_EXIT_UNKNOWN; | |
824 | run->ready_for_interrupt_injection = 1; | |
825 | #ifdef EXIT_DEBUG | |
826 | printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | dar=0x%lx | dec=0x%x | msr=0x%lx\n", | |
c7f38f46 AG |
827 | exit_nr, kvmppc_get_pc(vcpu), kvmppc_get_fault_dar(vcpu), |
828 | kvmppc_get_dec(vcpu), to_svcpu(vcpu)->shadow_srr1); | |
2f4cf5e4 AG |
829 | #elif defined (EXIT_DEBUG_SIMPLE) |
830 | if ((exit_nr != 0x900) && (exit_nr != 0x500)) | |
831 | printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | dar=0x%lx | msr=0x%lx\n", | |
c7f38f46 | 832 | exit_nr, kvmppc_get_pc(vcpu), kvmppc_get_fault_dar(vcpu), |
666e7252 | 833 | vcpu->arch.shared->msr); |
2f4cf5e4 AG |
834 | #endif |
835 | kvm_resched(vcpu); | |
836 | switch (exit_nr) { | |
837 | case BOOK3S_INTERRUPT_INST_STORAGE: | |
838 | vcpu->stat.pf_instruc++; | |
61db97cc AG |
839 | |
840 | #ifdef CONFIG_PPC_BOOK3S_32 | |
841 | /* We set segments as unused segments when invalidating them. So | |
842 | * treat the respective fault as segment fault. */ | |
843 | if (to_svcpu(vcpu)->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT] | |
844 | == SR_INVALID) { | |
845 | kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); | |
846 | r = RESUME_GUEST; | |
847 | break; | |
848 | } | |
849 | #endif | |
850 | ||
2f4cf5e4 | 851 | /* only care about PTEG not found errors, but leave NX alone */ |
c7f38f46 AG |
852 | if (to_svcpu(vcpu)->shadow_srr1 & 0x40000000) { |
853 | r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr); | |
2f4cf5e4 AG |
854 | vcpu->stat.sp_instruc++; |
855 | } else if (vcpu->arch.mmu.is_dcbz32(vcpu) && | |
856 | (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) { | |
857 | /* | |
858 | * XXX If we do the dcbz hack we use the NX bit to flush&patch the page, | |
859 | * so we can't use the NX bit inside the guest. Let's cross our fingers, | |
860 | * that no guest that needs the dcbz hack does NX. | |
861 | */ | |
af7b4d10 | 862 | kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL); |
9fb244a2 | 863 | r = RESUME_GUEST; |
2f4cf5e4 | 864 | } else { |
666e7252 AG |
865 | vcpu->arch.shared->msr |= |
866 | to_svcpu(vcpu)->shadow_srr1 & 0x58000000; | |
2f4cf5e4 | 867 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); |
af7b4d10 | 868 | kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL); |
2f4cf5e4 AG |
869 | r = RESUME_GUEST; |
870 | } | |
871 | break; | |
872 | case BOOK3S_INTERRUPT_DATA_STORAGE: | |
c7f38f46 AG |
873 | { |
874 | ulong dar = kvmppc_get_fault_dar(vcpu); | |
2f4cf5e4 | 875 | vcpu->stat.pf_storage++; |
61db97cc AG |
876 | |
877 | #ifdef CONFIG_PPC_BOOK3S_32 | |
878 | /* We set segments as unused segments when invalidating them. So | |
879 | * treat the respective fault as segment fault. */ | |
880 | if ((to_svcpu(vcpu)->sr[dar >> SID_SHIFT]) == SR_INVALID) { | |
881 | kvmppc_mmu_map_segment(vcpu, dar); | |
882 | r = RESUME_GUEST; | |
883 | break; | |
884 | } | |
885 | #endif | |
886 | ||
2f4cf5e4 | 887 | /* The only case we need to handle is missing shadow PTEs */ |
c7f38f46 AG |
888 | if (to_svcpu(vcpu)->fault_dsisr & DSISR_NOHPTE) { |
889 | r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr); | |
2f4cf5e4 | 890 | } else { |
5e030186 | 891 | vcpu->arch.shared->dar = dar; |
d562de48 | 892 | vcpu->arch.shared->dsisr = to_svcpu(vcpu)->fault_dsisr; |
2f4cf5e4 | 893 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); |
5e030186 | 894 | kvmppc_mmu_pte_flush(vcpu, dar, ~0xFFFUL); |
2f4cf5e4 AG |
895 | r = RESUME_GUEST; |
896 | } | |
897 | break; | |
c7f38f46 | 898 | } |
2f4cf5e4 | 899 | case BOOK3S_INTERRUPT_DATA_SEGMENT: |
c7f38f46 | 900 | if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) { |
5e030186 | 901 | vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); |
2f4cf5e4 AG |
902 | kvmppc_book3s_queue_irqprio(vcpu, |
903 | BOOK3S_INTERRUPT_DATA_SEGMENT); | |
904 | } | |
905 | r = RESUME_GUEST; | |
906 | break; | |
907 | case BOOK3S_INTERRUPT_INST_SEGMENT: | |
c7f38f46 | 908 | if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) { |
2f4cf5e4 AG |
909 | kvmppc_book3s_queue_irqprio(vcpu, |
910 | BOOK3S_INTERRUPT_INST_SEGMENT); | |
911 | } | |
912 | r = RESUME_GUEST; | |
913 | break; | |
914 | /* We're good on these - the host merely wanted to get our attention */ | |
915 | case BOOK3S_INTERRUPT_DECREMENTER: | |
916 | vcpu->stat.dec_exits++; | |
917 | r = RESUME_GUEST; | |
918 | break; | |
919 | case BOOK3S_INTERRUPT_EXTERNAL: | |
920 | vcpu->stat.ext_intr_exits++; | |
921 | r = RESUME_GUEST; | |
922 | break; | |
7fdaec99 AG |
923 | case BOOK3S_INTERRUPT_PERFMON: |
924 | r = RESUME_GUEST; | |
925 | break; | |
2f4cf5e4 AG |
926 | case BOOK3S_INTERRUPT_PROGRAM: |
927 | { | |
928 | enum emulation_result er; | |
ff1ca3f9 AG |
929 | ulong flags; |
930 | ||
c8c0b6f2 | 931 | program_interrupt: |
c7f38f46 | 932 | flags = to_svcpu(vcpu)->shadow_srr1 & 0x1f0000ull; |
2f4cf5e4 | 933 | |
666e7252 | 934 | if (vcpu->arch.shared->msr & MSR_PR) { |
2f4cf5e4 | 935 | #ifdef EXIT_DEBUG |
c7f38f46 | 936 | printk(KERN_INFO "Userspace triggered 0x700 exception at 0x%lx (0x%x)\n", kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu)); |
2f4cf5e4 | 937 | #endif |
c7f38f46 | 938 | if ((kvmppc_get_last_inst(vcpu) & 0xff0007ff) != |
2f4cf5e4 | 939 | (INS_DCBZ & 0xfffffff7)) { |
ff1ca3f9 | 940 | kvmppc_core_queue_program(vcpu, flags); |
2f4cf5e4 AG |
941 | r = RESUME_GUEST; |
942 | break; | |
943 | } | |
944 | } | |
945 | ||
946 | vcpu->stat.emulated_inst_exits++; | |
947 | er = kvmppc_emulate_instruction(run, vcpu); | |
948 | switch (er) { | |
949 | case EMULATE_DONE: | |
97c4cfbe | 950 | r = RESUME_GUEST_NV; |
2f4cf5e4 | 951 | break; |
37f5bca6 AG |
952 | case EMULATE_AGAIN: |
953 | r = RESUME_GUEST; | |
954 | break; | |
2f4cf5e4 AG |
955 | case EMULATE_FAIL: |
956 | printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", | |
c7f38f46 | 957 | __func__, kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu)); |
ff1ca3f9 | 958 | kvmppc_core_queue_program(vcpu, flags); |
2f4cf5e4 AG |
959 | r = RESUME_GUEST; |
960 | break; | |
e5c29e92 AG |
961 | case EMULATE_DO_MMIO: |
962 | run->exit_reason = KVM_EXIT_MMIO; | |
963 | r = RESUME_HOST_NV; | |
964 | break; | |
2f4cf5e4 AG |
965 | default: |
966 | BUG(); | |
967 | } | |
968 | break; | |
969 | } | |
970 | case BOOK3S_INTERRUPT_SYSCALL: | |
ad0a048b AG |
971 | if (vcpu->arch.osi_enabled && |
972 | (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) && | |
973 | (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) { | |
2a342ed5 | 974 | /* MOL hypercalls */ |
ad0a048b AG |
975 | u64 *gprs = run->osi.gprs; |
976 | int i; | |
977 | ||
978 | run->exit_reason = KVM_EXIT_OSI; | |
979 | for (i = 0; i < 32; i++) | |
980 | gprs[i] = kvmppc_get_gpr(vcpu, i); | |
981 | vcpu->arch.osi_needed = 1; | |
982 | r = RESUME_HOST_NV; | |
2a342ed5 AG |
983 | } else if (!(vcpu->arch.shared->msr & MSR_PR) && |
984 | (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { | |
985 | /* KVM PV hypercalls */ | |
986 | kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); | |
987 | r = RESUME_GUEST; | |
ad0a048b | 988 | } else { |
2a342ed5 | 989 | /* Guest syscalls */ |
ad0a048b AG |
990 | vcpu->stat.syscall_exits++; |
991 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); | |
992 | r = RESUME_GUEST; | |
993 | } | |
2f4cf5e4 | 994 | break; |
2f4cf5e4 | 995 | case BOOK3S_INTERRUPT_FP_UNAVAIL: |
2f4cf5e4 AG |
996 | case BOOK3S_INTERRUPT_ALTIVEC: |
997 | case BOOK3S_INTERRUPT_VSX: | |
c8c0b6f2 AG |
998 | { |
999 | int ext_msr = 0; | |
1000 | ||
1001 | switch (exit_nr) { | |
1002 | case BOOK3S_INTERRUPT_FP_UNAVAIL: ext_msr = MSR_FP; break; | |
1003 | case BOOK3S_INTERRUPT_ALTIVEC: ext_msr = MSR_VEC; break; | |
1004 | case BOOK3S_INTERRUPT_VSX: ext_msr = MSR_VSX; break; | |
1005 | } | |
1006 | ||
1007 | switch (kvmppc_check_ext(vcpu, exit_nr)) { | |
1008 | case EMULATE_DONE: | |
1009 | /* everything ok - let's enable the ext */ | |
1010 | r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr); | |
1011 | break; | |
1012 | case EMULATE_FAIL: | |
1013 | /* we need to emulate this instruction */ | |
1014 | goto program_interrupt; | |
1015 | break; | |
1016 | default: | |
1017 | /* nothing to worry about - go again */ | |
1018 | break; | |
1019 | } | |
180a34d2 | 1020 | break; |
c8c0b6f2 | 1021 | } |
ca7f4203 AG |
1022 | case BOOK3S_INTERRUPT_ALIGNMENT: |
1023 | if (kvmppc_read_inst(vcpu) == EMULATE_DONE) { | |
d562de48 | 1024 | vcpu->arch.shared->dsisr = kvmppc_alignment_dsisr(vcpu, |
c7f38f46 | 1025 | kvmppc_get_last_inst(vcpu)); |
5e030186 | 1026 | vcpu->arch.shared->dar = kvmppc_alignment_dar(vcpu, |
c7f38f46 | 1027 | kvmppc_get_last_inst(vcpu)); |
ca7f4203 AG |
1028 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); |
1029 | } | |
1030 | r = RESUME_GUEST; | |
1031 | break; | |
180a34d2 AG |
1032 | case BOOK3S_INTERRUPT_MACHINE_CHECK: |
1033 | case BOOK3S_INTERRUPT_TRACE: | |
2f4cf5e4 AG |
1034 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); |
1035 | r = RESUME_GUEST; | |
1036 | break; | |
1037 | default: | |
1038 | /* Ugh - bork here! What did we get? */ | |
f7adbba1 | 1039 | printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n", |
c7f38f46 | 1040 | exit_nr, kvmppc_get_pc(vcpu), to_svcpu(vcpu)->shadow_srr1); |
2f4cf5e4 AG |
1041 | r = RESUME_HOST; |
1042 | BUG(); | |
1043 | break; | |
1044 | } | |
1045 | ||
1046 | ||
1047 | if (!(r & RESUME_HOST)) { | |
1048 | /* To avoid clobbering exit_reason, only check for signals if | |
1049 | * we aren't already exiting to userspace for some other | |
1050 | * reason. */ | |
1051 | if (signal_pending(current)) { | |
1052 | #ifdef EXIT_DEBUG | |
1053 | printk(KERN_EMERG "KVM: Going back to host\n"); | |
1054 | #endif | |
1055 | vcpu->stat.signal_exits++; | |
1056 | run->exit_reason = KVM_EXIT_INTR; | |
1057 | r = -EINTR; | |
1058 | } else { | |
1059 | /* In case an interrupt came in that was triggered | |
1060 | * from userspace (like DEC), we need to check what | |
1061 | * to inject now! */ | |
1062 | kvmppc_core_deliver_interrupts(vcpu); | |
1063 | } | |
1064 | } | |
1065 | ||
1066 | #ifdef EXIT_DEBUG | |
c7f38f46 | 1067 | printk(KERN_EMERG "KVM exit: vcpu=0x%p pc=0x%lx r=0x%x\n", vcpu, kvmppc_get_pc(vcpu), r); |
2f4cf5e4 AG |
1068 | #endif |
1069 | ||
1070 | return r; | |
1071 | } | |
1072 | ||
1073 | int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) | |
1074 | { | |
1075 | return 0; | |
1076 | } | |
1077 | ||
1078 | int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |
1079 | { | |
1080 | int i; | |
1081 | ||
c7f38f46 | 1082 | regs->pc = kvmppc_get_pc(vcpu); |
992b5b29 | 1083 | regs->cr = kvmppc_get_cr(vcpu); |
c7f38f46 AG |
1084 | regs->ctr = kvmppc_get_ctr(vcpu); |
1085 | regs->lr = kvmppc_get_lr(vcpu); | |
992b5b29 | 1086 | regs->xer = kvmppc_get_xer(vcpu); |
666e7252 | 1087 | regs->msr = vcpu->arch.shared->msr; |
de7906c3 AG |
1088 | regs->srr0 = vcpu->arch.shared->srr0; |
1089 | regs->srr1 = vcpu->arch.shared->srr1; | |
2f4cf5e4 | 1090 | regs->pid = vcpu->arch.pid; |
a73a9599 AG |
1091 | regs->sprg0 = vcpu->arch.shared->sprg0; |
1092 | regs->sprg1 = vcpu->arch.shared->sprg1; | |
1093 | regs->sprg2 = vcpu->arch.shared->sprg2; | |
1094 | regs->sprg3 = vcpu->arch.shared->sprg3; | |
2f4cf5e4 AG |
1095 | regs->sprg5 = vcpu->arch.sprg4; |
1096 | regs->sprg6 = vcpu->arch.sprg5; | |
1097 | regs->sprg7 = vcpu->arch.sprg6; | |
1098 | ||
1099 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) | |
8e5b26b5 | 1100 | regs->gpr[i] = kvmppc_get_gpr(vcpu, i); |
2f4cf5e4 AG |
1101 | |
1102 | return 0; | |
1103 | } | |
1104 | ||
1105 | int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |
1106 | { | |
1107 | int i; | |
1108 | ||
c7f38f46 | 1109 | kvmppc_set_pc(vcpu, regs->pc); |
992b5b29 | 1110 | kvmppc_set_cr(vcpu, regs->cr); |
c7f38f46 AG |
1111 | kvmppc_set_ctr(vcpu, regs->ctr); |
1112 | kvmppc_set_lr(vcpu, regs->lr); | |
992b5b29 | 1113 | kvmppc_set_xer(vcpu, regs->xer); |
2f4cf5e4 | 1114 | kvmppc_set_msr(vcpu, regs->msr); |
de7906c3 AG |
1115 | vcpu->arch.shared->srr0 = regs->srr0; |
1116 | vcpu->arch.shared->srr1 = regs->srr1; | |
a73a9599 AG |
1117 | vcpu->arch.shared->sprg0 = regs->sprg0; |
1118 | vcpu->arch.shared->sprg1 = regs->sprg1; | |
1119 | vcpu->arch.shared->sprg2 = regs->sprg2; | |
1120 | vcpu->arch.shared->sprg3 = regs->sprg3; | |
2f4cf5e4 AG |
1121 | vcpu->arch.sprg5 = regs->sprg4; |
1122 | vcpu->arch.sprg6 = regs->sprg5; | |
1123 | vcpu->arch.sprg7 = regs->sprg6; | |
1124 | ||
8e5b26b5 AG |
1125 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) |
1126 | kvmppc_set_gpr(vcpu, i, regs->gpr[i]); | |
2f4cf5e4 AG |
1127 | |
1128 | return 0; | |
1129 | } | |
1130 | ||
1131 | int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, | |
1132 | struct kvm_sregs *sregs) | |
1133 | { | |
e15a1137 AG |
1134 | struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); |
1135 | int i; | |
1136 | ||
2f4cf5e4 | 1137 | sregs->pvr = vcpu->arch.pvr; |
e15a1137 AG |
1138 | |
1139 | sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1; | |
1140 | if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) { | |
1141 | for (i = 0; i < 64; i++) { | |
1142 | sregs->u.s.ppc64.slb[i].slbe = vcpu3s->slb[i].orige | i; | |
1143 | sregs->u.s.ppc64.slb[i].slbv = vcpu3s->slb[i].origv; | |
1144 | } | |
1145 | } else { | |
1146 | for (i = 0; i < 16; i++) { | |
1147 | sregs->u.s.ppc32.sr[i] = vcpu3s->sr[i].raw; | |
1148 | sregs->u.s.ppc32.sr[i] = vcpu3s->sr[i].raw; | |
1149 | } | |
1150 | for (i = 0; i < 8; i++) { | |
1151 | sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw; | |
1152 | sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw; | |
1153 | } | |
1154 | } | |
98001d8d | 1155 | |
2f4cf5e4 AG |
1156 | return 0; |
1157 | } | |
1158 | ||
1159 | int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, | |
1160 | struct kvm_sregs *sregs) | |
1161 | { | |
e15a1137 AG |
1162 | struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); |
1163 | int i; | |
1164 | ||
2f4cf5e4 | 1165 | kvmppc_set_pvr(vcpu, sregs->pvr); |
e15a1137 AG |
1166 | |
1167 | vcpu3s->sdr1 = sregs->u.s.sdr1; | |
1168 | if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) { | |
1169 | for (i = 0; i < 64; i++) { | |
1170 | vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv, | |
1171 | sregs->u.s.ppc64.slb[i].slbe); | |
1172 | } | |
1173 | } else { | |
1174 | for (i = 0; i < 16; i++) { | |
1175 | vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]); | |
1176 | } | |
1177 | for (i = 0; i < 8; i++) { | |
1178 | kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false, | |
1179 | (u32)sregs->u.s.ppc32.ibat[i]); | |
1180 | kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true, | |
1181 | (u32)(sregs->u.s.ppc32.ibat[i] >> 32)); | |
1182 | kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false, | |
1183 | (u32)sregs->u.s.ppc32.dbat[i]); | |
1184 | kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true, | |
1185 | (u32)(sregs->u.s.ppc32.dbat[i] >> 32)); | |
1186 | } | |
1187 | } | |
1188 | ||
1189 | /* Flush the MMU after messing with the segments */ | |
1190 | kvmppc_mmu_pte_flush(vcpu, 0, 0); | |
98001d8d | 1191 | |
2f4cf5e4 AG |
1192 | return 0; |
1193 | } | |
1194 | ||
1195 | int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) | |
1196 | { | |
1197 | return -ENOTSUPP; | |
1198 | } | |
1199 | ||
1200 | int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) | |
1201 | { | |
1202 | return -ENOTSUPP; | |
1203 | } | |
1204 | ||
1205 | int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, | |
1206 | struct kvm_translation *tr) | |
1207 | { | |
1208 | return 0; | |
1209 | } | |
1210 | ||
1211 | /* | |
1212 | * Get (and clear) the dirty memory log for a memory slot. | |
1213 | */ | |
1214 | int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, | |
1215 | struct kvm_dirty_log *log) | |
1216 | { | |
1217 | struct kvm_memory_slot *memslot; | |
1218 | struct kvm_vcpu *vcpu; | |
1219 | ulong ga, ga_end; | |
1220 | int is_dirty = 0; | |
87bf6e7d TY |
1221 | int r; |
1222 | unsigned long n; | |
2f4cf5e4 | 1223 | |
79fac95e | 1224 | mutex_lock(&kvm->slots_lock); |
2f4cf5e4 AG |
1225 | |
1226 | r = kvm_get_dirty_log(kvm, log, &is_dirty); | |
1227 | if (r) | |
1228 | goto out; | |
1229 | ||
1230 | /* If nothing is dirty, don't bother messing with page tables. */ | |
1231 | if (is_dirty) { | |
46a26bf5 | 1232 | memslot = &kvm->memslots->memslots[log->slot]; |
2f4cf5e4 AG |
1233 | |
1234 | ga = memslot->base_gfn << PAGE_SHIFT; | |
1235 | ga_end = ga + (memslot->npages << PAGE_SHIFT); | |
1236 | ||
1237 | kvm_for_each_vcpu(n, vcpu, kvm) | |
1238 | kvmppc_mmu_pte_pflush(vcpu, ga, ga_end); | |
1239 | ||
87bf6e7d | 1240 | n = kvm_dirty_bitmap_bytes(memslot); |
2f4cf5e4 AG |
1241 | memset(memslot->dirty_bitmap, 0, n); |
1242 | } | |
1243 | ||
1244 | r = 0; | |
1245 | out: | |
79fac95e | 1246 | mutex_unlock(&kvm->slots_lock); |
2f4cf5e4 AG |
1247 | return r; |
1248 | } | |
1249 | ||
1250 | int kvmppc_core_check_processor_compat(void) | |
1251 | { | |
1252 | return 0; | |
1253 | } | |
1254 | ||
1255 | struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) | |
1256 | { | |
1257 | struct kvmppc_vcpu_book3s *vcpu_book3s; | |
1258 | struct kvm_vcpu *vcpu; | |
c7f38f46 | 1259 | int err = -ENOMEM; |
2f4cf5e4 | 1260 | |
032c3407 | 1261 | vcpu_book3s = vmalloc(sizeof(struct kvmppc_vcpu_book3s)); |
c7f38f46 | 1262 | if (!vcpu_book3s) |
2f4cf5e4 | 1263 | goto out; |
c7f38f46 | 1264 | |
7e821d39 | 1265 | memset(vcpu_book3s, 0, sizeof(struct kvmppc_vcpu_book3s)); |
2f4cf5e4 | 1266 | |
c7f38f46 AG |
1267 | vcpu_book3s->shadow_vcpu = (struct kvmppc_book3s_shadow_vcpu *) |
1268 | kzalloc(sizeof(*vcpu_book3s->shadow_vcpu), GFP_KERNEL); | |
1269 | if (!vcpu_book3s->shadow_vcpu) | |
1270 | goto free_vcpu; | |
1271 | ||
2f4cf5e4 AG |
1272 | vcpu = &vcpu_book3s->vcpu; |
1273 | err = kvm_vcpu_init(vcpu, kvm, id); | |
1274 | if (err) | |
c7f38f46 | 1275 | goto free_shadow_vcpu; |
2f4cf5e4 | 1276 | |
96bc451a AG |
1277 | vcpu->arch.shared = (void*)__get_free_page(GFP_KERNEL|__GFP_ZERO); |
1278 | if (!vcpu->arch.shared) | |
1279 | goto uninit_vcpu; | |
1280 | ||
2f4cf5e4 AG |
1281 | vcpu->arch.host_retip = kvm_return_point; |
1282 | vcpu->arch.host_msr = mfmsr(); | |
07b0907d | 1283 | #ifdef CONFIG_PPC_BOOK3S_64 |
2f4cf5e4 AG |
1284 | /* default to book3s_64 (970fx) */ |
1285 | vcpu->arch.pvr = 0x3C0301; | |
07b0907d AG |
1286 | #else |
1287 | /* default to book3s_32 (750) */ | |
1288 | vcpu->arch.pvr = 0x84202; | |
1289 | #endif | |
2f4cf5e4 AG |
1290 | kvmppc_set_pvr(vcpu, vcpu->arch.pvr); |
1291 | vcpu_book3s->slb_nr = 64; | |
1292 | ||
1293 | /* remember where some real-mode handlers are */ | |
1294 | vcpu->arch.trampoline_lowmem = kvmppc_trampoline_lowmem; | |
1295 | vcpu->arch.trampoline_enter = kvmppc_trampoline_enter; | |
1296 | vcpu->arch.highmem_handler = (ulong)kvmppc_handler_highmem; | |
07b0907d | 1297 | #ifdef CONFIG_PPC_BOOK3S_64 |
021ec9c6 | 1298 | vcpu->arch.rmcall = *(ulong*)kvmppc_rmcall; |
07b0907d AG |
1299 | #else |
1300 | vcpu->arch.rmcall = (ulong)kvmppc_rmcall; | |
1301 | #endif | |
2f4cf5e4 AG |
1302 | |
1303 | vcpu->arch.shadow_msr = MSR_USER64; | |
1304 | ||
9cc5e953 | 1305 | err = kvmppc_mmu_init(vcpu); |
2f4cf5e4 | 1306 | if (err < 0) |
96bc451a | 1307 | goto uninit_vcpu; |
2f4cf5e4 AG |
1308 | |
1309 | return vcpu; | |
1310 | ||
96bc451a AG |
1311 | uninit_vcpu: |
1312 | kvm_vcpu_uninit(vcpu); | |
c7f38f46 AG |
1313 | free_shadow_vcpu: |
1314 | kfree(vcpu_book3s->shadow_vcpu); | |
2f4cf5e4 | 1315 | free_vcpu: |
032c3407 | 1316 | vfree(vcpu_book3s); |
2f4cf5e4 AG |
1317 | out: |
1318 | return ERR_PTR(err); | |
1319 | } | |
1320 | ||
1321 | void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) | |
1322 | { | |
1323 | struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); | |
1324 | ||
96bc451a | 1325 | free_page((unsigned long)vcpu->arch.shared); |
2f4cf5e4 | 1326 | kvm_vcpu_uninit(vcpu); |
c7f38f46 | 1327 | kfree(vcpu_book3s->shadow_vcpu); |
032c3407 | 1328 | vfree(vcpu_book3s); |
2f4cf5e4 AG |
1329 | } |
1330 | ||
1331 | extern int __kvmppc_vcpu_entry(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu); | |
1332 | int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) | |
1333 | { | |
1334 | int ret; | |
49f6be8e AS |
1335 | double fpr[32][TS_FPRWIDTH]; |
1336 | unsigned int fpscr; | |
1337 | int fpexc_mode; | |
a2b07664 | 1338 | #ifdef CONFIG_ALTIVEC |
49f6be8e AS |
1339 | vector128 vr[32]; |
1340 | vector128 vscr; | |
1341 | unsigned long uninitialized_var(vrsave); | |
1342 | int used_vr; | |
a2b07664 AG |
1343 | #endif |
1344 | #ifdef CONFIG_VSX | |
49f6be8e | 1345 | int used_vsr; |
a2b07664 | 1346 | #endif |
180a34d2 | 1347 | ulong ext_msr; |
2f4cf5e4 AG |
1348 | |
1349 | /* No need to go into the guest when all we do is going out */ | |
1350 | if (signal_pending(current)) { | |
1351 | kvm_run->exit_reason = KVM_EXIT_INTR; | |
1352 | return -EINTR; | |
1353 | } | |
1354 | ||
180a34d2 AG |
1355 | /* Save FPU state in stack */ |
1356 | if (current->thread.regs->msr & MSR_FP) | |
1357 | giveup_fpu(current); | |
49f6be8e AS |
1358 | memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr)); |
1359 | fpscr = current->thread.fpscr.val; | |
1360 | fpexc_mode = current->thread.fpexc_mode; | |
180a34d2 AG |
1361 | |
1362 | #ifdef CONFIG_ALTIVEC | |
1363 | /* Save Altivec state in stack */ | |
49f6be8e AS |
1364 | used_vr = current->thread.used_vr; |
1365 | if (used_vr) { | |
180a34d2 AG |
1366 | if (current->thread.regs->msr & MSR_VEC) |
1367 | giveup_altivec(current); | |
49f6be8e AS |
1368 | memcpy(vr, current->thread.vr, sizeof(current->thread.vr)); |
1369 | vscr = current->thread.vscr; | |
1370 | vrsave = current->thread.vrsave; | |
180a34d2 | 1371 | } |
180a34d2 AG |
1372 | #endif |
1373 | ||
1374 | #ifdef CONFIG_VSX | |
1375 | /* Save VSX state in stack */ | |
49f6be8e AS |
1376 | used_vsr = current->thread.used_vsr; |
1377 | if (used_vsr && (current->thread.regs->msr & MSR_VSX)) | |
180a34d2 | 1378 | __giveup_vsx(current); |
180a34d2 AG |
1379 | #endif |
1380 | ||
1381 | /* Remember the MSR with disabled extensions */ | |
1382 | ext_msr = current->thread.regs->msr; | |
1383 | ||
2f4cf5e4 AG |
1384 | /* XXX we get called with irq disabled - change that! */ |
1385 | local_irq_enable(); | |
1386 | ||
d1bab74c | 1387 | /* Preload FPU if it's enabled */ |
666e7252 | 1388 | if (vcpu->arch.shared->msr & MSR_FP) |
d1bab74c AG |
1389 | kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); |
1390 | ||
2f4cf5e4 AG |
1391 | ret = __kvmppc_vcpu_entry(kvm_run, vcpu); |
1392 | ||
1393 | local_irq_disable(); | |
1394 | ||
180a34d2 AG |
1395 | current->thread.regs->msr = ext_msr; |
1396 | ||
1397 | /* Make sure we save the guest FPU/Altivec/VSX state */ | |
1398 | kvmppc_giveup_ext(vcpu, MSR_FP); | |
1399 | kvmppc_giveup_ext(vcpu, MSR_VEC); | |
1400 | kvmppc_giveup_ext(vcpu, MSR_VSX); | |
1401 | ||
1402 | /* Restore FPU state from stack */ | |
49f6be8e AS |
1403 | memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr)); |
1404 | current->thread.fpscr.val = fpscr; | |
1405 | current->thread.fpexc_mode = fpexc_mode; | |
180a34d2 AG |
1406 | |
1407 | #ifdef CONFIG_ALTIVEC | |
1408 | /* Restore Altivec state from stack */ | |
49f6be8e AS |
1409 | if (used_vr && current->thread.used_vr) { |
1410 | memcpy(current->thread.vr, vr, sizeof(current->thread.vr)); | |
1411 | current->thread.vscr = vscr; | |
1412 | current->thread.vrsave = vrsave; | |
180a34d2 | 1413 | } |
49f6be8e | 1414 | current->thread.used_vr = used_vr; |
180a34d2 AG |
1415 | #endif |
1416 | ||
1417 | #ifdef CONFIG_VSX | |
49f6be8e | 1418 | current->thread.used_vsr = used_vsr; |
180a34d2 AG |
1419 | #endif |
1420 | ||
2f4cf5e4 AG |
1421 | return ret; |
1422 | } | |
1423 | ||
1424 | static int kvmppc_book3s_init(void) | |
1425 | { | |
fef093be AG |
1426 | int r; |
1427 | ||
1428 | r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_book3s), 0, | |
1429 | THIS_MODULE); | |
1430 | ||
1431 | if (r) | |
1432 | return r; | |
1433 | ||
1434 | r = kvmppc_mmu_hpte_sysinit(); | |
1435 | ||
1436 | return r; | |
2f4cf5e4 AG |
1437 | } |
1438 | ||
1439 | static void kvmppc_book3s_exit(void) | |
1440 | { | |
fef093be | 1441 | kvmppc_mmu_hpte_sysexit(); |
2f4cf5e4 AG |
1442 | kvm_exit(); |
1443 | } | |
1444 | ||
1445 | module_init(kvmppc_book3s_init); | |
1446 | module_exit(kvmppc_book3s_exit); |